Gan likun / The prosthetic control

The prosthetic control（MIT）

targets/TARGET_STM/gpio_api.c@0:20e0c61e0684, 2022-06-23 (annotated)

Committer:
ganlikun
Date:
Thu Jun 23 05:23:34 2022 +0000
Revision:
0:20e0c61e0684
01

Who changed what in which revision?

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ganlikun 0:20e0c61e0684 1 /* mbed Microcontroller Library
ganlikun 0:20e0c61e0684 2 *******************************************************************************
ganlikun 0:20e0c61e0684 3 * Copyright (c) 2015, STMicroelectronics
ganlikun 0:20e0c61e0684 4 * All rights reserved.
ganlikun 0:20e0c61e0684 5 *
ganlikun 0:20e0c61e0684 6 * Redistribution and use in source and binary forms, with or without
ganlikun 0:20e0c61e0684 7 * modification, are permitted provided that the following conditions are met:
ganlikun 0:20e0c61e0684 8 *
ganlikun 0:20e0c61e0684 9 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:20e0c61e0684 10 * this list of conditions and the following disclaimer.
ganlikun 0:20e0c61e0684 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:20e0c61e0684 12 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:20e0c61e0684 13 * and/or other materials provided with the distribution.
ganlikun 0:20e0c61e0684 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:20e0c61e0684 15 * may be used to endorse or promote products derived from this software
ganlikun 0:20e0c61e0684 16 * without specific prior written permission.
ganlikun 0:20e0c61e0684 17 *
ganlikun 0:20e0c61e0684 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:20e0c61e0684 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:20e0c61e0684 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:20e0c61e0684 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:20e0c61e0684 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:20e0c61e0684 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:20e0c61e0684 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:20e0c61e0684 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:20e0c61e0684 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:20e0c61e0684 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:20e0c61e0684 28 *******************************************************************************
ganlikun 0:20e0c61e0684 29 */
ganlikun 0:20e0c61e0684 30 #include "mbed_assert.h"
ganlikun 0:20e0c61e0684 31 #include "gpio_api.h"
ganlikun 0:20e0c61e0684 32 #include "pinmap.h"
ganlikun 0:20e0c61e0684 33 #include "mbed_error.h"
ganlikun 0:20e0c61e0684 34 #include "pin_device.h"
ganlikun 0:20e0c61e0684 35
ganlikun 0:20e0c61e0684 36 extern const uint32_t ll_pin_defines[16];
ganlikun 0:20e0c61e0684 37
ganlikun 0:20e0c61e0684 38 // Enable GPIO clock and return GPIO base address
ganlikun 0:20e0c61e0684 39 GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx) {
ganlikun 0:20e0c61e0684 40 uint32_t gpio_add = 0;
ganlikun 0:20e0c61e0684 41 switch (port_idx) {
ganlikun 0:20e0c61e0684 42 case PortA:
ganlikun 0:20e0c61e0684 43 gpio_add = GPIOA_BASE;
ganlikun 0:20e0c61e0684 44 __HAL_RCC_GPIOA_CLK_ENABLE();
ganlikun 0:20e0c61e0684 45 break;
ganlikun 0:20e0c61e0684 46 case PortB:
ganlikun 0:20e0c61e0684 47 gpio_add = GPIOB_BASE;
ganlikun 0:20e0c61e0684 48 __HAL_RCC_GPIOB_CLK_ENABLE();
ganlikun 0:20e0c61e0684 49 break;
ganlikun 0:20e0c61e0684 50 #if defined(GPIOC_BASE)
ganlikun 0:20e0c61e0684 51 case PortC:
ganlikun 0:20e0c61e0684 52 gpio_add = GPIOC_BASE;
ganlikun 0:20e0c61e0684 53 __HAL_RCC_GPIOC_CLK_ENABLE();
ganlikun 0:20e0c61e0684 54 break;
ganlikun 0:20e0c61e0684 55 #endif
ganlikun 0:20e0c61e0684 56 #if defined GPIOD_BASE
ganlikun 0:20e0c61e0684 57 case PortD:
ganlikun 0:20e0c61e0684 58 gpio_add = GPIOD_BASE;
ganlikun 0:20e0c61e0684 59 __HAL_RCC_GPIOD_CLK_ENABLE();
ganlikun 0:20e0c61e0684 60 break;
ganlikun 0:20e0c61e0684 61 #endif
ganlikun 0:20e0c61e0684 62 #if defined GPIOE_BASE
ganlikun 0:20e0c61e0684 63 case PortE:
ganlikun 0:20e0c61e0684 64 gpio_add = GPIOE_BASE;
ganlikun 0:20e0c61e0684 65 __HAL_RCC_GPIOE_CLK_ENABLE();
ganlikun 0:20e0c61e0684 66 break;
ganlikun 0:20e0c61e0684 67 #endif
ganlikun 0:20e0c61e0684 68 #if defined GPIOF_BASE
ganlikun 0:20e0c61e0684 69 case PortF:
ganlikun 0:20e0c61e0684 70 gpio_add = GPIOF_BASE;
ganlikun 0:20e0c61e0684 71 __HAL_RCC_GPIOF_CLK_ENABLE();
ganlikun 0:20e0c61e0684 72 break;
ganlikun 0:20e0c61e0684 73 #endif
ganlikun 0:20e0c61e0684 74 #if defined GPIOG_BASE
ganlikun 0:20e0c61e0684 75 case PortG:
ganlikun 0:20e0c61e0684 76 #if defined TARGET_STM32L4
ganlikun 0:20e0c61e0684 77 __HAL_RCC_PWR_CLK_ENABLE();
ganlikun 0:20e0c61e0684 78 HAL_PWREx_EnableVddIO2();
ganlikun 0:20e0c61e0684 79 #endif
ganlikun 0:20e0c61e0684 80 gpio_add = GPIOG_BASE;
ganlikun 0:20e0c61e0684 81 __HAL_RCC_GPIOG_CLK_ENABLE();
ganlikun 0:20e0c61e0684 82 break;
ganlikun 0:20e0c61e0684 83 #endif
ganlikun 0:20e0c61e0684 84 #if defined GPIOH_BASE
ganlikun 0:20e0c61e0684 85 case PortH:
ganlikun 0:20e0c61e0684 86 gpio_add = GPIOH_BASE;
ganlikun 0:20e0c61e0684 87 __HAL_RCC_GPIOH_CLK_ENABLE();
ganlikun 0:20e0c61e0684 88 break;
ganlikun 0:20e0c61e0684 89 #endif
ganlikun 0:20e0c61e0684 90 #if defined GPIOI_BASE
ganlikun 0:20e0c61e0684 91 case PortI:
ganlikun 0:20e0c61e0684 92 gpio_add = GPIOI_BASE;
ganlikun 0:20e0c61e0684 93 __HAL_RCC_GPIOI_CLK_ENABLE();
ganlikun 0:20e0c61e0684 94 break;
ganlikun 0:20e0c61e0684 95 #endif
ganlikun 0:20e0c61e0684 96 #if defined GPIOJ_BASE
ganlikun 0:20e0c61e0684 97 case PortJ:
ganlikun 0:20e0c61e0684 98 gpio_add = GPIOJ_BASE;
ganlikun 0:20e0c61e0684 99 __HAL_RCC_GPIOJ_CLK_ENABLE();
ganlikun 0:20e0c61e0684 100 break;
ganlikun 0:20e0c61e0684 101 #endif
ganlikun 0:20e0c61e0684 102 #if defined GPIOK_BASE
ganlikun 0:20e0c61e0684 103 case PortK:
ganlikun 0:20e0c61e0684 104 gpio_add = GPIOK_BASE;
ganlikun 0:20e0c61e0684 105 __HAL_RCC_GPIOK_CLK_ENABLE();
ganlikun 0:20e0c61e0684 106 break;
ganlikun 0:20e0c61e0684 107 #endif
ganlikun 0:20e0c61e0684 108 default:
ganlikun 0:20e0c61e0684 109 error("Pinmap error: wrong port number.");
ganlikun 0:20e0c61e0684 110 break;
ganlikun 0:20e0c61e0684 111 }
ganlikun 0:20e0c61e0684 112 return (GPIO_TypeDef *) gpio_add;
ganlikun 0:20e0c61e0684 113 }
ganlikun 0:20e0c61e0684 114
ganlikun 0:20e0c61e0684 115 uint32_t gpio_set(PinName pin) {
ganlikun 0:20e0c61e0684 116 MBED_ASSERT(pin != (PinName)NC);
ganlikun 0:20e0c61e0684 117
ganlikun 0:20e0c61e0684 118 pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ganlikun 0:20e0c61e0684 119
ganlikun 0:20e0c61e0684 120 return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
ganlikun 0:20e0c61e0684 121 }
ganlikun 0:20e0c61e0684 122
ganlikun 0:20e0c61e0684 123
ganlikun 0:20e0c61e0684 124 void gpio_init(gpio_t *obj, PinName pin) {
ganlikun 0:20e0c61e0684 125 obj->pin = pin;
ganlikun 0:20e0c61e0684 126 if (pin == (PinName)NC) {
ganlikun 0:20e0c61e0684 127 return;
ganlikun 0:20e0c61e0684 128 }
ganlikun 0:20e0c61e0684 129
ganlikun 0:20e0c61e0684 130 uint32_t port_index = STM_PORT(pin);
ganlikun 0:20e0c61e0684 131
ganlikun 0:20e0c61e0684 132 // Enable GPIO clock
ganlikun 0:20e0c61e0684 133 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
ganlikun 0:20e0c61e0684 134
ganlikun 0:20e0c61e0684 135 // Fill GPIO object structure for future use
ganlikun 0:20e0c61e0684 136 obj->mask = gpio_set(pin);
ganlikun 0:20e0c61e0684 137 obj->gpio = gpio;
ganlikun 0:20e0c61e0684 138 obj->ll_pin = ll_pin_defines[STM_PIN(obj->pin)];
ganlikun 0:20e0c61e0684 139 obj->reg_in = &gpio->IDR;
ganlikun 0:20e0c61e0684 140 obj->reg_set = &gpio->BSRR;
ganlikun 0:20e0c61e0684 141 #ifdef GPIO_IP_WITHOUT_BRR
ganlikun 0:20e0c61e0684 142 obj->reg_clr = &gpio->BSRR;
ganlikun 0:20e0c61e0684 143 #else
ganlikun 0:20e0c61e0684 144 obj->reg_clr = &gpio->BRR;
ganlikun 0:20e0c61e0684 145 #endif
ganlikun 0:20e0c61e0684 146 }
ganlikun 0:20e0c61e0684 147
ganlikun 0:20e0c61e0684 148 void gpio_mode(gpio_t *obj, PinMode mode) {
ganlikun 0:20e0c61e0684 149 pin_mode(obj->pin, mode);
ganlikun 0:20e0c61e0684 150 }
ganlikun 0:20e0c61e0684 151
ganlikun 0:20e0c61e0684 152 inline void gpio_dir(gpio_t *obj, PinDirection direction) {
ganlikun 0:20e0c61e0684 153 if (direction == PIN_INPUT) {
ganlikun 0:20e0c61e0684 154 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_INPUT);
ganlikun 0:20e0c61e0684 155 } else {
ganlikun 0:20e0c61e0684 156 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_OUTPUT);
ganlikun 0:20e0c61e0684 157 }
ganlikun 0:20e0c61e0684 158 }
ganlikun 0:20e0c61e0684 159
ganlikun 0:20e0c61e0684 160