Gan likun
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The prosthetic control
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cmsis/TARGET_CORTEX_M/TOOLCHAIN_ARM/cmsis_armcc.h@0:20e0c61e0684, 2022-06-23 (annotated)
- Committer:
- ganlikun
- Date:
- Thu Jun 23 05:23:34 2022 +0000
- Revision:
- 0:20e0c61e0684
01
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| ganlikun | 0:20e0c61e0684 | 1 | /**************************************************************************//** |
| ganlikun | 0:20e0c61e0684 | 2 | * @file cmsis_armcc.h |
| ganlikun | 0:20e0c61e0684 | 3 | * @brief CMSIS compiler ARMCC (ARM compiler V5) header file |
| ganlikun | 0:20e0c61e0684 | 4 | * @version V5.0.2 |
| ganlikun | 0:20e0c61e0684 | 5 | * @date 13. February 2017 |
| ganlikun | 0:20e0c61e0684 | 6 | ******************************************************************************/ |
| ganlikun | 0:20e0c61e0684 | 7 | /* |
| ganlikun | 0:20e0c61e0684 | 8 | * Copyright (c) 2009-2017 ARM Limited. All rights reserved. |
| ganlikun | 0:20e0c61e0684 | 9 | * |
| ganlikun | 0:20e0c61e0684 | 10 | * SPDX-License-Identifier: Apache-2.0 |
| ganlikun | 0:20e0c61e0684 | 11 | * |
| ganlikun | 0:20e0c61e0684 | 12 | * Licensed under the Apache License, Version 2.0 (the License); you may |
| ganlikun | 0:20e0c61e0684 | 13 | * not use this file except in compliance with the License. |
| ganlikun | 0:20e0c61e0684 | 14 | * You may obtain a copy of the License at |
| ganlikun | 0:20e0c61e0684 | 15 | * |
| ganlikun | 0:20e0c61e0684 | 16 | * www.apache.org/licenses/LICENSE-2.0 |
| ganlikun | 0:20e0c61e0684 | 17 | * |
| ganlikun | 0:20e0c61e0684 | 18 | * Unless required by applicable law or agreed to in writing, software |
| ganlikun | 0:20e0c61e0684 | 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
| ganlikun | 0:20e0c61e0684 | 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| ganlikun | 0:20e0c61e0684 | 21 | * See the License for the specific language governing permissions and |
| ganlikun | 0:20e0c61e0684 | 22 | * limitations under the License. |
| ganlikun | 0:20e0c61e0684 | 23 | */ |
| ganlikun | 0:20e0c61e0684 | 24 | |
| ganlikun | 0:20e0c61e0684 | 25 | #ifndef __CMSIS_ARMCC_H |
| ganlikun | 0:20e0c61e0684 | 26 | #define __CMSIS_ARMCC_H |
| ganlikun | 0:20e0c61e0684 | 27 | |
| ganlikun | 0:20e0c61e0684 | 28 | |
| ganlikun | 0:20e0c61e0684 | 29 | #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677) |
| ganlikun | 0:20e0c61e0684 | 30 | #error "Please use ARM Compiler Toolchain V4.0.677 or later!" |
| ganlikun | 0:20e0c61e0684 | 31 | #endif |
| ganlikun | 0:20e0c61e0684 | 32 | |
| ganlikun | 0:20e0c61e0684 | 33 | /* CMSIS compiler control architecture macros */ |
| ganlikun | 0:20e0c61e0684 | 34 | #if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \ |
| ganlikun | 0:20e0c61e0684 | 35 | (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) ) |
| ganlikun | 0:20e0c61e0684 | 36 | #define __ARM_ARCH_6M__ 1 |
| ganlikun | 0:20e0c61e0684 | 37 | #endif |
| ganlikun | 0:20e0c61e0684 | 38 | |
| ganlikun | 0:20e0c61e0684 | 39 | #if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1)) |
| ganlikun | 0:20e0c61e0684 | 40 | #define __ARM_ARCH_7M__ 1 |
| ganlikun | 0:20e0c61e0684 | 41 | #endif |
| ganlikun | 0:20e0c61e0684 | 42 | |
| ganlikun | 0:20e0c61e0684 | 43 | #if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1)) |
| ganlikun | 0:20e0c61e0684 | 44 | #define __ARM_ARCH_7EM__ 1 |
| ganlikun | 0:20e0c61e0684 | 45 | #endif |
| ganlikun | 0:20e0c61e0684 | 46 | |
| ganlikun | 0:20e0c61e0684 | 47 | /* __ARM_ARCH_8M_BASE__ not applicable */ |
| ganlikun | 0:20e0c61e0684 | 48 | /* __ARM_ARCH_8M_MAIN__ not applicable */ |
| ganlikun | 0:20e0c61e0684 | 49 | |
| ganlikun | 0:20e0c61e0684 | 50 | |
| ganlikun | 0:20e0c61e0684 | 51 | /* CMSIS compiler specific defines */ |
| ganlikun | 0:20e0c61e0684 | 52 | #ifndef __ASM |
| ganlikun | 0:20e0c61e0684 | 53 | #define __ASM __asm |
| ganlikun | 0:20e0c61e0684 | 54 | #endif |
| ganlikun | 0:20e0c61e0684 | 55 | #ifndef __INLINE |
| ganlikun | 0:20e0c61e0684 | 56 | #define __INLINE __inline |
| ganlikun | 0:20e0c61e0684 | 57 | #endif |
| ganlikun | 0:20e0c61e0684 | 58 | #ifndef __STATIC_INLINE |
| ganlikun | 0:20e0c61e0684 | 59 | #define __STATIC_INLINE static __inline |
| ganlikun | 0:20e0c61e0684 | 60 | #endif |
| ganlikun | 0:20e0c61e0684 | 61 | #ifndef __NO_RETURN |
| ganlikun | 0:20e0c61e0684 | 62 | #define __NO_RETURN __declspec(noreturn) |
| ganlikun | 0:20e0c61e0684 | 63 | #endif |
| ganlikun | 0:20e0c61e0684 | 64 | #ifndef __USED |
| ganlikun | 0:20e0c61e0684 | 65 | #define __USED __attribute__((used)) |
| ganlikun | 0:20e0c61e0684 | 66 | #endif |
| ganlikun | 0:20e0c61e0684 | 67 | #ifndef __WEAK |
| ganlikun | 0:20e0c61e0684 | 68 | #define __WEAK __attribute__((weak)) |
| ganlikun | 0:20e0c61e0684 | 69 | #endif |
| ganlikun | 0:20e0c61e0684 | 70 | #ifndef __PACKED |
| ganlikun | 0:20e0c61e0684 | 71 | #define __PACKED __attribute__((packed)) |
| ganlikun | 0:20e0c61e0684 | 72 | #endif |
| ganlikun | 0:20e0c61e0684 | 73 | #ifndef __PACKED_STRUCT |
| ganlikun | 0:20e0c61e0684 | 74 | #define __PACKED_STRUCT __packed struct |
| ganlikun | 0:20e0c61e0684 | 75 | #endif |
| ganlikun | 0:20e0c61e0684 | 76 | #ifndef __UNALIGNED_UINT32 /* deprecated */ |
| ganlikun | 0:20e0c61e0684 | 77 | #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x))) |
| ganlikun | 0:20e0c61e0684 | 78 | #endif |
| ganlikun | 0:20e0c61e0684 | 79 | #ifndef __UNALIGNED_UINT16_WRITE |
| ganlikun | 0:20e0c61e0684 | 80 | #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val)) |
| ganlikun | 0:20e0c61e0684 | 81 | #endif |
| ganlikun | 0:20e0c61e0684 | 82 | #ifndef __UNALIGNED_UINT16_READ |
| ganlikun | 0:20e0c61e0684 | 83 | #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr))) |
| ganlikun | 0:20e0c61e0684 | 84 | #endif |
| ganlikun | 0:20e0c61e0684 | 85 | #ifndef __UNALIGNED_UINT32_WRITE |
| ganlikun | 0:20e0c61e0684 | 86 | #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val)) |
| ganlikun | 0:20e0c61e0684 | 87 | #endif |
| ganlikun | 0:20e0c61e0684 | 88 | #ifndef __UNALIGNED_UINT32_READ |
| ganlikun | 0:20e0c61e0684 | 89 | #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr))) |
| ganlikun | 0:20e0c61e0684 | 90 | #endif |
| ganlikun | 0:20e0c61e0684 | 91 | #ifndef __ALIGNED |
| ganlikun | 0:20e0c61e0684 | 92 | #define __ALIGNED(x) __attribute__((aligned(x))) |
| ganlikun | 0:20e0c61e0684 | 93 | #endif |
| ganlikun | 0:20e0c61e0684 | 94 | |
| ganlikun | 0:20e0c61e0684 | 95 | |
| ganlikun | 0:20e0c61e0684 | 96 | /* ########################### Core Function Access ########################### */ |
| ganlikun | 0:20e0c61e0684 | 97 | /** \ingroup CMSIS_Core_FunctionInterface |
| ganlikun | 0:20e0c61e0684 | 98 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions |
| ganlikun | 0:20e0c61e0684 | 99 | @{ |
| ganlikun | 0:20e0c61e0684 | 100 | */ |
| ganlikun | 0:20e0c61e0684 | 101 | |
| ganlikun | 0:20e0c61e0684 | 102 | /** |
| ganlikun | 0:20e0c61e0684 | 103 | \brief Enable IRQ Interrupts |
| ganlikun | 0:20e0c61e0684 | 104 | \details Enables IRQ interrupts by clearing the I-bit in the CPSR. |
| ganlikun | 0:20e0c61e0684 | 105 | Can only be executed in Privileged modes. |
| ganlikun | 0:20e0c61e0684 | 106 | */ |
| ganlikun | 0:20e0c61e0684 | 107 | /* intrinsic void __enable_irq(); */ |
| ganlikun | 0:20e0c61e0684 | 108 | |
| ganlikun | 0:20e0c61e0684 | 109 | |
| ganlikun | 0:20e0c61e0684 | 110 | /** |
| ganlikun | 0:20e0c61e0684 | 111 | \brief Disable IRQ Interrupts |
| ganlikun | 0:20e0c61e0684 | 112 | \details Disables IRQ interrupts by setting the I-bit in the CPSR. |
| ganlikun | 0:20e0c61e0684 | 113 | Can only be executed in Privileged modes. |
| ganlikun | 0:20e0c61e0684 | 114 | */ |
| ganlikun | 0:20e0c61e0684 | 115 | /* intrinsic void __disable_irq(); */ |
| ganlikun | 0:20e0c61e0684 | 116 | |
| ganlikun | 0:20e0c61e0684 | 117 | /** |
| ganlikun | 0:20e0c61e0684 | 118 | \brief Get Control Register |
| ganlikun | 0:20e0c61e0684 | 119 | \details Returns the content of the Control Register. |
| ganlikun | 0:20e0c61e0684 | 120 | \return Control Register value |
| ganlikun | 0:20e0c61e0684 | 121 | */ |
| ganlikun | 0:20e0c61e0684 | 122 | __STATIC_INLINE uint32_t __get_CONTROL(void) |
| ganlikun | 0:20e0c61e0684 | 123 | { |
| ganlikun | 0:20e0c61e0684 | 124 | register uint32_t __regControl __ASM("control"); |
| ganlikun | 0:20e0c61e0684 | 125 | return(__regControl); |
| ganlikun | 0:20e0c61e0684 | 126 | } |
| ganlikun | 0:20e0c61e0684 | 127 | |
| ganlikun | 0:20e0c61e0684 | 128 | |
| ganlikun | 0:20e0c61e0684 | 129 | /** |
| ganlikun | 0:20e0c61e0684 | 130 | \brief Set Control Register |
| ganlikun | 0:20e0c61e0684 | 131 | \details Writes the given value to the Control Register. |
| ganlikun | 0:20e0c61e0684 | 132 | \param [in] control Control Register value to set |
| ganlikun | 0:20e0c61e0684 | 133 | */ |
| ganlikun | 0:20e0c61e0684 | 134 | __STATIC_INLINE void __set_CONTROL(uint32_t control) |
| ganlikun | 0:20e0c61e0684 | 135 | { |
| ganlikun | 0:20e0c61e0684 | 136 | register uint32_t __regControl __ASM("control"); |
| ganlikun | 0:20e0c61e0684 | 137 | __regControl = control; |
| ganlikun | 0:20e0c61e0684 | 138 | } |
| ganlikun | 0:20e0c61e0684 | 139 | |
| ganlikun | 0:20e0c61e0684 | 140 | |
| ganlikun | 0:20e0c61e0684 | 141 | /** |
| ganlikun | 0:20e0c61e0684 | 142 | \brief Get IPSR Register |
| ganlikun | 0:20e0c61e0684 | 143 | \details Returns the content of the IPSR Register. |
| ganlikun | 0:20e0c61e0684 | 144 | \return IPSR Register value |
| ganlikun | 0:20e0c61e0684 | 145 | */ |
| ganlikun | 0:20e0c61e0684 | 146 | __STATIC_INLINE uint32_t __get_IPSR(void) |
| ganlikun | 0:20e0c61e0684 | 147 | { |
| ganlikun | 0:20e0c61e0684 | 148 | register uint32_t __regIPSR __ASM("ipsr"); |
| ganlikun | 0:20e0c61e0684 | 149 | return(__regIPSR); |
| ganlikun | 0:20e0c61e0684 | 150 | } |
| ganlikun | 0:20e0c61e0684 | 151 | |
| ganlikun | 0:20e0c61e0684 | 152 | |
| ganlikun | 0:20e0c61e0684 | 153 | /** |
| ganlikun | 0:20e0c61e0684 | 154 | \brief Get APSR Register |
| ganlikun | 0:20e0c61e0684 | 155 | \details Returns the content of the APSR Register. |
| ganlikun | 0:20e0c61e0684 | 156 | \return APSR Register value |
| ganlikun | 0:20e0c61e0684 | 157 | */ |
| ganlikun | 0:20e0c61e0684 | 158 | __STATIC_INLINE uint32_t __get_APSR(void) |
| ganlikun | 0:20e0c61e0684 | 159 | { |
| ganlikun | 0:20e0c61e0684 | 160 | register uint32_t __regAPSR __ASM("apsr"); |
| ganlikun | 0:20e0c61e0684 | 161 | return(__regAPSR); |
| ganlikun | 0:20e0c61e0684 | 162 | } |
| ganlikun | 0:20e0c61e0684 | 163 | |
| ganlikun | 0:20e0c61e0684 | 164 | |
| ganlikun | 0:20e0c61e0684 | 165 | /** |
| ganlikun | 0:20e0c61e0684 | 166 | \brief Get xPSR Register |
| ganlikun | 0:20e0c61e0684 | 167 | \details Returns the content of the xPSR Register. |
| ganlikun | 0:20e0c61e0684 | 168 | \return xPSR Register value |
| ganlikun | 0:20e0c61e0684 | 169 | */ |
| ganlikun | 0:20e0c61e0684 | 170 | __STATIC_INLINE uint32_t __get_xPSR(void) |
| ganlikun | 0:20e0c61e0684 | 171 | { |
| ganlikun | 0:20e0c61e0684 | 172 | register uint32_t __regXPSR __ASM("xpsr"); |
| ganlikun | 0:20e0c61e0684 | 173 | return(__regXPSR); |
| ganlikun | 0:20e0c61e0684 | 174 | } |
| ganlikun | 0:20e0c61e0684 | 175 | |
| ganlikun | 0:20e0c61e0684 | 176 | |
| ganlikun | 0:20e0c61e0684 | 177 | /** |
| ganlikun | 0:20e0c61e0684 | 178 | \brief Get Process Stack Pointer |
| ganlikun | 0:20e0c61e0684 | 179 | \details Returns the current value of the Process Stack Pointer (PSP). |
| ganlikun | 0:20e0c61e0684 | 180 | \return PSP Register value |
| ganlikun | 0:20e0c61e0684 | 181 | */ |
| ganlikun | 0:20e0c61e0684 | 182 | __STATIC_INLINE uint32_t __get_PSP(void) |
| ganlikun | 0:20e0c61e0684 | 183 | { |
| ganlikun | 0:20e0c61e0684 | 184 | register uint32_t __regProcessStackPointer __ASM("psp"); |
| ganlikun | 0:20e0c61e0684 | 185 | return(__regProcessStackPointer); |
| ganlikun | 0:20e0c61e0684 | 186 | } |
| ganlikun | 0:20e0c61e0684 | 187 | |
| ganlikun | 0:20e0c61e0684 | 188 | |
| ganlikun | 0:20e0c61e0684 | 189 | /** |
| ganlikun | 0:20e0c61e0684 | 190 | \brief Set Process Stack Pointer |
| ganlikun | 0:20e0c61e0684 | 191 | \details Assigns the given value to the Process Stack Pointer (PSP). |
| ganlikun | 0:20e0c61e0684 | 192 | \param [in] topOfProcStack Process Stack Pointer value to set |
| ganlikun | 0:20e0c61e0684 | 193 | */ |
| ganlikun | 0:20e0c61e0684 | 194 | __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) |
| ganlikun | 0:20e0c61e0684 | 195 | { |
| ganlikun | 0:20e0c61e0684 | 196 | register uint32_t __regProcessStackPointer __ASM("psp"); |
| ganlikun | 0:20e0c61e0684 | 197 | __regProcessStackPointer = topOfProcStack; |
| ganlikun | 0:20e0c61e0684 | 198 | } |
| ganlikun | 0:20e0c61e0684 | 199 | |
| ganlikun | 0:20e0c61e0684 | 200 | |
| ganlikun | 0:20e0c61e0684 | 201 | /** |
| ganlikun | 0:20e0c61e0684 | 202 | \brief Get Main Stack Pointer |
| ganlikun | 0:20e0c61e0684 | 203 | \details Returns the current value of the Main Stack Pointer (MSP). |
| ganlikun | 0:20e0c61e0684 | 204 | \return MSP Register value |
| ganlikun | 0:20e0c61e0684 | 205 | */ |
| ganlikun | 0:20e0c61e0684 | 206 | __STATIC_INLINE uint32_t __get_MSP(void) |
| ganlikun | 0:20e0c61e0684 | 207 | { |
| ganlikun | 0:20e0c61e0684 | 208 | register uint32_t __regMainStackPointer __ASM("msp"); |
| ganlikun | 0:20e0c61e0684 | 209 | return(__regMainStackPointer); |
| ganlikun | 0:20e0c61e0684 | 210 | } |
| ganlikun | 0:20e0c61e0684 | 211 | |
| ganlikun | 0:20e0c61e0684 | 212 | |
| ganlikun | 0:20e0c61e0684 | 213 | /** |
| ganlikun | 0:20e0c61e0684 | 214 | \brief Set Main Stack Pointer |
| ganlikun | 0:20e0c61e0684 | 215 | \details Assigns the given value to the Main Stack Pointer (MSP). |
| ganlikun | 0:20e0c61e0684 | 216 | \param [in] topOfMainStack Main Stack Pointer value to set |
| ganlikun | 0:20e0c61e0684 | 217 | */ |
| ganlikun | 0:20e0c61e0684 | 218 | __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) |
| ganlikun | 0:20e0c61e0684 | 219 | { |
| ganlikun | 0:20e0c61e0684 | 220 | register uint32_t __regMainStackPointer __ASM("msp"); |
| ganlikun | 0:20e0c61e0684 | 221 | __regMainStackPointer = topOfMainStack; |
| ganlikun | 0:20e0c61e0684 | 222 | } |
| ganlikun | 0:20e0c61e0684 | 223 | |
| ganlikun | 0:20e0c61e0684 | 224 | |
| ganlikun | 0:20e0c61e0684 | 225 | /** |
| ganlikun | 0:20e0c61e0684 | 226 | \brief Get Priority Mask |
| ganlikun | 0:20e0c61e0684 | 227 | \details Returns the current state of the priority mask bit from the Priority Mask Register. |
| ganlikun | 0:20e0c61e0684 | 228 | \return Priority Mask value |
| ganlikun | 0:20e0c61e0684 | 229 | */ |
| ganlikun | 0:20e0c61e0684 | 230 | __STATIC_INLINE uint32_t __get_PRIMASK(void) |
| ganlikun | 0:20e0c61e0684 | 231 | { |
| ganlikun | 0:20e0c61e0684 | 232 | register uint32_t __regPriMask __ASM("primask"); |
| ganlikun | 0:20e0c61e0684 | 233 | return(__regPriMask); |
| ganlikun | 0:20e0c61e0684 | 234 | } |
| ganlikun | 0:20e0c61e0684 | 235 | |
| ganlikun | 0:20e0c61e0684 | 236 | |
| ganlikun | 0:20e0c61e0684 | 237 | /** |
| ganlikun | 0:20e0c61e0684 | 238 | \brief Set Priority Mask |
| ganlikun | 0:20e0c61e0684 | 239 | \details Assigns the given value to the Priority Mask Register. |
| ganlikun | 0:20e0c61e0684 | 240 | \param [in] priMask Priority Mask |
| ganlikun | 0:20e0c61e0684 | 241 | */ |
| ganlikun | 0:20e0c61e0684 | 242 | __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) |
| ganlikun | 0:20e0c61e0684 | 243 | { |
| ganlikun | 0:20e0c61e0684 | 244 | register uint32_t __regPriMask __ASM("primask"); |
| ganlikun | 0:20e0c61e0684 | 245 | __regPriMask = (priMask); |
| ganlikun | 0:20e0c61e0684 | 246 | } |
| ganlikun | 0:20e0c61e0684 | 247 | |
| ganlikun | 0:20e0c61e0684 | 248 | |
| ganlikun | 0:20e0c61e0684 | 249 | #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ |
| ganlikun | 0:20e0c61e0684 | 250 | (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) |
| ganlikun | 0:20e0c61e0684 | 251 | |
| ganlikun | 0:20e0c61e0684 | 252 | /** |
| ganlikun | 0:20e0c61e0684 | 253 | \brief Enable FIQ |
| ganlikun | 0:20e0c61e0684 | 254 | \details Enables FIQ interrupts by clearing the F-bit in the CPSR. |
| ganlikun | 0:20e0c61e0684 | 255 | Can only be executed in Privileged modes. |
| ganlikun | 0:20e0c61e0684 | 256 | */ |
| ganlikun | 0:20e0c61e0684 | 257 | #define __enable_fault_irq __enable_fiq |
| ganlikun | 0:20e0c61e0684 | 258 | |
| ganlikun | 0:20e0c61e0684 | 259 | |
| ganlikun | 0:20e0c61e0684 | 260 | /** |
| ganlikun | 0:20e0c61e0684 | 261 | \brief Disable FIQ |
| ganlikun | 0:20e0c61e0684 | 262 | \details Disables FIQ interrupts by setting the F-bit in the CPSR. |
| ganlikun | 0:20e0c61e0684 | 263 | Can only be executed in Privileged modes. |
| ganlikun | 0:20e0c61e0684 | 264 | */ |
| ganlikun | 0:20e0c61e0684 | 265 | #define __disable_fault_irq __disable_fiq |
| ganlikun | 0:20e0c61e0684 | 266 | |
| ganlikun | 0:20e0c61e0684 | 267 | |
| ganlikun | 0:20e0c61e0684 | 268 | /** |
| ganlikun | 0:20e0c61e0684 | 269 | \brief Get Base Priority |
| ganlikun | 0:20e0c61e0684 | 270 | \details Returns the current value of the Base Priority register. |
| ganlikun | 0:20e0c61e0684 | 271 | \return Base Priority register value |
| ganlikun | 0:20e0c61e0684 | 272 | */ |
| ganlikun | 0:20e0c61e0684 | 273 | __STATIC_INLINE uint32_t __get_BASEPRI(void) |
| ganlikun | 0:20e0c61e0684 | 274 | { |
| ganlikun | 0:20e0c61e0684 | 275 | register uint32_t __regBasePri __ASM("basepri"); |
| ganlikun | 0:20e0c61e0684 | 276 | return(__regBasePri); |
| ganlikun | 0:20e0c61e0684 | 277 | } |
| ganlikun | 0:20e0c61e0684 | 278 | |
| ganlikun | 0:20e0c61e0684 | 279 | |
| ganlikun | 0:20e0c61e0684 | 280 | /** |
| ganlikun | 0:20e0c61e0684 | 281 | \brief Set Base Priority |
| ganlikun | 0:20e0c61e0684 | 282 | \details Assigns the given value to the Base Priority register. |
| ganlikun | 0:20e0c61e0684 | 283 | \param [in] basePri Base Priority value to set |
| ganlikun | 0:20e0c61e0684 | 284 | */ |
| ganlikun | 0:20e0c61e0684 | 285 | __STATIC_INLINE void __set_BASEPRI(uint32_t basePri) |
| ganlikun | 0:20e0c61e0684 | 286 | { |
| ganlikun | 0:20e0c61e0684 | 287 | register uint32_t __regBasePri __ASM("basepri"); |
| ganlikun | 0:20e0c61e0684 | 288 | __regBasePri = (basePri & 0xFFU); |
| ganlikun | 0:20e0c61e0684 | 289 | } |
| ganlikun | 0:20e0c61e0684 | 290 | |
| ganlikun | 0:20e0c61e0684 | 291 | |
| ganlikun | 0:20e0c61e0684 | 292 | /** |
| ganlikun | 0:20e0c61e0684 | 293 | \brief Set Base Priority with condition |
| ganlikun | 0:20e0c61e0684 | 294 | \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, |
| ganlikun | 0:20e0c61e0684 | 295 | or the new value increases the BASEPRI priority level. |
| ganlikun | 0:20e0c61e0684 | 296 | \param [in] basePri Base Priority value to set |
| ganlikun | 0:20e0c61e0684 | 297 | */ |
| ganlikun | 0:20e0c61e0684 | 298 | __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri) |
| ganlikun | 0:20e0c61e0684 | 299 | { |
| ganlikun | 0:20e0c61e0684 | 300 | register uint32_t __regBasePriMax __ASM("basepri_max"); |
| ganlikun | 0:20e0c61e0684 | 301 | __regBasePriMax = (basePri & 0xFFU); |
| ganlikun | 0:20e0c61e0684 | 302 | } |
| ganlikun | 0:20e0c61e0684 | 303 | |
| ganlikun | 0:20e0c61e0684 | 304 | |
| ganlikun | 0:20e0c61e0684 | 305 | /** |
| ganlikun | 0:20e0c61e0684 | 306 | \brief Get Fault Mask |
| ganlikun | 0:20e0c61e0684 | 307 | \details Returns the current value of the Fault Mask register. |
| ganlikun | 0:20e0c61e0684 | 308 | \return Fault Mask register value |
| ganlikun | 0:20e0c61e0684 | 309 | */ |
| ganlikun | 0:20e0c61e0684 | 310 | __STATIC_INLINE uint32_t __get_FAULTMASK(void) |
| ganlikun | 0:20e0c61e0684 | 311 | { |
| ganlikun | 0:20e0c61e0684 | 312 | register uint32_t __regFaultMask __ASM("faultmask"); |
| ganlikun | 0:20e0c61e0684 | 313 | return(__regFaultMask); |
| ganlikun | 0:20e0c61e0684 | 314 | } |
| ganlikun | 0:20e0c61e0684 | 315 | |
| ganlikun | 0:20e0c61e0684 | 316 | |
| ganlikun | 0:20e0c61e0684 | 317 | /** |
| ganlikun | 0:20e0c61e0684 | 318 | \brief Set Fault Mask |
| ganlikun | 0:20e0c61e0684 | 319 | \details Assigns the given value to the Fault Mask register. |
| ganlikun | 0:20e0c61e0684 | 320 | \param [in] faultMask Fault Mask value to set |
| ganlikun | 0:20e0c61e0684 | 321 | */ |
| ganlikun | 0:20e0c61e0684 | 322 | __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) |
| ganlikun | 0:20e0c61e0684 | 323 | { |
| ganlikun | 0:20e0c61e0684 | 324 | register uint32_t __regFaultMask __ASM("faultmask"); |
| ganlikun | 0:20e0c61e0684 | 325 | __regFaultMask = (faultMask & (uint32_t)1U); |
| ganlikun | 0:20e0c61e0684 | 326 | } |
| ganlikun | 0:20e0c61e0684 | 327 | |
| ganlikun | 0:20e0c61e0684 | 328 | #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ |
| ganlikun | 0:20e0c61e0684 | 329 | (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ |
| ganlikun | 0:20e0c61e0684 | 330 | |
| ganlikun | 0:20e0c61e0684 | 331 | |
| ganlikun | 0:20e0c61e0684 | 332 | #if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) |
| ganlikun | 0:20e0c61e0684 | 333 | |
| ganlikun | 0:20e0c61e0684 | 334 | /** |
| ganlikun | 0:20e0c61e0684 | 335 | \brief Get FPSCR |
| ganlikun | 0:20e0c61e0684 | 336 | \details Returns the current value of the Floating Point Status/Control register. |
| ganlikun | 0:20e0c61e0684 | 337 | \return Floating Point Status/Control register value |
| ganlikun | 0:20e0c61e0684 | 338 | */ |
| ganlikun | 0:20e0c61e0684 | 339 | __STATIC_INLINE uint32_t __get_FPSCR(void) |
| ganlikun | 0:20e0c61e0684 | 340 | { |
| ganlikun | 0:20e0c61e0684 | 341 | #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ |
| ganlikun | 0:20e0c61e0684 | 342 | (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) |
| ganlikun | 0:20e0c61e0684 | 343 | register uint32_t __regfpscr __ASM("fpscr"); |
| ganlikun | 0:20e0c61e0684 | 344 | return(__regfpscr); |
| ganlikun | 0:20e0c61e0684 | 345 | #else |
| ganlikun | 0:20e0c61e0684 | 346 | return(0U); |
| ganlikun | 0:20e0c61e0684 | 347 | #endif |
| ganlikun | 0:20e0c61e0684 | 348 | } |
| ganlikun | 0:20e0c61e0684 | 349 | |
| ganlikun | 0:20e0c61e0684 | 350 | |
| ganlikun | 0:20e0c61e0684 | 351 | /** |
| ganlikun | 0:20e0c61e0684 | 352 | \brief Set FPSCR |
| ganlikun | 0:20e0c61e0684 | 353 | \details Assigns the given value to the Floating Point Status/Control register. |
| ganlikun | 0:20e0c61e0684 | 354 | \param [in] fpscr Floating Point Status/Control value to set |
| ganlikun | 0:20e0c61e0684 | 355 | */ |
| ganlikun | 0:20e0c61e0684 | 356 | __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) |
| ganlikun | 0:20e0c61e0684 | 357 | { |
| ganlikun | 0:20e0c61e0684 | 358 | #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ |
| ganlikun | 0:20e0c61e0684 | 359 | (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) |
| ganlikun | 0:20e0c61e0684 | 360 | register uint32_t __regfpscr __ASM("fpscr"); |
| ganlikun | 0:20e0c61e0684 | 361 | __regfpscr = (fpscr); |
| ganlikun | 0:20e0c61e0684 | 362 | #else |
| ganlikun | 0:20e0c61e0684 | 363 | (void)fpscr; |
| ganlikun | 0:20e0c61e0684 | 364 | #endif |
| ganlikun | 0:20e0c61e0684 | 365 | } |
| ganlikun | 0:20e0c61e0684 | 366 | |
| ganlikun | 0:20e0c61e0684 | 367 | #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ |
| ganlikun | 0:20e0c61e0684 | 368 | |
| ganlikun | 0:20e0c61e0684 | 369 | |
| ganlikun | 0:20e0c61e0684 | 370 | |
| ganlikun | 0:20e0c61e0684 | 371 | /*@} end of CMSIS_Core_RegAccFunctions */ |
| ganlikun | 0:20e0c61e0684 | 372 | |
| ganlikun | 0:20e0c61e0684 | 373 | |
| ganlikun | 0:20e0c61e0684 | 374 | /* ########################## Core Instruction Access ######################### */ |
| ganlikun | 0:20e0c61e0684 | 375 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface |
| ganlikun | 0:20e0c61e0684 | 376 | Access to dedicated instructions |
| ganlikun | 0:20e0c61e0684 | 377 | @{ |
| ganlikun | 0:20e0c61e0684 | 378 | */ |
| ganlikun | 0:20e0c61e0684 | 379 | |
| ganlikun | 0:20e0c61e0684 | 380 | /** |
| ganlikun | 0:20e0c61e0684 | 381 | \brief No Operation |
| ganlikun | 0:20e0c61e0684 | 382 | \details No Operation does nothing. This instruction can be used for code alignment purposes. |
| ganlikun | 0:20e0c61e0684 | 383 | */ |
| ganlikun | 0:20e0c61e0684 | 384 | #define __NOP __nop |
| ganlikun | 0:20e0c61e0684 | 385 | |
| ganlikun | 0:20e0c61e0684 | 386 | |
| ganlikun | 0:20e0c61e0684 | 387 | /** |
| ganlikun | 0:20e0c61e0684 | 388 | \brief Wait For Interrupt |
| ganlikun | 0:20e0c61e0684 | 389 | \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. |
| ganlikun | 0:20e0c61e0684 | 390 | */ |
| ganlikun | 0:20e0c61e0684 | 391 | #define __WFI __wfi |
| ganlikun | 0:20e0c61e0684 | 392 | |
| ganlikun | 0:20e0c61e0684 | 393 | |
| ganlikun | 0:20e0c61e0684 | 394 | /** |
| ganlikun | 0:20e0c61e0684 | 395 | \brief Wait For Event |
| ganlikun | 0:20e0c61e0684 | 396 | \details Wait For Event is a hint instruction that permits the processor to enter |
| ganlikun | 0:20e0c61e0684 | 397 | a low-power state until one of a number of events occurs. |
| ganlikun | 0:20e0c61e0684 | 398 | */ |
| ganlikun | 0:20e0c61e0684 | 399 | #define __WFE __wfe |
| ganlikun | 0:20e0c61e0684 | 400 | |
| ganlikun | 0:20e0c61e0684 | 401 | |
| ganlikun | 0:20e0c61e0684 | 402 | /** |
| ganlikun | 0:20e0c61e0684 | 403 | \brief Send Event |
| ganlikun | 0:20e0c61e0684 | 404 | \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. |
| ganlikun | 0:20e0c61e0684 | 405 | */ |
| ganlikun | 0:20e0c61e0684 | 406 | #define __SEV __sev |
| ganlikun | 0:20e0c61e0684 | 407 | |
| ganlikun | 0:20e0c61e0684 | 408 | |
| ganlikun | 0:20e0c61e0684 | 409 | /** |
| ganlikun | 0:20e0c61e0684 | 410 | \brief Instruction Synchronization Barrier |
| ganlikun | 0:20e0c61e0684 | 411 | \details Instruction Synchronization Barrier flushes the pipeline in the processor, |
| ganlikun | 0:20e0c61e0684 | 412 | so that all instructions following the ISB are fetched from cache or memory, |
| ganlikun | 0:20e0c61e0684 | 413 | after the instruction has been completed. |
| ganlikun | 0:20e0c61e0684 | 414 | */ |
| ganlikun | 0:20e0c61e0684 | 415 | #define __ISB() do {\ |
| ganlikun | 0:20e0c61e0684 | 416 | __schedule_barrier();\ |
| ganlikun | 0:20e0c61e0684 | 417 | __isb(0xF);\ |
| ganlikun | 0:20e0c61e0684 | 418 | __schedule_barrier();\ |
| ganlikun | 0:20e0c61e0684 | 419 | } while (0U) |
| ganlikun | 0:20e0c61e0684 | 420 | |
| ganlikun | 0:20e0c61e0684 | 421 | /** |
| ganlikun | 0:20e0c61e0684 | 422 | \brief Data Synchronization Barrier |
| ganlikun | 0:20e0c61e0684 | 423 | \details Acts as a special kind of Data Memory Barrier. |
| ganlikun | 0:20e0c61e0684 | 424 | It completes when all explicit memory accesses before this instruction complete. |
| ganlikun | 0:20e0c61e0684 | 425 | */ |
| ganlikun | 0:20e0c61e0684 | 426 | #define __DSB() do {\ |
| ganlikun | 0:20e0c61e0684 | 427 | __schedule_barrier();\ |
| ganlikun | 0:20e0c61e0684 | 428 | __dsb(0xF);\ |
| ganlikun | 0:20e0c61e0684 | 429 | __schedule_barrier();\ |
| ganlikun | 0:20e0c61e0684 | 430 | } while (0U) |
| ganlikun | 0:20e0c61e0684 | 431 | |
| ganlikun | 0:20e0c61e0684 | 432 | /** |
| ganlikun | 0:20e0c61e0684 | 433 | \brief Data Memory Barrier |
| ganlikun | 0:20e0c61e0684 | 434 | \details Ensures the apparent order of the explicit memory operations before |
| ganlikun | 0:20e0c61e0684 | 435 | and after the instruction, without ensuring their completion. |
| ganlikun | 0:20e0c61e0684 | 436 | */ |
| ganlikun | 0:20e0c61e0684 | 437 | #define __DMB() do {\ |
| ganlikun | 0:20e0c61e0684 | 438 | __schedule_barrier();\ |
| ganlikun | 0:20e0c61e0684 | 439 | __dmb(0xF);\ |
| ganlikun | 0:20e0c61e0684 | 440 | __schedule_barrier();\ |
| ganlikun | 0:20e0c61e0684 | 441 | } while (0U) |
| ganlikun | 0:20e0c61e0684 | 442 | |
| ganlikun | 0:20e0c61e0684 | 443 | /** |
| ganlikun | 0:20e0c61e0684 | 444 | \brief Reverse byte order (32 bit) |
| ganlikun | 0:20e0c61e0684 | 445 | \details Reverses the byte order in integer value. |
| ganlikun | 0:20e0c61e0684 | 446 | \param [in] value Value to reverse |
| ganlikun | 0:20e0c61e0684 | 447 | \return Reversed value |
| ganlikun | 0:20e0c61e0684 | 448 | */ |
| ganlikun | 0:20e0c61e0684 | 449 | #define __REV __rev |
| ganlikun | 0:20e0c61e0684 | 450 | |
| ganlikun | 0:20e0c61e0684 | 451 | |
| ganlikun | 0:20e0c61e0684 | 452 | /** |
| ganlikun | 0:20e0c61e0684 | 453 | \brief Reverse byte order (16 bit) |
| ganlikun | 0:20e0c61e0684 | 454 | \details Reverses the byte order in two unsigned short values. |
| ganlikun | 0:20e0c61e0684 | 455 | \param [in] value Value to reverse |
| ganlikun | 0:20e0c61e0684 | 456 | \return Reversed value |
| ganlikun | 0:20e0c61e0684 | 457 | */ |
| ganlikun | 0:20e0c61e0684 | 458 | #ifndef __NO_EMBEDDED_ASM |
| ganlikun | 0:20e0c61e0684 | 459 | __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) |
| ganlikun | 0:20e0c61e0684 | 460 | { |
| ganlikun | 0:20e0c61e0684 | 461 | rev16 r0, r0 |
| ganlikun | 0:20e0c61e0684 | 462 | bx lr |
| ganlikun | 0:20e0c61e0684 | 463 | } |
| ganlikun | 0:20e0c61e0684 | 464 | #endif |
| ganlikun | 0:20e0c61e0684 | 465 | |
| ganlikun | 0:20e0c61e0684 | 466 | |
| ganlikun | 0:20e0c61e0684 | 467 | /** |
| ganlikun | 0:20e0c61e0684 | 468 | \brief Reverse byte order in signed short value |
| ganlikun | 0:20e0c61e0684 | 469 | \details Reverses the byte order in a signed short value with sign extension to integer. |
| ganlikun | 0:20e0c61e0684 | 470 | \param [in] value Value to reverse |
| ganlikun | 0:20e0c61e0684 | 471 | \return Reversed value |
| ganlikun | 0:20e0c61e0684 | 472 | */ |
| ganlikun | 0:20e0c61e0684 | 473 | #ifndef __NO_EMBEDDED_ASM |
| ganlikun | 0:20e0c61e0684 | 474 | __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value) |
| ganlikun | 0:20e0c61e0684 | 475 | { |
| ganlikun | 0:20e0c61e0684 | 476 | revsh r0, r0 |
| ganlikun | 0:20e0c61e0684 | 477 | bx lr |
| ganlikun | 0:20e0c61e0684 | 478 | } |
| ganlikun | 0:20e0c61e0684 | 479 | #endif |
| ganlikun | 0:20e0c61e0684 | 480 | |
| ganlikun | 0:20e0c61e0684 | 481 | |
| ganlikun | 0:20e0c61e0684 | 482 | /** |
| ganlikun | 0:20e0c61e0684 | 483 | \brief Rotate Right in unsigned value (32 bit) |
| ganlikun | 0:20e0c61e0684 | 484 | \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. |
| ganlikun | 0:20e0c61e0684 | 485 | \param [in] op1 Value to rotate |
| ganlikun | 0:20e0c61e0684 | 486 | \param [in] op2 Number of Bits to rotate |
| ganlikun | 0:20e0c61e0684 | 487 | \return Rotated value |
| ganlikun | 0:20e0c61e0684 | 488 | */ |
| ganlikun | 0:20e0c61e0684 | 489 | #define __ROR __ror |
| ganlikun | 0:20e0c61e0684 | 490 | |
| ganlikun | 0:20e0c61e0684 | 491 | |
| ganlikun | 0:20e0c61e0684 | 492 | /** |
| ganlikun | 0:20e0c61e0684 | 493 | \brief Breakpoint |
| ganlikun | 0:20e0c61e0684 | 494 | \details Causes the processor to enter Debug state. |
| ganlikun | 0:20e0c61e0684 | 495 | Debug tools can use this to investigate system state when the instruction at a particular address is reached. |
| ganlikun | 0:20e0c61e0684 | 496 | \param [in] value is ignored by the processor. |
| ganlikun | 0:20e0c61e0684 | 497 | If required, a debugger can use it to store additional information about the breakpoint. |
| ganlikun | 0:20e0c61e0684 | 498 | */ |
| ganlikun | 0:20e0c61e0684 | 499 | #define __BKPT(value) __breakpoint(value) |
| ganlikun | 0:20e0c61e0684 | 500 | |
| ganlikun | 0:20e0c61e0684 | 501 | |
| ganlikun | 0:20e0c61e0684 | 502 | /** |
| ganlikun | 0:20e0c61e0684 | 503 | \brief Reverse bit order of value |
| ganlikun | 0:20e0c61e0684 | 504 | \details Reverses the bit order of the given value. |
| ganlikun | 0:20e0c61e0684 | 505 | \param [in] value Value to reverse |
| ganlikun | 0:20e0c61e0684 | 506 | \return Reversed value |
| ganlikun | 0:20e0c61e0684 | 507 | */ |
| ganlikun | 0:20e0c61e0684 | 508 | #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ |
| ganlikun | 0:20e0c61e0684 | 509 | (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) |
| ganlikun | 0:20e0c61e0684 | 510 | #define __RBIT __rbit |
| ganlikun | 0:20e0c61e0684 | 511 | #else |
| ganlikun | 0:20e0c61e0684 | 512 | __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) |
| ganlikun | 0:20e0c61e0684 | 513 | { |
| ganlikun | 0:20e0c61e0684 | 514 | uint32_t result; |
| ganlikun | 0:20e0c61e0684 | 515 | int32_t s = (4 /*sizeof(v)*/ * 8) - 1; /* extra shift needed at end */ |
| ganlikun | 0:20e0c61e0684 | 516 | |
| ganlikun | 0:20e0c61e0684 | 517 | result = value; /* r will be reversed bits of v; first get LSB of v */ |
| ganlikun | 0:20e0c61e0684 | 518 | for (value >>= 1U; value; value >>= 1U) |
| ganlikun | 0:20e0c61e0684 | 519 | { |
| ganlikun | 0:20e0c61e0684 | 520 | result <<= 1U; |
| ganlikun | 0:20e0c61e0684 | 521 | result |= value & 1U; |
| ganlikun | 0:20e0c61e0684 | 522 | s--; |
| ganlikun | 0:20e0c61e0684 | 523 | } |
| ganlikun | 0:20e0c61e0684 | 524 | result <<= s; /* shift when v's highest bits are zero */ |
| ganlikun | 0:20e0c61e0684 | 525 | return(result); |
| ganlikun | 0:20e0c61e0684 | 526 | } |
| ganlikun | 0:20e0c61e0684 | 527 | #endif |
| ganlikun | 0:20e0c61e0684 | 528 | |
| ganlikun | 0:20e0c61e0684 | 529 | |
| ganlikun | 0:20e0c61e0684 | 530 | /** |
| ganlikun | 0:20e0c61e0684 | 531 | \brief Count leading zeros |
| ganlikun | 0:20e0c61e0684 | 532 | \details Counts the number of leading zeros of a data value. |
| ganlikun | 0:20e0c61e0684 | 533 | \param [in] value Value to count the leading zeros |
| ganlikun | 0:20e0c61e0684 | 534 | \return number of leading zeros in value |
| ganlikun | 0:20e0c61e0684 | 535 | */ |
| ganlikun | 0:20e0c61e0684 | 536 | #define __CLZ __clz |
| ganlikun | 0:20e0c61e0684 | 537 | |
| ganlikun | 0:20e0c61e0684 | 538 | |
| ganlikun | 0:20e0c61e0684 | 539 | #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ |
| ganlikun | 0:20e0c61e0684 | 540 | (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) |
| ganlikun | 0:20e0c61e0684 | 541 | |
| ganlikun | 0:20e0c61e0684 | 542 | /** |
| ganlikun | 0:20e0c61e0684 | 543 | \brief LDR Exclusive (8 bit) |
| ganlikun | 0:20e0c61e0684 | 544 | \details Executes a exclusive LDR instruction for 8 bit value. |
| ganlikun | 0:20e0c61e0684 | 545 | \param [in] ptr Pointer to data |
| ganlikun | 0:20e0c61e0684 | 546 | \return value of type uint8_t at (*ptr) |
| ganlikun | 0:20e0c61e0684 | 547 | */ |
| ganlikun | 0:20e0c61e0684 | 548 | #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) |
| ganlikun | 0:20e0c61e0684 | 549 | #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) |
| ganlikun | 0:20e0c61e0684 | 550 | #else |
| ganlikun | 0:20e0c61e0684 | 551 | #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") |
| ganlikun | 0:20e0c61e0684 | 552 | #endif |
| ganlikun | 0:20e0c61e0684 | 553 | |
| ganlikun | 0:20e0c61e0684 | 554 | |
| ganlikun | 0:20e0c61e0684 | 555 | /** |
| ganlikun | 0:20e0c61e0684 | 556 | \brief LDR Exclusive (16 bit) |
| ganlikun | 0:20e0c61e0684 | 557 | \details Executes a exclusive LDR instruction for 16 bit values. |
| ganlikun | 0:20e0c61e0684 | 558 | \param [in] ptr Pointer to data |
| ganlikun | 0:20e0c61e0684 | 559 | \return value of type uint16_t at (*ptr) |
| ganlikun | 0:20e0c61e0684 | 560 | */ |
| ganlikun | 0:20e0c61e0684 | 561 | #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) |
| ganlikun | 0:20e0c61e0684 | 562 | #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) |
| ganlikun | 0:20e0c61e0684 | 563 | #else |
| ganlikun | 0:20e0c61e0684 | 564 | #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") |
| ganlikun | 0:20e0c61e0684 | 565 | #endif |
| ganlikun | 0:20e0c61e0684 | 566 | |
| ganlikun | 0:20e0c61e0684 | 567 | |
| ganlikun | 0:20e0c61e0684 | 568 | /** |
| ganlikun | 0:20e0c61e0684 | 569 | \brief LDR Exclusive (32 bit) |
| ganlikun | 0:20e0c61e0684 | 570 | \details Executes a exclusive LDR instruction for 32 bit values. |
| ganlikun | 0:20e0c61e0684 | 571 | \param [in] ptr Pointer to data |
| ganlikun | 0:20e0c61e0684 | 572 | \return value of type uint32_t at (*ptr) |
| ganlikun | 0:20e0c61e0684 | 573 | */ |
| ganlikun | 0:20e0c61e0684 | 574 | #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) |
| ganlikun | 0:20e0c61e0684 | 575 | #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) |
| ganlikun | 0:20e0c61e0684 | 576 | #else |
| ganlikun | 0:20e0c61e0684 | 577 | #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") |
| ganlikun | 0:20e0c61e0684 | 578 | #endif |
| ganlikun | 0:20e0c61e0684 | 579 | |
| ganlikun | 0:20e0c61e0684 | 580 | |
| ganlikun | 0:20e0c61e0684 | 581 | /** |
| ganlikun | 0:20e0c61e0684 | 582 | \brief STR Exclusive (8 bit) |
| ganlikun | 0:20e0c61e0684 | 583 | \details Executes a exclusive STR instruction for 8 bit values. |
| ganlikun | 0:20e0c61e0684 | 584 | \param [in] value Value to store |
| ganlikun | 0:20e0c61e0684 | 585 | \param [in] ptr Pointer to location |
| ganlikun | 0:20e0c61e0684 | 586 | \return 0 Function succeeded |
| ganlikun | 0:20e0c61e0684 | 587 | \return 1 Function failed |
| ganlikun | 0:20e0c61e0684 | 588 | */ |
| ganlikun | 0:20e0c61e0684 | 589 | #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) |
| ganlikun | 0:20e0c61e0684 | 590 | #define __STREXB(value, ptr) __strex(value, ptr) |
| ganlikun | 0:20e0c61e0684 | 591 | #else |
| ganlikun | 0:20e0c61e0684 | 592 | #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
| ganlikun | 0:20e0c61e0684 | 593 | #endif |
| ganlikun | 0:20e0c61e0684 | 594 | |
| ganlikun | 0:20e0c61e0684 | 595 | |
| ganlikun | 0:20e0c61e0684 | 596 | /** |
| ganlikun | 0:20e0c61e0684 | 597 | \brief STR Exclusive (16 bit) |
| ganlikun | 0:20e0c61e0684 | 598 | \details Executes a exclusive STR instruction for 16 bit values. |
| ganlikun | 0:20e0c61e0684 | 599 | \param [in] value Value to store |
| ganlikun | 0:20e0c61e0684 | 600 | \param [in] ptr Pointer to location |
| ganlikun | 0:20e0c61e0684 | 601 | \return 0 Function succeeded |
| ganlikun | 0:20e0c61e0684 | 602 | \return 1 Function failed |
| ganlikun | 0:20e0c61e0684 | 603 | */ |
| ganlikun | 0:20e0c61e0684 | 604 | #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) |
| ganlikun | 0:20e0c61e0684 | 605 | #define __STREXH(value, ptr) __strex(value, ptr) |
| ganlikun | 0:20e0c61e0684 | 606 | #else |
| ganlikun | 0:20e0c61e0684 | 607 | #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
| ganlikun | 0:20e0c61e0684 | 608 | #endif |
| ganlikun | 0:20e0c61e0684 | 609 | |
| ganlikun | 0:20e0c61e0684 | 610 | |
| ganlikun | 0:20e0c61e0684 | 611 | /** |
| ganlikun | 0:20e0c61e0684 | 612 | \brief STR Exclusive (32 bit) |
| ganlikun | 0:20e0c61e0684 | 613 | \details Executes a exclusive STR instruction for 32 bit values. |
| ganlikun | 0:20e0c61e0684 | 614 | \param [in] value Value to store |
| ganlikun | 0:20e0c61e0684 | 615 | \param [in] ptr Pointer to location |
| ganlikun | 0:20e0c61e0684 | 616 | \return 0 Function succeeded |
| ganlikun | 0:20e0c61e0684 | 617 | \return 1 Function failed |
| ganlikun | 0:20e0c61e0684 | 618 | */ |
| ganlikun | 0:20e0c61e0684 | 619 | #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) |
| ganlikun | 0:20e0c61e0684 | 620 | #define __STREXW(value, ptr) __strex(value, ptr) |
| ganlikun | 0:20e0c61e0684 | 621 | #else |
| ganlikun | 0:20e0c61e0684 | 622 | #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
| ganlikun | 0:20e0c61e0684 | 623 | #endif |
| ganlikun | 0:20e0c61e0684 | 624 | |
| ganlikun | 0:20e0c61e0684 | 625 | |
| ganlikun | 0:20e0c61e0684 | 626 | /** |
| ganlikun | 0:20e0c61e0684 | 627 | \brief Remove the exclusive lock |
| ganlikun | 0:20e0c61e0684 | 628 | \details Removes the exclusive lock which is created by LDREX. |
| ganlikun | 0:20e0c61e0684 | 629 | */ |
| ganlikun | 0:20e0c61e0684 | 630 | #define __CLREX __clrex |
| ganlikun | 0:20e0c61e0684 | 631 | |
| ganlikun | 0:20e0c61e0684 | 632 | |
| ganlikun | 0:20e0c61e0684 | 633 | /** |
| ganlikun | 0:20e0c61e0684 | 634 | \brief Signed Saturate |
| ganlikun | 0:20e0c61e0684 | 635 | \details Saturates a signed value. |
| ganlikun | 0:20e0c61e0684 | 636 | \param [in] value Value to be saturated |
| ganlikun | 0:20e0c61e0684 | 637 | \param [in] sat Bit position to saturate to (1..32) |
| ganlikun | 0:20e0c61e0684 | 638 | \return Saturated value |
| ganlikun | 0:20e0c61e0684 | 639 | */ |
| ganlikun | 0:20e0c61e0684 | 640 | #define __SSAT __ssat |
| ganlikun | 0:20e0c61e0684 | 641 | |
| ganlikun | 0:20e0c61e0684 | 642 | |
| ganlikun | 0:20e0c61e0684 | 643 | /** |
| ganlikun | 0:20e0c61e0684 | 644 | \brief Unsigned Saturate |
| ganlikun | 0:20e0c61e0684 | 645 | \details Saturates an unsigned value. |
| ganlikun | 0:20e0c61e0684 | 646 | \param [in] value Value to be saturated |
| ganlikun | 0:20e0c61e0684 | 647 | \param [in] sat Bit position to saturate to (0..31) |
| ganlikun | 0:20e0c61e0684 | 648 | \return Saturated value |
| ganlikun | 0:20e0c61e0684 | 649 | */ |
| ganlikun | 0:20e0c61e0684 | 650 | #define __USAT __usat |
| ganlikun | 0:20e0c61e0684 | 651 | |
| ganlikun | 0:20e0c61e0684 | 652 | |
| ganlikun | 0:20e0c61e0684 | 653 | /** |
| ganlikun | 0:20e0c61e0684 | 654 | \brief Rotate Right with Extend (32 bit) |
| ganlikun | 0:20e0c61e0684 | 655 | \details Moves each bit of a bitstring right by one bit. |
| ganlikun | 0:20e0c61e0684 | 656 | The carry input is shifted in at the left end of the bitstring. |
| ganlikun | 0:20e0c61e0684 | 657 | \param [in] value Value to rotate |
| ganlikun | 0:20e0c61e0684 | 658 | \return Rotated value |
| ganlikun | 0:20e0c61e0684 | 659 | */ |
| ganlikun | 0:20e0c61e0684 | 660 | #ifndef __NO_EMBEDDED_ASM |
| ganlikun | 0:20e0c61e0684 | 661 | __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value) |
| ganlikun | 0:20e0c61e0684 | 662 | { |
| ganlikun | 0:20e0c61e0684 | 663 | rrx r0, r0 |
| ganlikun | 0:20e0c61e0684 | 664 | bx lr |
| ganlikun | 0:20e0c61e0684 | 665 | } |
| ganlikun | 0:20e0c61e0684 | 666 | #endif |
| ganlikun | 0:20e0c61e0684 | 667 | |
| ganlikun | 0:20e0c61e0684 | 668 | |
| ganlikun | 0:20e0c61e0684 | 669 | /** |
| ganlikun | 0:20e0c61e0684 | 670 | \brief LDRT Unprivileged (8 bit) |
| ganlikun | 0:20e0c61e0684 | 671 | \details Executes a Unprivileged LDRT instruction for 8 bit value. |
| ganlikun | 0:20e0c61e0684 | 672 | \param [in] ptr Pointer to data |
| ganlikun | 0:20e0c61e0684 | 673 | \return value of type uint8_t at (*ptr) |
| ganlikun | 0:20e0c61e0684 | 674 | */ |
| ganlikun | 0:20e0c61e0684 | 675 | #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr)) |
| ganlikun | 0:20e0c61e0684 | 676 | |
| ganlikun | 0:20e0c61e0684 | 677 | |
| ganlikun | 0:20e0c61e0684 | 678 | /** |
| ganlikun | 0:20e0c61e0684 | 679 | \brief LDRT Unprivileged (16 bit) |
| ganlikun | 0:20e0c61e0684 | 680 | \details Executes a Unprivileged LDRT instruction for 16 bit values. |
| ganlikun | 0:20e0c61e0684 | 681 | \param [in] ptr Pointer to data |
| ganlikun | 0:20e0c61e0684 | 682 | \return value of type uint16_t at (*ptr) |
| ganlikun | 0:20e0c61e0684 | 683 | */ |
| ganlikun | 0:20e0c61e0684 | 684 | #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr)) |
| ganlikun | 0:20e0c61e0684 | 685 | |
| ganlikun | 0:20e0c61e0684 | 686 | |
| ganlikun | 0:20e0c61e0684 | 687 | /** |
| ganlikun | 0:20e0c61e0684 | 688 | \brief LDRT Unprivileged (32 bit) |
| ganlikun | 0:20e0c61e0684 | 689 | \details Executes a Unprivileged LDRT instruction for 32 bit values. |
| ganlikun | 0:20e0c61e0684 | 690 | \param [in] ptr Pointer to data |
| ganlikun | 0:20e0c61e0684 | 691 | \return value of type uint32_t at (*ptr) |
| ganlikun | 0:20e0c61e0684 | 692 | */ |
| ganlikun | 0:20e0c61e0684 | 693 | #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr)) |
| ganlikun | 0:20e0c61e0684 | 694 | |
| ganlikun | 0:20e0c61e0684 | 695 | |
| ganlikun | 0:20e0c61e0684 | 696 | /** |
| ganlikun | 0:20e0c61e0684 | 697 | \brief STRT Unprivileged (8 bit) |
| ganlikun | 0:20e0c61e0684 | 698 | \details Executes a Unprivileged STRT instruction for 8 bit values. |
| ganlikun | 0:20e0c61e0684 | 699 | \param [in] value Value to store |
| ganlikun | 0:20e0c61e0684 | 700 | \param [in] ptr Pointer to location |
| ganlikun | 0:20e0c61e0684 | 701 | */ |
| ganlikun | 0:20e0c61e0684 | 702 | #define __STRBT(value, ptr) __strt(value, ptr) |
| ganlikun | 0:20e0c61e0684 | 703 | |
| ganlikun | 0:20e0c61e0684 | 704 | |
| ganlikun | 0:20e0c61e0684 | 705 | /** |
| ganlikun | 0:20e0c61e0684 | 706 | \brief STRT Unprivileged (16 bit) |
| ganlikun | 0:20e0c61e0684 | 707 | \details Executes a Unprivileged STRT instruction for 16 bit values. |
| ganlikun | 0:20e0c61e0684 | 708 | \param [in] value Value to store |
| ganlikun | 0:20e0c61e0684 | 709 | \param [in] ptr Pointer to location |
| ganlikun | 0:20e0c61e0684 | 710 | */ |
| ganlikun | 0:20e0c61e0684 | 711 | #define __STRHT(value, ptr) __strt(value, ptr) |
| ganlikun | 0:20e0c61e0684 | 712 | |
| ganlikun | 0:20e0c61e0684 | 713 | |
| ganlikun | 0:20e0c61e0684 | 714 | /** |
| ganlikun | 0:20e0c61e0684 | 715 | \brief STRT Unprivileged (32 bit) |
| ganlikun | 0:20e0c61e0684 | 716 | \details Executes a Unprivileged STRT instruction for 32 bit values. |
| ganlikun | 0:20e0c61e0684 | 717 | \param [in] value Value to store |
| ganlikun | 0:20e0c61e0684 | 718 | \param [in] ptr Pointer to location |
| ganlikun | 0:20e0c61e0684 | 719 | */ |
| ganlikun | 0:20e0c61e0684 | 720 | #define __STRT(value, ptr) __strt(value, ptr) |
| ganlikun | 0:20e0c61e0684 | 721 | |
| ganlikun | 0:20e0c61e0684 | 722 | #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ |
| ganlikun | 0:20e0c61e0684 | 723 | (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ |
| ganlikun | 0:20e0c61e0684 | 724 | |
| ganlikun | 0:20e0c61e0684 | 725 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ |
| ganlikun | 0:20e0c61e0684 | 726 | |
| ganlikun | 0:20e0c61e0684 | 727 | |
| ganlikun | 0:20e0c61e0684 | 728 | /* ################### Compiler specific Intrinsics ########################### */ |
| ganlikun | 0:20e0c61e0684 | 729 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics |
| ganlikun | 0:20e0c61e0684 | 730 | Access to dedicated SIMD instructions |
| ganlikun | 0:20e0c61e0684 | 731 | @{ |
| ganlikun | 0:20e0c61e0684 | 732 | */ |
| ganlikun | 0:20e0c61e0684 | 733 | |
| ganlikun | 0:20e0c61e0684 | 734 | #if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) |
| ganlikun | 0:20e0c61e0684 | 735 | |
| ganlikun | 0:20e0c61e0684 | 736 | #define __SADD8 __sadd8 |
| ganlikun | 0:20e0c61e0684 | 737 | #define __QADD8 __qadd8 |
| ganlikun | 0:20e0c61e0684 | 738 | #define __SHADD8 __shadd8 |
| ganlikun | 0:20e0c61e0684 | 739 | #define __UADD8 __uadd8 |
| ganlikun | 0:20e0c61e0684 | 740 | #define __UQADD8 __uqadd8 |
| ganlikun | 0:20e0c61e0684 | 741 | #define __UHADD8 __uhadd8 |
| ganlikun | 0:20e0c61e0684 | 742 | #define __SSUB8 __ssub8 |
| ganlikun | 0:20e0c61e0684 | 743 | #define __QSUB8 __qsub8 |
| ganlikun | 0:20e0c61e0684 | 744 | #define __SHSUB8 __shsub8 |
| ganlikun | 0:20e0c61e0684 | 745 | #define __USUB8 __usub8 |
| ganlikun | 0:20e0c61e0684 | 746 | #define __UQSUB8 __uqsub8 |
| ganlikun | 0:20e0c61e0684 | 747 | #define __UHSUB8 __uhsub8 |
| ganlikun | 0:20e0c61e0684 | 748 | #define __SADD16 __sadd16 |
| ganlikun | 0:20e0c61e0684 | 749 | #define __QADD16 __qadd16 |
| ganlikun | 0:20e0c61e0684 | 750 | #define __SHADD16 __shadd16 |
| ganlikun | 0:20e0c61e0684 | 751 | #define __UADD16 __uadd16 |
| ganlikun | 0:20e0c61e0684 | 752 | #define __UQADD16 __uqadd16 |
| ganlikun | 0:20e0c61e0684 | 753 | #define __UHADD16 __uhadd16 |
| ganlikun | 0:20e0c61e0684 | 754 | #define __SSUB16 __ssub16 |
| ganlikun | 0:20e0c61e0684 | 755 | #define __QSUB16 __qsub16 |
| ganlikun | 0:20e0c61e0684 | 756 | #define __SHSUB16 __shsub16 |
| ganlikun | 0:20e0c61e0684 | 757 | #define __USUB16 __usub16 |
| ganlikun | 0:20e0c61e0684 | 758 | #define __UQSUB16 __uqsub16 |
| ganlikun | 0:20e0c61e0684 | 759 | #define __UHSUB16 __uhsub16 |
| ganlikun | 0:20e0c61e0684 | 760 | #define __SASX __sasx |
| ganlikun | 0:20e0c61e0684 | 761 | #define __QASX __qasx |
| ganlikun | 0:20e0c61e0684 | 762 | #define __SHASX __shasx |
| ganlikun | 0:20e0c61e0684 | 763 | #define __UASX __uasx |
| ganlikun | 0:20e0c61e0684 | 764 | #define __UQASX __uqasx |
| ganlikun | 0:20e0c61e0684 | 765 | #define __UHASX __uhasx |
| ganlikun | 0:20e0c61e0684 | 766 | #define __SSAX __ssax |
| ganlikun | 0:20e0c61e0684 | 767 | #define __QSAX __qsax |
| ganlikun | 0:20e0c61e0684 | 768 | #define __SHSAX __shsax |
| ganlikun | 0:20e0c61e0684 | 769 | #define __USAX __usax |
| ganlikun | 0:20e0c61e0684 | 770 | #define __UQSAX __uqsax |
| ganlikun | 0:20e0c61e0684 | 771 | #define __UHSAX __uhsax |
| ganlikun | 0:20e0c61e0684 | 772 | #define __USAD8 __usad8 |
| ganlikun | 0:20e0c61e0684 | 773 | #define __USADA8 __usada8 |
| ganlikun | 0:20e0c61e0684 | 774 | #define __SSAT16 __ssat16 |
| ganlikun | 0:20e0c61e0684 | 775 | #define __USAT16 __usat16 |
| ganlikun | 0:20e0c61e0684 | 776 | #define __UXTB16 __uxtb16 |
| ganlikun | 0:20e0c61e0684 | 777 | #define __UXTAB16 __uxtab16 |
| ganlikun | 0:20e0c61e0684 | 778 | #define __SXTB16 __sxtb16 |
| ganlikun | 0:20e0c61e0684 | 779 | #define __SXTAB16 __sxtab16 |
| ganlikun | 0:20e0c61e0684 | 780 | #define __SMUAD __smuad |
| ganlikun | 0:20e0c61e0684 | 781 | #define __SMUADX __smuadx |
| ganlikun | 0:20e0c61e0684 | 782 | #define __SMLAD __smlad |
| ganlikun | 0:20e0c61e0684 | 783 | #define __SMLADX __smladx |
| ganlikun | 0:20e0c61e0684 | 784 | #define __SMLALD __smlald |
| ganlikun | 0:20e0c61e0684 | 785 | #define __SMLALDX __smlaldx |
| ganlikun | 0:20e0c61e0684 | 786 | #define __SMUSD __smusd |
| ganlikun | 0:20e0c61e0684 | 787 | #define __SMUSDX __smusdx |
| ganlikun | 0:20e0c61e0684 | 788 | #define __SMLSD __smlsd |
| ganlikun | 0:20e0c61e0684 | 789 | #define __SMLSDX __smlsdx |
| ganlikun | 0:20e0c61e0684 | 790 | #define __SMLSLD __smlsld |
| ganlikun | 0:20e0c61e0684 | 791 | #define __SMLSLDX __smlsldx |
| ganlikun | 0:20e0c61e0684 | 792 | #define __SEL __sel |
| ganlikun | 0:20e0c61e0684 | 793 | #define __QADD __qadd |
| ganlikun | 0:20e0c61e0684 | 794 | #define __QSUB __qsub |
| ganlikun | 0:20e0c61e0684 | 795 | |
| ganlikun | 0:20e0c61e0684 | 796 | #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ |
| ganlikun | 0:20e0c61e0684 | 797 | ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) |
| ganlikun | 0:20e0c61e0684 | 798 | |
| ganlikun | 0:20e0c61e0684 | 799 | #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ |
| ganlikun | 0:20e0c61e0684 | 800 | ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) |
| ganlikun | 0:20e0c61e0684 | 801 | |
| ganlikun | 0:20e0c61e0684 | 802 | #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \ |
| ganlikun | 0:20e0c61e0684 | 803 | ((int64_t)(ARG3) << 32U) ) >> 32U)) |
| ganlikun | 0:20e0c61e0684 | 804 | |
| ganlikun | 0:20e0c61e0684 | 805 | #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ |
| ganlikun | 0:20e0c61e0684 | 806 | /*@} end of group CMSIS_SIMD_intrinsics */ |
| ganlikun | 0:20e0c61e0684 | 807 | |
| ganlikun | 0:20e0c61e0684 | 808 | |
| ganlikun | 0:20e0c61e0684 | 809 | #endif /* __CMSIS_ARMCC_H */ |
| ganlikun | 0:20e0c61e0684 | 810 |