mbed library sources. Supersedes mbed-src.
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targets/cmsis/TARGET_NUVOTON/TARGET_NUC472/StdDriver/nuc472_eadc.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /**************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 2 | * @file eadc.c |
<> | 144:ef7eb2e8f9f7 | 3 | * @version V1.00 |
<> | 144:ef7eb2e8f9f7 | 4 | * $Revision: 4 $ |
<> | 144:ef7eb2e8f9f7 | 5 | * $Date: 14/10/07 4:46p $ |
<> | 144:ef7eb2e8f9f7 | 6 | * @brief NUC472/NUC442 EADC driver source file |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * @note |
<> | 144:ef7eb2e8f9f7 | 9 | * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 10 | *****************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 11 | #include "NUC472_442.h" |
<> | 144:ef7eb2e8f9f7 | 12 | |
<> | 144:ef7eb2e8f9f7 | 13 | /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver |
<> | 144:ef7eb2e8f9f7 | 14 | @{ |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | |
<> | 144:ef7eb2e8f9f7 | 17 | /** @addtogroup NUC472_442_EADC_Driver EADC Driver |
<> | 144:ef7eb2e8f9f7 | 18 | @{ |
<> | 144:ef7eb2e8f9f7 | 19 | */ |
<> | 144:ef7eb2e8f9f7 | 20 | |
<> | 144:ef7eb2e8f9f7 | 21 | |
<> | 144:ef7eb2e8f9f7 | 22 | /** @addtogroup NUC472_442_EADC_EXPORTED_FUNCTIONS EADC Exported Functions |
<> | 144:ef7eb2e8f9f7 | 23 | @{ |
<> | 144:ef7eb2e8f9f7 | 24 | */ |
<> | 144:ef7eb2e8f9f7 | 25 | |
<> | 144:ef7eb2e8f9f7 | 26 | /** |
<> | 144:ef7eb2e8f9f7 | 27 | * @brief This function make EADC_module be ready to convert. |
<> | 144:ef7eb2e8f9f7 | 28 | * @param[in] eadc Base address of EADC module. |
<> | 144:ef7eb2e8f9f7 | 29 | * @param[in] u32InputMode This parameter is not used. |
<> | 144:ef7eb2e8f9f7 | 30 | * @return None |
<> | 144:ef7eb2e8f9f7 | 31 | * @details This function is used to set analog input mode and enable A/D Converter. |
<> | 144:ef7eb2e8f9f7 | 32 | * Before starting A/D conversion function, ADCEN bit (EADC_CTL[0]) should be set to 1. |
<> | 144:ef7eb2e8f9f7 | 33 | * @note |
<> | 144:ef7eb2e8f9f7 | 34 | */ |
<> | 144:ef7eb2e8f9f7 | 35 | void EADC_Open(EADC_T *eadc, uint32_t u32InputMode) |
<> | 144:ef7eb2e8f9f7 | 36 | { |
<> | 144:ef7eb2e8f9f7 | 37 | eadc->CTL |= EADC_CTL_ADCEN_Msk; |
<> | 144:ef7eb2e8f9f7 | 38 | } |
<> | 144:ef7eb2e8f9f7 | 39 | |
<> | 144:ef7eb2e8f9f7 | 40 | /** |
<> | 144:ef7eb2e8f9f7 | 41 | * @brief Disable EADC_module. |
<> | 144:ef7eb2e8f9f7 | 42 | * @param[in] eadc Base address of EADC module.. |
<> | 144:ef7eb2e8f9f7 | 43 | * @return None |
<> | 144:ef7eb2e8f9f7 | 44 | * @details Clear ADCEN bit (EADC_CTL[0]) to disable A/D converter analog circuit power consumption. |
<> | 144:ef7eb2e8f9f7 | 45 | */ |
<> | 144:ef7eb2e8f9f7 | 46 | void EADC_Close(EADC_T *eadc) |
<> | 144:ef7eb2e8f9f7 | 47 | { |
<> | 144:ef7eb2e8f9f7 | 48 | eadc->CTL &= ~EADC_CTL_ADCEN_Msk; |
<> | 144:ef7eb2e8f9f7 | 49 | } |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | /** |
<> | 144:ef7eb2e8f9f7 | 52 | * @brief Configure the sample control logic module. |
<> | 144:ef7eb2e8f9f7 | 53 | * @param[in] eadc Base address of EADC module. |
<> | 144:ef7eb2e8f9f7 | 54 | * @param[in] u32ModuleNum Decides the sample module number, valid values are: |
<> | 144:ef7eb2e8f9f7 | 55 | * - \ref EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 |
<> | 144:ef7eb2e8f9f7 | 56 | * - \ref EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 |
<> | 144:ef7eb2e8f9f7 | 57 | * - \ref EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 |
<> | 144:ef7eb2e8f9f7 | 58 | * - \ref EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 |
<> | 144:ef7eb2e8f9f7 | 59 | * - \ref EADC0_SAMPLE_MODULE4 : EADC0 SAMPLE module 4 |
<> | 144:ef7eb2e8f9f7 | 60 | * - \ref EADC0_SAMPLE_MODULE5 : EADC0 SAMPLE module 5 |
<> | 144:ef7eb2e8f9f7 | 61 | * - \ref EADC0_SAMPLE_MODULE6 : EADC0 SAMPLE module 6 |
<> | 144:ef7eb2e8f9f7 | 62 | * - \ref EADC0_SAMPLE_MODULE7 : EADC0 SAMPLE module 7 |
<> | 144:ef7eb2e8f9f7 | 63 | * - \ref EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 |
<> | 144:ef7eb2e8f9f7 | 64 | * - \ref EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 |
<> | 144:ef7eb2e8f9f7 | 65 | * - \ref EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 |
<> | 144:ef7eb2e8f9f7 | 66 | * - \ref EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3 |
<> | 144:ef7eb2e8f9f7 | 67 | * - \ref EADC1_SAMPLE_MODULE4 : EADC1 SAMPLE module 4 |
<> | 144:ef7eb2e8f9f7 | 68 | * - \ref EADC1_SAMPLE_MODULE5 : EADC1 SAMPLE module 5 |
<> | 144:ef7eb2e8f9f7 | 69 | * - \ref EADC1_SAMPLE_MODULE6 : EADC1 SAMPLE module 6 |
<> | 144:ef7eb2e8f9f7 | 70 | * - \ref EADC1_SAMPLE_MODULE7 : EADC1 SAMPLE module 7 |
<> | 144:ef7eb2e8f9f7 | 71 | * @param[in] u32TriggerSrc Decides the trigger source. Valid values are: |
<> | 144:ef7eb2e8f9f7 | 72 | * - \ref EADC_SOFTWARE_TRIGGER : Disable trigger |
<> | 144:ef7eb2e8f9f7 | 73 | * - \ref EADC_STADC_TRIGGER : STADC pin trigger |
<> | 144:ef7eb2e8f9f7 | 74 | * - \ref EADC_ADINT0_TRIGGER : ADC ADINT0 interrupt EOC pulse trigger |
<> | 144:ef7eb2e8f9f7 | 75 | * - \ref EADC_ADINT1_TRIGGER : ADC ADINT1 interrupt EOC pulse trigger |
<> | 144:ef7eb2e8f9f7 | 76 | * - \ref EADC_TIMER0_TRIGGER : Timer0 overflow pulse trigger |
<> | 144:ef7eb2e8f9f7 | 77 | * - \ref EADC_TIMER1_TRIGGER : Timer1 overflow pulse trigger |
<> | 144:ef7eb2e8f9f7 | 78 | * - \ref EADC_TIMER2_TRIGGER : Timer2 overflow pulse trigger |
<> | 144:ef7eb2e8f9f7 | 79 | * - \ref EADC_TIMER3_TRIGGER : Timer3 overflow pulse trigger |
<> | 144:ef7eb2e8f9f7 | 80 | * - \ref EADC_EPWM0CH0_TRIGGER : EPWM0CH0 trigger |
<> | 144:ef7eb2e8f9f7 | 81 | * - \ref EADC_EPWM0CH2_TRIGGER : EPWM0CH2 trigger |
<> | 144:ef7eb2e8f9f7 | 82 | * - \ref EADC_EPWM0CH4_TRIGGER : EPWM0CH4 trigger |
<> | 144:ef7eb2e8f9f7 | 83 | * - \ref EADC_EPWM1CH0_TRIGGER : EPWM0CH0 trigger |
<> | 144:ef7eb2e8f9f7 | 84 | * - \ref EADC_EPWM1CH2_TRIGGER : EPWM0CH2 trigger |
<> | 144:ef7eb2e8f9f7 | 85 | * - \ref EADC_EPWM1CH4_TRIGGER : EPWM0CH4 trigger |
<> | 144:ef7eb2e8f9f7 | 86 | * - \ref EADC_PWM0CH0_TRIGGER : PWM0CH0 trigger |
<> | 144:ef7eb2e8f9f7 | 87 | * - \ref EADC_PWM0CH1_TRIGGER : PWM0CH1 trigger |
<> | 144:ef7eb2e8f9f7 | 88 | * @param[in] u32Channel Specifies the sample module channel, valid value are from 0 to 15. |
<> | 144:ef7eb2e8f9f7 | 89 | * @return None |
<> | 144:ef7eb2e8f9f7 | 90 | * @details Each of ADC control logic modules 0~15 which is configurable for ADC converter channel EADC_CH0~15 and trigger source. |
<> | 144:ef7eb2e8f9f7 | 91 | * sample module 16~18 is fixed for ADC channel 16, 17, 18 input sources as band-gap voltage, temperature sensor, and battery power (VBAT). |
<> | 144:ef7eb2e8f9f7 | 92 | */ |
<> | 144:ef7eb2e8f9f7 | 93 | void EADC_ConfigSampleModule(EADC_T *eadc, \ |
<> | 144:ef7eb2e8f9f7 | 94 | uint32_t u32ModuleNum, \ |
<> | 144:ef7eb2e8f9f7 | 95 | uint32_t u32TriggerSrc, \ |
<> | 144:ef7eb2e8f9f7 | 96 | uint32_t u32Channel) |
<> | 144:ef7eb2e8f9f7 | 97 | { |
<> | 144:ef7eb2e8f9f7 | 98 | *(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) &= ~(EADC_AD0SPCTL0_TRGSEL_Msk | EADC_AD0SPCTL0_CHSEL_Msk); |
<> | 144:ef7eb2e8f9f7 | 99 | *(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) |= (u32TriggerSrc | u32Channel); |
<> | 144:ef7eb2e8f9f7 | 100 | if (u32TriggerSrc == EADC_STADC_TRIGGER) |
<> | 144:ef7eb2e8f9f7 | 101 | *(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) |= (EADC_AD0SPCTL0_EXTREN_Msk | EADC_AD0SPCTL0_EXTFEN_Msk); |
<> | 144:ef7eb2e8f9f7 | 102 | |
<> | 144:ef7eb2e8f9f7 | 103 | } |
<> | 144:ef7eb2e8f9f7 | 104 | |
<> | 144:ef7eb2e8f9f7 | 105 | |
<> | 144:ef7eb2e8f9f7 | 106 | /** |
<> | 144:ef7eb2e8f9f7 | 107 | * @brief Set trigger delay time. |
<> | 144:ef7eb2e8f9f7 | 108 | * @param[in] eadc Base address of EADC module. |
<> | 144:ef7eb2e8f9f7 | 109 | * @param[in] u32ModuleNum Decides the sample module number, valid values are: |
<> | 144:ef7eb2e8f9f7 | 110 | * - \ref EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 |
<> | 144:ef7eb2e8f9f7 | 111 | * - \ref EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 |
<> | 144:ef7eb2e8f9f7 | 112 | * - \ref EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 |
<> | 144:ef7eb2e8f9f7 | 113 | * - \ref EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 |
<> | 144:ef7eb2e8f9f7 | 114 | * - \ref EADC0_SAMPLE_MODULE4 : EADC0 SAMPLE module 4 |
<> | 144:ef7eb2e8f9f7 | 115 | * - \ref EADC0_SAMPLE_MODULE5 : EADC0 SAMPLE module 5 |
<> | 144:ef7eb2e8f9f7 | 116 | * - \ref EADC0_SAMPLE_MODULE6 : EADC0 SAMPLE module 6 |
<> | 144:ef7eb2e8f9f7 | 117 | * - \ref EADC0_SAMPLE_MODULE7 : EADC0 SAMPLE module 7 |
<> | 144:ef7eb2e8f9f7 | 118 | * - \ref EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 |
<> | 144:ef7eb2e8f9f7 | 119 | * - \ref EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 |
<> | 144:ef7eb2e8f9f7 | 120 | * - \ref EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 |
<> | 144:ef7eb2e8f9f7 | 121 | * - \ref EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3 |
<> | 144:ef7eb2e8f9f7 | 122 | * - \ref EADC1_SAMPLE_MODULE4 : EADC1 SAMPLE module 4 |
<> | 144:ef7eb2e8f9f7 | 123 | * - \ref EADC1_SAMPLE_MODULE5 : EADC1 SAMPLE module 5 |
<> | 144:ef7eb2e8f9f7 | 124 | * - \ref EADC1_SAMPLE_MODULE6 : EADC1 SAMPLE module 6 |
<> | 144:ef7eb2e8f9f7 | 125 | * - \ref EADC1_SAMPLE_MODULE7 : EADC1 SAMPLE module 7 |
<> | 144:ef7eb2e8f9f7 | 126 | * @param[in] u32TriggerDelayTime Decides the trigger delay time, valid range are between 0~0xFF. |
<> | 144:ef7eb2e8f9f7 | 127 | * @param[in] u32DelayClockDivider Decides the trigger delay clock divider. Valid values are: |
<> | 144:ef7eb2e8f9f7 | 128 | * - \ref EADC_SPCTL_TRGDLYDIV_DIVIDER_1 : Trigger delay clock frequency is ADC_CLK/1 |
<> | 144:ef7eb2e8f9f7 | 129 | * - \ref EADC_SPCTL_TRGDLYDIV_DIVIDER_2 : Trigger delay clock frequency is ADC_CLK/2 |
<> | 144:ef7eb2e8f9f7 | 130 | * - \ref EADC_SPCTL_TRGDLYDIV_DIVIDER_4 : Trigger delay clock frequency is ADC_CLK/4 |
<> | 144:ef7eb2e8f9f7 | 131 | * - \ref EADC_SPCTL_TRGDLYDIV_DIVIDER_16 : Trigger delay clock frequency is ADC_CLK/16 |
<> | 144:ef7eb2e8f9f7 | 132 | * @return None |
<> | 144:ef7eb2e8f9f7 | 133 | * @details User can configure the trigger delay time by setting TRGDLYCNT (EADC_SCTLn[15:8], n=0~15) and TRGDLYDIV (EADC_SCTLn[7:6], n=8~15). |
<> | 144:ef7eb2e8f9f7 | 134 | * Trigger delay time = (u32TriggerDelayTime) x Trigger delay clock period. |
<> | 144:ef7eb2e8f9f7 | 135 | */ |
<> | 144:ef7eb2e8f9f7 | 136 | void EADC_SetTriggerDelayTime(EADC_T *eadc, \ |
<> | 144:ef7eb2e8f9f7 | 137 | uint32_t u32ModuleNum, \ |
<> | 144:ef7eb2e8f9f7 | 138 | uint32_t u32TriggerDelayTime, \ |
<> | 144:ef7eb2e8f9f7 | 139 | uint32_t u32DelayClockDivider) |
<> | 144:ef7eb2e8f9f7 | 140 | { |
<> | 144:ef7eb2e8f9f7 | 141 | *(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) &= ~(EADC_AD0SPCTL0_TRGDLYDIV_Msk | EADC_AD0SPCTL0_TRGDLYCNT_Msk); |
<> | 144:ef7eb2e8f9f7 | 142 | *(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) |= ((u32TriggerDelayTime << EADC_AD0SPCTL0_TRGDLYCNT_Pos) | u32DelayClockDivider); |
<> | 144:ef7eb2e8f9f7 | 143 | } |
<> | 144:ef7eb2e8f9f7 | 144 | |
<> | 144:ef7eb2e8f9f7 | 145 | |
<> | 144:ef7eb2e8f9f7 | 146 | /** |
<> | 144:ef7eb2e8f9f7 | 147 | * @brief Set ADC extend sample time. |
<> | 144:ef7eb2e8f9f7 | 148 | * @param[in] eadc Base address of EADC module. |
<> | 144:ef7eb2e8f9f7 | 149 | * @param[in] u32ModuleNum Decides the sample module number, valid values are: |
<> | 144:ef7eb2e8f9f7 | 150 | * - \ref EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 |
<> | 144:ef7eb2e8f9f7 | 151 | * - \ref EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 |
<> | 144:ef7eb2e8f9f7 | 152 | * - \ref EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 |
<> | 144:ef7eb2e8f9f7 | 153 | * - \ref EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 |
<> | 144:ef7eb2e8f9f7 | 154 | * - \ref EADC0_SAMPLE_MODULE4 : EADC0 SAMPLE module 4 |
<> | 144:ef7eb2e8f9f7 | 155 | * - \ref EADC0_SAMPLE_MODULE5 : EADC0 SAMPLE module 5 |
<> | 144:ef7eb2e8f9f7 | 156 | * - \ref EADC0_SAMPLE_MODULE6 : EADC0 SAMPLE module 6 |
<> | 144:ef7eb2e8f9f7 | 157 | * - \ref EADC0_SAMPLE_MODULE7 : EADC0 SAMPLE module 7 |
<> | 144:ef7eb2e8f9f7 | 158 | * - \ref EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 |
<> | 144:ef7eb2e8f9f7 | 159 | * - \ref EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 |
<> | 144:ef7eb2e8f9f7 | 160 | * - \ref EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 |
<> | 144:ef7eb2e8f9f7 | 161 | * - \ref EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3 |
<> | 144:ef7eb2e8f9f7 | 162 | * - \ref EADC1_SAMPLE_MODULE4 : EADC1 SAMPLE module 4 |
<> | 144:ef7eb2e8f9f7 | 163 | * - \ref EADC1_SAMPLE_MODULE5 : EADC1 SAMPLE module 5 |
<> | 144:ef7eb2e8f9f7 | 164 | * - \ref EADC1_SAMPLE_MODULE6 : EADC1 SAMPLE module 6 |
<> | 144:ef7eb2e8f9f7 | 165 | * - \ref EADC1_SAMPLE_MODULE7 : EADC1 SAMPLE module 7 |
<> | 144:ef7eb2e8f9f7 | 166 | * @param[in] u32ExtendSampleTime Decides the extend sampling time, the range is from 0~255 ADC clock. Valid value are from 0 to 0xFF. |
<> | 144:ef7eb2e8f9f7 | 167 | * @return None |
<> | 144:ef7eb2e8f9f7 | 168 | * @details When A/D converting at high conversion rate, the sampling time of analog input voltage may not enough if input channel loading is heavy, |
<> | 144:ef7eb2e8f9f7 | 169 | * user can extend A/D sampling time after trigger source is coming to get enough sampling time. |
<> | 144:ef7eb2e8f9f7 | 170 | */ |
<> | 144:ef7eb2e8f9f7 | 171 | void EADC_SetExtendSampleTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime) |
<> | 144:ef7eb2e8f9f7 | 172 | { |
<> | 144:ef7eb2e8f9f7 | 173 | if (u32ModuleNum < EADC1_SAMPLE_MODULE0) { |
<> | 144:ef7eb2e8f9f7 | 174 | eadc->EXTSMPT &= ~EADC_EXTSMPT_EXTSMPT0_Msk; |
<> | 144:ef7eb2e8f9f7 | 175 | eadc->EXTSMPT |= u32ExtendSampleTime; |
<> | 144:ef7eb2e8f9f7 | 176 | } else { |
<> | 144:ef7eb2e8f9f7 | 177 | eadc->EXTSMPT &= ~EADC_EXTSMPT_EXTSMPT1_Msk; |
<> | 144:ef7eb2e8f9f7 | 178 | eadc->EXTSMPT |= (u32ExtendSampleTime << EADC_EXTSMPT_EXTSMPT1_Pos); |
<> | 144:ef7eb2e8f9f7 | 179 | } |
<> | 144:ef7eb2e8f9f7 | 180 | } |
<> | 144:ef7eb2e8f9f7 | 181 | |
<> | 144:ef7eb2e8f9f7 | 182 | /*@}*/ /* end of group NUC472_442_EADC_EXPORTED_FUNCTIONS */ |
<> | 144:ef7eb2e8f9f7 | 183 | |
<> | 144:ef7eb2e8f9f7 | 184 | /*@}*/ /* end of group NUC472_442_EADC_Driver */ |
<> | 144:ef7eb2e8f9f7 | 185 | |
<> | 144:ef7eb2e8f9f7 | 186 | /*@}*/ /* end of group NUC472_442_Device_Driver */ |
<> | 144:ef7eb2e8f9f7 | 187 | |
<> | 144:ef7eb2e8f9f7 | 188 | /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/ |