Fawwaz Nadzmy / mbed-STM

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_uart.h@152:9a67f0b066fc, 2016-12-15 (annotated)

Committer:
<>
Date:
Thu Dec 15 11:48:27 2016 +0000
Revision:
152:9a67f0b066fc
Parent:
149:156823d33999 
This updates the lib to the mbed lib v131

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /******************************************************************************
<> 149:156823d33999 2 * @file uart.h
<> 149:156823d33999 3 * @version V3.00
<> 149:156823d33999 4 * $Revision: 36 $
<> 149:156823d33999 5 * $Date: 15/08/11 10:26a $
<> 149:156823d33999 6 * @brief M451 series UART driver header file
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * @note
<> 149:156823d33999 9 * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved.
<> 149:156823d33999 10 *****************************************************************************/
<> 149:156823d33999 11 #ifndef __UART_H__
<> 149:156823d33999 12 #define __UART_H__
<> 149:156823d33999 13
<> 149:156823d33999 14
<> 149:156823d33999 15 #ifdef __cplusplus
<> 149:156823d33999 16 extern "C"
<> 149:156823d33999 17 {
<> 149:156823d33999 18 #endif
<> 149:156823d33999 19
<> 149:156823d33999 20
<> 149:156823d33999 21 /** @addtogroup Standard_Driver Standard Driver
<> 149:156823d33999 22 @{
<> 149:156823d33999 23 */
<> 149:156823d33999 24
<> 149:156823d33999 25 /** @addtogroup UART_Driver UART Driver
<> 149:156823d33999 26 @{
<> 149:156823d33999 27 */
<> 149:156823d33999 28
<> 149:156823d33999 29 /** @addtogroup UART_EXPORTED_CONSTANTS UART Exported Constants
<> 149:156823d33999 30 @{
<> 149:156823d33999 31 */
<> 149:156823d33999 32
<> 149:156823d33999 33 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 34 /* UART FIFO size constants definitions */
<> 149:156823d33999 35 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 36
<> 149:156823d33999 37 #define UART0_FIFO_SIZE 16 /*!< UART0 supports separated receive/transmit 16/16 bytes entry FIFO */
<> 149:156823d33999 38 #define UART1_FIFO_SIZE 16 /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO */
<> 149:156823d33999 39 #define UART2_FIFO_SIZE 16 /*!< UART2 supports separated receive/transmit 16/16 bytes entry FIFO */
<> 149:156823d33999 40 #define UART3_FIFO_SIZE 16 /*!< UART3 supports separated receive/transmit 16/16 bytes entry FIFO */
<> 149:156823d33999 41
<> 149:156823d33999 42 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 43 /* UART_FIFO constants definitions */
<> 149:156823d33999 44 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 45
<> 149:156823d33999 46 #define UART_FIFO_RFITL_1BYTE (0x0 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte */
<> 149:156823d33999 47 #define UART_FIFO_RFITL_4BYTES (0x1 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes */
<> 149:156823d33999 48 #define UART_FIFO_RFITL_8BYTES (0x2 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes */
<> 149:156823d33999 49 #define UART_FIFO_RFITL_14BYTES (0x3 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes */
<> 149:156823d33999 50
<> 149:156823d33999 51 #define UART_FIFO_RTSTRGLV_1BYTE (0x0 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte */
<> 149:156823d33999 52 #define UART_FIFO_RTSTRGLV_4BYTES (0x1 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes */
<> 149:156823d33999 53 #define UART_FIFO_RTSTRGLV_8BYTES (0x2 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes */
<> 149:156823d33999 54 #define UART_FIFO_RTSTRGLV_14BYTES (0x3 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes */
<> 149:156823d33999 55
<> 149:156823d33999 56 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 57 /* UART_LINE constants definitions */
<> 149:156823d33999 58 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 59 #define UART_WORD_LEN_5 (0) /*!< UART_LINE setting to set UART word length to 5 bits */
<> 149:156823d33999 60 #define UART_WORD_LEN_6 (1) /*!< UART_LINE setting to set UART word length to 6 bits */
<> 149:156823d33999 61 #define UART_WORD_LEN_7 (2) /*!< UART_LINE setting to set UART word length to 7 bits */
<> 149:156823d33999 62 #define UART_WORD_LEN_8 (3) /*!< UART_LINE setting to set UART word length to 8 bits */
<> 149:156823d33999 63
<> 149:156823d33999 64 #define UART_PARITY_NONE (0x0 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity */
<> 149:156823d33999 65 #define UART_PARITY_ODD (0x1 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity */
<> 149:156823d33999 66 #define UART_PARITY_EVEN (0x3 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity */
<> 149:156823d33999 67 #define UART_PARITY_MARK (0x5 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' */
<> 149:156823d33999 68 #define UART_PARITY_SPACE (0x7 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' */
<> 149:156823d33999 69
<> 149:156823d33999 70 #define UART_STOP_BIT_1 (0x0 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit */
<> 149:156823d33999 71 #define UART_STOP_BIT_1_5 (0x1 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length */
<> 149:156823d33999 72 #define UART_STOP_BIT_2 (0x1 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length */
<> 149:156823d33999 73
<> 149:156823d33999 74
<> 149:156823d33999 75 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 76 /* UART RTS ACTIVE LEVEL constants definitions */
<> 149:156823d33999 77 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 78 #define UART_RTS_IS_LOW_LEV_ACTIVE (0x1 << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Active */
<> 149:156823d33999 79 #define UART_RTS_IS_HIGH_LEV_ACTIVE (0x0 << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Active */
<> 149:156823d33999 80
<> 149:156823d33999 81
<> 149:156823d33999 82 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 83 /* UART_IRDA constants definitions */
<> 149:156823d33999 84 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 85 #define UART_IRDA_TXEN (0x1 << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Tx mode */
<> 149:156823d33999 86 #define UART_IRDA_RXEN (0x0 << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Rx mode */
<> 149:156823d33999 87
<> 149:156823d33999 88
<> 149:156823d33999 89 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 90 /* UART_FUNCSEL constants definitions */
<> 149:156823d33999 91 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 92 #define UART_FUNCSEL_UART (0x0 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) */
<> 149:156823d33999 93 #define UART_FUNCSEL_LIN (0x1 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set LIN Function */
<> 149:156823d33999 94 #define UART_FUNCSEL_IrDA (0x2 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function */
<> 149:156823d33999 95 #define UART_FUNCSEL_RS485 (0x3 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function */
<> 149:156823d33999 96
<> 149:156823d33999 97
<> 149:156823d33999 98 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 99 /* UART_LINCTL constants definitions */
<> 149:156823d33999 100 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 101 #define UART_LINCTL_BRKFL(x) (((x)-1) << UART_LINCTL_BRKFL_Pos) /*!< UART_LINCTL setting to set LIN Break Field Length, x = 10 ~ 15, default value is 12 */
<> 149:156823d33999 102 #define UART_LINCTL_BSL(x) (((x)-1) << UART_LINCTL_BSL_Pos) /*!< UART_LINCTL setting to set LIN Break/Sync Delimiter Length, x = 1 ~ 4 */
<> 149:156823d33999 103 #define UART_LINCTL_HSEL_BREAK (0x0UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field */
<> 149:156823d33999 104 #define UART_LINCTL_HSEL_BREAK_SYNC (0x1UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field and sync field */
<> 149:156823d33999 105 #define UART_LINCTL_HSEL_BREAK_SYNC_ID (0x2UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field, sync field and ID field*/
<> 149:156823d33999 106 #define UART_LINCTL_PID(x) ((x) << UART_LINCTL_PID_Pos) /*!< UART_LINCTL setting to set LIN PID value */
<> 149:156823d33999 107
<> 149:156823d33999 108
<> 149:156823d33999 109 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 110 /* UART BAUDRATE MODE constants definitions */
<> 149:156823d33999 111 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 112 #define UART_BAUD_MODE0 (0) /*!< Set UART Baudrate Mode is Mode0 */
<> 149:156823d33999 113 #define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 */
<> 149:156823d33999 114
<> 149:156823d33999 115
<> 149:156823d33999 116 /*@}*/ /* end of group UART_EXPORTED_CONSTANTS */
<> 149:156823d33999 117
<> 149:156823d33999 118
<> 149:156823d33999 119 /** @addtogroup UART_EXPORTED_FUNCTIONS UART Exported Functions
<> 149:156823d33999 120 @{
<> 149:156823d33999 121 */
<> 149:156823d33999 122
<> 149:156823d33999 123
<> 149:156823d33999 124 /**
<> 149:156823d33999 125 * @brief Calculate UART baudrate mode0 divider
<> 149:156823d33999 126 *
<> 149:156823d33999 127 * @param[in] u32SrcFreq UART clock frequency
<> 149:156823d33999 128 * @param[in] u32BaudRate Baudrate of UART module
<> 149:156823d33999 129 *
<> 149:156823d33999 130 * @return UART baudrate mode0 divider
<> 149:156823d33999 131 *
<> 149:156823d33999 132 * @details This macro calculate UART baudrate mode0 divider.
<> 149:156823d33999 133 */
<> 149:156823d33999 134 #define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)*8)) / (u32BaudRate) >> 4)-2)
<> 149:156823d33999 135
<> 149:156823d33999 136
<> 149:156823d33999 137 /**
<> 149:156823d33999 138 * @brief Calculate UART baudrate mode2 divider
<> 149:156823d33999 139 *
<> 149:156823d33999 140 * @param[in] u32SrcFreq UART clock frequency
<> 149:156823d33999 141 * @param[in] u32BaudRate Baudrate of UART module
<> 149:156823d33999 142 *
<> 149:156823d33999 143 * @return UART baudrate mode2 divider
<> 149:156823d33999 144 *
<> 149:156823d33999 145 * @details This macro calculate UART baudrate mode2 divider.
<> 149:156823d33999 146 */
<> 149:156823d33999 147 #define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)/2)) / (u32BaudRate))-2)
<> 149:156823d33999 148
<> 149:156823d33999 149
<> 149:156823d33999 150 /**
<> 149:156823d33999 151 * @brief Write UART data
<> 149:156823d33999 152 *
<> 149:156823d33999 153 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 154 * @param[in] u8Data Data byte to transmit.
<> 149:156823d33999 155 *
<> 149:156823d33999 156 * @return None
<> 149:156823d33999 157 *
<> 149:156823d33999 158 * @details This macro write Data to Tx data register.
<> 149:156823d33999 159 */
<> 149:156823d33999 160 #define UART_WRITE(uart, u8Data) ((uart)->DAT = (u8Data))
<> 149:156823d33999 161
<> 149:156823d33999 162
<> 149:156823d33999 163 /**
<> 149:156823d33999 164 * @brief Read UART data
<> 149:156823d33999 165 *
<> 149:156823d33999 166 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 167 *
<> 149:156823d33999 168 * @return The oldest data byte in RX FIFO.
<> 149:156823d33999 169 *
<> 149:156823d33999 170 * @details This macro read Rx data register.
<> 149:156823d33999 171 */
<> 149:156823d33999 172 #define UART_READ(uart) ((uart)->DAT)
<> 149:156823d33999 173
<> 149:156823d33999 174
<> 149:156823d33999 175 /**
<> 149:156823d33999 176 * @brief Get Tx empty
<> 149:156823d33999 177 *
<> 149:156823d33999 178 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 179 *
<> 149:156823d33999 180 * @retval 0 Tx FIFO is not empty
<> 149:156823d33999 181 * @retval >=1 Tx FIFO is empty
<> 149:156823d33999 182 *
<> 149:156823d33999 183 * @details This macro get Transmitter FIFO empty register value.
<> 149:156823d33999 184 */
<> 149:156823d33999 185 #define UART_GET_TX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk)
<> 149:156823d33999 186
<> 149:156823d33999 187
<> 149:156823d33999 188 /**
<> 149:156823d33999 189 * @brief Get Rx empty
<> 149:156823d33999 190 *
<> 149:156823d33999 191 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 192 *
<> 149:156823d33999 193 * @retval 0 Rx FIFO is not empty
<> 149:156823d33999 194 * @retval >=1 Rx FIFO is empty
<> 149:156823d33999 195 *
<> 149:156823d33999 196 * @details This macro get Receiver FIFO empty register value.
<> 149:156823d33999 197 */
<> 149:156823d33999 198 #define UART_GET_RX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
<> 149:156823d33999 199
<> 149:156823d33999 200
<> 149:156823d33999 201 /**
<> 149:156823d33999 202 * @brief Check specified uart port transmission is over.
<> 149:156823d33999 203 *
<> 149:156823d33999 204 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 205 *
<> 149:156823d33999 206 * @retval 0 Tx transmission is not over
<> 149:156823d33999 207 * @retval 1 Tx transmission is over
<> 149:156823d33999 208 *
<> 149:156823d33999 209 * @details This macro return Transmitter Empty Flag register bit value.
<> 149:156823d33999 210 * It indicates if specified uart port transmission is over nor not.
<> 149:156823d33999 211 */
<> 149:156823d33999 212 #define UART_IS_TX_EMPTY(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)
<> 149:156823d33999 213
<> 149:156823d33999 214
<> 149:156823d33999 215 /**
<> 149:156823d33999 216 * @brief Wait specified uart port transmission is over
<> 149:156823d33999 217 *
<> 149:156823d33999 218 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 219 *
<> 149:156823d33999 220 * @return None
<> 149:156823d33999 221 *
<> 149:156823d33999 222 * @details This macro wait specified uart port transmission is over.
<> 149:156823d33999 223 */
<> 149:156823d33999 224 #define UART_WAIT_TX_EMPTY(uart) while(!((((uart)->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos))
<> 149:156823d33999 225
<> 149:156823d33999 226
<> 149:156823d33999 227 /**
<> 149:156823d33999 228 * @brief Check RX is ready or not
<> 149:156823d33999 229 *
<> 149:156823d33999 230 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 231 *
<> 149:156823d33999 232 * @retval 0 The number of bytes in the RX FIFO is less than the RFITL
<> 149:156823d33999 233 * @retval 1 The number of bytes in the RX FIFO equals or larger than RFITL
<> 149:156823d33999 234 *
<> 149:156823d33999 235 * @details This macro check receive data available interrupt flag is set or not.
<> 149:156823d33999 236 */
<> 149:156823d33999 237 #define UART_IS_RX_READY(uart) (((uart)->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos)
<> 149:156823d33999 238
<> 149:156823d33999 239
<> 149:156823d33999 240 /**
<> 149:156823d33999 241 * @brief Check TX FIFO is full or not
<> 149:156823d33999 242 *
<> 149:156823d33999 243 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 244 *
<> 149:156823d33999 245 * @retval 1 TX FIFO is full
<> 149:156823d33999 246 * @retval 0 TX FIFO is not full
<> 149:156823d33999 247 *
<> 149:156823d33999 248 * @details This macro check TX FIFO is full or not.
<> 149:156823d33999 249 */
<> 149:156823d33999 250 #define UART_IS_TX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos)
<> 149:156823d33999 251
<> 149:156823d33999 252
<> 149:156823d33999 253 /**
<> 149:156823d33999 254 * @brief Check RX FIFO is full or not
<> 149:156823d33999 255 *
<> 149:156823d33999 256 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 257 *
<> 149:156823d33999 258 * @retval 1 RX FIFO is full
<> 149:156823d33999 259 * @retval 0 RX FIFO is not full
<> 149:156823d33999 260 *
<> 149:156823d33999 261 * @details This macro check RX FIFO is full or not.
<> 149:156823d33999 262 */
<> 149:156823d33999 263 #define UART_IS_RX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos)
<> 149:156823d33999 264
<> 149:156823d33999 265
<> 149:156823d33999 266 /**
<> 149:156823d33999 267 * @brief Get Tx full register value
<> 149:156823d33999 268 *
<> 149:156823d33999 269 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 270 *
<> 149:156823d33999 271 * @retval 0 Tx FIFO is not full.
<> 149:156823d33999 272 * @retval >=1 Tx FIFO is full.
<> 149:156823d33999 273 *
<> 149:156823d33999 274 * @details This macro get Tx full register value.
<> 149:156823d33999 275 */
<> 149:156823d33999 276 #define UART_GET_TX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)
<> 149:156823d33999 277
<> 149:156823d33999 278
<> 149:156823d33999 279 /**
<> 149:156823d33999 280 * @brief Get Rx full register value
<> 149:156823d33999 281 *
<> 149:156823d33999 282 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 283 *
<> 149:156823d33999 284 * @retval 0 Rx FIFO is not full.
<> 149:156823d33999 285 * @retval >=1 Rx FIFO is full.
<> 149:156823d33999 286 *
<> 149:156823d33999 287 * @details This macro get Rx full register value.
<> 149:156823d33999 288 */
<> 149:156823d33999 289 #define UART_GET_RX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)
<> 149:156823d33999 290
<> 149:156823d33999 291
<> 149:156823d33999 292 /**
<> 149:156823d33999 293 * @brief Enable specified UART interrupt
<> 149:156823d33999 294 *
<> 149:156823d33999 295 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 296 * @param[in] u32eIntSel Interrupt type select
<> 149:156823d33999 297 * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt
<> 149:156823d33999 298 * - \ref UART_INTEN_WKCTSIEN_Msk : CTS wakeup interrupt
<> 149:156823d33999 299 * - \ref UART_INTEN_WKDATIEN_Msk : Data wakeup interrupt
<> 149:156823d33999 300 * - \ref UART_INTEN_LINIEN_Msk : Lin bus interrupt
<> 149:156823d33999 301 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt
<> 149:156823d33999 302 * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
<> 149:156823d33999 303 * - \ref UART_INTEN_MODEMIEN_Msk : Modem interrupt
<> 149:156823d33999 304 * - \ref UART_INTEN_RLSIEN_Msk : Rx Line status interrupt
<> 149:156823d33999 305 * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
<> 149:156823d33999 306 * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
<> 149:156823d33999 307 *
<> 149:156823d33999 308 * @return None
<> 149:156823d33999 309 *
<> 149:156823d33999 310 * @details This macro enable specified UART interrupt.
<> 149:156823d33999 311 */
<> 149:156823d33999 312 #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel))
<> 149:156823d33999 313
<> 149:156823d33999 314
<> 149:156823d33999 315 /**
<> 149:156823d33999 316 * @brief Disable specified UART interrupt
<> 149:156823d33999 317 *
<> 149:156823d33999 318 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 319 * @param[in] u32eIntSel Interrupt type select
<> 149:156823d33999 320 * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt
<> 149:156823d33999 321 * - \ref UART_INTEN_WKCTSIEN_Msk : CTS wakeup interrupt
<> 149:156823d33999 322 * - \ref UART_INTEN_WKDATIEN_Msk : Data wakeup interrupt
<> 149:156823d33999 323 * - \ref UART_INTEN_LINIEN_Msk : Lin bus interrupt
<> 149:156823d33999 324 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt
<> 149:156823d33999 325 * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
<> 149:156823d33999 326 * - \ref UART_INTEN_MODEMIEN_Msk : Modem status interrupt
<> 149:156823d33999 327 * - \ref UART_INTEN_RLSIEN_Msk : Receive Line status interrupt
<> 149:156823d33999 328 * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
<> 149:156823d33999 329 * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
<> 149:156823d33999 330 *
<> 149:156823d33999 331 * @return None
<> 149:156823d33999 332 *
<> 149:156823d33999 333 * @details This macro enable specified UART interrupt.
<> 149:156823d33999 334 */
<> 149:156823d33999 335 #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel))
<> 149:156823d33999 336
<> 149:156823d33999 337
<> 149:156823d33999 338 /**
<> 149:156823d33999 339 * @brief Get specified interrupt flag/status
<> 149:156823d33999 340 *
<> 149:156823d33999 341 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 342 * @param[in] u32eIntTypeFlag Interrupt Type Flag, should be
<> 149:156823d33999 343 * - \ref UART_INTSTS_HWBUFEINT_Msk : In DMA Mode, Buffer Error Interrupt Indicator
<> 149:156823d33999 344 * - \ref UART_INTSTS_HWTOINT_Msk : In DMA Mode, Time-out Interrupt Indicator
<> 149:156823d33999 345 * - \ref UART_INTSTS_HWMODINT_Msk : In DMA Mode, MODEM Status Interrupt Indicator
<> 149:156823d33999 346 * - \ref UART_INTSTS_HWRLSINT_Msk : In DMA Mode, Receive Line Status Interrupt Indicator
<> 149:156823d33999 347 * - \ref UART_INTSTS_HWBUFEIF_Msk : In DMA Mode, Buffer Error Interrupt Flag
<> 149:156823d33999 348 * - \ref UART_INTSTS_HWTOIF_Msk : In DMA Mode, Time-out Interrupt Flag
<> 149:156823d33999 349 * - \ref UART_INTSTS_HWMODIF_Msk : In DMA Mode, MODEM Interrupt Flag
<> 149:156823d33999 350 * - \ref UART_INTSTS_HWRLSIF_Msk : In DMA Mode, Receive Line Status Flag
<> 149:156823d33999 351 * - \ref UART_INTSTS_LININT_Msk : LIN Bus Interrupt Indicator
<> 149:156823d33999 352 * - \ref UART_INTSTS_BUFERRINT_Msk : Buffer Error Interrupt Indicator
<> 149:156823d33999 353 * - \ref UART_INTSTS_RXTOINT_Msk : Time-out Interrupt Indicator
<> 149:156823d33999 354 * - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator
<> 149:156823d33999 355 * - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator
<> 149:156823d33999 356 * - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator
<> 149:156823d33999 357 * - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator
<> 149:156823d33999 358 * - \ref UART_INTSTS_LINIF_Msk : LIN Bus Flag
<> 149:156823d33999 359 * - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag
<> 149:156823d33999 360 * - \ref UART_INTSTS_RXTOIF_Msk : Rx Time-out Interrupt Flag
<> 149:156823d33999 361 * - \ref UART_INTSTS_MODEMIF_Msk : Modem Interrupt Flag
<> 149:156823d33999 362 * - \ref UART_INTSTS_RLSIF_Msk : Receive Line Status Interrupt Flag
<> 149:156823d33999 363 * - \ref UART_INTSTS_THREIF_Msk : Tx Empty Interrupt Flag
<> 149:156823d33999 364 * - \ref UART_INTSTS_RDAIF_Msk : Rx Ready Interrupt Flag
<> 149:156823d33999 365 *
<> 149:156823d33999 366 * @retval 0 The specified interrupt is not happened.
<> 149:156823d33999 367 * 1 The specified interrupt is happened.
<> 149:156823d33999 368 *
<> 149:156823d33999 369 * @details This macro get specified interrupt flag or interrupt indicator status.
<> 149:156823d33999 370 */
<> 149:156823d33999 371 #define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) (((uart)->INTSTS & (u32eIntTypeFlag))?1:0)
<> 149:156823d33999 372
<> 149:156823d33999 373
<> 149:156823d33999 374 /**
<> 149:156823d33999 375 * @brief Set RTS pin to low
<> 149:156823d33999 376 *
<> 149:156823d33999 377 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 378 *
<> 149:156823d33999 379 * @return None
<> 149:156823d33999 380 *
<> 149:156823d33999 381 * @details This macro set RTS pin to low.
<> 149:156823d33999 382 */
<> 149:156823d33999 383 __STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart)
<> 149:156823d33999 384 {
<> 149:156823d33999 385 uart->MODEM |= UART_MODEM_RTSACTLV_Msk;
<> 149:156823d33999 386 uart->MODEM &= ~UART_MODEM_RTS_Msk;
<> 149:156823d33999 387 }
<> 149:156823d33999 388
<> 149:156823d33999 389
<> 149:156823d33999 390 /**
<> 149:156823d33999 391 * @brief Set RTS pin to high
<> 149:156823d33999 392 *
<> 149:156823d33999 393 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 394 *
<> 149:156823d33999 395 * @return None
<> 149:156823d33999 396 *
<> 149:156823d33999 397 * @details This macro set RTS pin to high.
<> 149:156823d33999 398 */
<> 149:156823d33999 399 __STATIC_INLINE void UART_SET_RTS(UART_T* uart)
<> 149:156823d33999 400 {
<> 149:156823d33999 401 uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk;
<> 149:156823d33999 402 }
<> 149:156823d33999 403
<> 149:156823d33999 404
<> 149:156823d33999 405 /**
<> 149:156823d33999 406 * @brief Clear RS-485 Address Byte Detection Flag
<> 149:156823d33999 407 *
<> 149:156823d33999 408 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 409 *
<> 149:156823d33999 410 * @return None
<> 149:156823d33999 411 *
<> 149:156823d33999 412 * @details This macro clear RS-485 address byte detection flag.
<> 149:156823d33999 413 */
<> 149:156823d33999 414 #define UART_RS485_CLEAR_ADDR_FLAG(uart) ((uart)->FIFOSTS = UART_FIFOSTS_ADDRDETF_Msk)
<> 149:156823d33999 415
<> 149:156823d33999 416
<> 149:156823d33999 417 /**
<> 149:156823d33999 418 * @brief Get RS-485 Address Byte Detection Flag
<> 149:156823d33999 419 *
<> 149:156823d33999 420 * @param[in] uart The pointer of the specified UART module
<> 149:156823d33999 421 *
<> 149:156823d33999 422 * @retval 0 Receiver detects a data that is not an address bit.
<> 149:156823d33999 423 * @retval 1 Receiver detects a data that is an address bit.
<> 149:156823d33999 424 *
<> 149:156823d33999 425 * @details This macro get RS-485 address byte detection flag.
<> 149:156823d33999 426 */
<> 149:156823d33999 427 #define UART_RS485_GET_ADDR_FLAG(uart) (((uart)->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos)
<> 149:156823d33999 428
<> 149:156823d33999 429
<> 149:156823d33999 430 void UART_ClearIntFlag(UART_T* uart , uint32_t u32InterruptFlag);
<> 149:156823d33999 431 void UART_Close(UART_T* uart);
<> 149:156823d33999 432 void UART_DisableFlowCtrl(UART_T* uart);
<> 149:156823d33999 433 void UART_DisableInt(UART_T* uart, uint32_t u32InterruptFlag);
<> 149:156823d33999 434 void UART_EnableFlowCtrl(UART_T* uart);
<> 149:156823d33999 435 void UART_EnableInt(UART_T* uart, uint32_t u32InterruptFlag);
<> 149:156823d33999 436 void UART_Open(UART_T* uart, uint32_t u32baudrate);
<> 149:156823d33999 437 uint32_t UART_Read(UART_T* uart, uint8_t *pu8RxBuf, uint32_t u32ReadBytes);
<> 149:156823d33999 438 void UART_SetLine_Config(UART_T* uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits);
<> 149:156823d33999 439 void UART_SetTimeoutCnt(UART_T* uart, uint32_t u32TOC);
<> 149:156823d33999 440 void UART_SelectIrDAMode(UART_T* uart, uint32_t u32Buadrate, uint32_t u32Direction);
<> 149:156823d33999 441 void UART_SelectRS485Mode(UART_T* uart, uint32_t u32Mode, uint32_t u32Addr);
<> 149:156823d33999 442 void UART_SelectLINMode(UART_T* uart, uint32_t u32Mode, uint32_t u32BreakLength);
<> 149:156823d33999 443 uint32_t UART_Write(UART_T* uart, uint8_t *pu8TxBuf, uint32_t u32WriteBytes);
<> 149:156823d33999 444
<> 149:156823d33999 445
<> 149:156823d33999 446
<> 149:156823d33999 447
<> 149:156823d33999 448 /*@}*/ /* end of group UART_EXPORTED_FUNCTIONS */
<> 149:156823d33999 449
<> 149:156823d33999 450 /*@}*/ /* end of group UART_Driver */
<> 149:156823d33999 451
<> 149:156823d33999 452 /*@}*/ /* end of group Standard_Driver */
<> 149:156823d33999 453
<> 149:156823d33999 454 #ifdef __cplusplus
<> 149:156823d33999 455 }
<> 149:156823d33999 456 #endif
<> 149:156823d33999 457
<> 149:156823d33999 458 #endif //__UART_H__
<> 149:156823d33999 459
<> 149:156823d33999 460 /*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/