Fawwaz Nadzmy / mbed-STM

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/TARGET_STM/TARGET_STM32F4/i2c_api.c@153:9398a535854b, 2016-12-22 (annotated)

Committer:
fwndz
Date:
Thu Dec 22 05:12:40 2016 +0000
Revision:
153:9398a535854b
Parent:
151:5eaa88a5bcc7 
device target maximize

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 *******************************************************************************
<> 149:156823d33999 3 * Copyright (c) 2015, STMicroelectronics
<> 149:156823d33999 4 * All rights reserved.
<> 149:156823d33999 5 *
<> 149:156823d33999 6 * Redistribution and use in source and binary forms, with or without
<> 149:156823d33999 7 * modification, are permitted provided that the following conditions are met:
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 10 * this list of conditions and the following disclaimer.
<> 149:156823d33999 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 12 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 13 * and/or other materials provided with the distribution.
<> 149:156823d33999 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 15 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 16 * without specific prior written permission.
<> 149:156823d33999 17 *
<> 149:156823d33999 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 28 *******************************************************************************
<> 149:156823d33999 29 */
<> 149:156823d33999 30 #include "mbed_assert.h"
<> 149:156823d33999 31 #include "i2c_api.h"
<> 151:5eaa88a5bcc7 32 #include "platform/wait_api.h"
<> 149:156823d33999 33
<> 149:156823d33999 34 #if DEVICE_I2C
<> 149:156823d33999 35
<> 149:156823d33999 36 #include "cmsis.h"
<> 149:156823d33999 37 #include "pinmap.h"
<> 149:156823d33999 38 #include "PeripheralPins.h"
<> 149:156823d33999 39
<> 151:5eaa88a5bcc7 40 #ifndef DEBUG_STDIO
<> 151:5eaa88a5bcc7 41 # define DEBUG_STDIO 0
<> 151:5eaa88a5bcc7 42 #endif
<> 151:5eaa88a5bcc7 43
<> 151:5eaa88a5bcc7 44 #if DEBUG_STDIO
<> 151:5eaa88a5bcc7 45 # include <stdio.h>
<> 151:5eaa88a5bcc7 46 # define DEBUG_PRINTF(...) do { printf(__VA_ARGS__); } while(0)
<> 151:5eaa88a5bcc7 47 #else
<> 151:5eaa88a5bcc7 48 # define DEBUG_PRINTF(...) {}
<> 151:5eaa88a5bcc7 49 #endif
<> 149:156823d33999 50
<> 151:5eaa88a5bcc7 51 /* Timeout values are based on core clock and I2C clock.
<> 151:5eaa88a5bcc7 52 The BYTE_TIMEOUT is computed as twice the number of cycles it would
<> 151:5eaa88a5bcc7 53 take to send 10 bits over I2C. Most Flags should take less than that.
<> 151:5eaa88a5bcc7 54 This is for immediate FLAG or ACK check.
<> 151:5eaa88a5bcc7 55 */
<> 151:5eaa88a5bcc7 56 #define BYTE_TIMEOUT ((SystemCoreClock / handle->Init.ClockSpeed) * 2 * 10)
<> 151:5eaa88a5bcc7 57 /* Timeout values based on I2C clock.
<> 151:5eaa88a5bcc7 58 The BYTE_TIMEOUT_US is computed as 3x the time in us it would
<> 151:5eaa88a5bcc7 59 take to send 10 bits over I2C. Most Flags should take less than that.
<> 151:5eaa88a5bcc7 60 This is for complete transfers check.
<> 151:5eaa88a5bcc7 61 */
<> 151:5eaa88a5bcc7 62 #define BYTE_TIMEOUT_US ((SystemCoreClock / handle->Init.ClockSpeed) * 3 * 10)
<> 149:156823d33999 63
<> 149:156823d33999 64 #if DEVICE_I2C_ASYNCH
<> 149:156823d33999 65 #define I2C_S(obj) (struct i2c_s *) (&((obj)->i2c))
<> 149:156823d33999 66 #else
<> 149:156823d33999 67 #define I2C_S(obj) (struct i2c_s *) (obj)
<> 149:156823d33999 68 #endif
<> 149:156823d33999 69
<> 151:5eaa88a5bcc7 70 /* could be defined at family level */
<> 151:5eaa88a5bcc7 71 #define I2C_NUM (5)
<> 151:5eaa88a5bcc7 72 static I2C_HandleTypeDef* i2c_handles[I2C_NUM];
<> 151:5eaa88a5bcc7 73
<> 151:5eaa88a5bcc7 74 static void i2c1_irq(void)
<> 151:5eaa88a5bcc7 75 {
<> 151:5eaa88a5bcc7 76 I2C_HandleTypeDef * handle = i2c_handles[0];
<> 151:5eaa88a5bcc7 77 HAL_I2C_EV_IRQHandler(handle);
<> 151:5eaa88a5bcc7 78 HAL_I2C_ER_IRQHandler(handle);
<> 151:5eaa88a5bcc7 79 }
<> 151:5eaa88a5bcc7 80
<> 151:5eaa88a5bcc7 81 static void i2c2_irq(void)
<> 151:5eaa88a5bcc7 82 {
<> 151:5eaa88a5bcc7 83 I2C_HandleTypeDef * handle = i2c_handles[1];
<> 151:5eaa88a5bcc7 84 HAL_I2C_EV_IRQHandler(handle);
<> 151:5eaa88a5bcc7 85 HAL_I2C_ER_IRQHandler(handle);
<> 151:5eaa88a5bcc7 86 }
<> 151:5eaa88a5bcc7 87
<> 151:5eaa88a5bcc7 88 #if defined(I2C3_BASE)
<> 151:5eaa88a5bcc7 89 static void i2c3_irq(void)
<> 151:5eaa88a5bcc7 90 {
<> 151:5eaa88a5bcc7 91 I2C_HandleTypeDef * handle = i2c_handles[2];
<> 151:5eaa88a5bcc7 92 HAL_I2C_EV_IRQHandler(handle);
<> 151:5eaa88a5bcc7 93 HAL_I2C_ER_IRQHandler(handle);
<> 151:5eaa88a5bcc7 94 }
<> 151:5eaa88a5bcc7 95 #endif
<> 151:5eaa88a5bcc7 96 #if defined(I2C4_BASE)
<> 151:5eaa88a5bcc7 97 static void i2c4_irq(void)
<> 151:5eaa88a5bcc7 98 {
<> 151:5eaa88a5bcc7 99 I2C_HandleTypeDef * handle = i2c_handles[3];
<> 151:5eaa88a5bcc7 100 HAL_I2C_EV_IRQHandler(handle);
<> 151:5eaa88a5bcc7 101 HAL_I2C_ER_IRQHandler(handle);
<> 151:5eaa88a5bcc7 102 }
<> 151:5eaa88a5bcc7 103 #endif
<> 151:5eaa88a5bcc7 104 #if defined(FMPI2C1_BASE)
<> 151:5eaa88a5bcc7 105 static void i2c5_irq(void)
<> 151:5eaa88a5bcc7 106 {
<> 151:5eaa88a5bcc7 107 I2C_HandleTypeDef * handle = i2c_handles[4];
<> 151:5eaa88a5bcc7 108 HAL_I2C_EV_IRQHandler(handle);
<> 151:5eaa88a5bcc7 109 HAL_I2C_ER_IRQHandler(handle);
<> 151:5eaa88a5bcc7 110 }
<> 151:5eaa88a5bcc7 111 #endif
<> 151:5eaa88a5bcc7 112
<> 151:5eaa88a5bcc7 113 void i2c_ev_err_enable(i2c_t *obj, uint32_t handler) {
<> 151:5eaa88a5bcc7 114 struct i2c_s *obj_s = I2C_S(obj);
<> 151:5eaa88a5bcc7 115 IRQn_Type irq_event_n = obj_s->event_i2cIRQ;
<> 151:5eaa88a5bcc7 116 IRQn_Type irq_error_n = obj_s->error_i2cIRQ;
<> 151:5eaa88a5bcc7 117
<> 151:5eaa88a5bcc7 118 /* Set up event IT using IRQ and handler tables */
<> 151:5eaa88a5bcc7 119 NVIC_SetVector(irq_event_n, handler);
<> 151:5eaa88a5bcc7 120 HAL_NVIC_SetPriority(irq_event_n, 0, 0);
<> 151:5eaa88a5bcc7 121 HAL_NVIC_EnableIRQ(irq_event_n);
<> 151:5eaa88a5bcc7 122 /* Set up error IT using IRQ and handler tables */
<> 151:5eaa88a5bcc7 123 NVIC_SetVector(irq_error_n, handler);
<> 151:5eaa88a5bcc7 124 HAL_NVIC_SetPriority(irq_error_n, 0, 1);
<> 151:5eaa88a5bcc7 125 HAL_NVIC_EnableIRQ(irq_error_n);
<> 151:5eaa88a5bcc7 126 }
<> 151:5eaa88a5bcc7 127
<> 151:5eaa88a5bcc7 128 void i2c_ev_err_disable(i2c_t *obj) {
<> 151:5eaa88a5bcc7 129 struct i2c_s *obj_s = I2C_S(obj);
<> 151:5eaa88a5bcc7 130 IRQn_Type irq_event_n = obj_s->event_i2cIRQ;
<> 151:5eaa88a5bcc7 131 IRQn_Type irq_error_n = obj_s->error_i2cIRQ;
<> 151:5eaa88a5bcc7 132
<> 151:5eaa88a5bcc7 133 HAL_NVIC_DisableIRQ(irq_event_n);
<> 151:5eaa88a5bcc7 134 HAL_NVIC_DisableIRQ(irq_error_n);
<> 151:5eaa88a5bcc7 135 }
<> 151:5eaa88a5bcc7 136
<> 151:5eaa88a5bcc7 137 void i2c_irq_set(i2c_t *obj, uint32_t enable)
<> 151:5eaa88a5bcc7 138 {
<> 151:5eaa88a5bcc7 139 struct i2c_s *obj_s = I2C_S(obj);
<> 151:5eaa88a5bcc7 140 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 151:5eaa88a5bcc7 141 uint32_t handler = 0;
<> 151:5eaa88a5bcc7 142
<> 151:5eaa88a5bcc7 143 switch (obj_s->index) {
<> 151:5eaa88a5bcc7 144 case 0:
<> 151:5eaa88a5bcc7 145 handler = (uint32_t)&i2c1_irq;
<> 151:5eaa88a5bcc7 146 break;
<> 151:5eaa88a5bcc7 147 case 1:
<> 151:5eaa88a5bcc7 148 handler = (uint32_t)&i2c2_irq;
<> 151:5eaa88a5bcc7 149 break;
<> 151:5eaa88a5bcc7 150 #if defined(I2C3_BASE)
<> 151:5eaa88a5bcc7 151 case 2:
<> 151:5eaa88a5bcc7 152 handler = (uint32_t)&i2c3_irq;
<> 151:5eaa88a5bcc7 153 break;
<> 151:5eaa88a5bcc7 154 #endif
<> 151:5eaa88a5bcc7 155 #if defined(I2C4_BASE)
<> 151:5eaa88a5bcc7 156 case 3:
<> 151:5eaa88a5bcc7 157 handler = (uint32_t)&i2c4_irq;
<> 151:5eaa88a5bcc7 158 break;
<> 151:5eaa88a5bcc7 159 #endif
<> 151:5eaa88a5bcc7 160 #if defined(FMPI2C1_BASE)
<> 151:5eaa88a5bcc7 161 case 4:
<> 151:5eaa88a5bcc7 162 handler = (uint32_t)&i2c5_irq;
<> 151:5eaa88a5bcc7 163 break;
<> 151:5eaa88a5bcc7 164 #endif
<> 151:5eaa88a5bcc7 165 }
<> 151:5eaa88a5bcc7 166
<> 151:5eaa88a5bcc7 167 if (enable) {
<> 151:5eaa88a5bcc7 168 i2c_handles[obj_s->index] = handle;
<> 151:5eaa88a5bcc7 169 i2c_ev_err_enable(obj, handler);
<> 151:5eaa88a5bcc7 170 } else { // disable
<> 151:5eaa88a5bcc7 171 i2c_ev_err_disable(obj);
<> 151:5eaa88a5bcc7 172 i2c_handles[obj_s->index] = 0;
<> 151:5eaa88a5bcc7 173 }
<> 151:5eaa88a5bcc7 174 }
<> 149:156823d33999 175
<> 149:156823d33999 176 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
<> 149:156823d33999 177
<> 149:156823d33999 178 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 179
<> 149:156823d33999 180 // Determine the I2C to use
<> 149:156823d33999 181 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
<> 149:156823d33999 182 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
<> 151:5eaa88a5bcc7 183 obj_s->sda = sda;
<> 151:5eaa88a5bcc7 184 obj_s->scl = scl;
<> 149:156823d33999 185
<> 149:156823d33999 186 obj_s->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
<> 149:156823d33999 187 MBED_ASSERT(obj_s->i2c != (I2CName)NC);
<> 149:156823d33999 188
<> 149:156823d33999 189 // Enable I2C1 clock and pinout if not done
<> 151:5eaa88a5bcc7 190 if (obj_s->i2c == I2C_1) {
<> 151:5eaa88a5bcc7 191 obj_s->index = 0;
<> 149:156823d33999 192 // Configure I2C pins
<> 149:156823d33999 193 pinmap_pinout(sda, PinMap_I2C_SDA);
<> 149:156823d33999 194 pinmap_pinout(scl, PinMap_I2C_SCL);
<> 149:156823d33999 195 pin_mode(sda, PullUp);
<> 149:156823d33999 196 pin_mode(scl, PullUp);
<> 149:156823d33999 197 obj_s->event_i2cIRQ = I2C1_EV_IRQn;
<> 149:156823d33999 198 obj_s->error_i2cIRQ = I2C1_ER_IRQn;
<> 149:156823d33999 199 __I2C1_CLK_ENABLE();
<> 149:156823d33999 200 }
<> 149:156823d33999 201 // Enable I2C2 clock and pinout if not done
<> 151:5eaa88a5bcc7 202 if (obj_s->i2c == I2C_2) {
<> 151:5eaa88a5bcc7 203 obj_s->index = 1;
<> 149:156823d33999 204 // Configure I2C pins
<> 149:156823d33999 205 pinmap_pinout(sda, PinMap_I2C_SDA);
<> 149:156823d33999 206 pinmap_pinout(scl, PinMap_I2C_SCL);
<> 149:156823d33999 207 pin_mode(sda, PullUp);
<> 149:156823d33999 208 pin_mode(scl, PullUp);
<> 149:156823d33999 209 obj_s->event_i2cIRQ = I2C2_EV_IRQn;
<> 149:156823d33999 210 obj_s->error_i2cIRQ = I2C2_ER_IRQn;
<> 149:156823d33999 211 __I2C2_CLK_ENABLE();
<> 149:156823d33999 212 }
<> 149:156823d33999 213 #if defined I2C3_BASE
<> 149:156823d33999 214 // Enable I2C3 clock and pinout if not done
<> 151:5eaa88a5bcc7 215 if (obj_s->i2c == I2C_3) {
<> 151:5eaa88a5bcc7 216 obj_s->index = 2;
<> 149:156823d33999 217 // Configure I2C pins
<> 149:156823d33999 218 pinmap_pinout(sda, PinMap_I2C_SDA);
<> 149:156823d33999 219 pinmap_pinout(scl, PinMap_I2C_SCL);
<> 149:156823d33999 220 pin_mode(sda, PullUp);
<> 149:156823d33999 221 pin_mode(scl, PullUp);
<> 149:156823d33999 222 obj_s->event_i2cIRQ = I2C3_EV_IRQn;
<> 149:156823d33999 223 obj_s->error_i2cIRQ = I2C3_ER_IRQn;
<> 149:156823d33999 224 __I2C3_CLK_ENABLE();
<> 149:156823d33999 225 }
<> 149:156823d33999 226 #endif
<> 151:5eaa88a5bcc7 227 #if defined I2C4_BASE
<> 151:5eaa88a5bcc7 228 // Enable clock and pinout if not done
<> 151:5eaa88a5bcc7 229 if (obj_s->i2c == I2C_4) {
<> 151:5eaa88a5bcc7 230 obj_s->index = 3;
<> 149:156823d33999 231 // Configure I2C pins
<> 149:156823d33999 232 pinmap_pinout(sda, PinMap_I2C_SDA);
<> 149:156823d33999 233 pinmap_pinout(scl, PinMap_I2C_SCL);
<> 149:156823d33999 234 pin_mode(sda, PullUp);
<> 149:156823d33999 235 pin_mode(scl, PullUp);
<> 151:5eaa88a5bcc7 236 obj_s->event_i2cIRQ = I2C4_EV_IRQn;
<> 151:5eaa88a5bcc7 237 obj_s->error_i2cIRQ = I2C4_ER_IRQn;
<> 151:5eaa88a5bcc7 238 __I2C4_CLK_ENABLE();
<> 151:5eaa88a5bcc7 239 }
<> 151:5eaa88a5bcc7 240 #endif
<> 151:5eaa88a5bcc7 241 #if defined FMPI2C1_BASE
<> 151:5eaa88a5bcc7 242 // Enable clock and pinout if not done
<> 151:5eaa88a5bcc7 243 if (obj_s->i2c == FMPI2C_1) {
<> 151:5eaa88a5bcc7 244 obj_s->index = 3;
<> 151:5eaa88a5bcc7 245 // Configure I2C pins
<> 151:5eaa88a5bcc7 246 pinmap_pinout(sda, PinMap_I2C_SDA);
<> 151:5eaa88a5bcc7 247 pinmap_pinout(scl, PinMap_I2C_SCL);
<> 151:5eaa88a5bcc7 248 pin_mode(sda, PullUp);
<> 151:5eaa88a5bcc7 249 pin_mode(scl, PullUp);
<> 149:156823d33999 250 obj_s->event_i2cIRQ = FMPI2C1_EV_IRQn;
<> 149:156823d33999 251 obj_s->error_i2cIRQ = FMPI2C1_ER_IRQn;
<> 149:156823d33999 252 __HAL_RCC_FMPI2C1_CLK_ENABLE();
<> 149:156823d33999 253 }
<> 149:156823d33999 254 #endif
<> 149:156823d33999 255
<> 149:156823d33999 256 // Reset to clear pending flags if any
<> 149:156823d33999 257 i2c_reset(obj);
<> 149:156823d33999 258
<> 149:156823d33999 259 // I2C configuration
<> 149:156823d33999 260 i2c_frequency(obj, 100000); // 100 kHz per default
<> 149:156823d33999 261
<> 149:156823d33999 262 #if DEVICE_I2CSLAVE
<> 149:156823d33999 263 // I2C master by default
<> 149:156823d33999 264 obj_s->slave = 0;
<> 151:5eaa88a5bcc7 265 obj_s->pending_slave_tx_master_rx = 0;
<> 151:5eaa88a5bcc7 266 obj_s->pending_slave_rx_maxter_tx = 0;
<> 149:156823d33999 267 #endif
<> 149:156823d33999 268
<> 149:156823d33999 269 // I2C Xfer operation init
<> 151:5eaa88a5bcc7 270 obj_s->event = 0;
<> 149:156823d33999 271 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
<> 151:5eaa88a5bcc7 272
<> 151:5eaa88a5bcc7 273 /* Activate default IRQ handlers for sync mode
<> 151:5eaa88a5bcc7 274 * which would be overwritten in async mode
<> 151:5eaa88a5bcc7 275 */
<> 151:5eaa88a5bcc7 276 i2c_irq_set(obj, 1);
<> 149:156823d33999 277 }
<> 149:156823d33999 278
<> 149:156823d33999 279 void i2c_frequency(i2c_t *obj, int hz)
<> 149:156823d33999 280 {
<> 149:156823d33999 281
<> 149:156823d33999 282 int timeout;
<> 149:156823d33999 283 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 284 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 285
<> 149:156823d33999 286 MBED_ASSERT((hz > 0) && (hz <= 400000));
<> 149:156823d33999 287
<> 149:156823d33999 288 // wait before init
<> 151:5eaa88a5bcc7 289 timeout = BYTE_TIMEOUT;
<> 151:5eaa88a5bcc7 290 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0));
<> 149:156823d33999 291
<> 149:156823d33999 292 // I2C configuration
<> 149:156823d33999 293 handle->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
<> 149:156823d33999 294 handle->Init.ClockSpeed = hz;
<> 149:156823d33999 295 handle->Init.DualAddressMode = I2C_DUALADDRESS_DISABLED;
<> 149:156823d33999 296 handle->Init.DutyCycle = I2C_DUTYCYCLE_2;
<> 149:156823d33999 297 handle->Init.GeneralCallMode = I2C_GENERALCALL_DISABLED;
<> 149:156823d33999 298 handle->Init.NoStretchMode = I2C_NOSTRETCH_DISABLED;
<> 149:156823d33999 299 handle->Init.OwnAddress1 = 0;
<> 149:156823d33999 300 handle->Init.OwnAddress2 = 0;
<> 149:156823d33999 301 HAL_I2C_Init(handle);
<> 149:156823d33999 302
<> 151:5eaa88a5bcc7 303 }
<> 151:5eaa88a5bcc7 304
<> 151:5eaa88a5bcc7 305 i2c_t *get_i2c_obj(I2C_HandleTypeDef *hi2c){
<> 149:156823d33999 306
<> 151:5eaa88a5bcc7 307 /* Aim of the function is to get i2c_s pointer using hi2c pointer */
<> 151:5eaa88a5bcc7 308 /* Highly inspired from magical linux kernel's "container_of" */
<> 151:5eaa88a5bcc7 309 /* (which was not directly used since not compatible with IAR toolchain) */
<> 151:5eaa88a5bcc7 310 struct i2c_s *obj_s;
<> 151:5eaa88a5bcc7 311 i2c_t *obj;
<> 151:5eaa88a5bcc7 312
<> 151:5eaa88a5bcc7 313 obj_s = (struct i2c_s *)( (char *)hi2c - offsetof(struct i2c_s,handle));
<> 151:5eaa88a5bcc7 314 obj = (i2c_t *)( (char *)obj_s - offsetof(i2c_t,i2c));
<> 151:5eaa88a5bcc7 315
<> 151:5eaa88a5bcc7 316 return (obj);
<> 149:156823d33999 317 }
<> 149:156823d33999 318
<> 149:156823d33999 319 inline int i2c_start(i2c_t *obj) {
<> 149:156823d33999 320
<> 149:156823d33999 321 int timeout;
<> 149:156823d33999 322 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 323 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 324
<> 149:156823d33999 325 // Clear Acknowledge failure flag
<> 149:156823d33999 326 __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_AF);
<> 149:156823d33999 327
<> 149:156823d33999 328 // Wait the STOP condition has been previously correctly sent
<> 149:156823d33999 329 // This timeout can be avoid in some specific cases by simply clearing the STOP bit
<> 151:5eaa88a5bcc7 330 timeout = BYTE_TIMEOUT;
<> 149:156823d33999 331 while ((handle->Instance->CR1 & I2C_CR1_STOP) == I2C_CR1_STOP) {
<> 149:156823d33999 332 if ((timeout--) == 0) {
<> 149:156823d33999 333 return 1;
<> 149:156823d33999 334 }
<> 149:156823d33999 335 }
<> 149:156823d33999 336
<> 149:156823d33999 337 // Generate the START condition
<> 149:156823d33999 338 handle->Instance->CR1 |= I2C_CR1_START;
<> 149:156823d33999 339
<> 149:156823d33999 340 // Wait the START condition has been correctly sent
<> 151:5eaa88a5bcc7 341 timeout = BYTE_TIMEOUT;
<> 149:156823d33999 342 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_SB) == RESET) {
<> 149:156823d33999 343 if ((timeout--) == 0) {
<> 149:156823d33999 344 return 1;
<> 149:156823d33999 345 }
<> 149:156823d33999 346 }
<> 149:156823d33999 347
<> 149:156823d33999 348 return 0;
<> 149:156823d33999 349 }
<> 149:156823d33999 350
<> 149:156823d33999 351 inline int i2c_stop(i2c_t *obj) {
<> 149:156823d33999 352 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 353 I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c;
<> 149:156823d33999 354
<> 149:156823d33999 355 // Generate the STOP condition
<> 149:156823d33999 356 i2c->CR1 |= I2C_CR1_STOP;
<> 149:156823d33999 357
<> 149:156823d33999 358 return 0;
<> 149:156823d33999 359 }
<> 149:156823d33999 360
<> 149:156823d33999 361 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
<> 149:156823d33999 362 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 363 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 151:5eaa88a5bcc7 364 int count = 0, ret = 0;
<> 151:5eaa88a5bcc7 365 uint32_t timeout = 0;
<> 149:156823d33999 366
<> 151:5eaa88a5bcc7 367 if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) ||
<> 151:5eaa88a5bcc7 368 (obj_s->XferOperation == I2C_LAST_FRAME)) {
<> 151:5eaa88a5bcc7 369 if (stop)
<> 151:5eaa88a5bcc7 370 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
<> 151:5eaa88a5bcc7 371 else
<> 151:5eaa88a5bcc7 372 obj_s->XferOperation = I2C_FIRST_FRAME;
<> 151:5eaa88a5bcc7 373 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
<> 151:5eaa88a5bcc7 374 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
<> 151:5eaa88a5bcc7 375 if (stop)
<> 151:5eaa88a5bcc7 376 obj_s->XferOperation = I2C_LAST_FRAME;
<> 151:5eaa88a5bcc7 377 else
<> 151:5eaa88a5bcc7 378 obj_s->XferOperation = I2C_NEXT_FRAME;
<> 149:156823d33999 379 }
<> 149:156823d33999 380
<> 151:5eaa88a5bcc7 381 obj_s->event = 0;
<> 151:5eaa88a5bcc7 382 ret = HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation);
<> 151:5eaa88a5bcc7 383
<> 151:5eaa88a5bcc7 384 if(ret == HAL_OK) {
<> 151:5eaa88a5bcc7 385 timeout = BYTE_TIMEOUT_US * length;
<> 151:5eaa88a5bcc7 386 /* transfer started : wait completion or timeout */
<> 151:5eaa88a5bcc7 387 while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) {
<> 151:5eaa88a5bcc7 388 wait_us(1);
<> 151:5eaa88a5bcc7 389 }
<> 149:156823d33999 390
<> 151:5eaa88a5bcc7 391 if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) {
<> 151:5eaa88a5bcc7 392 DEBUG_PRINTF(" TIMEOUT or error in i2c_read\r\n");
<> 151:5eaa88a5bcc7 393 /* re-init IP to try and get back in a working state */
<> 151:5eaa88a5bcc7 394 i2c_init(obj, obj_s->sda, obj_s->scl);
<> 151:5eaa88a5bcc7 395 } else {
<> 151:5eaa88a5bcc7 396 count = length;
<> 149:156823d33999 397 }
<> 151:5eaa88a5bcc7 398 } else {
<> 151:5eaa88a5bcc7 399 DEBUG_PRINTF("ERROR in i2c_read\r\n");
<> 149:156823d33999 400 }
<> 149:156823d33999 401
<> 151:5eaa88a5bcc7 402 return count;
<> 149:156823d33999 403 }
<> 149:156823d33999 404
<> 149:156823d33999 405 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
<> 149:156823d33999 406 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 407 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 151:5eaa88a5bcc7 408 int count = 0, ret = 0;
<> 151:5eaa88a5bcc7 409 uint32_t timeout = 0;
<> 149:156823d33999 410
<> 151:5eaa88a5bcc7 411 if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) ||
<> 151:5eaa88a5bcc7 412 (obj_s->XferOperation == I2C_LAST_FRAME)) {
<> 151:5eaa88a5bcc7 413 if (stop)
<> 151:5eaa88a5bcc7 414 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
<> 151:5eaa88a5bcc7 415 else
<> 151:5eaa88a5bcc7 416 obj_s->XferOperation = I2C_FIRST_FRAME;
<> 151:5eaa88a5bcc7 417 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
<> 151:5eaa88a5bcc7 418 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
<> 151:5eaa88a5bcc7 419 if (stop)
<> 151:5eaa88a5bcc7 420 obj_s->XferOperation = I2C_LAST_FRAME;
<> 151:5eaa88a5bcc7 421 else
<> 151:5eaa88a5bcc7 422 obj_s->XferOperation = I2C_NEXT_FRAME;
<> 149:156823d33999 423 }
<> 149:156823d33999 424
<> 151:5eaa88a5bcc7 425 obj_s->event = 0;
<> 151:5eaa88a5bcc7 426
<> 151:5eaa88a5bcc7 427 ret = HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation);
<> 149:156823d33999 428
<> 151:5eaa88a5bcc7 429 if(ret == HAL_OK) {
<> 151:5eaa88a5bcc7 430 timeout = BYTE_TIMEOUT_US * length;
<> 151:5eaa88a5bcc7 431 /* transfer started : wait completion or timeout */
<> 151:5eaa88a5bcc7 432 while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) {
<> 151:5eaa88a5bcc7 433 wait_us(1);
<> 149:156823d33999 434 }
<> 149:156823d33999 435
<> 151:5eaa88a5bcc7 436 if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) {
<> 151:5eaa88a5bcc7 437 DEBUG_PRINTF(" TIMEOUT or error in i2c_write\r\n");
<> 151:5eaa88a5bcc7 438 /* re-init IP to try and get back in a working state */
<> 151:5eaa88a5bcc7 439 i2c_init(obj, obj_s->sda, obj_s->scl);
<> 151:5eaa88a5bcc7 440 } else {
<> 151:5eaa88a5bcc7 441 count = length;
<> 151:5eaa88a5bcc7 442 }
<> 151:5eaa88a5bcc7 443 } else {
<> 151:5eaa88a5bcc7 444 DEBUG_PRINTF("ERROR in i2c_read\r\n");
<> 149:156823d33999 445 }
<> 149:156823d33999 446
<> 149:156823d33999 447 return count;
<> 149:156823d33999 448 }
<> 149:156823d33999 449
<> 149:156823d33999 450 int i2c_byte_read(i2c_t *obj, int last) {
<> 149:156823d33999 451
<> 149:156823d33999 452 int timeout;
<> 149:156823d33999 453 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 454 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 455
<> 149:156823d33999 456 if (last) {
<> 149:156823d33999 457 // Don't acknowledge the last byte
<> 149:156823d33999 458 handle->Instance->CR1 &= ~I2C_CR1_ACK;
<> 149:156823d33999 459 } else {
<> 149:156823d33999 460 // Acknowledge the byte
<> 149:156823d33999 461 handle->Instance->CR1 |= I2C_CR1_ACK;
<> 149:156823d33999 462 }
<> 149:156823d33999 463
<> 149:156823d33999 464 // Wait until the byte is received
<> 151:5eaa88a5bcc7 465 timeout = BYTE_TIMEOUT;
<> 149:156823d33999 466 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE) == RESET) {
<> 149:156823d33999 467 if ((timeout--) == 0) {
<> 149:156823d33999 468 return -1;
<> 149:156823d33999 469 }
<> 149:156823d33999 470 }
<> 149:156823d33999 471
<> 149:156823d33999 472 return (int)handle->Instance->DR;
<> 149:156823d33999 473 }
<> 149:156823d33999 474
<> 149:156823d33999 475 int i2c_byte_write(i2c_t *obj, int data) {
<> 149:156823d33999 476
<> 149:156823d33999 477 int timeout;
<> 149:156823d33999 478 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 479 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 480
<> 149:156823d33999 481 handle->Instance->DR = (uint8_t)data;
<> 149:156823d33999 482
<> 149:156823d33999 483 // Wait until the byte (might be the address) is transmitted
<> 151:5eaa88a5bcc7 484 timeout = BYTE_TIMEOUT;
<> 149:156823d33999 485 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE) == RESET) &&
<> 149:156823d33999 486 (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BTF) == RESET) &&
<> 149:156823d33999 487 (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) == RESET)) {
<> 149:156823d33999 488 if ((timeout--) == 0) {
<> 149:156823d33999 489 return 0;
<> 149:156823d33999 490 }
<> 149:156823d33999 491 }
<> 149:156823d33999 492
<> 149:156823d33999 493 if (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) != RESET)
<> 149:156823d33999 494 {
<> 149:156823d33999 495 __HAL_I2C_CLEAR_ADDRFLAG(handle);
<> 149:156823d33999 496 }
<> 149:156823d33999 497
<> 149:156823d33999 498 return 1;
<> 149:156823d33999 499 }
<> 149:156823d33999 500
<> 149:156823d33999 501 void i2c_reset(i2c_t *obj) {
<> 149:156823d33999 502
<> 149:156823d33999 503 int timeout;
<> 149:156823d33999 504 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 505 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 506
<> 149:156823d33999 507 handle->Instance = (I2C_TypeDef *)(obj_s->i2c);
<> 149:156823d33999 508
<> 149:156823d33999 509 // wait before reset
<> 151:5eaa88a5bcc7 510 timeout = BYTE_TIMEOUT;
<> 151:5eaa88a5bcc7 511 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0));
<> 149:156823d33999 512
<> 149:156823d33999 513 if (obj_s->i2c == I2C_1) {
<> 149:156823d33999 514 __I2C1_FORCE_RESET();
<> 149:156823d33999 515 __I2C1_RELEASE_RESET();
<> 149:156823d33999 516 }
<> 149:156823d33999 517
<> 149:156823d33999 518 if (obj_s->i2c == I2C_2) {
<> 149:156823d33999 519 __I2C2_FORCE_RESET();
<> 149:156823d33999 520 __I2C2_RELEASE_RESET();
<> 149:156823d33999 521 }
<> 149:156823d33999 522 #if defined I2C3_BASE
<> 149:156823d33999 523 if (obj_s->i2c == I2C_3) {
<> 149:156823d33999 524 __I2C3_FORCE_RESET();
<> 149:156823d33999 525 __I2C3_RELEASE_RESET();
<> 149:156823d33999 526 }
<> 149:156823d33999 527 #endif
<> 151:5eaa88a5bcc7 528 #if defined I2C4_BASE
<> 151:5eaa88a5bcc7 529 if (obj_s->i2c == I2C_4) {
<> 151:5eaa88a5bcc7 530 __I2C4_FORCE_RESET();
<> 151:5eaa88a5bcc7 531 __I2C4_RELEASE_RESET();
<> 151:5eaa88a5bcc7 532 }
<> 151:5eaa88a5bcc7 533 #endif
<> 149:156823d33999 534 #if defined FMPI2C1_BASE
<> 149:156823d33999 535 if (obj_s->i2c == FMPI2C_1) {
<> 149:156823d33999 536 __HAL_RCC_FMPI2C1_FORCE_RESET();
<> 149:156823d33999 537 __HAL_RCC_FMPI2C1_RELEASE_RESET();
<> 149:156823d33999 538 }
<> 149:156823d33999 539 #endif
<> 149:156823d33999 540 }
<> 149:156823d33999 541
<> 149:156823d33999 542 #if DEVICE_I2CSLAVE
<> 149:156823d33999 543
<> 149:156823d33999 544 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
<> 149:156823d33999 545 struct i2c_s *obj_s = I2C_S(obj);
<> 151:5eaa88a5bcc7 546 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 547
<> 151:5eaa88a5bcc7 548 // I2C configuration
<> 151:5eaa88a5bcc7 549 handle->Init.OwnAddress1 = address;
<> 151:5eaa88a5bcc7 550 HAL_I2C_Init(handle);
<> 151:5eaa88a5bcc7 551
<> 151:5eaa88a5bcc7 552 HAL_I2C_EnableListen_IT(handle);
<> 149:156823d33999 553 }
<> 149:156823d33999 554
<> 149:156823d33999 555 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
<> 149:156823d33999 556
<> 149:156823d33999 557 struct i2c_s *obj_s = I2C_S(obj);
<> 151:5eaa88a5bcc7 558 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 559
<> 149:156823d33999 560 if (enable_slave) {
<> 149:156823d33999 561 obj_s->slave = 1;
<> 151:5eaa88a5bcc7 562 HAL_I2C_EnableListen_IT(handle);
<> 151:5eaa88a5bcc7 563 } else {
<> 151:5eaa88a5bcc7 564 obj_s->slave = 0;
<> 151:5eaa88a5bcc7 565 HAL_I2C_DisableListen_IT(handle);
<> 149:156823d33999 566 }
<> 149:156823d33999 567 }
<> 149:156823d33999 568
<> 149:156823d33999 569 // See I2CSlave.h
<> 149:156823d33999 570 #define NoData 0 // the slave has not been addressed
<> 149:156823d33999 571 #define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
<> 149:156823d33999 572 #define WriteGeneral 2 // the master is writing to all slave
<> 149:156823d33999 573 #define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
<> 149:156823d33999 574
<> 151:5eaa88a5bcc7 575
<> 151:5eaa88a5bcc7 576 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) {
<> 151:5eaa88a5bcc7 577 /* Get object ptr based on handler ptr */
<> 151:5eaa88a5bcc7 578 i2c_t *obj = get_i2c_obj(hi2c);
<> 151:5eaa88a5bcc7 579 struct i2c_s *obj_s = I2C_S(obj);
<> 151:5eaa88a5bcc7 580
<> 151:5eaa88a5bcc7 581 /* Transfer direction in HAL is from Master point of view */
<> 151:5eaa88a5bcc7 582 if(TransferDirection == I2C_DIRECTION_RECEIVE) {
<> 151:5eaa88a5bcc7 583 obj_s->pending_slave_tx_master_rx = 1;
<> 151:5eaa88a5bcc7 584 }
<> 151:5eaa88a5bcc7 585
<> 151:5eaa88a5bcc7 586 if(TransferDirection == I2C_DIRECTION_TRANSMIT) {
<> 151:5eaa88a5bcc7 587 obj_s->pending_slave_rx_maxter_tx = 1;
<> 151:5eaa88a5bcc7 588 }
<> 151:5eaa88a5bcc7 589 }
<> 151:5eaa88a5bcc7 590
<> 151:5eaa88a5bcc7 591 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *I2cHandle){
<> 151:5eaa88a5bcc7 592 /* Get object ptr based on handler ptr */
<> 151:5eaa88a5bcc7 593 i2c_t *obj = get_i2c_obj(I2cHandle);
<> 151:5eaa88a5bcc7 594 struct i2c_s *obj_s = I2C_S(obj);
<> 151:5eaa88a5bcc7 595 obj_s->pending_slave_tx_master_rx = 0;
<> 151:5eaa88a5bcc7 596 }
<> 151:5eaa88a5bcc7 597
<> 151:5eaa88a5bcc7 598 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *I2cHandle){
<> 151:5eaa88a5bcc7 599 /* Get object ptr based on handler ptr */
<> 151:5eaa88a5bcc7 600 i2c_t *obj = get_i2c_obj(I2cHandle);
<> 151:5eaa88a5bcc7 601 struct i2c_s *obj_s = I2C_S(obj);
<> 151:5eaa88a5bcc7 602 obj_s->pending_slave_rx_maxter_tx = 0;
<> 151:5eaa88a5bcc7 603 }
<> 151:5eaa88a5bcc7 604
<> 151:5eaa88a5bcc7 605 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
<> 151:5eaa88a5bcc7 606 {
<> 151:5eaa88a5bcc7 607 /* restart listening for master requests */
<> 151:5eaa88a5bcc7 608 HAL_I2C_EnableListen_IT(hi2c);
<> 151:5eaa88a5bcc7 609 }
<> 151:5eaa88a5bcc7 610
<> 149:156823d33999 611 int i2c_slave_receive(i2c_t *obj) {
<> 149:156823d33999 612
<> 149:156823d33999 613 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 614 int retValue = NoData;
<> 149:156823d33999 615
<> 151:5eaa88a5bcc7 616 if(obj_s->pending_slave_rx_maxter_tx) {
<> 151:5eaa88a5bcc7 617 retValue = WriteAddressed;
<> 151:5eaa88a5bcc7 618 }
<> 149:156823d33999 619
<> 151:5eaa88a5bcc7 620 if(obj_s->pending_slave_tx_master_rx) {
<> 151:5eaa88a5bcc7 621 retValue = ReadAddressed;
<> 151:5eaa88a5bcc7 622 }
<> 149:156823d33999 623
<> 149:156823d33999 624 return (retValue);
<> 149:156823d33999 625 }
<> 149:156823d33999 626
<> 149:156823d33999 627 int i2c_slave_read(i2c_t *obj, char *data, int length) {
<> 149:156823d33999 628 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 629 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 151:5eaa88a5bcc7 630 int count = 0;
<> 151:5eaa88a5bcc7 631 int ret = 0;
<> 151:5eaa88a5bcc7 632 uint32_t timeout = 0;
<> 149:156823d33999 633
<> 151:5eaa88a5bcc7 634 /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */
<> 151:5eaa88a5bcc7 635 ret = HAL_I2C_Slave_Sequential_Receive_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME);
<> 151:5eaa88a5bcc7 636
<> 151:5eaa88a5bcc7 637 if(ret == HAL_OK) {
<> 151:5eaa88a5bcc7 638 timeout = BYTE_TIMEOUT_US * length;
<> 151:5eaa88a5bcc7 639 while(obj_s->pending_slave_rx_maxter_tx && (--timeout != 0)) {
<> 151:5eaa88a5bcc7 640 wait_us(1);
<> 149:156823d33999 641 }
<> 149:156823d33999 642
<> 151:5eaa88a5bcc7 643 if(timeout != 0) {
<> 151:5eaa88a5bcc7 644 count = length;
<> 151:5eaa88a5bcc7 645 } else {
<> 151:5eaa88a5bcc7 646 DEBUG_PRINTF("TIMEOUT or error in i2c_slave_read\r\n");
<> 151:5eaa88a5bcc7 647 }
<> 149:156823d33999 648 }
<> 149:156823d33999 649
<> 151:5eaa88a5bcc7 650 return count;
<> 149:156823d33999 651 }
<> 149:156823d33999 652
<> 149:156823d33999 653 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
<> 149:156823d33999 654 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 655 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 151:5eaa88a5bcc7 656 int count = 0;
<> 151:5eaa88a5bcc7 657 int ret = 0;
<> 151:5eaa88a5bcc7 658 uint32_t timeout = 0;
<> 149:156823d33999 659
<> 151:5eaa88a5bcc7 660 /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */
<> 151:5eaa88a5bcc7 661 ret = HAL_I2C_Slave_Sequential_Transmit_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME);
<> 151:5eaa88a5bcc7 662
<> 151:5eaa88a5bcc7 663 if(ret == HAL_OK) {
<> 151:5eaa88a5bcc7 664 timeout = BYTE_TIMEOUT_US * length;
<> 151:5eaa88a5bcc7 665 while(obj_s->pending_slave_tx_master_rx && (--timeout != 0)) {
<> 151:5eaa88a5bcc7 666 wait_us(1);
<> 149:156823d33999 667 }
<> 149:156823d33999 668
<> 151:5eaa88a5bcc7 669 if(timeout != 0) {
<> 151:5eaa88a5bcc7 670 count = length;
<> 151:5eaa88a5bcc7 671 } else {
<> 151:5eaa88a5bcc7 672 DEBUG_PRINTF("TIMEOUT or error in i2c_slave_write\r\n");
<> 151:5eaa88a5bcc7 673 }
<> 149:156823d33999 674 }
<> 149:156823d33999 675
<> 151:5eaa88a5bcc7 676 return count;
<> 149:156823d33999 677 }
<> 149:156823d33999 678
<> 149:156823d33999 679 #endif // DEVICE_I2CSLAVE
<> 149:156823d33999 680
<> 149:156823d33999 681 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c){
<> 149:156823d33999 682 /* Get object ptr based on handler ptr */
<> 149:156823d33999 683 i2c_t *obj = get_i2c_obj(hi2c);
<> 149:156823d33999 684 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 685
<> 151:5eaa88a5bcc7 686 #if DEVICE_I2C_ASYNCH
<> 149:156823d33999 687 /* Handle potential Tx/Rx use case */
<> 149:156823d33999 688 if ((obj->tx_buff.length) && (obj->rx_buff.length)) {
<> 151:5eaa88a5bcc7 689 if (obj_s->stop) {
<> 149:156823d33999 690 obj_s->XferOperation = I2C_LAST_FRAME;
<> 151:5eaa88a5bcc7 691 } else {
<> 149:156823d33999 692 obj_s->XferOperation = I2C_NEXT_FRAME;
<> 149:156823d33999 693 }
<> 149:156823d33999 694
<> 149:156823d33999 695 HAL_I2C_Master_Sequential_Receive_IT(hi2c, obj_s->address, (uint8_t*)obj->rx_buff.buffer , obj->rx_buff.length, obj_s->XferOperation);
<> 149:156823d33999 696 }
<> 151:5eaa88a5bcc7 697 else
<> 151:5eaa88a5bcc7 698 #endif
<> 151:5eaa88a5bcc7 699 {
<> 149:156823d33999 700 /* Set event flag */
<> 149:156823d33999 701 obj_s->event = I2C_EVENT_TRANSFER_COMPLETE;
<> 149:156823d33999 702 }
<> 149:156823d33999 703
<> 149:156823d33999 704 }
<> 149:156823d33999 705
<> 149:156823d33999 706 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c){
<> 149:156823d33999 707 /* Get object ptr based on handler ptr */
<> 149:156823d33999 708 i2c_t *obj = get_i2c_obj(hi2c);
<> 149:156823d33999 709 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 710
<> 149:156823d33999 711 /* Set event flag */
<> 149:156823d33999 712 obj_s->event = I2C_EVENT_TRANSFER_COMPLETE;
<> 149:156823d33999 713 }
<> 149:156823d33999 714
<> 149:156823d33999 715 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c){
<> 149:156823d33999 716 /* Get object ptr based on handler ptr */
<> 149:156823d33999 717 i2c_t *obj = get_i2c_obj(hi2c);
<> 149:156823d33999 718 struct i2c_s *obj_s = I2C_S(obj);
<> 151:5eaa88a5bcc7 719
<> 151:5eaa88a5bcc7 720 DEBUG_PRINTF("HAL_I2C_ErrorCallback:%d, index=%d\r\n", (int) hi2c->ErrorCode, obj_s->index);
<> 149:156823d33999 721
<> 151:5eaa88a5bcc7 722 /* re-init IP to try and get back in a working state */
<> 151:5eaa88a5bcc7 723 i2c_init(obj, obj_s->sda, obj_s->scl);
<> 149:156823d33999 724
<> 151:5eaa88a5bcc7 725 /* Keep Set event flag */
<> 149:156823d33999 726 obj_s->event = I2C_EVENT_ERROR;
<> 149:156823d33999 727 }
<> 149:156823d33999 728
<> 151:5eaa88a5bcc7 729 #if DEVICE_I2C_ASYNCH
<> 149:156823d33999 730 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c){
<> 149:156823d33999 731 /* Get object ptr based on handler ptr */
<> 149:156823d33999 732 i2c_t *obj = get_i2c_obj(hi2c);
<> 149:156823d33999 733 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 734 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 735
<> 149:156823d33999 736 /* Disable IT. Not always done before calling macro */
<> 149:156823d33999 737 __HAL_I2C_DISABLE_IT(handle, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 738
<> 149:156823d33999 739 /* Set event flag */
<> 149:156823d33999 740 obj_s->event = I2C_EVENT_ERROR;
<> 149:156823d33999 741 }
<> 149:156823d33999 742
<> 149:156823d33999 743
<> 149:156823d33999 744
<> 149:156823d33999 745 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint) {
<> 149:156823d33999 746
<> 149:156823d33999 747 // TODO: DMA usage is currently ignored by this way
<> 149:156823d33999 748 (void) hint;
<> 149:156823d33999 749
<> 149:156823d33999 750 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 751 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 752
<> 149:156823d33999 753 /* Update object */
<> 149:156823d33999 754 obj->tx_buff.buffer = (void *)tx;
<> 149:156823d33999 755 obj->tx_buff.length = tx_length;
<> 149:156823d33999 756 obj->tx_buff.pos = 0;
<> 149:156823d33999 757 obj->tx_buff.width = 8;
<> 149:156823d33999 758
<> 149:156823d33999 759 obj->rx_buff.buffer = (void *)rx;
<> 149:156823d33999 760 obj->rx_buff.length = rx_length;
<> 149:156823d33999 761 obj->rx_buff.pos = SIZE_MAX;
<> 149:156823d33999 762 obj->rx_buff.width = 8;
<> 149:156823d33999 763
<> 149:156823d33999 764 obj_s->available_events = event;
<> 149:156823d33999 765 obj_s->event = 0;
<> 149:156823d33999 766 obj_s->address = address;
<> 149:156823d33999 767 obj_s->stop = stop;
<> 149:156823d33999 768
<> 151:5eaa88a5bcc7 769 i2c_ev_err_enable(obj, handler);
<> 149:156823d33999 770
<> 149:156823d33999 771 /* Set operation step depending if stop sending required or not */
<> 149:156823d33999 772 if ((tx_length && !rx_length) || (!tx_length && rx_length)) {
<> 149:156823d33999 773 if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) ||
<> 149:156823d33999 774 (obj_s->XferOperation == I2C_LAST_FRAME)) {
<> 149:156823d33999 775 if (stop)
<> 149:156823d33999 776 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
<> 149:156823d33999 777 else
<> 149:156823d33999 778 obj_s->XferOperation = I2C_FIRST_FRAME;
<> 149:156823d33999 779 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
<> 149:156823d33999 780 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
<> 149:156823d33999 781 if (stop)
<> 149:156823d33999 782 obj_s->XferOperation = I2C_LAST_FRAME;
<> 149:156823d33999 783 else
<> 149:156823d33999 784 obj_s->XferOperation = I2C_NEXT_FRAME;
<> 149:156823d33999 785 }
<> 149:156823d33999 786
<> 149:156823d33999 787 if (tx_length > 0) {
<> 149:156823d33999 788 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, obj_s->XferOperation);
<> 149:156823d33999 789 }
<> 149:156823d33999 790 if (rx_length > 0) {
<> 149:156823d33999 791 HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t*)rx, rx_length, obj_s->XferOperation);
<> 149:156823d33999 792 }
<> 149:156823d33999 793 }
<> 149:156823d33999 794 else if (tx_length && rx_length) {
<> 149:156823d33999 795 /* Two steps operation, don't modify XferOperation, keep it for next step */
<> 149:156823d33999 796 if ((obj_s->XferOperation == I2C_FIRST_AND_LAST_FRAME) ||
<> 149:156823d33999 797 (obj_s->XferOperation == I2C_LAST_FRAME)) {
<> 149:156823d33999 798 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_FIRST_FRAME);
<> 149:156823d33999 799 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
<> 149:156823d33999 800 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
<> 149:156823d33999 801 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_NEXT_FRAME);
<> 149:156823d33999 802 }
<> 149:156823d33999 803 }
<> 149:156823d33999 804 }
<> 149:156823d33999 805
<> 149:156823d33999 806
<> 149:156823d33999 807 uint32_t i2c_irq_handler_asynch(i2c_t *obj) {
<> 149:156823d33999 808
<> 149:156823d33999 809 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 810 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 811
<> 149:156823d33999 812 HAL_I2C_EV_IRQHandler(handle);
<> 149:156823d33999 813 HAL_I2C_ER_IRQHandler(handle);
<> 149:156823d33999 814
<> 149:156823d33999 815 /* Return I2C event status */
<> 149:156823d33999 816 return (obj_s->event & obj_s->available_events);
<> 149:156823d33999 817 }
<> 149:156823d33999 818
<> 149:156823d33999 819 uint8_t i2c_active(i2c_t *obj) {
<> 149:156823d33999 820
<> 149:156823d33999 821 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 822 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 823
<> 149:156823d33999 824 if (handle->State == HAL_I2C_STATE_READY) {
<> 149:156823d33999 825 return 0;
<> 149:156823d33999 826 }
<> 149:156823d33999 827 else {
<> 149:156823d33999 828 return 1;
<> 149:156823d33999 829 }
<> 149:156823d33999 830 }
<> 149:156823d33999 831
<> 149:156823d33999 832 void i2c_abort_asynch(i2c_t *obj) {
<> 149:156823d33999 833
<> 149:156823d33999 834 struct i2c_s *obj_s = I2C_S(obj);
<> 149:156823d33999 835 I2C_HandleTypeDef *handle = &(obj_s->handle);
<> 149:156823d33999 836
<> 149:156823d33999 837 /* Abort HAL requires DevAddress, but is not used. Use Dummy */
<> 149:156823d33999 838 uint16_t Dummy_DevAddress = 0x00;
<> 149:156823d33999 839
<> 149:156823d33999 840 HAL_I2C_Master_Abort_IT(handle, Dummy_DevAddress);
<> 149:156823d33999 841 }
<> 149:156823d33999 842
<> 149:156823d33999 843
<> 149:156823d33999 844 #endif // DEVICE_I2C_ASYNCH
<> 149:156823d33999 845
<> 149:156823d33999 846 #endif // DEVICE_I2C