mbed library sources. Supersedes mbed-src.
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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_iwdg.h@153:9398a535854b, 2016-12-22 (annotated)
- Committer:
- fwndz
- Date:
- Thu Dec 22 05:12:40 2016 +0000
- Revision:
- 153:9398a535854b
- Parent:
- 149:156823d33999
device target maximize
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f0xx_hal_iwdg.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @version V1.4.0 |
<> | 144:ef7eb2e8f9f7 | 6 | * @date 27-May-2016 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief Header file of IWDG HAL module. |
<> | 144:ef7eb2e8f9f7 | 8 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 9 | * @attention |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 12 | * |
<> | 144:ef7eb2e8f9f7 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 14 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 16 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 18 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 19 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 21 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 22 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 23 | * |
<> | 144:ef7eb2e8f9f7 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 34 | * |
<> | 144:ef7eb2e8f9f7 | 35 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 36 | */ |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 39 | #ifndef __STM32F0xx_HAL_IWDG_H |
<> | 144:ef7eb2e8f9f7 | 40 | #define __STM32F0xx_HAL_IWDG_H |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 43 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 44 | #endif |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 47 | #include "stm32f0xx_hal_def.h" |
<> | 144:ef7eb2e8f9f7 | 48 | |
<> | 144:ef7eb2e8f9f7 | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 50 | * @{ |
<> | 144:ef7eb2e8f9f7 | 51 | */ |
<> | 144:ef7eb2e8f9f7 | 52 | |
<> | 144:ef7eb2e8f9f7 | 53 | /** @addtogroup IWDG |
<> | 144:ef7eb2e8f9f7 | 54 | * @{ |
<> | 144:ef7eb2e8f9f7 | 55 | */ |
<> | 144:ef7eb2e8f9f7 | 56 | |
<> | 144:ef7eb2e8f9f7 | 57 | /* Exported types ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 58 | /** @defgroup IWDG_Exported_Types IWDG Exported Types |
<> | 144:ef7eb2e8f9f7 | 59 | * @{ |
<> | 144:ef7eb2e8f9f7 | 60 | */ |
<> | 144:ef7eb2e8f9f7 | 61 | |
<> | 144:ef7eb2e8f9f7 | 62 | /** |
<> | 144:ef7eb2e8f9f7 | 63 | * @brief IWDG HAL State Structure definition |
<> | 144:ef7eb2e8f9f7 | 64 | */ |
<> | 144:ef7eb2e8f9f7 | 65 | typedef enum |
<> | 144:ef7eb2e8f9f7 | 66 | { |
<> | 144:ef7eb2e8f9f7 | 67 | HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */ |
<> | 144:ef7eb2e8f9f7 | 68 | HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */ |
<> | 144:ef7eb2e8f9f7 | 69 | HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */ |
<> | 144:ef7eb2e8f9f7 | 70 | HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */ |
<> | 144:ef7eb2e8f9f7 | 71 | HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */ |
<> | 144:ef7eb2e8f9f7 | 72 | |
<> | 144:ef7eb2e8f9f7 | 73 | }HAL_IWDG_StateTypeDef; |
<> | 144:ef7eb2e8f9f7 | 74 | |
<> | 144:ef7eb2e8f9f7 | 75 | /** |
<> | 144:ef7eb2e8f9f7 | 76 | * @brief IWDG Init structure definition |
<> | 144:ef7eb2e8f9f7 | 77 | */ |
<> | 144:ef7eb2e8f9f7 | 78 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 79 | { |
<> | 144:ef7eb2e8f9f7 | 80 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. |
<> | 144:ef7eb2e8f9f7 | 81 | This parameter can be a value of @ref IWDG_Prescaler */ |
<> | 144:ef7eb2e8f9f7 | 82 | |
<> | 144:ef7eb2e8f9f7 | 83 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. |
<> | 144:ef7eb2e8f9f7 | 84 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
<> | 144:ef7eb2e8f9f7 | 85 | |
<> | 144:ef7eb2e8f9f7 | 86 | uint32_t Window; /*!< Specifies the window value to be compared to the down-counter. |
<> | 144:ef7eb2e8f9f7 | 87 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
<> | 144:ef7eb2e8f9f7 | 88 | |
<> | 144:ef7eb2e8f9f7 | 89 | } IWDG_InitTypeDef; |
<> | 144:ef7eb2e8f9f7 | 90 | |
<> | 144:ef7eb2e8f9f7 | 91 | /** |
<> | 144:ef7eb2e8f9f7 | 92 | * @brief IWDG Handle Structure definition |
<> | 144:ef7eb2e8f9f7 | 93 | */ |
<> | 144:ef7eb2e8f9f7 | 94 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 95 | { |
<> | 144:ef7eb2e8f9f7 | 96 | IWDG_TypeDef *Instance; /*!< Register base address */ |
<> | 144:ef7eb2e8f9f7 | 97 | |
<> | 144:ef7eb2e8f9f7 | 98 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ |
<> | 144:ef7eb2e8f9f7 | 99 | |
<> | 144:ef7eb2e8f9f7 | 100 | HAL_LockTypeDef Lock; /*!< IWDG Locking object */ |
<> | 144:ef7eb2e8f9f7 | 101 | |
<> | 144:ef7eb2e8f9f7 | 102 | __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */ |
<> | 144:ef7eb2e8f9f7 | 103 | |
<> | 144:ef7eb2e8f9f7 | 104 | }IWDG_HandleTypeDef; |
<> | 144:ef7eb2e8f9f7 | 105 | |
<> | 144:ef7eb2e8f9f7 | 106 | /** |
<> | 144:ef7eb2e8f9f7 | 107 | * @} |
<> | 144:ef7eb2e8f9f7 | 108 | */ |
<> | 144:ef7eb2e8f9f7 | 109 | |
<> | 144:ef7eb2e8f9f7 | 110 | /* Exported constants --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 111 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants |
<> | 144:ef7eb2e8f9f7 | 112 | * @{ |
<> | 144:ef7eb2e8f9f7 | 113 | */ |
<> | 144:ef7eb2e8f9f7 | 114 | |
<> | 144:ef7eb2e8f9f7 | 115 | /** @defgroup IWDG_Prescaler IWDG Prescaler |
<> | 144:ef7eb2e8f9f7 | 116 | * @{ |
<> | 144:ef7eb2e8f9f7 | 117 | */ |
<> | 144:ef7eb2e8f9f7 | 118 | #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */ |
<> | 144:ef7eb2e8f9f7 | 119 | #define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */ |
<> | 144:ef7eb2e8f9f7 | 120 | #define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */ |
<> | 144:ef7eb2e8f9f7 | 121 | #define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */ |
<> | 144:ef7eb2e8f9f7 | 122 | #define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */ |
<> | 144:ef7eb2e8f9f7 | 123 | #define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */ |
<> | 144:ef7eb2e8f9f7 | 124 | #define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */ |
<> | 144:ef7eb2e8f9f7 | 125 | /** |
<> | 144:ef7eb2e8f9f7 | 126 | * @} |
<> | 144:ef7eb2e8f9f7 | 127 | */ |
<> | 144:ef7eb2e8f9f7 | 128 | |
<> | 144:ef7eb2e8f9f7 | 129 | /** @defgroup IWDG_Window IWDG Window |
<> | 144:ef7eb2e8f9f7 | 130 | * @{ |
<> | 144:ef7eb2e8f9f7 | 131 | */ |
<> | 144:ef7eb2e8f9f7 | 132 | #define IWDG_WINDOW_DISABLE ((uint32_t)0x00000FFF) |
<> | 144:ef7eb2e8f9f7 | 133 | /** |
<> | 144:ef7eb2e8f9f7 | 134 | * @} |
<> | 144:ef7eb2e8f9f7 | 135 | */ |
<> | 144:ef7eb2e8f9f7 | 136 | |
<> | 144:ef7eb2e8f9f7 | 137 | /** |
<> | 144:ef7eb2e8f9f7 | 138 | * @} |
<> | 144:ef7eb2e8f9f7 | 139 | */ |
<> | 144:ef7eb2e8f9f7 | 140 | |
<> | 144:ef7eb2e8f9f7 | 141 | /* Exported macros -----------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 142 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros |
<> | 144:ef7eb2e8f9f7 | 143 | * @{ |
<> | 144:ef7eb2e8f9f7 | 144 | */ |
<> | 144:ef7eb2e8f9f7 | 145 | |
<> | 144:ef7eb2e8f9f7 | 146 | /** @brief Reset IWDG handle state. |
<> | 144:ef7eb2e8f9f7 | 147 | * @param __HANDLE__: IWDG handle. |
<> | 144:ef7eb2e8f9f7 | 148 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 149 | */ |
<> | 144:ef7eb2e8f9f7 | 150 | #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET) |
<> | 144:ef7eb2e8f9f7 | 151 | |
<> | 144:ef7eb2e8f9f7 | 152 | /** |
<> | 144:ef7eb2e8f9f7 | 153 | * @brief Enable the IWDG peripheral. |
<> | 144:ef7eb2e8f9f7 | 154 | * @param __HANDLE__: IWDG handle |
<> | 144:ef7eb2e8f9f7 | 155 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 156 | */ |
<> | 144:ef7eb2e8f9f7 | 157 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) |
<> | 144:ef7eb2e8f9f7 | 158 | |
<> | 144:ef7eb2e8f9f7 | 159 | /** |
<> | 144:ef7eb2e8f9f7 | 160 | * @brief Reload IWDG counter with value defined in the reload register. |
<> | 144:ef7eb2e8f9f7 | 161 | * @param __HANDLE__: IWDG handle |
<> | 144:ef7eb2e8f9f7 | 162 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 163 | */ |
<> | 144:ef7eb2e8f9f7 | 164 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) |
<> | 144:ef7eb2e8f9f7 | 165 | |
<> | 144:ef7eb2e8f9f7 | 166 | /** |
<> | 144:ef7eb2e8f9f7 | 167 | * @brief Get the selected IWDG flag status. |
<> | 144:ef7eb2e8f9f7 | 168 | * @param __HANDLE__: IWDG handle |
<> | 144:ef7eb2e8f9f7 | 169 | * @param __FLAG__: specifies the flag to check. |
<> | 144:ef7eb2e8f9f7 | 170 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 171 | * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag |
<> | 144:ef7eb2e8f9f7 | 172 | * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag |
<> | 144:ef7eb2e8f9f7 | 173 | * @arg IWDG_FLAG_WVU: Watchdog counter window value flag |
<> | 144:ef7eb2e8f9f7 | 174 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
<> | 144:ef7eb2e8f9f7 | 175 | */ |
<> | 144:ef7eb2e8f9f7 | 176 | #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
<> | 144:ef7eb2e8f9f7 | 177 | |
<> | 144:ef7eb2e8f9f7 | 178 | /** |
<> | 144:ef7eb2e8f9f7 | 179 | * @} |
<> | 144:ef7eb2e8f9f7 | 180 | */ |
<> | 144:ef7eb2e8f9f7 | 181 | |
<> | 144:ef7eb2e8f9f7 | 182 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 183 | /** @addtogroup IWDG_Exported_Functions |
<> | 144:ef7eb2e8f9f7 | 184 | * @{ |
<> | 144:ef7eb2e8f9f7 | 185 | */ |
<> | 144:ef7eb2e8f9f7 | 186 | |
<> | 144:ef7eb2e8f9f7 | 187 | /** @addtogroup IWDG_Exported_Functions_Group1 |
<> | 144:ef7eb2e8f9f7 | 188 | * @{ |
<> | 144:ef7eb2e8f9f7 | 189 | */ |
<> | 144:ef7eb2e8f9f7 | 190 | /* Initialization/de-initialization functions ********************************/ |
<> | 144:ef7eb2e8f9f7 | 191 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); |
<> | 144:ef7eb2e8f9f7 | 192 | void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg); |
<> | 144:ef7eb2e8f9f7 | 193 | /** |
<> | 144:ef7eb2e8f9f7 | 194 | * @} |
<> | 144:ef7eb2e8f9f7 | 195 | */ |
<> | 144:ef7eb2e8f9f7 | 196 | |
<> | 144:ef7eb2e8f9f7 | 197 | /** @addtogroup IWDG_Exported_Functions_Group2 |
<> | 144:ef7eb2e8f9f7 | 198 | * @{ |
<> | 144:ef7eb2e8f9f7 | 199 | */ |
<> | 144:ef7eb2e8f9f7 | 200 | /* I/O operation functions ****************************************************/ |
<> | 144:ef7eb2e8f9f7 | 201 | HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg); |
<> | 144:ef7eb2e8f9f7 | 202 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); |
<> | 144:ef7eb2e8f9f7 | 203 | /** |
<> | 144:ef7eb2e8f9f7 | 204 | * @} |
<> | 144:ef7eb2e8f9f7 | 205 | */ |
<> | 144:ef7eb2e8f9f7 | 206 | |
<> | 144:ef7eb2e8f9f7 | 207 | /** @addtogroup IWDG_Exported_Functions_Group3 |
<> | 144:ef7eb2e8f9f7 | 208 | * @{ |
<> | 144:ef7eb2e8f9f7 | 209 | */ |
<> | 144:ef7eb2e8f9f7 | 210 | /* Peripheral State functions ************************************************/ |
<> | 144:ef7eb2e8f9f7 | 211 | HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg); |
<> | 144:ef7eb2e8f9f7 | 212 | /** |
<> | 144:ef7eb2e8f9f7 | 213 | * @} |
<> | 144:ef7eb2e8f9f7 | 214 | */ |
<> | 144:ef7eb2e8f9f7 | 215 | |
<> | 144:ef7eb2e8f9f7 | 216 | /** |
<> | 144:ef7eb2e8f9f7 | 217 | * @} |
<> | 144:ef7eb2e8f9f7 | 218 | */ |
<> | 144:ef7eb2e8f9f7 | 219 | |
<> | 144:ef7eb2e8f9f7 | 220 | /* Private constants ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 221 | /** @addtogroup IWDG_Private_Defines |
<> | 144:ef7eb2e8f9f7 | 222 | * @{ |
<> | 144:ef7eb2e8f9f7 | 223 | */ |
<> | 144:ef7eb2e8f9f7 | 224 | /** |
<> | 144:ef7eb2e8f9f7 | 225 | * @brief IWDG Key Register BitMask |
<> | 144:ef7eb2e8f9f7 | 226 | */ |
<> | 144:ef7eb2e8f9f7 | 227 | #define IWDG_KEY_RELOAD ((uint32_t)0x0000AAAA) /*!< IWDG Reload Counter Enable */ |
<> | 144:ef7eb2e8f9f7 | 228 | #define IWDG_KEY_ENABLE ((uint32_t)0x0000CCCC) /*!< IWDG Peripheral Enable */ |
<> | 144:ef7eb2e8f9f7 | 229 | #define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x00005555) /*!< IWDG KR Write Access Enable */ |
<> | 144:ef7eb2e8f9f7 | 230 | #define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x00000000) /*!< IWDG KR Write Access Disable */ |
<> | 144:ef7eb2e8f9f7 | 231 | |
<> | 144:ef7eb2e8f9f7 | 232 | /** |
<> | 144:ef7eb2e8f9f7 | 233 | * @brief IWDG Flag definition |
<> | 144:ef7eb2e8f9f7 | 234 | */ |
<> | 144:ef7eb2e8f9f7 | 235 | #define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update flag */ |
<> | 144:ef7eb2e8f9f7 | 236 | #define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update flag */ |
<> | 144:ef7eb2e8f9f7 | 237 | #define IWDG_FLAG_WVU ((uint32_t)IWDG_SR_WVU) /*!< Watchdog counter window value update flag */ |
<> | 144:ef7eb2e8f9f7 | 238 | |
<> | 144:ef7eb2e8f9f7 | 239 | /** |
<> | 144:ef7eb2e8f9f7 | 240 | * @} |
<> | 144:ef7eb2e8f9f7 | 241 | */ |
<> | 144:ef7eb2e8f9f7 | 242 | |
<> | 144:ef7eb2e8f9f7 | 243 | /* Private macros ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 244 | /** @defgroup IWDG_Private_Macro IWDG Private Macros |
<> | 144:ef7eb2e8f9f7 | 245 | * @{ |
<> | 144:ef7eb2e8f9f7 | 246 | */ |
<> | 144:ef7eb2e8f9f7 | 247 | /** |
<> | 144:ef7eb2e8f9f7 | 248 | * @brief Enables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. |
<> | 144:ef7eb2e8f9f7 | 249 | * @param __HANDLE__: IWDG handle |
<> | 144:ef7eb2e8f9f7 | 250 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 251 | */ |
<> | 144:ef7eb2e8f9f7 | 252 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) |
<> | 144:ef7eb2e8f9f7 | 253 | |
<> | 144:ef7eb2e8f9f7 | 254 | /** |
<> | 144:ef7eb2e8f9f7 | 255 | * @brief Disables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. |
<> | 144:ef7eb2e8f9f7 | 256 | * @param __HANDLE__: IWDG handle |
<> | 144:ef7eb2e8f9f7 | 257 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 258 | */ |
<> | 144:ef7eb2e8f9f7 | 259 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) |
<> | 144:ef7eb2e8f9f7 | 260 | |
<> | 144:ef7eb2e8f9f7 | 261 | /** |
<> | 144:ef7eb2e8f9f7 | 262 | * @brief Check IWDG prescaler value. |
<> | 144:ef7eb2e8f9f7 | 263 | * @param __PRESCALER__: IWDG prescaler value |
<> | 144:ef7eb2e8f9f7 | 264 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 265 | */ |
<> | 144:ef7eb2e8f9f7 | 266 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ |
<> | 144:ef7eb2e8f9f7 | 267 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ |
<> | 144:ef7eb2e8f9f7 | 268 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ |
<> | 144:ef7eb2e8f9f7 | 269 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ |
<> | 144:ef7eb2e8f9f7 | 270 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ |
<> | 144:ef7eb2e8f9f7 | 271 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ |
<> | 144:ef7eb2e8f9f7 | 272 | ((__PRESCALER__) == IWDG_PRESCALER_256)) |
<> | 144:ef7eb2e8f9f7 | 273 | |
<> | 144:ef7eb2e8f9f7 | 274 | /** |
<> | 144:ef7eb2e8f9f7 | 275 | * @brief Check IWDG reload value. |
<> | 144:ef7eb2e8f9f7 | 276 | * @param __RELOAD__: IWDG reload value |
<> | 144:ef7eb2e8f9f7 | 277 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 278 | */ |
<> | 144:ef7eb2e8f9f7 | 279 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF) |
<> | 144:ef7eb2e8f9f7 | 280 | |
<> | 144:ef7eb2e8f9f7 | 281 | /** |
<> | 144:ef7eb2e8f9f7 | 282 | * @brief Check IWDG window value. |
<> | 144:ef7eb2e8f9f7 | 283 | * @param __WINDOW__: IWDG window value |
<> | 144:ef7eb2e8f9f7 | 284 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 285 | */ |
<> | 144:ef7eb2e8f9f7 | 286 | #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= 0xFFF) |
<> | 144:ef7eb2e8f9f7 | 287 | |
<> | 144:ef7eb2e8f9f7 | 288 | /** |
<> | 144:ef7eb2e8f9f7 | 289 | * @} |
<> | 144:ef7eb2e8f9f7 | 290 | */ |
<> | 144:ef7eb2e8f9f7 | 291 | |
<> | 144:ef7eb2e8f9f7 | 292 | /** |
<> | 144:ef7eb2e8f9f7 | 293 | * @} |
<> | 144:ef7eb2e8f9f7 | 294 | */ |
<> | 144:ef7eb2e8f9f7 | 295 | |
<> | 144:ef7eb2e8f9f7 | 296 | /** |
<> | 144:ef7eb2e8f9f7 | 297 | * @} |
<> | 144:ef7eb2e8f9f7 | 298 | */ |
<> | 144:ef7eb2e8f9f7 | 299 | |
<> | 144:ef7eb2e8f9f7 | 300 | |
<> | 144:ef7eb2e8f9f7 | 301 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 302 | } |
<> | 144:ef7eb2e8f9f7 | 303 | #endif |
<> | 144:ef7eb2e8f9f7 | 304 | |
<> | 144:ef7eb2e8f9f7 | 305 | #endif /* __STM32F0xx_HAL_IWDG_H */ |
<> | 144:ef7eb2e8f9f7 | 306 | |
<> | 144:ef7eb2e8f9f7 | 307 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
<> | 144:ef7eb2e8f9f7 | 308 |