Fawwaz Nadzmy / mbed-STM

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_sc.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_NUVOTON/TARGET_NUC472/StdDriver/nuc472_sc.h@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file sc.h
<> 144:ef7eb2e8f9f7 3 * @version V1.00
<> 144:ef7eb2e8f9f7 4 * $Revision: 10 $
<> 144:ef7eb2e8f9f7 5 * $Date: 14/09/29 2:01p $
<> 144:ef7eb2e8f9f7 6 * @brief NUC472/NUC442 Smartcard (SC) driver header file
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * @note
<> 144:ef7eb2e8f9f7 9 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
<> 144:ef7eb2e8f9f7 10 *****************************************************************************/
<> 144:ef7eb2e8f9f7 11 #ifndef __SC_H__
<> 144:ef7eb2e8f9f7 12 #define __SC_H__
<> 144:ef7eb2e8f9f7 13
<> 144:ef7eb2e8f9f7 14 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 15 extern "C"
<> 144:ef7eb2e8f9f7 16 {
<> 144:ef7eb2e8f9f7 17 #endif
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
<> 144:ef7eb2e8f9f7 21 @{
<> 144:ef7eb2e8f9f7 22 */
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 /** @addtogroup NUC472_442_SC_Driver SC Driver
<> 144:ef7eb2e8f9f7 25 @{
<> 144:ef7eb2e8f9f7 26 */
<> 144:ef7eb2e8f9f7 27
<> 144:ef7eb2e8f9f7 28 /** @addtogroup NUC472_442_SC_EXPORTED_CONSTANTS SC Exported Constants
<> 144:ef7eb2e8f9f7 29 @{
<> 144:ef7eb2e8f9f7 30 */
<> 144:ef7eb2e8f9f7 31 #define SC_INTERFACE_NUM 6 /*!< Smartcard interface numbers \hideinitializer */
<> 144:ef7eb2e8f9f7 32 #define SC_PIN_STATE_HIGH 1 /*!< Smartcard pin status high \hideinitializer */
<> 144:ef7eb2e8f9f7 33 #define SC_PIN_STATE_LOW 0 /*!< Smartcard pin status low \hideinitializer */
<> 144:ef7eb2e8f9f7 34 #define SC_PIN_STATE_IGNORE 0xFFFFFFFF /*!< Ignore pin status \hideinitializer */
<> 144:ef7eb2e8f9f7 35 #define SC_CLK_ON 1 /*!< Smartcard clock on \hideinitializer */
<> 144:ef7eb2e8f9f7 36 #define SC_CLK_OFF 0 /*!< Smartcard clock off \hideinitializer */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 #define SC_TMR_MODE_0 (0ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 0, down count \hideinitializer */
<> 144:ef7eb2e8f9f7 39 #define SC_TMR_MODE_1 (1ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 1, down count, start after detect start bit \hideinitializer */
<> 144:ef7eb2e8f9f7 40 #define SC_TMR_MODE_2 (2ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 2, down count, start after receive start bit \hideinitializer */
<> 144:ef7eb2e8f9f7 41 #define SC_TMR_MODE_3 (3ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 3, down count, use for activation, only timer 0 support this mode \hideinitializer */
<> 144:ef7eb2e8f9f7 42 #define SC_TMR_MODE_4 (4ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 4, down count with reload after timeout \hideinitializer */
<> 144:ef7eb2e8f9f7 43 #define SC_TMR_MODE_5 (5ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 5, down count, start after detect start bit, reload after timeout \hideinitializer */
<> 144:ef7eb2e8f9f7 44 #define SC_TMR_MODE_6 (6ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 6, down count, start after receive start bit, reload after timeout \hideinitializer */
<> 144:ef7eb2e8f9f7 45 #define SC_TMR_MODE_7 (7ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 7, down count, start and reload after detect start bit \hideinitializer */
<> 144:ef7eb2e8f9f7 46 #define SC_TMR_MODE_8 (8ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 8, up count \hideinitializer */
<> 144:ef7eb2e8f9f7 47 #define SC_TMR_MODE_F (0xF << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 15, down count, reload after detect start bit \hideinitializer */
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /*@}*/ /* end of group NUC472_442_SC_EXPORTED_CONSTANTS */
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup NUC472_442_SC_EXPORTED_FUNCTIONS SC Exported Functions
<> 144:ef7eb2e8f9f7 54 @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /**
<> 144:ef7eb2e8f9f7 58 * @brief This macro enable smartcard interrupt
<> 144:ef7eb2e8f9f7 59 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 60 * @param[in] u32Mask Interrupt mask to be enabled. A combination of
<> 144:ef7eb2e8f9f7 61 * - \ref SC_INTEN_ACERRIEN_Msk
<> 144:ef7eb2e8f9f7 62 * - \ref SC_INTEN_RXTOIF_Msk
<> 144:ef7eb2e8f9f7 63 * - \ref SC_INTEN_INITIEN_Msk
<> 144:ef7eb2e8f9f7 64 * - \ref SC_INTEN_CDIEN_Msk
<> 144:ef7eb2e8f9f7 65 * - \ref SC_INTEN_BGTIEN_Msk
<> 144:ef7eb2e8f9f7 66 * - \ref SC_INTEN_TMR2IEN_Msk
<> 144:ef7eb2e8f9f7 67 * - \ref SC_INTEN_TMR1IEN_Msk
<> 144:ef7eb2e8f9f7 68 * - \ref SC_INTEN_TMR0IEN_Msk
<> 144:ef7eb2e8f9f7 69 * - \ref SC_INTEN_TERRIEN_Msk
<> 144:ef7eb2e8f9f7 70 * - \ref SC_INTEN_TBEIEN_Msk
<> 144:ef7eb2e8f9f7 71 * - \ref SC_INTEN_RDAIEN_Msk
<> 144:ef7eb2e8f9f7 72 * @return None
<> 144:ef7eb2e8f9f7 73 * \hideinitializer
<> 144:ef7eb2e8f9f7 74 */
<> 144:ef7eb2e8f9f7 75 #define SC_ENABLE_INT(sc, u32Mask) ((sc)->INTEN |= (u32Mask))
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /**
<> 144:ef7eb2e8f9f7 78 * @brief This macro disable smartcard interrupt
<> 144:ef7eb2e8f9f7 79 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 80 * @param[in] u32Mask Interrupt mask to be disabled. A combination of
<> 144:ef7eb2e8f9f7 81 * - \ref SC_INTEN_ACERRIEN_Msk
<> 144:ef7eb2e8f9f7 82 * - \ref SC_INTEN_RXTOIF_Msk
<> 144:ef7eb2e8f9f7 83 * - \ref SC_INTEN_INITIEN_Msk
<> 144:ef7eb2e8f9f7 84 * - \ref SC_INTEN_CDIEN_Msk
<> 144:ef7eb2e8f9f7 85 * - \ref SC_INTEN_BGTIEN_Msk
<> 144:ef7eb2e8f9f7 86 * - \ref SC_INTEN_TMR2IEN_Msk
<> 144:ef7eb2e8f9f7 87 * - \ref SC_INTEN_TMR1IEN_Msk
<> 144:ef7eb2e8f9f7 88 * - \ref SC_INTEN_TMR0IEN_Msk
<> 144:ef7eb2e8f9f7 89 * - \ref SC_INTEN_TERRIEN_Msk
<> 144:ef7eb2e8f9f7 90 * - \ref SC_INTEN_TBEIEN_Msk
<> 144:ef7eb2e8f9f7 91 * - \ref SC_INTEN_RDAIEN_Msk
<> 144:ef7eb2e8f9f7 92 * @return None
<> 144:ef7eb2e8f9f7 93 * \hideinitializer
<> 144:ef7eb2e8f9f7 94 */
<> 144:ef7eb2e8f9f7 95 #define SC_DISABLE_INT(sc, u32Mask) ((sc)->INTEN &= ~(u32Mask))
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 /**
<> 144:ef7eb2e8f9f7 98 * @brief This macro set VCC pin state of smartcard interface
<> 144:ef7eb2e8f9f7 99 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 100 * @param[in] u32State Pin state of VCC pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
<> 144:ef7eb2e8f9f7 101 * @return None
<> 144:ef7eb2e8f9f7 102 * \hideinitializer
<> 144:ef7eb2e8f9f7 103 */
<> 144:ef7eb2e8f9f7 104 #define SC_SET_VCC_PIN(sc, u32State) \
<> 144:ef7eb2e8f9f7 105 do {\
<> 144:ef7eb2e8f9f7 106 while(sc->PINCTL & SC_PINCTL_SYNC_Msk);\
<> 144:ef7eb2e8f9f7 107 if(u32State)\
<> 144:ef7eb2e8f9f7 108 (sc)->PINCTL |= SC_PINCTL_PWREN_Msk;\
<> 144:ef7eb2e8f9f7 109 else\
<> 144:ef7eb2e8f9f7 110 (sc)->PINCTL &= ~SC_PINCTL_PWREN_Msk;\
<> 144:ef7eb2e8f9f7 111 }while(0)
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 /**
<> 144:ef7eb2e8f9f7 115 * @brief This macro turns CLK output on or off
<> 144:ef7eb2e8f9f7 116 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 117 * @param[in] u32OnOff Clock on or off for selected smartcard module, valid values are \ref SC_CLK_ON and \ref SC_CLK_OFF
<> 144:ef7eb2e8f9f7 118 * @return None
<> 144:ef7eb2e8f9f7 119 * \hideinitializer
<> 144:ef7eb2e8f9f7 120 */
<> 144:ef7eb2e8f9f7 121 #define SC_SET_CLK_PIN(sc, u32OnOff)\
<> 144:ef7eb2e8f9f7 122 do {\
<> 144:ef7eb2e8f9f7 123 while(sc->PINCTL & SC_PINCTL_SYNC_Msk);\
<> 144:ef7eb2e8f9f7 124 if(u32OnOff)\
<> 144:ef7eb2e8f9f7 125 (sc)->PINCTL |= SC_PINCTL_CLKKEEP_Msk;\
<> 144:ef7eb2e8f9f7 126 else\
<> 144:ef7eb2e8f9f7 127 (sc)->PINCTL &= ~(SC_PINCTL_CLKKEEP_Msk);\
<> 144:ef7eb2e8f9f7 128 }while(0)
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /**
<> 144:ef7eb2e8f9f7 131 * @brief This macro set I/O pin state of smartcard interface
<> 144:ef7eb2e8f9f7 132 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 133 * @param[in] u32State Pin state of I/O pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
<> 144:ef7eb2e8f9f7 134 * @return None
<> 144:ef7eb2e8f9f7 135 * \hideinitializer
<> 144:ef7eb2e8f9f7 136 */
<> 144:ef7eb2e8f9f7 137 #define SC_SET_IO_PIN(sc, u32State)\
<> 144:ef7eb2e8f9f7 138 do {\
<> 144:ef7eb2e8f9f7 139 while(sc->PINCTL & SC_PINCTL_SYNC_Msk);\
<> 144:ef7eb2e8f9f7 140 if(u32State)\
<> 144:ef7eb2e8f9f7 141 (sc)->PINCTL |= SC_PINCTL_SCDOUT_Msk;\
<> 144:ef7eb2e8f9f7 142 else\
<> 144:ef7eb2e8f9f7 143 (sc)->PINCTL &= ~SC_PINCTL_SCDOUT_Msk;\
<> 144:ef7eb2e8f9f7 144 }while(0)
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 /**
<> 144:ef7eb2e8f9f7 147 * @brief This macro set RST pin state of smartcard interface
<> 144:ef7eb2e8f9f7 148 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 149 * @param[in] u32State Pin state of RST pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
<> 144:ef7eb2e8f9f7 150 * @return None
<> 144:ef7eb2e8f9f7 151 * \hideinitializer
<> 144:ef7eb2e8f9f7 152 */
<> 144:ef7eb2e8f9f7 153 #define SC_SET_RST_PIN(sc, u32State)\
<> 144:ef7eb2e8f9f7 154 do {\
<> 144:ef7eb2e8f9f7 155 while(sc->PINCTL & SC_PINCTL_SYNC_Msk);\
<> 144:ef7eb2e8f9f7 156 if(u32State)\
<> 144:ef7eb2e8f9f7 157 (sc)->PINCTL |= SC_PINCTL_SCRST_Msk;\
<> 144:ef7eb2e8f9f7 158 else\
<> 144:ef7eb2e8f9f7 159 (sc)->PINCTL &= ~SC_PINCTL_SCRST_Msk;\
<> 144:ef7eb2e8f9f7 160 }while(0)
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /**
<> 144:ef7eb2e8f9f7 163 * @brief This macro read one byte from smartcard module receive FIFO
<> 144:ef7eb2e8f9f7 164 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 165 * @return One byte read from receive FIFO
<> 144:ef7eb2e8f9f7 166 * \hideinitializer
<> 144:ef7eb2e8f9f7 167 */
<> 144:ef7eb2e8f9f7 168 #define SC_READ(sc) ((char)((sc)->DAT))
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /**
<> 144:ef7eb2e8f9f7 171 * @brief This macro write one byte to smartcard module transmit FIFO
<> 144:ef7eb2e8f9f7 172 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 173 * @param[in] u8Data Data to write to transmit FIFO
<> 144:ef7eb2e8f9f7 174 * @return None
<> 144:ef7eb2e8f9f7 175 * \hideinitializer
<> 144:ef7eb2e8f9f7 176 */
<> 144:ef7eb2e8f9f7 177 #define SC_WRITE(sc, u8Data) ((sc)->DAT = (u8Data))
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 /**
<> 144:ef7eb2e8f9f7 180 * @brief This macro set smartcard stop bit length
<> 144:ef7eb2e8f9f7 181 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 182 * @param[in] u32Len Stop bit length, ether 1 or 2.
<> 144:ef7eb2e8f9f7 183 * @return None
<> 144:ef7eb2e8f9f7 184 * @details Stop bit length must be 1 for T = 1 protocol and 2 for T = 0 protocol.
<> 144:ef7eb2e8f9f7 185 * \hideinitializer
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187 #define SC_SET_STOP_BIT_LEN(sc, u32Len) ((sc)->CTL = ((sc)->CTL & ~SC_CTL_NSB_Msk) | (u32Len == 1 ? 1 : 0))
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 /**
<> 144:ef7eb2e8f9f7 190 * @brief Enable/Disable Tx error retry, and set Tx error retry count
<> 144:ef7eb2e8f9f7 191 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 192 * @param[in] u32Count The number of times of Tx error retry count, between 0~8. 0 means disable Tx error retry
<> 144:ef7eb2e8f9f7 193 * @return None
<> 144:ef7eb2e8f9f7 194 */
<> 144:ef7eb2e8f9f7 195 __STATIC_INLINE void SC_SetTxRetry(SC_T *sc, uint32_t u32Count)
<> 144:ef7eb2e8f9f7 196 {
<> 144:ef7eb2e8f9f7 197 while(sc->CTL & SC_CTL_SYNC_Msk);
<> 144:ef7eb2e8f9f7 198 if(u32Count == 0) { // disable Tx error retry
<> 144:ef7eb2e8f9f7 199 sc->CTL &= ~(SC_CTL_TXRTY_Msk | SC_CTL_TXRTYEN_Msk);
<> 144:ef7eb2e8f9f7 200 } else {
<> 144:ef7eb2e8f9f7 201 sc->CTL = (sc->CTL & ~SC_CTL_TXRTY_Msk) | ((u32Count - 1) << SC_CTL_TXRTY_Pos) | SC_CTL_TXRTYEN_Msk;
<> 144:ef7eb2e8f9f7 202 }
<> 144:ef7eb2e8f9f7 203 }
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 /**
<> 144:ef7eb2e8f9f7 206 * @brief Enable/Disable Rx error retry, and set Rx error retry count
<> 144:ef7eb2e8f9f7 207 * @param[in] sc Base address of smartcard module
<> 144:ef7eb2e8f9f7 208 * @param[in] u32Count The number of times of Rx error retry count, between 0~8. 0 means disable Rx error retry
<> 144:ef7eb2e8f9f7 209 * @return None
<> 144:ef7eb2e8f9f7 210 */
<> 144:ef7eb2e8f9f7 211 __STATIC_INLINE void SC_SetRxRetry(SC_T *sc, uint32_t u32Count)
<> 144:ef7eb2e8f9f7 212 {
<> 144:ef7eb2e8f9f7 213 while(sc->CTL & SC_CTL_SYNC_Msk);
<> 144:ef7eb2e8f9f7 214 if(u32Count == 0) { // disable Rx error retry
<> 144:ef7eb2e8f9f7 215 sc->CTL &= ~(SC_CTL_RXRTY_Msk | SC_CTL_RXRTYEN_Msk);
<> 144:ef7eb2e8f9f7 216 } else {
<> 144:ef7eb2e8f9f7 217 sc->CTL = (sc->CTL & ~SC_CTL_RXRTY_Msk) | ((u32Count - 1) << SC_CTL_RXRTY_Pos) | SC_CTL_RXRTYEN_Msk;
<> 144:ef7eb2e8f9f7 218 }
<> 144:ef7eb2e8f9f7 219 }
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 uint32_t SC_IsCardInserted(SC_T *sc);
<> 144:ef7eb2e8f9f7 223 void SC_ClearFIFO(SC_T *sc);
<> 144:ef7eb2e8f9f7 224 void SC_Close(SC_T *sc);
<> 144:ef7eb2e8f9f7 225 void SC_Open(SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR);
<> 144:ef7eb2e8f9f7 226 void SC_ResetReader(SC_T *sc);
<> 144:ef7eb2e8f9f7 227 void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT);
<> 144:ef7eb2e8f9f7 228 void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT);
<> 144:ef7eb2e8f9f7 229 void SC_StopAllTimer(SC_T *sc);
<> 144:ef7eb2e8f9f7 230 void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount);
<> 144:ef7eb2e8f9f7 231 void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum);
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /*@}*/ /* end of group NUC472_442_SC_EXPORTED_FUNCTIONS */
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 /*@}*/ /* end of group NUC472_442_SC_Driver */
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 /*@}*/ /* end of group NUC472_442_Device_Driver */
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 241 }
<> 144:ef7eb2e8f9f7 242 #endif
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 #endif //__SC_H__
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/