mbed library sources. Supersedes mbed-src.
Fork of mbed-dev by
targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_ps2.h@149:156823d33999, 2016-10-28 (annotated)
- Committer:
- <>
- Date:
- Fri Oct 28 11:17:30 2016 +0100
- Revision:
- 149:156823d33999
- Parent:
- targets/cmsis/TARGET_NUVOTON/TARGET_NUC472/StdDriver/nuc472_ps2.h@144:ef7eb2e8f9f7
This updates the lib to the mbed lib v128
NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /**************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 2 | * @file PS2.h |
<> | 144:ef7eb2e8f9f7 | 3 | * @version V0.10 |
<> | 144:ef7eb2e8f9f7 | 4 | * $Revision: 6 $ |
<> | 144:ef7eb2e8f9f7 | 5 | * $Date: 14/10/06 1:58p $ |
<> | 144:ef7eb2e8f9f7 | 6 | * @brief NUC472/NUC442 PS2 Driver Header File |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * @note |
<> | 144:ef7eb2e8f9f7 | 9 | * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 10 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 11 | #ifndef __PS2_H__ |
<> | 144:ef7eb2e8f9f7 | 12 | #define __PS2_H__ |
<> | 144:ef7eb2e8f9f7 | 13 | |
<> | 144:ef7eb2e8f9f7 | 14 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 15 | /* Include related headers */ |
<> | 144:ef7eb2e8f9f7 | 16 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 17 | #include "NUC472_442.h" |
<> | 144:ef7eb2e8f9f7 | 18 | |
<> | 144:ef7eb2e8f9f7 | 19 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 20 | extern "C" |
<> | 144:ef7eb2e8f9f7 | 21 | { |
<> | 144:ef7eb2e8f9f7 | 22 | #endif |
<> | 144:ef7eb2e8f9f7 | 23 | |
<> | 144:ef7eb2e8f9f7 | 24 | |
<> | 144:ef7eb2e8f9f7 | 25 | /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver |
<> | 144:ef7eb2e8f9f7 | 26 | @{ |
<> | 144:ef7eb2e8f9f7 | 27 | */ |
<> | 144:ef7eb2e8f9f7 | 28 | |
<> | 144:ef7eb2e8f9f7 | 29 | /** @addtogroup NUC472_442_PS2_Driver PS2 Driver |
<> | 144:ef7eb2e8f9f7 | 30 | @{ |
<> | 144:ef7eb2e8f9f7 | 31 | */ |
<> | 144:ef7eb2e8f9f7 | 32 | |
<> | 144:ef7eb2e8f9f7 | 33 | |
<> | 144:ef7eb2e8f9f7 | 34 | /** @addtogroup NUC472_442_PS2_EXPORTED_FUNCTIONS PS2 Exported Functions |
<> | 144:ef7eb2e8f9f7 | 35 | @{ |
<> | 144:ef7eb2e8f9f7 | 36 | */ |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | |
<> | 144:ef7eb2e8f9f7 | 39 | /** |
<> | 144:ef7eb2e8f9f7 | 40 | * @brief This function use to set TX FIFO length. |
<> | 144:ef7eb2e8f9f7 | 41 | * |
<> | 144:ef7eb2e8f9f7 | 42 | * @param[in] u32Count TX FIFO length |
<> | 144:ef7eb2e8f9f7 | 43 | * |
<> | 144:ef7eb2e8f9f7 | 44 | * @return None |
<> | 144:ef7eb2e8f9f7 | 45 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 46 | */ |
<> | 144:ef7eb2e8f9f7 | 47 | #define PS2_SET_TX_BYTE_CNT(u32Count) (PS2->CTL = (PS2->CTL & ~PS2_CTL_TXFDEPTH_Msk) \ |
<> | 144:ef7eb2e8f9f7 | 48 | | ((u32Count-1) << PS2_CTL_TXFDEPTH_Pos)) |
<> | 144:ef7eb2e8f9f7 | 49 | |
<> | 144:ef7eb2e8f9f7 | 50 | /** |
<> | 144:ef7eb2e8f9f7 | 51 | * @brief This function use to get PS2 status. |
<> | 144:ef7eb2e8f9f7 | 52 | * |
<> | 144:ef7eb2e8f9f7 | 53 | * @param None |
<> | 144:ef7eb2e8f9f7 | 54 | * |
<> | 144:ef7eb2e8f9f7 | 55 | * @return PS2 status |
<> | 144:ef7eb2e8f9f7 | 56 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 57 | */ |
<> | 144:ef7eb2e8f9f7 | 58 | #define PS2_GET_STATUS() (PS2->STATUS) |
<> | 144:ef7eb2e8f9f7 | 59 | |
<> | 144:ef7eb2e8f9f7 | 60 | /** |
<> | 144:ef7eb2e8f9f7 | 61 | * @brief This function use to clear PS2 status. |
<> | 144:ef7eb2e8f9f7 | 62 | * |
<> | 144:ef7eb2e8f9f7 | 63 | * @param[in] u32Mask Clear the specified status of Ps2 module: |
<> | 144:ef7eb2e8f9f7 | 64 | * \ref PS2_STATUS_FRAMEERR_Msk , \ref PS2_STATUS_RXOV_Msk |
<> | 144:ef7eb2e8f9f7 | 65 | * |
<> | 144:ef7eb2e8f9f7 | 66 | * @return None |
<> | 144:ef7eb2e8f9f7 | 67 | */ |
<> | 144:ef7eb2e8f9f7 | 68 | #define PS2_CLR_STATUS(u32Mask) (PS2D->PS2STATUS = u32Mask) |
<> | 144:ef7eb2e8f9f7 | 69 | |
<> | 144:ef7eb2e8f9f7 | 70 | /** |
<> | 144:ef7eb2e8f9f7 | 71 | * @brief This function use to clear PS2 Tx FIFO. |
<> | 144:ef7eb2e8f9f7 | 72 | * |
<> | 144:ef7eb2e8f9f7 | 73 | * @param None |
<> | 144:ef7eb2e8f9f7 | 74 | * |
<> | 144:ef7eb2e8f9f7 | 75 | * @return None |
<> | 144:ef7eb2e8f9f7 | 76 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 77 | */ |
<> | 144:ef7eb2e8f9f7 | 78 | __STATIC_INLINE void PS2_CLEAR_TX_FIFO(void) |
<> | 144:ef7eb2e8f9f7 | 79 | { |
<> | 144:ef7eb2e8f9f7 | 80 | PS2->CTL |= PS2_CTL_CLRFIFO_Msk; |
<> | 144:ef7eb2e8f9f7 | 81 | PS2->CTL &= ~PS2_CTL_CLRFIFO_Msk; |
<> | 144:ef7eb2e8f9f7 | 82 | } |
<> | 144:ef7eb2e8f9f7 | 83 | |
<> | 144:ef7eb2e8f9f7 | 84 | /** |
<> | 144:ef7eb2e8f9f7 | 85 | * @brief This function use to clear PS2 Rx interrupt. |
<> | 144:ef7eb2e8f9f7 | 86 | * |
<> | 144:ef7eb2e8f9f7 | 87 | * @param None |
<> | 144:ef7eb2e8f9f7 | 88 | * |
<> | 144:ef7eb2e8f9f7 | 89 | * @return None |
<> | 144:ef7eb2e8f9f7 | 90 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 91 | */ |
<> | 144:ef7eb2e8f9f7 | 92 | #define PS2_CLR_RX_INT_FLAG() (PS2->INTSTS = PS2_INTSTS_RXIF_Msk) |
<> | 144:ef7eb2e8f9f7 | 93 | |
<> | 144:ef7eb2e8f9f7 | 94 | /** |
<> | 144:ef7eb2e8f9f7 | 95 | * @brief This function use to clear PS2 Tx interrupt. |
<> | 144:ef7eb2e8f9f7 | 96 | * |
<> | 144:ef7eb2e8f9f7 | 97 | * @param None |
<> | 144:ef7eb2e8f9f7 | 98 | * |
<> | 144:ef7eb2e8f9f7 | 99 | * @return None |
<> | 144:ef7eb2e8f9f7 | 100 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 101 | */ |
<> | 144:ef7eb2e8f9f7 | 102 | #define PS2_CLR_TX_INT_FLAG() (PS2->INTSTS = PS2_INTSTS_TXIF_Msk) |
<> | 144:ef7eb2e8f9f7 | 103 | |
<> | 144:ef7eb2e8f9f7 | 104 | /** |
<> | 144:ef7eb2e8f9f7 | 105 | * @brief This function use to get PS2 interrupt. |
<> | 144:ef7eb2e8f9f7 | 106 | * |
<> | 144:ef7eb2e8f9f7 | 107 | * @param[in] u32IntFlag interrupt flag: \ref PS2_INTSTS_TXIF_Msk , \ref PS2_INTSTS_RXIF_Msk |
<> | 144:ef7eb2e8f9f7 | 108 | * |
<> | 144:ef7eb2e8f9f7 | 109 | * @return 1: interrupt occurs |
<> | 144:ef7eb2e8f9f7 | 110 | * 0: interrupt not occurs |
<> | 144:ef7eb2e8f9f7 | 111 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 112 | */ |
<> | 144:ef7eb2e8f9f7 | 113 | #define PS2_GET_INT_FLAG(u32IntFlag) ((PS2->INTSTS & u32IntFlag)?1:0) |
<> | 144:ef7eb2e8f9f7 | 114 | |
<> | 144:ef7eb2e8f9f7 | 115 | /** |
<> | 144:ef7eb2e8f9f7 | 116 | * @brief This function use to set PS2CLK and PS2DATA pins are controlled by hardware. |
<> | 144:ef7eb2e8f9f7 | 117 | * |
<> | 144:ef7eb2e8f9f7 | 118 | * @param None |
<> | 144:ef7eb2e8f9f7 | 119 | * |
<> | 144:ef7eb2e8f9f7 | 120 | * @return None |
<> | 144:ef7eb2e8f9f7 | 121 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 122 | */ |
<> | 144:ef7eb2e8f9f7 | 123 | #define PS2_DISABLE_OVERRIDE() (PS2->CTL &= ~PS2_CTL_PS2EN_Msk) |
<> | 144:ef7eb2e8f9f7 | 124 | |
<> | 144:ef7eb2e8f9f7 | 125 | /** |
<> | 144:ef7eb2e8f9f7 | 126 | * @brief This function use to set PS2CLK and PS2DATA pins are controlled by software. |
<> | 144:ef7eb2e8f9f7 | 127 | * |
<> | 144:ef7eb2e8f9f7 | 128 | * @param None |
<> | 144:ef7eb2e8f9f7 | 129 | * |
<> | 144:ef7eb2e8f9f7 | 130 | * @return None |
<> | 144:ef7eb2e8f9f7 | 131 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 132 | */ |
<> | 144:ef7eb2e8f9f7 | 133 | #define PS2_ENABLE_OVERRIDE() (PS2->CTL |= PS2_CTL_PS2EN_Msk) |
<> | 144:ef7eb2e8f9f7 | 134 | |
<> | 144:ef7eb2e8f9f7 | 135 | /** |
<> | 144:ef7eb2e8f9f7 | 136 | * @brief This function use to get indicates which data byte in transmit data shift register. |
<> | 144:ef7eb2e8f9f7 | 137 | * |
<> | 144:ef7eb2e8f9f7 | 138 | * @param None |
<> | 144:ef7eb2e8f9f7 | 139 | * |
<> | 144:ef7eb2e8f9f7 | 140 | * @return The indicates which data byte in transmit data shift register. |
<> | 144:ef7eb2e8f9f7 | 141 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 142 | */ |
<> | 144:ef7eb2e8f9f7 | 143 | #define PS2_GET_TX_BYTE_INDEX() ((PS2->STATUS & PS2_STATUS_BYTEIDX_Msk) >> PS2_STATUS_BYTEIDX_Pos) |
<> | 144:ef7eb2e8f9f7 | 144 | |
<> | 144:ef7eb2e8f9f7 | 145 | /** |
<> | 144:ef7eb2e8f9f7 | 146 | * @brief This function use to set PS2DATA Pin low. |
<> | 144:ef7eb2e8f9f7 | 147 | * |
<> | 144:ef7eb2e8f9f7 | 148 | * @param None |
<> | 144:ef7eb2e8f9f7 | 149 | * |
<> | 144:ef7eb2e8f9f7 | 150 | * @return None. |
<> | 144:ef7eb2e8f9f7 | 151 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 152 | */ |
<> | 144:ef7eb2e8f9f7 | 153 | #define PS2_SET_DATA_LOW() (PS2->CTL &= ~PS2_CTL_FPS2DAT_Msk) |
<> | 144:ef7eb2e8f9f7 | 154 | |
<> | 144:ef7eb2e8f9f7 | 155 | /** |
<> | 144:ef7eb2e8f9f7 | 156 | * @brief This function use to set PS2DATA Pin high. |
<> | 144:ef7eb2e8f9f7 | 157 | * |
<> | 144:ef7eb2e8f9f7 | 158 | * @param None |
<> | 144:ef7eb2e8f9f7 | 159 | * |
<> | 144:ef7eb2e8f9f7 | 160 | * @return None. |
<> | 144:ef7eb2e8f9f7 | 161 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 162 | */ |
<> | 144:ef7eb2e8f9f7 | 163 | #define PS2_SET_DATA_HIGH() (PS2->CTL |= PS2_CTL_FPS2DAT_Msk) |
<> | 144:ef7eb2e8f9f7 | 164 | |
<> | 144:ef7eb2e8f9f7 | 165 | /** |
<> | 144:ef7eb2e8f9f7 | 166 | * @brief This function use to set PS2CLK Pin low. |
<> | 144:ef7eb2e8f9f7 | 167 | * |
<> | 144:ef7eb2e8f9f7 | 168 | * @param None |
<> | 144:ef7eb2e8f9f7 | 169 | * |
<> | 144:ef7eb2e8f9f7 | 170 | * @return None. |
<> | 144:ef7eb2e8f9f7 | 171 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 172 | */ |
<> | 144:ef7eb2e8f9f7 | 173 | #define PS2_SET_CLK_LOW() (PS2->CTL &= ~PS2_CTL_FPS2CLK_Msk) |
<> | 144:ef7eb2e8f9f7 | 174 | |
<> | 144:ef7eb2e8f9f7 | 175 | /** |
<> | 144:ef7eb2e8f9f7 | 176 | * @brief This function use to set PS2CLK Pin high. |
<> | 144:ef7eb2e8f9f7 | 177 | * |
<> | 144:ef7eb2e8f9f7 | 178 | * @param None |
<> | 144:ef7eb2e8f9f7 | 179 | * |
<> | 144:ef7eb2e8f9f7 | 180 | * @return None. |
<> | 144:ef7eb2e8f9f7 | 181 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 182 | */ |
<> | 144:ef7eb2e8f9f7 | 183 | #define PS2_SET_CLK_HIGH() (PS2->CTL |= PS2_CTL_FPS2CLK_Msk) |
<> | 144:ef7eb2e8f9f7 | 184 | |
<> | 144:ef7eb2e8f9f7 | 185 | /** |
<> | 144:ef7eb2e8f9f7 | 186 | * @brief If Parity error or Stop bit is Not Received Correctly, Acknowledge will Not be Sent to host at 12th clock. |
<> | 144:ef7eb2e8f9f7 | 187 | * |
<> | 144:ef7eb2e8f9f7 | 188 | * @param None |
<> | 144:ef7eb2e8f9f7 | 189 | * |
<> | 144:ef7eb2e8f9f7 | 190 | * @return None. |
<> | 144:ef7eb2e8f9f7 | 191 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 192 | */ |
<> | 144:ef7eb2e8f9f7 | 193 | #define PS2_DISABLE_ACK_ALWAYS() (PS2->CTL |= PS2_CTL_ACK_Msk) |
<> | 144:ef7eb2e8f9f7 | 194 | |
<> | 144:ef7eb2e8f9f7 | 195 | /** |
<> | 144:ef7eb2e8f9f7 | 196 | * @brief Always sends acknowledge to host at 12th clock for host to device communication. |
<> | 144:ef7eb2e8f9f7 | 197 | * |
<> | 144:ef7eb2e8f9f7 | 198 | * @param None |
<> | 144:ef7eb2e8f9f7 | 199 | * |
<> | 144:ef7eb2e8f9f7 | 200 | * @return None. |
<> | 144:ef7eb2e8f9f7 | 201 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 202 | */ |
<> | 144:ef7eb2e8f9f7 | 203 | #define PS2_ENABLE_ACK_ALWAYS() (PS2->CTL &= ~PS2_CTL_ACK_Msk) |
<> | 144:ef7eb2e8f9f7 | 204 | |
<> | 144:ef7eb2e8f9f7 | 205 | |
<> | 144:ef7eb2e8f9f7 | 206 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 207 | /* Define Function Prototypes */ |
<> | 144:ef7eb2e8f9f7 | 208 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 209 | |
<> | 144:ef7eb2e8f9f7 | 210 | void PS2_Open(void); |
<> | 144:ef7eb2e8f9f7 | 211 | void PS2_Close(void); |
<> | 144:ef7eb2e8f9f7 | 212 | uint8_t PS2_Read(void); |
<> | 144:ef7eb2e8f9f7 | 213 | int32_t PS2_Write(uint32_t *pu32Buf, uint32_t u32ByteCount); |
<> | 144:ef7eb2e8f9f7 | 214 | void PS2_EnableInt(uint32_t u32Mask); |
<> | 144:ef7eb2e8f9f7 | 215 | void PS2_DisableInt(uint32_t u32Mask); |
<> | 144:ef7eb2e8f9f7 | 216 | |
<> | 144:ef7eb2e8f9f7 | 217 | |
<> | 144:ef7eb2e8f9f7 | 218 | /*@}*/ /* end of group NUC472_442_PS2_EXPORTED_FUNCTIONS */ |
<> | 144:ef7eb2e8f9f7 | 219 | |
<> | 144:ef7eb2e8f9f7 | 220 | /*@}*/ /* end of group NUC472_442_PS2_Driver */ |
<> | 144:ef7eb2e8f9f7 | 221 | |
<> | 144:ef7eb2e8f9f7 | 222 | /*@}*/ /* end of group NUC472_442_Device_Driver */ |
<> | 144:ef7eb2e8f9f7 | 223 | |
<> | 144:ef7eb2e8f9f7 | 224 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 225 | } |
<> | 144:ef7eb2e8f9f7 | 226 | #endif |
<> | 144:ef7eb2e8f9f7 | 227 | |
<> | 144:ef7eb2e8f9f7 | 228 | #endif //__PS2_H__ |
<> | 144:ef7eb2e8f9f7 | 229 | |
<> | 144:ef7eb2e8f9f7 | 230 | /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/ |
<> | 144:ef7eb2e8f9f7 | 231 |