mbed library sources. Supersedes mbed-src.
Fork of mbed-dev by
targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_cap.c@149:156823d33999, 2016-10-28 (annotated)
- Committer:
- <>
- Date:
- Fri Oct 28 11:17:30 2016 +0100
- Revision:
- 149:156823d33999
- Parent:
- targets/cmsis/TARGET_NUVOTON/TARGET_NUC472/StdDriver/nuc472_cap.c@144:ef7eb2e8f9f7
This updates the lib to the mbed lib v128
NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /**************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 2 | * @file cap.c |
<> | 144:ef7eb2e8f9f7 | 3 | * @version V0.10 |
<> | 144:ef7eb2e8f9f7 | 4 | * $Revision: 17 $ |
<> | 144:ef7eb2e8f9f7 | 5 | * $Date: 14/10/06 3:41p $ |
<> | 144:ef7eb2e8f9f7 | 6 | * @brief NUC472/NUC442 CAP driver source file |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * @note |
<> | 144:ef7eb2e8f9f7 | 9 | * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 10 | *****************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 11 | |
<> | 144:ef7eb2e8f9f7 | 12 | #include "NUC472_442.h" |
<> | 144:ef7eb2e8f9f7 | 13 | /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver |
<> | 144:ef7eb2e8f9f7 | 14 | @{ |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | |
<> | 144:ef7eb2e8f9f7 | 17 | /** @addtogroup NUC472_442_CAP_Driver CAP Driver |
<> | 144:ef7eb2e8f9f7 | 18 | @{ |
<> | 144:ef7eb2e8f9f7 | 19 | */ |
<> | 144:ef7eb2e8f9f7 | 20 | |
<> | 144:ef7eb2e8f9f7 | 21 | |
<> | 144:ef7eb2e8f9f7 | 22 | /** @addtogroup NUC472_442_CAP_EXPORTED_FUNCTIONS CAP Exported Functions |
<> | 144:ef7eb2e8f9f7 | 23 | @{ |
<> | 144:ef7eb2e8f9f7 | 24 | */ |
<> | 144:ef7eb2e8f9f7 | 25 | |
<> | 144:ef7eb2e8f9f7 | 26 | /** |
<> | 144:ef7eb2e8f9f7 | 27 | * @brief Open engine clock and sensor clock |
<> | 144:ef7eb2e8f9f7 | 28 | * |
<> | 144:ef7eb2e8f9f7 | 29 | * @param[in] u32InFormat The bits corresponding VSP, HSP, PCLK, INFMT, SNRTYPE, OUTFMT, PDORD and PNFMT configurations. |
<> | 144:ef7eb2e8f9f7 | 30 | * - VSP should be ether \ref CAP_PAR_VSP_LOW or \ref CAP_PAR_VSP_HIGH |
<> | 144:ef7eb2e8f9f7 | 31 | * - HSP should be ether \ref CAP_PAR_HSP_LOW or \ref CAP_PAR_HSP_HIGH |
<> | 144:ef7eb2e8f9f7 | 32 | * - PCLK should be ether \ref CAP_PAR_PCLKP_LOW or \ref CAP_PAR_PCLKP_HIGH |
<> | 144:ef7eb2e8f9f7 | 33 | * - INFMT should be ether \ref CAP_PAR_INFMT_YUV422 or \ref CAP_PAR_INFMT_RGB565 |
<> | 144:ef7eb2e8f9f7 | 34 | * - SNRTYPE should be ether \ref CAP_PAR_SENTYPE_CCIR601 or \ref CAP_PAR_SENTYPE_CCIR656 |
<> | 144:ef7eb2e8f9f7 | 35 | * - OUTFMT should be one of the following setting |
<> | 144:ef7eb2e8f9f7 | 36 | * - \ref CAP_PAR_OUTFMT_YUV422 |
<> | 144:ef7eb2e8f9f7 | 37 | * - \ref CAP_PAR_OUTFMT_ONLY_Y |
<> | 144:ef7eb2e8f9f7 | 38 | * - \ref CAP_PAR_OUTFMT_RGB555 |
<> | 144:ef7eb2e8f9f7 | 39 | * - \ref CAP_PAR_OUTFMT_RGB565 |
<> | 144:ef7eb2e8f9f7 | 40 | * - PDORD should be one of the following setting |
<> | 144:ef7eb2e8f9f7 | 41 | * - \ref CAP_PAR_INDATORD_YUYV |
<> | 144:ef7eb2e8f9f7 | 42 | * - \ref CAP_PAR_INDATORD_YVYU |
<> | 144:ef7eb2e8f9f7 | 43 | * - \ref CAP_PAR_INDATORD_UYVY |
<> | 144:ef7eb2e8f9f7 | 44 | * - \ref CAP_PAR_INDATORD_VYUY |
<> | 144:ef7eb2e8f9f7 | 45 | * - \ref CAP_PAR_INDATORD_RGGB |
<> | 144:ef7eb2e8f9f7 | 46 | * - \ref CAP_PAR_INDATORD_BGGR |
<> | 144:ef7eb2e8f9f7 | 47 | * - \ref CAP_PAR_INDATORD_GBRG |
<> | 144:ef7eb2e8f9f7 | 48 | * - \ref CAP_PAR_INDATORD_GRBG |
<> | 144:ef7eb2e8f9f7 | 49 | * - PNFMT should be one of the following setting |
<> | 144:ef7eb2e8f9f7 | 50 | * - \ref CAP_PAR_PLNFMT_YUV422 |
<> | 144:ef7eb2e8f9f7 | 51 | * - \ref CAP_PAR_PLNFMT_YUV420 |
<> | 144:ef7eb2e8f9f7 | 52 | * |
<> | 144:ef7eb2e8f9f7 | 53 | * @param[in] u32OutFormet Capture output format, should be one of following setting |
<> | 144:ef7eb2e8f9f7 | 54 | * - \ref CAP_CTL_PKTEN |
<> | 144:ef7eb2e8f9f7 | 55 | * - \ref CAP_CTL_PLNEN |
<> | 144:ef7eb2e8f9f7 | 56 | * |
<> | 144:ef7eb2e8f9f7 | 57 | * @return None |
<> | 144:ef7eb2e8f9f7 | 58 | * |
<> | 144:ef7eb2e8f9f7 | 59 | * @details Initialize the Image Capture Interface. Register a call back for driver internal using |
<> | 144:ef7eb2e8f9f7 | 60 | */ |
<> | 144:ef7eb2e8f9f7 | 61 | void CAP_Open(uint32_t u32InFormat, uint32_t u32OutFormet) |
<> | 144:ef7eb2e8f9f7 | 62 | { |
<> | 144:ef7eb2e8f9f7 | 63 | ICAP->PAR = (ICAP->PAR & ~0x000007BF) | u32InFormat; |
<> | 144:ef7eb2e8f9f7 | 64 | ICAP->CTL = (ICAP->CTL & ~0x00000060) | u32OutFormet; |
<> | 144:ef7eb2e8f9f7 | 65 | } |
<> | 144:ef7eb2e8f9f7 | 66 | |
<> | 144:ef7eb2e8f9f7 | 67 | /** |
<> | 144:ef7eb2e8f9f7 | 68 | * @brief Set Cropping Window Starting Address and Size |
<> | 144:ef7eb2e8f9f7 | 69 | * |
<> | 144:ef7eb2e8f9f7 | 70 | * @param[in] u32VStart: Cropping Window Vertical Starting Address. It should be 0 ~ 0x7FF. |
<> | 144:ef7eb2e8f9f7 | 71 | * |
<> | 144:ef7eb2e8f9f7 | 72 | * @param[in] u32HStart: Cropping Window Horizontal Starting Address. It should be 0 ~ 0x7FF. |
<> | 144:ef7eb2e8f9f7 | 73 | * |
<> | 144:ef7eb2e8f9f7 | 74 | * @param[in] u32Height: Cropping Window Height . It should be 0 ~ 0x7FF. |
<> | 144:ef7eb2e8f9f7 | 75 | * |
<> | 144:ef7eb2e8f9f7 | 76 | * @param[in] u32Width: Cropping Window Width. It should be 0 ~ 0x7FF. |
<> | 144:ef7eb2e8f9f7 | 77 | * |
<> | 144:ef7eb2e8f9f7 | 78 | * @return None |
<> | 144:ef7eb2e8f9f7 | 79 | * |
<> | 144:ef7eb2e8f9f7 | 80 | * @details Set Cropping Window Starting Address Register |
<> | 144:ef7eb2e8f9f7 | 81 | */ |
<> | 144:ef7eb2e8f9f7 | 82 | void CAP_SetCroppingWindow(uint32_t u32VStart,uint32_t u32HStart, uint32_t u32Height, uint32_t u32Width) |
<> | 144:ef7eb2e8f9f7 | 83 | { |
<> | 144:ef7eb2e8f9f7 | 84 | ICAP->CWSP = (ICAP->CWSP & ~(CAP_CWSP_CWSADDRV_Msk | CAP_CWSP_CWSADDRH_Msk)) |
<> | 144:ef7eb2e8f9f7 | 85 | | (((u32VStart << 16) | u32HStart)); |
<> | 144:ef7eb2e8f9f7 | 86 | |
<> | 144:ef7eb2e8f9f7 | 87 | ICAP->CWS = (ICAP->CWS & ~(CAP_CWS_CWH_Msk | CAP_CWS_CWW_Msk)) |
<> | 144:ef7eb2e8f9f7 | 88 | | ((u32Height << 16)| u32Width); |
<> | 144:ef7eb2e8f9f7 | 89 | } |
<> | 144:ef7eb2e8f9f7 | 90 | |
<> | 144:ef7eb2e8f9f7 | 91 | |
<> | 144:ef7eb2e8f9f7 | 92 | /** |
<> | 144:ef7eb2e8f9f7 | 93 | * @brief Set System Memory Packet Base Address0 Register |
<> | 144:ef7eb2e8f9f7 | 94 | * |
<> | 144:ef7eb2e8f9f7 | 95 | * @param[in] u32Address : set PKTBA0 register, It should be 0x0 ~ 0xFFFFFFFF |
<> | 144:ef7eb2e8f9f7 | 96 | * |
<> | 144:ef7eb2e8f9f7 | 97 | * @return None |
<> | 144:ef7eb2e8f9f7 | 98 | * |
<> | 144:ef7eb2e8f9f7 | 99 | * @details Set System Memory Packet Base Address Register |
<> | 144:ef7eb2e8f9f7 | 100 | */ |
<> | 144:ef7eb2e8f9f7 | 101 | void CAP_SetPacketBuf(uint32_t u32Address ) |
<> | 144:ef7eb2e8f9f7 | 102 | { |
<> | 144:ef7eb2e8f9f7 | 103 | ICAP->PKTBA0 = u32Address; |
<> | 144:ef7eb2e8f9f7 | 104 | ICAP->CTL |= CAP_CTL_UPDATE_Msk; |
<> | 144:ef7eb2e8f9f7 | 105 | } |
<> | 144:ef7eb2e8f9f7 | 106 | |
<> | 144:ef7eb2e8f9f7 | 107 | /** |
<> | 144:ef7eb2e8f9f7 | 108 | * @brief Set System Memory Planar Y, U and V Base Address Registers. |
<> | 144:ef7eb2e8f9f7 | 109 | * |
<> | 144:ef7eb2e8f9f7 | 110 | * @param[in] u32YAddr : set YBA register, It should be 0x0 ~ 0xFFFFFFFF |
<> | 144:ef7eb2e8f9f7 | 111 | * |
<> | 144:ef7eb2e8f9f7 | 112 | * @param[in] u32UAddr : set UBA register, It should be 0x0 ~ 0xFFFFFFFF |
<> | 144:ef7eb2e8f9f7 | 113 | * |
<> | 144:ef7eb2e8f9f7 | 114 | * @param[in] u32VAddr : set VBA register, It should be 0x0 ~ 0xFFFFFFFF |
<> | 144:ef7eb2e8f9f7 | 115 | * |
<> | 144:ef7eb2e8f9f7 | 116 | * @return None |
<> | 144:ef7eb2e8f9f7 | 117 | * |
<> | 144:ef7eb2e8f9f7 | 118 | * @details Set System Memory Planar Y,U and V Base Address Registers |
<> | 144:ef7eb2e8f9f7 | 119 | */ |
<> | 144:ef7eb2e8f9f7 | 120 | void CAP_SetPlanarBuf(uint32_t u32YAddr, uint32_t u32UAddr, uint32_t u32VAddr) |
<> | 144:ef7eb2e8f9f7 | 121 | { |
<> | 144:ef7eb2e8f9f7 | 122 | ICAP->YBA = u32YAddr; |
<> | 144:ef7eb2e8f9f7 | 123 | ICAP->UBA = u32UAddr; |
<> | 144:ef7eb2e8f9f7 | 124 | ICAP->VBA = u32VAddr; |
<> | 144:ef7eb2e8f9f7 | 125 | ICAP->CTL |= CAP_CTL_UPDATE_Msk; |
<> | 144:ef7eb2e8f9f7 | 126 | } |
<> | 144:ef7eb2e8f9f7 | 127 | |
<> | 144:ef7eb2e8f9f7 | 128 | |
<> | 144:ef7eb2e8f9f7 | 129 | /** |
<> | 144:ef7eb2e8f9f7 | 130 | * @brief Close Image Capture Interface |
<> | 144:ef7eb2e8f9f7 | 131 | * |
<> | 144:ef7eb2e8f9f7 | 132 | * @return None |
<> | 144:ef7eb2e8f9f7 | 133 | */ |
<> | 144:ef7eb2e8f9f7 | 134 | void CAP_Close(void) |
<> | 144:ef7eb2e8f9f7 | 135 | { |
<> | 144:ef7eb2e8f9f7 | 136 | ICAP->CTL &= ~CAP_CTL_CAPEN; |
<> | 144:ef7eb2e8f9f7 | 137 | } |
<> | 144:ef7eb2e8f9f7 | 138 | |
<> | 144:ef7eb2e8f9f7 | 139 | |
<> | 144:ef7eb2e8f9f7 | 140 | /** |
<> | 144:ef7eb2e8f9f7 | 141 | * @brief Set CAP Interrupt |
<> | 144:ef7eb2e8f9f7 | 142 | * |
<> | 144:ef7eb2e8f9f7 | 143 | * @param[in] u32IntMask Interrupt settings. It could be |
<> | 144:ef7eb2e8f9f7 | 144 | * - \ref CAP_INT_VIEN_Msk |
<> | 144:ef7eb2e8f9f7 | 145 | * - \ref CAP_INT_MEIEN_Msk |
<> | 144:ef7eb2e8f9f7 | 146 | * - \ref CAP_INT_ADDRMIEN_Msk |
<> | 144:ef7eb2e8f9f7 | 147 | * - \ref CAP_INT_MDIEN_Msk |
<> | 144:ef7eb2e8f9f7 | 148 | * @return None |
<> | 144:ef7eb2e8f9f7 | 149 | * |
<> | 144:ef7eb2e8f9f7 | 150 | * @details Set Video Frame End Interrupt Enable, |
<> | 144:ef7eb2e8f9f7 | 151 | * System Memory Error Interrupt Enable, |
<> | 144:ef7eb2e8f9f7 | 152 | * Address Match Interrupt Enable, |
<> | 144:ef7eb2e8f9f7 | 153 | * Motion Detection Output Finish Interrupt Enable. |
<> | 144:ef7eb2e8f9f7 | 154 | */ |
<> | 144:ef7eb2e8f9f7 | 155 | void CAP_EnableInt(uint32_t u32IntMask) |
<> | 144:ef7eb2e8f9f7 | 156 | { |
<> | 144:ef7eb2e8f9f7 | 157 | ICAP->INT = (ICAP->INT & ~(CAP_INT_VIEN_Msk | CAP_INT_MEIEN_Msk | CAP_INT_ADDRMIEN_Msk | CAP_INT_MDIEN_Msk ) ) |
<> | 144:ef7eb2e8f9f7 | 158 | | u32IntMask; |
<> | 144:ef7eb2e8f9f7 | 159 | } |
<> | 144:ef7eb2e8f9f7 | 160 | |
<> | 144:ef7eb2e8f9f7 | 161 | /** |
<> | 144:ef7eb2e8f9f7 | 162 | * @brief Disable CAP Interrupt |
<> | 144:ef7eb2e8f9f7 | 163 | * |
<> | 144:ef7eb2e8f9f7 | 164 | * @param[in] u32IntMask Interrupt settings. It could be |
<> | 144:ef7eb2e8f9f7 | 165 | * - \ref CAP_INT_VINTF_Msk |
<> | 144:ef7eb2e8f9f7 | 166 | * - \ref CAP_INT_MEINTF_Msk |
<> | 144:ef7eb2e8f9f7 | 167 | * - \ref CAP_INT_ADDRMINTF_Msk |
<> | 144:ef7eb2e8f9f7 | 168 | * - \ref CAP_INT_MDINTF_Msk |
<> | 144:ef7eb2e8f9f7 | 169 | * @return None |
<> | 144:ef7eb2e8f9f7 | 170 | * |
<> | 144:ef7eb2e8f9f7 | 171 | * @details Disable Video Frame End Interrupt , |
<> | 144:ef7eb2e8f9f7 | 172 | * System Memory Error Interrupt , |
<> | 144:ef7eb2e8f9f7 | 173 | * Address Match Interrupt and |
<> | 144:ef7eb2e8f9f7 | 174 | * Motion Detection Output Finish Interrupt . |
<> | 144:ef7eb2e8f9f7 | 175 | */ |
<> | 144:ef7eb2e8f9f7 | 176 | void CAP_DisableInt(uint32_t u32IntMask) |
<> | 144:ef7eb2e8f9f7 | 177 | { |
<> | 144:ef7eb2e8f9f7 | 178 | ICAP->INT = (ICAP->INT & ~(u32IntMask) ) ; |
<> | 144:ef7eb2e8f9f7 | 179 | } |
<> | 144:ef7eb2e8f9f7 | 180 | |
<> | 144:ef7eb2e8f9f7 | 181 | /** |
<> | 144:ef7eb2e8f9f7 | 182 | * @brief Start Image Capture Interface |
<> | 144:ef7eb2e8f9f7 | 183 | * |
<> | 144:ef7eb2e8f9f7 | 184 | * @return None |
<> | 144:ef7eb2e8f9f7 | 185 | */ |
<> | 144:ef7eb2e8f9f7 | 186 | void CAP_Start(void) |
<> | 144:ef7eb2e8f9f7 | 187 | { |
<> | 144:ef7eb2e8f9f7 | 188 | ICAP->CTL |= CAP_CTL_CAPEN; |
<> | 144:ef7eb2e8f9f7 | 189 | } |
<> | 144:ef7eb2e8f9f7 | 190 | |
<> | 144:ef7eb2e8f9f7 | 191 | /** |
<> | 144:ef7eb2e8f9f7 | 192 | * @brief Stop Image Capture Interface |
<> | 144:ef7eb2e8f9f7 | 193 | * |
<> | 144:ef7eb2e8f9f7 | 194 | * @param[in] u32FrameComplete : |
<> | 144:ef7eb2e8f9f7 | 195 | * TRUE: Capture module automatically disable the CAP module after a frame had been captured |
<> | 144:ef7eb2e8f9f7 | 196 | * FALSE: Stop Capture module now |
<> | 144:ef7eb2e8f9f7 | 197 | * @return None |
<> | 144:ef7eb2e8f9f7 | 198 | * |
<> | 144:ef7eb2e8f9f7 | 199 | * @details if u32FrameComplete is set to TRUE then get a new frame and disable CAP module |
<> | 144:ef7eb2e8f9f7 | 200 | */ |
<> | 144:ef7eb2e8f9f7 | 201 | void CAP_Stop(uint32_t u32FrameComplete) |
<> | 144:ef7eb2e8f9f7 | 202 | { |
<> | 144:ef7eb2e8f9f7 | 203 | if(u32FrameComplete==TRUE) |
<> | 144:ef7eb2e8f9f7 | 204 | ICAP->CTL &= ~CAP_CTL_CAPEN; |
<> | 144:ef7eb2e8f9f7 | 205 | else { |
<> | 144:ef7eb2e8f9f7 | 206 | ICAP->CTL |= CAP_CTL_SHUTTER_Msk; |
<> | 144:ef7eb2e8f9f7 | 207 | while(CAP_IS_STOPPED()); |
<> | 144:ef7eb2e8f9f7 | 208 | } |
<> | 144:ef7eb2e8f9f7 | 209 | } |
<> | 144:ef7eb2e8f9f7 | 210 | |
<> | 144:ef7eb2e8f9f7 | 211 | /** |
<> | 144:ef7eb2e8f9f7 | 212 | * @brief Set Packet Scaling Vertical and Horizontal Factor Register |
<> | 144:ef7eb2e8f9f7 | 213 | * |
<> | 144:ef7eb2e8f9f7 | 214 | * @param[in] u32VNumerator: Packet Scaling Vertical Factor N. It should be 0 ~ FFFF. |
<> | 144:ef7eb2e8f9f7 | 215 | * |
<> | 144:ef7eb2e8f9f7 | 216 | * @param[in] u32VDenominator: Packet Scaling Vertical Factor M. It should be 0 ~ FFFF. |
<> | 144:ef7eb2e8f9f7 | 217 | * |
<> | 144:ef7eb2e8f9f7 | 218 | * @param[in] u32HNumerator: Packet Scaling Vertical Factor N. It should be 0 ~ FFFF. |
<> | 144:ef7eb2e8f9f7 | 219 | * |
<> | 144:ef7eb2e8f9f7 | 220 | * @param[in] u32HDenominator: Packet Scaling Vertical Factor M. It should be 0 ~ FFFF. |
<> | 144:ef7eb2e8f9f7 | 221 | * |
<> | 144:ef7eb2e8f9f7 | 222 | * @return None |
<> | 144:ef7eb2e8f9f7 | 223 | * |
<> | 144:ef7eb2e8f9f7 | 224 | */ |
<> | 144:ef7eb2e8f9f7 | 225 | void CAP_SetPacketScaling(uint32_t u32VNumerator, uint32_t u32VDenominator, uint32_t u32HNumerator, uint32_t u32HDenominator) |
<> | 144:ef7eb2e8f9f7 | 226 | { |
<> | 144:ef7eb2e8f9f7 | 227 | uint32_t u32NumeratorL, u32NumeratorH; |
<> | 144:ef7eb2e8f9f7 | 228 | uint32_t u32DenominatorL, u32DenominatorH; |
<> | 144:ef7eb2e8f9f7 | 229 | |
<> | 144:ef7eb2e8f9f7 | 230 | u32NumeratorL = u32VNumerator&0xFF; |
<> | 144:ef7eb2e8f9f7 | 231 | u32NumeratorH=u32VNumerator>>8; |
<> | 144:ef7eb2e8f9f7 | 232 | u32DenominatorL = u32VDenominator&0xFF; |
<> | 144:ef7eb2e8f9f7 | 233 | u32DenominatorH = u32VDenominator>>8; |
<> | 144:ef7eb2e8f9f7 | 234 | ICAP->PKTSL = (ICAP->PKTSL & ~(CAP_PKTSL_PKTSVNL_Msk | CAP_PKTSL_PKTSVML_Msk)) |
<> | 144:ef7eb2e8f9f7 | 235 | | ((u32NumeratorL << 24)| (u32DenominatorL << 16)); |
<> | 144:ef7eb2e8f9f7 | 236 | ICAP->PKTSM = (ICAP->PKTSM & ~(CAP_PKTSM_PKTSVNH_Msk | CAP_PKTSM_PKTSVMH_Msk)) |
<> | 144:ef7eb2e8f9f7 | 237 | | ((u32NumeratorH << 24) | (u32DenominatorH << 16)); |
<> | 144:ef7eb2e8f9f7 | 238 | |
<> | 144:ef7eb2e8f9f7 | 239 | u32NumeratorL = u32HNumerator&0xFF; |
<> | 144:ef7eb2e8f9f7 | 240 | u32NumeratorH=u32HNumerator>>8; |
<> | 144:ef7eb2e8f9f7 | 241 | u32DenominatorL = u32HDenominator&0xFF; |
<> | 144:ef7eb2e8f9f7 | 242 | u32DenominatorH = u32HDenominator>>8; |
<> | 144:ef7eb2e8f9f7 | 243 | ICAP->PKTSL = (ICAP->PKTSL & ~(CAP_PKTSL_PKTSHNL_Msk | CAP_PKTSL_PKTSHML_Msk)) |
<> | 144:ef7eb2e8f9f7 | 244 | | ((u32NumeratorL << 8)| u32DenominatorL); |
<> | 144:ef7eb2e8f9f7 | 245 | ICAP->PKTSM = (ICAP->PKTSM & ~(CAP_PKTSM_PKTSHNH_Msk | CAP_PKTSM_PKTSHMH_Msk)) |
<> | 144:ef7eb2e8f9f7 | 246 | | ((u32NumeratorH << 8) | u32DenominatorH); |
<> | 144:ef7eb2e8f9f7 | 247 | } |
<> | 144:ef7eb2e8f9f7 | 248 | |
<> | 144:ef7eb2e8f9f7 | 249 | /** |
<> | 144:ef7eb2e8f9f7 | 250 | * @brief Set Planar Scaling Vertical and Horizontal Factor Register |
<> | 144:ef7eb2e8f9f7 | 251 | * |
<> | 144:ef7eb2e8f9f7 | 252 | * @param[in] u32VNumerator: Planar Scaling Vertical Factor N. It should be 0 ~ FFFF. |
<> | 144:ef7eb2e8f9f7 | 253 | * |
<> | 144:ef7eb2e8f9f7 | 254 | * @param[in] u32VDenominator: Planar Scaling Vertical Factor M. It should be 0 ~ FFFF. |
<> | 144:ef7eb2e8f9f7 | 255 | * |
<> | 144:ef7eb2e8f9f7 | 256 | * @param[in] u32HNumerator: Planar Scaling Vertical Factor N. It should be 0 ~ FFFF. |
<> | 144:ef7eb2e8f9f7 | 257 | * |
<> | 144:ef7eb2e8f9f7 | 258 | * @param[in] u32HDenominator: Planar Scaling Vertical Factor M. It should be 0 ~ FFFF. |
<> | 144:ef7eb2e8f9f7 | 259 | * |
<> | 144:ef7eb2e8f9f7 | 260 | * @return None |
<> | 144:ef7eb2e8f9f7 | 261 | * |
<> | 144:ef7eb2e8f9f7 | 262 | */ |
<> | 144:ef7eb2e8f9f7 | 263 | void CAP_SetPlanarScaling(uint32_t u32VNumerator, uint32_t u32VDenominator, uint32_t u32HNumerator, uint32_t u32HDenominator) |
<> | 144:ef7eb2e8f9f7 | 264 | { |
<> | 144:ef7eb2e8f9f7 | 265 | uint32_t u32NumeratorL, u32NumeratorH; |
<> | 144:ef7eb2e8f9f7 | 266 | uint32_t u32DenominatorL, u32DenominatorH; |
<> | 144:ef7eb2e8f9f7 | 267 | |
<> | 144:ef7eb2e8f9f7 | 268 | u32NumeratorL = u32VNumerator&0xFF; |
<> | 144:ef7eb2e8f9f7 | 269 | u32NumeratorH = u32VNumerator>>8; |
<> | 144:ef7eb2e8f9f7 | 270 | u32DenominatorL = u32VDenominator&0xFF; |
<> | 144:ef7eb2e8f9f7 | 271 | u32DenominatorH = u32VDenominator>>8; |
<> | 144:ef7eb2e8f9f7 | 272 | ICAP->PLNSL = (ICAP->PLNSL & ~(CAP_PLNSL_PLNSVNL_Msk | CAP_PLNSL_PLNSVML_Msk)) |
<> | 144:ef7eb2e8f9f7 | 273 | | ((u32NumeratorL << 24)| (u32DenominatorL << 16)); |
<> | 144:ef7eb2e8f9f7 | 274 | ICAP->PLNSM = (ICAP->PLNSM & ~(CAP_PLNSM_PLNSVNH_Msk | CAP_PLNSM_PLNSVMH_Msk)) |
<> | 144:ef7eb2e8f9f7 | 275 | | ((u32NumeratorH << 24)| (u32DenominatorH << 16)); |
<> | 144:ef7eb2e8f9f7 | 276 | |
<> | 144:ef7eb2e8f9f7 | 277 | u32NumeratorL = u32HNumerator&0xFF; |
<> | 144:ef7eb2e8f9f7 | 278 | u32NumeratorH = u32HNumerator>>8; |
<> | 144:ef7eb2e8f9f7 | 279 | u32DenominatorL = u32HDenominator&0xFF; |
<> | 144:ef7eb2e8f9f7 | 280 | u32DenominatorH = u32HDenominator>>8; |
<> | 144:ef7eb2e8f9f7 | 281 | ICAP->PLNSL = (ICAP->PLNSL & ~(CAP_PLNSL_PLNSHNL_Msk | CAP_PLNSL_PLNSHML_Msk)) |
<> | 144:ef7eb2e8f9f7 | 282 | | ((u32NumeratorL << 8)| u32DenominatorL); |
<> | 144:ef7eb2e8f9f7 | 283 | ICAP->PLNSM = (ICAP->PLNSM & ~(CAP_PLNSM_PLNSHNH_Msk | CAP_PLNSM_PLNSHMH_Msk)) |
<> | 144:ef7eb2e8f9f7 | 284 | | ((u32NumeratorH << 8)| u32DenominatorH); |
<> | 144:ef7eb2e8f9f7 | 285 | } |
<> | 144:ef7eb2e8f9f7 | 286 | |
<> | 144:ef7eb2e8f9f7 | 287 | /** |
<> | 144:ef7eb2e8f9f7 | 288 | * @brief Set Packet Frame Output Pixel Stride Width. |
<> | 144:ef7eb2e8f9f7 | 289 | * |
<> | 144:ef7eb2e8f9f7 | 290 | * @param[in] u32Stride : set PKTSTRIDE register, It should be 0x0 ~ 0x3FFF |
<> | 144:ef7eb2e8f9f7 | 291 | * |
<> | 144:ef7eb2e8f9f7 | 292 | * @return None |
<> | 144:ef7eb2e8f9f7 | 293 | * |
<> | 144:ef7eb2e8f9f7 | 294 | * @details Set Packet Frame Output Pixel Stride Width |
<> | 144:ef7eb2e8f9f7 | 295 | */ |
<> | 144:ef7eb2e8f9f7 | 296 | void CAP_SetPacketStride(uint32_t u32Stride ) |
<> | 144:ef7eb2e8f9f7 | 297 | { |
<> | 144:ef7eb2e8f9f7 | 298 | ICAP->STRIDE = (ICAP->STRIDE & ~CAP_STRIDE_PKTSTRIDE_Msk) | u32Stride; |
<> | 144:ef7eb2e8f9f7 | 299 | } |
<> | 144:ef7eb2e8f9f7 | 300 | |
<> | 144:ef7eb2e8f9f7 | 301 | /** |
<> | 144:ef7eb2e8f9f7 | 302 | * @brief Set Planar Frame Output Pixel Stride Width. |
<> | 144:ef7eb2e8f9f7 | 303 | * |
<> | 144:ef7eb2e8f9f7 | 304 | * @param[in] u32Stride : set PLNSTRIDE register, It should be 0x0 ~ 0x3FFF |
<> | 144:ef7eb2e8f9f7 | 305 | * |
<> | 144:ef7eb2e8f9f7 | 306 | * @return None |
<> | 144:ef7eb2e8f9f7 | 307 | * |
<> | 144:ef7eb2e8f9f7 | 308 | * @details Set Planar Frame Output Pixel Stride Width |
<> | 144:ef7eb2e8f9f7 | 309 | */ |
<> | 144:ef7eb2e8f9f7 | 310 | void CAP_SetPlanarStride(uint32_t u32Stride ) |
<> | 144:ef7eb2e8f9f7 | 311 | { |
<> | 144:ef7eb2e8f9f7 | 312 | ICAP->STRIDE = (ICAP->STRIDE & ~CAP_STRIDE_PLNSTRIDE_Msk) | u32Stride<<CAP_STRIDE_PLNSTRIDE_Pos; |
<> | 144:ef7eb2e8f9f7 | 313 | } |
<> | 144:ef7eb2e8f9f7 | 314 | |
<> | 144:ef7eb2e8f9f7 | 315 | |
<> | 144:ef7eb2e8f9f7 | 316 | /** |
<> | 144:ef7eb2e8f9f7 | 317 | * @brief Enable Motion Detection Function |
<> | 144:ef7eb2e8f9f7 | 318 | * |
<> | 144:ef7eb2e8f9f7 | 319 | * @param[in] u32Freq: Motion Detection Detect Frequency. It should be 0x0 ~ 0x3. |
<> | 144:ef7eb2e8f9f7 | 320 | * |
<> | 144:ef7eb2e8f9f7 | 321 | * @param[in] u32BlockSize: Motion Detection Block Size |
<> | 144:ef7eb2e8f9f7 | 322 | * FALSE : 16x16 |
<> | 144:ef7eb2e8f9f7 | 323 | * TRUE : 8x8 |
<> | 144:ef7eb2e8f9f7 | 324 | * |
<> | 144:ef7eb2e8f9f7 | 325 | * @param[in] u32Format: Motion Detection Save Mode |
<> | 144:ef7eb2e8f9f7 | 326 | * FALSE : 1 bit DIFF + 7 Y Differential |
<> | 144:ef7eb2e8f9f7 | 327 | * TRUE : 1 bit DIFF only |
<> | 144:ef7eb2e8f9f7 | 328 | * |
<> | 144:ef7eb2e8f9f7 | 329 | * @param[in] u32Threshold: Motion Detection Detect Threshold. It should be 0x0 ~ 0x1F. |
<> | 144:ef7eb2e8f9f7 | 330 | * |
<> | 144:ef7eb2e8f9f7 | 331 | * @param[in] u32YDetAddr : Motion Detection Detect Temp Y Output Address |
<> | 144:ef7eb2e8f9f7 | 332 | * |
<> | 144:ef7eb2e8f9f7 | 333 | * @param[in] u32DetAddr: Motion Detection Detect Address |
<> | 144:ef7eb2e8f9f7 | 334 | * |
<> | 144:ef7eb2e8f9f7 | 335 | * @return None |
<> | 144:ef7eb2e8f9f7 | 336 | * |
<> | 144:ef7eb2e8f9f7 | 337 | * @details Set Planar Frame Output Pixel Stride Width |
<> | 144:ef7eb2e8f9f7 | 338 | */ |
<> | 144:ef7eb2e8f9f7 | 339 | void CAP_EnableMotionDet(uint32_t u32Freq, uint32_t u32BlockSize, uint32_t u32Format, uint32_t u32Threshold, uint32_t u32YDetAddr, uint32_t u32DetAddr) |
<> | 144:ef7eb2e8f9f7 | 340 | { |
<> | 144:ef7eb2e8f9f7 | 341 | ICAP->MD = (ICAP->MD & ~(CAP_MD_MDSM_Msk | CAP_MD_MDBS_Msk | CAP_MD_MDEN_Msk)) | |
<> | 144:ef7eb2e8f9f7 | 342 | ((CAP_MD_MDEN_Msk | (u32BlockSize?CAP_MD_MDBS_Msk:0)) | |
<> | 144:ef7eb2e8f9f7 | 343 | (u32Format?CAP_MD_MDSM_Msk:0)); |
<> | 144:ef7eb2e8f9f7 | 344 | |
<> | 144:ef7eb2e8f9f7 | 345 | ICAP->MD = (ICAP->MD & ~CAP_MD_MDDF_Msk) | (u32Freq<<CAP_MD_MDDF_Pos); |
<> | 144:ef7eb2e8f9f7 | 346 | ICAP->MD = (ICAP->MD & ~CAP_MD_MDTHR_Msk) | (u32Threshold<<CAP_MD_MDTHR_Pos); |
<> | 144:ef7eb2e8f9f7 | 347 | |
<> | 144:ef7eb2e8f9f7 | 348 | ICAP->MDYADDR = u32YDetAddr; |
<> | 144:ef7eb2e8f9f7 | 349 | ICAP->MDADDR = u32DetAddr; |
<> | 144:ef7eb2e8f9f7 | 350 | } |
<> | 144:ef7eb2e8f9f7 | 351 | |
<> | 144:ef7eb2e8f9f7 | 352 | /** |
<> | 144:ef7eb2e8f9f7 | 353 | * @brief Enable Motion Detection Function |
<> | 144:ef7eb2e8f9f7 | 354 | * |
<> | 144:ef7eb2e8f9f7 | 355 | * @return None |
<> | 144:ef7eb2e8f9f7 | 356 | * |
<> | 144:ef7eb2e8f9f7 | 357 | * @details Set Planar Frame Output Pixel Stride Width |
<> | 144:ef7eb2e8f9f7 | 358 | */ |
<> | 144:ef7eb2e8f9f7 | 359 | void CAP_DisableMotionDet(void) |
<> | 144:ef7eb2e8f9f7 | 360 | { |
<> | 144:ef7eb2e8f9f7 | 361 | ICAP->MD &= ~CAP_MD_MDEN_Msk; |
<> | 144:ef7eb2e8f9f7 | 362 | } |
<> | 144:ef7eb2e8f9f7 | 363 | |
<> | 144:ef7eb2e8f9f7 | 364 | /*@}*/ /* end of group NUC472_442_CAP_EXPORTED_FUNCTIONS */ |
<> | 144:ef7eb2e8f9f7 | 365 | |
<> | 144:ef7eb2e8f9f7 | 366 | /*@}*/ /* end of group NUC472_442_CAP_Driver */ |
<> | 144:ef7eb2e8f9f7 | 367 | |
<> | 144:ef7eb2e8f9f7 | 368 | /*@}*/ /* end of group NUC472_442_Device_Driver */ |
<> | 144:ef7eb2e8f9f7 | 369 | |
<> | 144:ef7eb2e8f9f7 | 370 | /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/ |