Fawwaz Nadzmy / mbed-STM

mbed library sources. Supersedes mbed-src.

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targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_pdma.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**************************************************************************//**
<> 149:156823d33999 2 * @file pdma.h
<> 149:156823d33999 3 * @version V1.00
<> 149:156823d33999 4 * $Revision: 15 $
<> 149:156823d33999 5 * $Date: 15/08/11 10:26a $
<> 149:156823d33999 6 * @brief M451 series PDMA driver header file
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * @note
<> 149:156823d33999 9 * Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
<> 149:156823d33999 10 *****************************************************************************/
<> 149:156823d33999 11 #ifndef __PDMA_H__
<> 149:156823d33999 12 #define __PDMA_H__
<> 149:156823d33999 13
<> 149:156823d33999 14 #ifdef __cplusplus
<> 149:156823d33999 15 extern "C"
<> 149:156823d33999 16 {
<> 149:156823d33999 17 #endif
<> 149:156823d33999 18
<> 149:156823d33999 19
<> 149:156823d33999 20 /** @addtogroup Standard_Driver Standard Driver
<> 149:156823d33999 21 @{
<> 149:156823d33999 22 */
<> 149:156823d33999 23
<> 149:156823d33999 24 /** @addtogroup PDMA_Driver PDMA Driver
<> 149:156823d33999 25 @{
<> 149:156823d33999 26 */
<> 149:156823d33999 27
<> 149:156823d33999 28 /** @addtogroup PDMA_EXPORTED_CONSTANTS PDMA Exported Constants
<> 149:156823d33999 29 @{
<> 149:156823d33999 30 */
<> 149:156823d33999 31 #define PDMA_CH_MAX 12 /*!< Specify Maximum Channels of PDMA \hideinitializer */
<> 149:156823d33999 32
<> 149:156823d33999 33 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 34 /* Operation Mode Constant Definitions */
<> 149:156823d33999 35 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 36 #define PDMA_OP_STOP 0x00000000UL /*!<DMA Stop Mode \hideinitializer */
<> 149:156823d33999 37 #define PDMA_OP_BASIC 0x00000001UL /*!<DMA Basic Mode \hideinitializer */
<> 149:156823d33999 38 #define PDMA_OP_SCATTER 0x00000002UL /*!<DMA Scatter-gather Mode \hideinitializer */
<> 149:156823d33999 39
<> 149:156823d33999 40 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 41 /* Data Width Constant Definitions */
<> 149:156823d33999 42 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 43 #define PDMA_WIDTH_8 0x00000000UL /*!<DMA Transfer Width 8-bit \hideinitializer */
<> 149:156823d33999 44 #define PDMA_WIDTH_16 0x00001000UL /*!<DMA Transfer Width 16-bit \hideinitializer */
<> 149:156823d33999 45 #define PDMA_WIDTH_32 0x00002000UL /*!<DMA Transfer Width 32-bit \hideinitializer */
<> 149:156823d33999 46
<> 149:156823d33999 47 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 48 /* Address Attribute Constant Definitions */
<> 149:156823d33999 49 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 50 #define PDMA_SAR_INC 0x00000000UL /*!<DMA SAR increment \hideinitializer */
<> 149:156823d33999 51 #define PDMA_SAR_FIX 0x00000300UL /*!<DMA SAR fix address \hideinitializer */
<> 149:156823d33999 52 #define PDMA_DAR_INC 0x00000000UL /*!<DMA DAR increment \hideinitializer */
<> 149:156823d33999 53 #define PDMA_DAR_FIX 0x00000C00UL /*!<DMA DAR fix address \hideinitializer */
<> 149:156823d33999 54
<> 149:156823d33999 55 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 56 /* Burst Mode Constant Definitions */
<> 149:156823d33999 57 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 58 #define PDMA_REQ_SINGLE 0x00000004UL /*!<DMA Single Request \hideinitializer */
<> 149:156823d33999 59 #define PDMA_REQ_BURST 0x00000000UL /*!<DMA Burst Request \hideinitializer */
<> 149:156823d33999 60
<> 149:156823d33999 61 #define PDMA_BURST_128 0x00000000UL /*!<DMA Burst 128 Transfers \hideinitializer */
<> 149:156823d33999 62 #define PDMA_BURST_64 0x00000010UL /*!<DMA Burst 64 Transfers \hideinitializer */
<> 149:156823d33999 63 #define PDMA_BURST_32 0x00000020UL /*!<DMA Burst 32 Transfers \hideinitializer */
<> 149:156823d33999 64 #define PDMA_BURST_16 0x00000030UL /*!<DMA Burst 16 Transfers \hideinitializer */
<> 149:156823d33999 65 #define PDMA_BURST_8 0x00000040UL /*!<DMA Burst 8 Transfers \hideinitializer */
<> 149:156823d33999 66 #define PDMA_BURST_4 0x00000050UL /*!<DMA Burst 4 Transfers \hideinitializer */
<> 149:156823d33999 67 #define PDMA_BURST_2 0x00000060UL /*!<DMA Burst 2 Transfers \hideinitializer */
<> 149:156823d33999 68 #define PDMA_BURST_1 0x00000070UL /*!<DMA Burst 1 Transfers \hideinitializer */
<> 149:156823d33999 69
<> 149:156823d33999 70 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 71 /* Peripheral Transfer Mode Constant Definitions */
<> 149:156823d33999 72 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 73 #define PDMA_SPI0_TX 0x00000001UL /*!<DMA Connect to SPI1 TX \hideinitializer */
<> 149:156823d33999 74 #define PDMA_SPI1_TX 0x00000002UL /*!<DMA Connect to SPI2 TX \hideinitializer */
<> 149:156823d33999 75 #define PDMA_SPI2_TX 0x00000003UL /*!<DMA Connect to SPI3 TX \hideinitializer */
<> 149:156823d33999 76 #define PDMA_UART0_TX 0x00000004UL /*!<DMA Connect to UART0 TX \hideinitializer */
<> 149:156823d33999 77 #define PDMA_UART1_TX 0x00000005UL /*!<DMA Connect to UART1 TX \hideinitializer */
<> 149:156823d33999 78 #define PDMA_UART2_TX 0x00000006UL /*!<DMA Connect to UART2 TX \hideinitializer */
<> 149:156823d33999 79 #define PDMA_UART3_TX 0x00000007UL /*!<DMA Connect to UART3 TX \hideinitializer */
<> 149:156823d33999 80 #define PDMA_DAC_TX 0x00000008UL /*!<DMA Connect to DAC TX \hideinitializer */
<> 149:156823d33999 81 #define PDMA_ADC_RX 0x00000009UL /*!<DMA Connect to ADC RX \hideinitializer */
<> 149:156823d33999 82 #define PDMA_PWM0_P1_RX 0x0000000BUL /*!<DMA Connect to PWM0 P1 RX \hideinitializer */
<> 149:156823d33999 83 #define PDMA_PWM0_P2_RX 0x0000000CUL /*!<DMA Connect to PWM0 P2 RX \hideinitializer */
<> 149:156823d33999 84 #define PDMA_PWM0_P3_RX 0x0000000DUL /*!<DMA Connect to PWM0 P3 RX \hideinitializer */
<> 149:156823d33999 85 #define PDMA_PWM1_P1_RX 0x0000000EUL /*!<DMA Connect to PWM1 P1 RX \hideinitializer */
<> 149:156823d33999 86 #define PDMA_PWM1_P2_RX 0x0000000FUL /*!<DMA Connect to PWM1 P2 RX \hideinitializer */
<> 149:156823d33999 87 #define PDMA_PWM1_P3_RX 0x00000010UL /*!<DMA Connect to PWM1 P3 RX \hideinitializer */
<> 149:156823d33999 88 #define PDMA_SPI0_RX 0x00000011UL /*!<DMA Connect to SPI0 RX \hideinitializer */
<> 149:156823d33999 89 #define PDMA_SPI1_RX 0x00000012UL /*!<DMA Connect to SPI1 RX \hideinitializer */
<> 149:156823d33999 90 #define PDMA_SPI2_RX 0x00000013UL /*!<DMA Connect to SPI2 RX \hideinitializer */
<> 149:156823d33999 91 #define PDMA_UART0_RX 0x00000014UL /*!<DMA Connect to UART0 RX \hideinitializer */
<> 149:156823d33999 92 #define PDMA_UART1_RX 0x00000015UL /*!<DMA Connect to UART1 RX \hideinitializer */
<> 149:156823d33999 93 #define PDMA_UART2_RX 0x00000016UL /*!<DMA Connect to UART2 RX \hideinitializer */
<> 149:156823d33999 94 #define PDMA_UART3_RX 0x00000017UL /*!<DMA Connect to UART3 RX \hideinitializer */
<> 149:156823d33999 95 #define PDMA_MEM 0x0000001FUL /*!<DMA Connect to Memory \hideinitializer */
<> 149:156823d33999 96
<> 149:156823d33999 97 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 98 /* Interrupt Type Constant Definitions */
<> 149:156823d33999 99 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 100 #define PDMA_INT_TRANS_DONE 0x00000000UL /*!<Transfer Done Interrupt \hideinitializer */
<> 149:156823d33999 101 #define PDMA_INT_TEMPTY 0x00000001UL /*!<Table Empty Interrupt \hideinitializer */
<> 149:156823d33999 102 #define PDMA_INT_TIMEOUT 0x00000002UL /*!<Timeout Interrupt(M45xD/M45xC Only) \hideinitializer */
<> 149:156823d33999 103
<> 149:156823d33999 104
<> 149:156823d33999 105 /*@}*/ /* end of group PDMA_EXPORTED_CONSTANTS */
<> 149:156823d33999 106
<> 149:156823d33999 107 /** @addtogroup PDMA_EXPORTED_FUNCTIONS PDMA Exported Functions
<> 149:156823d33999 108 @{
<> 149:156823d33999 109 */
<> 149:156823d33999 110
<> 149:156823d33999 111 /**
<> 149:156823d33999 112 * @brief Get PDMA Interrupt Status
<> 149:156823d33999 113 *
<> 149:156823d33999 114 * @param[in] None
<> 149:156823d33999 115 *
<> 149:156823d33999 116 * @return None
<> 149:156823d33999 117 *
<> 149:156823d33999 118 * @details This macro gets the interrupt status.
<> 149:156823d33999 119 */
<> 149:156823d33999 120 #define PDMA_GET_INT_STATUS() ((uint32_t)(PDMA->INTSTS))
<> 149:156823d33999 121
<> 149:156823d33999 122 /**
<> 149:156823d33999 123 * @brief Get Transfer Done Interrupt Status
<> 149:156823d33999 124 *
<> 149:156823d33999 125 * @param[in] None
<> 149:156823d33999 126 *
<> 149:156823d33999 127 * @return None
<> 149:156823d33999 128 *
<> 149:156823d33999 129 * @details Get the transfer done Interrupt status.
<> 149:156823d33999 130 */
<> 149:156823d33999 131 #define PDMA_GET_TD_STS() ((uint32_t)(PDMA->TDSTS))
<> 149:156823d33999 132
<> 149:156823d33999 133 /**
<> 149:156823d33999 134 * @brief Clear Transfer Done Interrupt Status
<> 149:156823d33999 135 *
<> 149:156823d33999 136 * @param[in] u32Mask The channel mask
<> 149:156823d33999 137 *
<> 149:156823d33999 138 * @return None
<> 149:156823d33999 139 *
<> 149:156823d33999 140 * @details Clear the transfer done Interrupt status.
<> 149:156823d33999 141 */
<> 149:156823d33999 142 #define PDMA_CLR_TD_FLAG(u32Mask) ((uint32_t)(PDMA->TDSTS = (u32Mask)))
<> 149:156823d33999 143
<> 149:156823d33999 144 /**
<> 149:156823d33999 145 * @brief Get Target Abort Interrupt Status
<> 149:156823d33999 146 *
<> 149:156823d33999 147 * @param[in] None
<> 149:156823d33999 148 *
<> 149:156823d33999 149 * @return None
<> 149:156823d33999 150 *
<> 149:156823d33999 151 * @details Get the target abort Interrupt status.
<> 149:156823d33999 152 */
<> 149:156823d33999 153 #define PDMA_GET_ABORT_STS() ((uint32_t)(PDMA->ABTSTS))
<> 149:156823d33999 154
<> 149:156823d33999 155 /**
<> 149:156823d33999 156 * @brief Clear Target Abort Interrupt Status
<> 149:156823d33999 157 *
<> 149:156823d33999 158 * @param[in] u32Mask The channel mask
<> 149:156823d33999 159 *
<> 149:156823d33999 160 * @return None
<> 149:156823d33999 161 *
<> 149:156823d33999 162 * @details Clear the target abort Interrupt status.
<> 149:156823d33999 163 */
<> 149:156823d33999 164 #define PDMA_CLR_ABORT_FLAG(u32Mask) ((uint32_t)(PDMA->ABTSTS = (u32Mask)))
<> 149:156823d33999 165
<> 149:156823d33999 166 /**
<> 149:156823d33999 167 * @brief Get Scatter-Gather Table Empty Interrupt Status
<> 149:156823d33999 168 *
<> 149:156823d33999 169 * @param[in] None
<> 149:156823d33999 170 *
<> 149:156823d33999 171 * @return None
<> 149:156823d33999 172 *
<> 149:156823d33999 173 * @details Get the scatter-gather table empty Interrupt status.
<> 149:156823d33999 174 */
<> 149:156823d33999 175 #define PDMA_GET_EMPTY_STS() ((uint32_t)(PDMA->SCATSTS))
<> 149:156823d33999 176
<> 149:156823d33999 177 /**
<> 149:156823d33999 178 * @brief Clear Scatter-Gather Table Empty Interrupt Status
<> 149:156823d33999 179 *
<> 149:156823d33999 180 * @param[in] u32Mask The channel mask
<> 149:156823d33999 181 *
<> 149:156823d33999 182 * @return None
<> 149:156823d33999 183 *
<> 149:156823d33999 184 * @details Clear the scatter-gather table empty Interrupt status.
<> 149:156823d33999 185 */
<> 149:156823d33999 186 #define PDMA_CLR_EMPTY_FLAG(u32Mask) ((uint32_t)(PDMA->SCATSTS = (u32Mask)))
<> 149:156823d33999 187
<> 149:156823d33999 188 /**
<> 149:156823d33999 189 * @brief Clear Timeout Interrupt Status
<> 149:156823d33999 190 *
<> 149:156823d33999 191 * @param[in] u32Ch The selected channel
<> 149:156823d33999 192 *
<> 149:156823d33999 193 * @return None
<> 149:156823d33999 194 *
<> 149:156823d33999 195 * @details Clear the selected channel timeout interrupt status.
<> 149:156823d33999 196 * @note This function is only supported in M45xD/M45xC.
<> 149:156823d33999 197 */
<> 149:156823d33999 198 #define PDMA_CLR_TMOUT_FLAG(u32Ch) ((uint32_t)(PDMA->INTSTS = (1 << ((u32Ch) + 8))))
<> 149:156823d33999 199
<> 149:156823d33999 200 /**
<> 149:156823d33999 201 * @brief Check Channel Status
<> 149:156823d33999 202 *
<> 149:156823d33999 203 * @param[in] u32Ch The selected channel
<> 149:156823d33999 204 *
<> 149:156823d33999 205 * @retval 0 Idle state
<> 149:156823d33999 206 * @retval 1 Busy state
<> 149:156823d33999 207 *
<> 149:156823d33999 208 * @details Check the selected channel is busy or not.
<> 149:156823d33999 209 */
<> 149:156823d33999 210 #define PDMA_IS_CH_BUSY(u32Ch) ((uint32_t)(PDMA->TRGSTS & (1 << (u32Ch)))? 1 : 0)
<> 149:156823d33999 211
<> 149:156823d33999 212 /**
<> 149:156823d33999 213 * @brief Set Source Address
<> 149:156823d33999 214 *
<> 149:156823d33999 215 * @param[in] u32Ch The selected channel
<> 149:156823d33999 216 * @param[in] u32Addr The selected address
<> 149:156823d33999 217 *
<> 149:156823d33999 218 * @return None
<> 149:156823d33999 219 *
<> 149:156823d33999 220 * @details This macro set the selected channel source address.
<> 149:156823d33999 221 */
<> 149:156823d33999 222 #define PDMA_SET_SRC_ADDR(u32Ch, u32Addr) ((uint32_t)(PDMA->DSCT[(u32Ch)].SA = (u32Addr)))
<> 149:156823d33999 223
<> 149:156823d33999 224 /**
<> 149:156823d33999 225 * @brief Set Destination Address
<> 149:156823d33999 226 *
<> 149:156823d33999 227 * @param[in] u32Ch The selected channel
<> 149:156823d33999 228 * @param[in] u32Addr The selected address
<> 149:156823d33999 229 *
<> 149:156823d33999 230 * @return None
<> 149:156823d33999 231 *
<> 149:156823d33999 232 * @details This macro set the selected channel destination address.
<> 149:156823d33999 233 */
<> 149:156823d33999 234 #define PDMA_SET_DST_ADDR(u32Ch, u32Addr) ((uint32_t)(PDMA->DSCT[(u32Ch)].DA = (u32Addr)))
<> 149:156823d33999 235
<> 149:156823d33999 236 /**
<> 149:156823d33999 237 * @brief Set Transfer Count
<> 149:156823d33999 238 *
<> 149:156823d33999 239 * @param[in] u32Ch The selected channel
<> 149:156823d33999 240 * @param[in] u32TransCount Transfer Count
<> 149:156823d33999 241 *
<> 149:156823d33999 242 * @return None
<> 149:156823d33999 243 *
<> 149:156823d33999 244 * @details This macro set the selected channel transfer count.
<> 149:156823d33999 245 */
<> 149:156823d33999 246 #define PDMA_SET_TRANS_CNT(u32Ch, u32TransCount) ((uint32_t)(PDMA->DSCT[(u32Ch)].CTL=(PDMA->DSCT[(u32Ch)].CTL&~PDMA_DSCT_CTL_TXCNT_Msk)|((u32TransCount-1) << PDMA_DSCT_CTL_TXCNT_Pos)))
<> 149:156823d33999 247
<> 149:156823d33999 248 /**
<> 149:156823d33999 249 * @brief Set Scatter-gather descriptor Address
<> 149:156823d33999 250 *
<> 149:156823d33999 251 * @param[in] u32Ch The selected channel
<> 149:156823d33999 252 * @param[in] u32Addr The descriptor address
<> 149:156823d33999 253 *
<> 149:156823d33999 254 * @return None
<> 149:156823d33999 255 *
<> 149:156823d33999 256 * @details This macro set the selected channel scatter-gather descriptor address.
<> 149:156823d33999 257 */
<> 149:156823d33999 258 #define PDMA_SET_SCATTER_DESC(u32Ch, u32Addr) ((uint32_t)(PDMA->DSCT[(u32Ch)].NEXT = (u32Addr) - (PDMA->SCATBA)))
<> 149:156823d33999 259
<> 149:156823d33999 260 /**
<> 149:156823d33999 261 * @brief Stop the channel
<> 149:156823d33999 262 *
<> 149:156823d33999 263 * @param[in] u32Ch The selected channel
<> 149:156823d33999 264 *
<> 149:156823d33999 265 * @return None
<> 149:156823d33999 266 *
<> 149:156823d33999 267 * @details This macro stop the selected channel.
<> 149:156823d33999 268 */
<> 149:156823d33999 269 #define PDMA_STOP(u32Ch) ((uint32_t)(PDMA->STOP = (1 << (u32Ch))))
<> 149:156823d33999 270
<> 149:156823d33999 271 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 272 /* Define PWM functions prototype */
<> 149:156823d33999 273 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 274 void PDMA_Open(uint32_t u32Mask);
<> 149:156823d33999 275 void PDMA_Close(void);
<> 149:156823d33999 276 void PDMA_SetTransferCnt(uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount);
<> 149:156823d33999 277 void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl);
<> 149:156823d33999 278 void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr);
<> 149:156823d33999 279 void PDMA_SetBurstType(uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize);
<> 149:156823d33999 280 void PDMA_EnableTimeout(uint32_t u32Mask);
<> 149:156823d33999 281 void PDMA_DisableTimeout(uint32_t u32Mask);
<> 149:156823d33999 282 void PDMA_SetTimeOut(uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt);
<> 149:156823d33999 283 void PDMA_Trigger(uint32_t u32Ch);
<> 149:156823d33999 284 void PDMA_EnableInt(uint32_t u32Ch, uint32_t u32Mask);
<> 149:156823d33999 285 void PDMA_DisableInt(uint32_t u32Ch, uint32_t u32Mask);
<> 149:156823d33999 286
<> 149:156823d33999 287
<> 149:156823d33999 288 /*@}*/ /* end of group PDMA_EXPORTED_FUNCTIONS */
<> 149:156823d33999 289
<> 149:156823d33999 290 /*@}*/ /* end of group PDMA_Driver */
<> 149:156823d33999 291
<> 149:156823d33999 292 /*@}*/ /* end of group Standard_Driver */
<> 149:156823d33999 293
<> 149:156823d33999 294 #ifdef __cplusplus
<> 149:156823d33999 295 }
<> 149:156823d33999 296 #endif
<> 149:156823d33999 297
<> 149:156823d33999 298 #endif //__PDMA_H__
<> 149:156823d33999 299
<> 149:156823d33999 300 /*** (C) COPYRIGHT 2014~2015 Nuvoton Technology Corp. ***/