Fawwaz Nadzmy / mbed-STM

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_i2c.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**************************************************************************//**
<> 149:156823d33999 2 * @file I2C.h
<> 149:156823d33999 3 * @version V3.0
<> 149:156823d33999 4 * $Revision: 19 $
<> 149:156823d33999 5 * $Date: 15/08/11 10:26a $
<> 149:156823d33999 6 * @brief M451 Series I2C Driver Header File
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * @note
<> 149:156823d33999 9 * Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
<> 149:156823d33999 10 *
<> 149:156823d33999 11 ******************************************************************************/
<> 149:156823d33999 12 #ifndef __I2C_H__
<> 149:156823d33999 13 #define __I2C_H__
<> 149:156823d33999 14
<> 149:156823d33999 15 #include "M451Series.h"
<> 149:156823d33999 16
<> 149:156823d33999 17 #ifdef __cplusplus
<> 149:156823d33999 18 extern "C"
<> 149:156823d33999 19 {
<> 149:156823d33999 20 #endif
<> 149:156823d33999 21
<> 149:156823d33999 22
<> 149:156823d33999 23 /** @addtogroup Standard_Driver Standard Driver
<> 149:156823d33999 24 @{
<> 149:156823d33999 25 */
<> 149:156823d33999 26
<> 149:156823d33999 27 /** @addtogroup I2C_Driver I2C Driver
<> 149:156823d33999 28 @{
<> 149:156823d33999 29 */
<> 149:156823d33999 30
<> 149:156823d33999 31 /** @addtogroup I2C_EXPORTED_CONSTANTS I2C Exported Constants
<> 149:156823d33999 32 @{
<> 149:156823d33999 33 */
<> 149:156823d33999 34
<> 149:156823d33999 35 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 36 /* I2C_CTL constant definitions. */
<> 149:156823d33999 37 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 38 #define I2C_CTL_STA_STO_SI 0x38UL /*!< I2C_CTL setting for I2C control bits. It would set STA, STO and SI bits */
<> 149:156823d33999 39 #define I2C_CTL_STA_STO_SI_AA 0x3CUL /*!< I2C_CTL setting for I2C control bits. It would set STA, STO, SI and AA bits */
<> 149:156823d33999 40 #define I2C_CTL_STA_SI 0x28UL /*!< I2C_CTL setting for I2C control bits. It would set STA and SI bits */
<> 149:156823d33999 41 #define I2C_CTL_STA_SI_AA 0x2CUL /*!< I2C_CTL setting for I2C control bits. It would set STA, SI and AA bits */
<> 149:156823d33999 42 #define I2C_CTL_STO_SI 0x18UL /*!< I2C_CTL setting for I2C control bits. It would set STO and SI bits */
<> 149:156823d33999 43 #define I2C_CTL_STO_SI_AA 0x1CUL /*!< I2C_CTL setting for I2C control bits. It would set STO, SI and AA bits */
<> 149:156823d33999 44 #define I2C_CTL_SI 0x08UL /*!< I2C_CTL setting for I2C control bits. It would set SI bit */
<> 149:156823d33999 45 #define I2C_CTL_SI_AA 0x0CUL /*!< I2C_CTL setting for I2C control bits. It would set SI and AA bits */
<> 149:156823d33999 46 #define I2C_CTL_STA 0x20UL /*!< I2C_CTL setting for I2C control bits. It would set STA bit */
<> 149:156823d33999 47 #define I2C_CTL_STO 0x10UL /*!< I2C_CTL setting for I2C control bits. It would set STO bit */
<> 149:156823d33999 48 #define I2C_CTL_AA 0x04UL /*!< I2C_CTL setting for I2C control bits. It would set AA bit */
<> 149:156823d33999 49
<> 149:156823d33999 50 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 51 /* I2C GCMode constant definitions. */
<> 149:156823d33999 52 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 53 #define I2C_GCMODE_ENABLE 1 /*!< Enable I2C GC Mode */
<> 149:156823d33999 54 #define I2C_GCMODE_DISABLE 0 /*!< Disable I2C GC Mode */
<> 149:156823d33999 55
<> 149:156823d33999 56 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 57 /* I2C SMBUS constant definitions. */
<> 149:156823d33999 58 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 59 #define I2C_SMBH_ENABLE 1 /*!< Enable SMBus Host Mode enable */
<> 149:156823d33999 60 #define I2C_SMBD_ENABLE 0 /*!< Enable SMBus Device Mode enable */
<> 149:156823d33999 61 #define I2C_PECTX_ENABLE 1 /*!< Enable SMBus Packet Error Check Transmit function */
<> 149:156823d33999 62 #define I2C_PECTX_DISABLE 0 /*!< Disable SMBus Packet Error Check Transmit function */
<> 149:156823d33999 63
<> 149:156823d33999 64 /*@}*/ /* end of group I2C_EXPORTED_CONSTANTS */
<> 149:156823d33999 65
<> 149:156823d33999 66 /** @addtogroup I2C_EXPORTED_FUNCTIONS I2C Exported Functions
<> 149:156823d33999 67 @{
<> 149:156823d33999 68 */
<> 149:156823d33999 69 /**
<> 149:156823d33999 70 * @brief The macro is used to set I2C bus condition at One Time
<> 149:156823d33999 71 *
<> 149:156823d33999 72 * @param[in] i2c Specify I2C port
<> 149:156823d33999 73 * @param[in] u8Ctrl A byte writes to I2C control register
<> 149:156823d33999 74 *
<> 149:156823d33999 75 * @return None
<> 149:156823d33999 76 *
<> 149:156823d33999 77 * @details Set I2C_CTL register to control I2C bus conditions of START, STOP, SI, ACK.
<> 149:156823d33999 78 */
<> 149:156823d33999 79 #define I2C_SET_CONTROL_REG(i2c, u8Ctrl) ((i2c)->CTL = ((i2c)->CTL & ~0x3c) | (u8Ctrl))
<> 149:156823d33999 80
<> 149:156823d33999 81 /**
<> 149:156823d33999 82 * @brief The macro is used to set START condition of I2C Bus
<> 149:156823d33999 83 *
<> 149:156823d33999 84 * @param[in] i2c Specify I2C port
<> 149:156823d33999 85 *
<> 149:156823d33999 86 * @return None
<> 149:156823d33999 87 *
<> 149:156823d33999 88 * @details Set the I2C bus START condition in I2C_CTL register.
<> 149:156823d33999 89 */
<> 149:156823d33999 90 #define I2C_START(i2c) ((i2c)->CTL = ((i2c)->CTL & ~I2C_CTL_SI_Msk) | I2C_CTL_STA_Msk)
<> 149:156823d33999 91
<> 149:156823d33999 92 /**
<> 149:156823d33999 93 * @brief The macro is used to wait I2C bus status get ready
<> 149:156823d33999 94 *
<> 149:156823d33999 95 * @param[in] i2c Specify I2C port
<> 149:156823d33999 96 *
<> 149:156823d33999 97 * @return None
<> 149:156823d33999 98 *
<> 149:156823d33999 99 * @details When a new status is presented of I2C bus, the SI flag will be set in I2C_CTL register.
<> 149:156823d33999 100 */
<> 149:156823d33999 101 #define I2C_WAIT_READY(i2c) while(!((i2c)->CTL & I2C_CTL_SI_Msk))
<> 149:156823d33999 102
<> 149:156823d33999 103 /**
<> 149:156823d33999 104 * @brief The macro is used to Read I2C Bus Data Register
<> 149:156823d33999 105 *
<> 149:156823d33999 106 * @param[in] i2c Specify I2C port
<> 149:156823d33999 107 *
<> 149:156823d33999 108 * @return A byte of I2C data register
<> 149:156823d33999 109 *
<> 149:156823d33999 110 * @details I2C controller read data from bus and save it in I2CDAT register.
<> 149:156823d33999 111 */
<> 149:156823d33999 112 #define I2C_GET_DATA(i2c) ((i2c)->DAT)
<> 149:156823d33999 113
<> 149:156823d33999 114 /**
<> 149:156823d33999 115 * @brief Write a Data to I2C Data Register
<> 149:156823d33999 116 *
<> 149:156823d33999 117 * @param[in] i2c Specify I2C port
<> 149:156823d33999 118 * @param[in] u8Data A byte that writes to data register
<> 149:156823d33999 119 *
<> 149:156823d33999 120 * @return None
<> 149:156823d33999 121 *
<> 149:156823d33999 122 * @details When write a data to I2C_DAT register, the I2C controller will shift it to I2C bus.
<> 149:156823d33999 123 */
<> 149:156823d33999 124 #define I2C_SET_DATA(i2c, u8Data) ((i2c)->DAT = (u8Data))
<> 149:156823d33999 125
<> 149:156823d33999 126 /**
<> 149:156823d33999 127 * @brief Get I2C Bus status code
<> 149:156823d33999 128 *
<> 149:156823d33999 129 * @param[in] i2c Specify I2C port
<> 149:156823d33999 130 *
<> 149:156823d33999 131 * @return I2C status code
<> 149:156823d33999 132 *
<> 149:156823d33999 133 * @details To get this status code to monitor I2C bus event.
<> 149:156823d33999 134 */
<> 149:156823d33999 135 #define I2C_GET_STATUS(i2c) ((i2c)->STATUS)
<> 149:156823d33999 136
<> 149:156823d33999 137 /**
<> 149:156823d33999 138 * @brief Get Time-out flag from I2C Bus
<> 149:156823d33999 139 *
<> 149:156823d33999 140 * @param[in] i2c Specify I2C port
<> 149:156823d33999 141 *
<> 149:156823d33999 142 * @retval 0 I2C Bus time-out is not happened
<> 149:156823d33999 143 * @retval 1 I2C Bus time-out is happened
<> 149:156823d33999 144 *
<> 149:156823d33999 145 * @details When I2C bus occurs time-out event, the time-out flag will be set.
<> 149:156823d33999 146 */
<> 149:156823d33999 147 #define I2C_GET_TIMEOUT_FLAG(i2c) ( ((i2c)->TOCTL & I2C_TOCTL_TOIF_Msk) == I2C_TOCTL_TOIF_Msk ? 1:0 )
<> 149:156823d33999 148
<> 149:156823d33999 149 /**
<> 149:156823d33999 150 * @brief To get wake-up flag from I2C Bus
<> 149:156823d33999 151 *
<> 149:156823d33999 152 * @param[in] i2c Specify I2C port
<> 149:156823d33999 153 *
<> 149:156823d33999 154 * @retval 0 Chip is not woken-up from power-down mode
<> 149:156823d33999 155 * @retval 1 Chip is woken-up from power-down mode
<> 149:156823d33999 156 *
<> 149:156823d33999 157 * @details I2C bus occurs wake-up event, wake-up flag will be set.
<> 149:156823d33999 158 */
<> 149:156823d33999 159 #define I2C_GET_WAKEUP_FLAG(i2c) ( ((i2c)->WKSTS & I2C_WKSTS_WKIF_Msk) == I2C_WKSTS_WKIF_Msk ? 1:0 )
<> 149:156823d33999 160
<> 149:156823d33999 161 /**
<> 149:156823d33999 162 * @brief To clear wake-up flag
<> 149:156823d33999 163 *
<> 149:156823d33999 164 * @param[in] i2c Specify I2C port
<> 149:156823d33999 165 *
<> 149:156823d33999 166 * @return None
<> 149:156823d33999 167 *
<> 149:156823d33999 168 * @details If wake-up flag is set, use this macro to clear it.
<> 149:156823d33999 169 */
<> 149:156823d33999 170 #define I2C_CLEAR_WAKEUP_FLAG(i2c) ((i2c)->WKSTS = I2C_WKSTS_WKIF_Msk)
<> 149:156823d33999 171
<> 149:156823d33999 172 /**
<> 149:156823d33999 173 * @brief To get SMBus Status
<> 149:156823d33999 174 *
<> 149:156823d33999 175 * @param[in] i2c Specify I2C port
<> 149:156823d33999 176 *
<> 149:156823d33999 177 * @return SMBus status
<> 149:156823d33999 178 *
<> 149:156823d33999 179 * @details To get the Bus Management status of I2C_BUSSTS register
<> 149:156823d33999 180 *
<> 149:156823d33999 181 */
<> 149:156823d33999 182 #define I2C_SMBUS_GET_STATUS(i2c) ((i2c)->BUSSTS)
<> 149:156823d33999 183
<> 149:156823d33999 184 /**
<> 149:156823d33999 185 * @brief Get SMBus CRC value
<> 149:156823d33999 186 *
<> 149:156823d33999 187 * @param[in] i2c Specify I2C port
<> 149:156823d33999 188 *
<> 149:156823d33999 189 * @return Packet error check byte value
<> 149:156823d33999 190 *
<> 149:156823d33999 191 * @details The CRC check value after a transmission or a reception by count by using CRC8
<> 149:156823d33999 192 *
<> 149:156823d33999 193 */
<> 149:156823d33999 194 #define I2C_SMBUS_GET_PEC_VALUE(i2c) ((i2c)->PKTCRC)
<> 149:156823d33999 195
<> 149:156823d33999 196 /**
<> 149:156823d33999 197 * @brief Set SMBus Bytes number of Transmission or reception
<> 149:156823d33999 198 *
<> 149:156823d33999 199 * @param[in] i2c Specify I2C port
<> 149:156823d33999 200 * @param[in] u32PktSize Transmit / Receive bytes
<> 149:156823d33999 201 *
<> 149:156823d33999 202 * @return None
<> 149:156823d33999 203 *
<> 149:156823d33999 204 * @details The transmission or receive byte number in one transaction when PECEN is set. The maximum is 255 bytes.
<> 149:156823d33999 205 *
<> 149:156823d33999 206 */
<> 149:156823d33999 207 #define I2C_SMBUS_SET_PACKET_BYTE_COUNT(i2c, u32PktSize) ((i2c)->PKTSIZE = (u32PktSize))
<> 149:156823d33999 208
<> 149:156823d33999 209 /**
<> 149:156823d33999 210 * @brief Enable SMBus Alert function
<> 149:156823d33999 211 *
<> 149:156823d33999 212 * @param[in] i2c Specify I2C port
<> 149:156823d33999 213 *
<> 149:156823d33999 214 * @return None
<> 149:156823d33999 215 *
<> 149:156823d33999 216 * @details Device Mode(BMHEN=0): If ALERTEN(I2C_BUSCTL[4]) is set, the Alert pin will pull lo, and reply ACK when get ARP from host
<> 149:156823d33999 217 * Host Mode(BMHEN=1): If ALERTEN(I2C_BUSCTL[4]) is set, the Alert pin is supported to receive alert state(Lo trigger)
<> 149:156823d33999 218 *
<> 149:156823d33999 219 */
<> 149:156823d33999 220 #define I2C_SMBUS_ENABLE_ALERT(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_ALERTEN_Msk)
<> 149:156823d33999 221
<> 149:156823d33999 222 /**
<> 149:156823d33999 223 * @brief Disable SMBus Alert pin function
<> 149:156823d33999 224 *
<> 149:156823d33999 225 * @param[in] i2c Specify I2C port
<> 149:156823d33999 226 *
<> 149:156823d33999 227 * @return None
<> 149:156823d33999 228 *
<> 149:156823d33999 229 * @details Device Mode(BMHEN=0): If ALERTEN(I2C_BUSCTL[4]) is clear, the Alert pin will pull hi, and reply NACK when get ARP from host
<> 149:156823d33999 230 * Host Mode(BMHEN=1): If ALERTEN(I2C_BUSCTL[4]) is clear, the Alert pin is not supported to receive alert state(Lo trigger)
<> 149:156823d33999 231 *
<> 149:156823d33999 232 */
<> 149:156823d33999 233 #define I2C_SMBUS_DISABLE_ALERT(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_ALERTEN_Msk)
<> 149:156823d33999 234
<> 149:156823d33999 235 /**
<> 149:156823d33999 236 * @brief Set SMBus SUSCON pin is output mode
<> 149:156823d33999 237 *
<> 149:156823d33999 238 * @param[in] i2c Specify I2C port
<> 149:156823d33999 239 *
<> 149:156823d33999 240 * @return None
<> 149:156823d33999 241 *
<> 149:156823d33999 242 * @details This function to set SUSCON(I2C_BUSCTL[6]) pin is output mode.
<> 149:156823d33999 243 *
<> 149:156823d33999 244 *
<> 149:156823d33999 245 */
<> 149:156823d33999 246 #define I2C_SMBUS_SET_SUSCON_OUT(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_SCTLOEN_Msk)
<> 149:156823d33999 247
<> 149:156823d33999 248 /**
<> 149:156823d33999 249 * @brief Set SMBus SUSCON pin is input mode
<> 149:156823d33999 250 *
<> 149:156823d33999 251 * @param[in] i2c Specify I2C port
<> 149:156823d33999 252 *
<> 149:156823d33999 253 * @return None
<> 149:156823d33999 254 *
<> 149:156823d33999 255 * @details This function to set SUSCON(I2C_BUSCTL[6]) pin is input mode.
<> 149:156823d33999 256 *
<> 149:156823d33999 257 *
<> 149:156823d33999 258 */
<> 149:156823d33999 259 #define I2C_SMBUS_SET_SUSCON_IN(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_SCTLOEN_Msk)
<> 149:156823d33999 260
<> 149:156823d33999 261 /**
<> 149:156823d33999 262 * @brief Set SMBus SUSCON pin output high state
<> 149:156823d33999 263 *
<> 149:156823d33999 264 * @param[in] i2c Specify I2C port
<> 149:156823d33999 265 *
<> 149:156823d33999 266 * @return None
<> 149:156823d33999 267 *
<> 149:156823d33999 268 * @details This function to set SUSCON(I2C_BUSCTL[6]) pin is output hi state.
<> 149:156823d33999 269 *
<> 149:156823d33999 270 */
<> 149:156823d33999 271 #define I2C_SMBUS_SET_SUSCON_HIGH(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_SCTLOSTS_Msk)
<> 149:156823d33999 272
<> 149:156823d33999 273
<> 149:156823d33999 274 /**
<> 149:156823d33999 275 * @brief Set SMBus SUSCON pin output low state
<> 149:156823d33999 276 *
<> 149:156823d33999 277 * @param[in] i2c Specify I2C port
<> 149:156823d33999 278 *
<> 149:156823d33999 279 * @return None
<> 149:156823d33999 280 *
<> 149:156823d33999 281 * @details This function to set SUSCON(I2C_BUSCTL[6]) pin is output lo state.
<> 149:156823d33999 282 *
<> 149:156823d33999 283 */
<> 149:156823d33999 284 #define I2C_SMBUS_SET_SUSCON_LOW(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_SCTLOSTS_Msk)
<> 149:156823d33999 285
<> 149:156823d33999 286 /**
<> 149:156823d33999 287 * @brief Enable SMBus Acknowledge control by manual
<> 149:156823d33999 288 *
<> 149:156823d33999 289 * @param[in] i2c Specify I2C port
<> 149:156823d33999 290 *
<> 149:156823d33999 291 * @return None
<> 149:156823d33999 292 *
<> 149:156823d33999 293 * @details The 9th bit can response the ACK or NACK according the received data by user. When the byte is received, SCLK line stretching to low between the 8th and 9th SCLK pulse.
<> 149:156823d33999 294 *
<> 149:156823d33999 295 */
<> 149:156823d33999 296 #define I2C_SMBUS_ACK_MANUAL(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_ACKMEN_Msk)
<> 149:156823d33999 297
<> 149:156823d33999 298 /**
<> 149:156823d33999 299 * @brief Disable SMBus Acknowledge control by manual
<> 149:156823d33999 300 *
<> 149:156823d33999 301 * @param[in] i2c Specify I2C port
<> 149:156823d33999 302 *
<> 149:156823d33999 303 * @return None
<> 149:156823d33999 304 *
<> 149:156823d33999 305 * @details Disable acknowledge response control by user.
<> 149:156823d33999 306 *
<> 149:156823d33999 307 */
<> 149:156823d33999 308 #define I2C_SMBUS_ACK_AUTO(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_ACKMEN_Msk)
<> 149:156823d33999 309
<> 149:156823d33999 310 /**
<> 149:156823d33999 311 * @brief Enable SMBus Acknowledge manual interrupt
<> 149:156823d33999 312 *
<> 149:156823d33999 313 * @param[in] i2c Specify I2C port
<> 149:156823d33999 314 *
<> 149:156823d33999 315 * @return None
<> 149:156823d33999 316 *
<> 149:156823d33999 317 * @details This function is used to enable SMBUS acknowledge manual interrupt on the 9th clock cycle when SMBUS=1 and ACKMEN=1
<> 149:156823d33999 318 *
<> 149:156823d33999 319 */
<> 149:156823d33999 320 #define I2C_SMBUS_9THBIT_INT_ENABLE(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_ACKM9SI_Msk)
<> 149:156823d33999 321
<> 149:156823d33999 322 /**
<> 149:156823d33999 323 * @brief Disable SMBus Acknowledge manual interrupt
<> 149:156823d33999 324 *
<> 149:156823d33999 325 * @param[in] i2c Specify I2C port
<> 149:156823d33999 326 *
<> 149:156823d33999 327 * @return None
<> 149:156823d33999 328 *
<> 149:156823d33999 329 * @details This function is used to disable SMBUS acknowledge manual interrupt on the 9th clock cycle when SMBUS=1 and ACKMEN=1
<> 149:156823d33999 330 *
<> 149:156823d33999 331 */
<> 149:156823d33999 332 #define I2C_SMBUS_9THBIT_INT_DISABLE(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_ACKM9SI_Msk)
<> 149:156823d33999 333
<> 149:156823d33999 334 /**
<> 149:156823d33999 335 * @brief Enable SMBus PEC clear at REPEAT START
<> 149:156823d33999 336 *
<> 149:156823d33999 337 * @param[in] i2c Specify I2C port
<> 149:156823d33999 338 *
<> 149:156823d33999 339 * @return None
<> 149:156823d33999 340 *
<> 149:156823d33999 341 * @details This function is used to enable the condition of REAEAT START can clear the PEC calculation.
<> 149:156823d33999 342 *
<> 149:156823d33999 343 */
<> 149:156823d33999 344 #define I2C_SMBUS_RST_PEC_AT_START_ENABLE(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_PECCLR_Msk)
<> 149:156823d33999 345
<> 149:156823d33999 346 /**
<> 149:156823d33999 347 * @brief Disable SMBus PEC clear at Repeat START
<> 149:156823d33999 348 *
<> 149:156823d33999 349 * @param[in] i2c Specify I2C port
<> 149:156823d33999 350 *
<> 149:156823d33999 351 * @return None
<> 149:156823d33999 352 *
<> 149:156823d33999 353 * @details This function is used to disable the condition of Repeat START can clear the PEC calculation.
<> 149:156823d33999 354 *
<> 149:156823d33999 355 */
<> 149:156823d33999 356 #define I2C_SMBUS_RST_PEC_AT_START_DISABLE(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_PECCLR_Msk)
<> 149:156823d33999 357
<> 149:156823d33999 358 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 359 /* inline functions */
<> 149:156823d33999 360 /*---------------------------------------------------------------------------------------------------------*/
<> 149:156823d33999 361 /**
<> 149:156823d33999 362 * @brief The macro is used to set STOP condition of I2C Bus
<> 149:156823d33999 363 *
<> 149:156823d33999 364 * @param[in] i2c Specify I2C port
<> 149:156823d33999 365 *
<> 149:156823d33999 366 * @return None
<> 149:156823d33999 367 *
<> 149:156823d33999 368 * @details Set the I2C bus STOP condition in I2C_CTL register.
<> 149:156823d33999 369 */
<> 149:156823d33999 370 static __INLINE void I2C_STOP(I2C_T *i2c)
<> 149:156823d33999 371 {
<> 149:156823d33999 372
<> 149:156823d33999 373 (i2c)->CTL |= (I2C_CTL_SI_Msk | I2C_CTL_STO_Msk);
<> 149:156823d33999 374 while(i2c->CTL & I2C_CTL_STO_Msk);
<> 149:156823d33999 375 }
<> 149:156823d33999 376
<> 149:156823d33999 377 void I2C_ClearTimeoutFlag(I2C_T *i2c);
<> 149:156823d33999 378 void I2C_Close(I2C_T *i2c);
<> 149:156823d33999 379 void I2C_Trigger(I2C_T *i2c, uint8_t u8Start, uint8_t u8Stop, uint8_t u8Si, uint8_t u8Ack);
<> 149:156823d33999 380 void I2C_DisableInt(I2C_T *i2c);
<> 149:156823d33999 381 void I2C_EnableInt(I2C_T *i2c);
<> 149:156823d33999 382 uint32_t I2C_GetBusClockFreq(I2C_T *i2c);
<> 149:156823d33999 383 uint32_t I2C_GetIntFlag(I2C_T *i2c);
<> 149:156823d33999 384 uint32_t I2C_GetStatus(I2C_T *i2c);
<> 149:156823d33999 385 uint32_t I2C_Open(I2C_T *i2c, uint32_t u32BusClock);
<> 149:156823d33999 386 uint8_t I2C_GetData(I2C_T *i2c);
<> 149:156823d33999 387 void I2C_SetSlaveAddr(I2C_T *i2c, uint8_t u8SlaveNo, uint8_t u8SlaveAddr, uint8_t u8GCMode);
<> 149:156823d33999 388 void I2C_SetSlaveAddrMask(I2C_T *i2c, uint8_t u8SlaveNo, uint8_t u8SlaveAddrMask);
<> 149:156823d33999 389 uint32_t I2C_SetBusClockFreq(I2C_T *i2c, uint32_t u32BusClock);
<> 149:156823d33999 390 void I2C_EnableTimeout(I2C_T *i2c, uint8_t u8LongTimeout);
<> 149:156823d33999 391 void I2C_DisableTimeout(I2C_T *i2c);
<> 149:156823d33999 392 void I2C_EnableWakeup(I2C_T *i2c);
<> 149:156823d33999 393 void I2C_DisableWakeup(I2C_T *i2c);
<> 149:156823d33999 394 void I2C_SetData(I2C_T *i2c, uint8_t u8Data);
<> 149:156823d33999 395
<> 149:156823d33999 396 uint32_t I2C_SMBusGetStatus(I2C_T *i2c);
<> 149:156823d33999 397 void I2C_SMBusClearInterruptFlag(I2C_T *i2c, uint8_t u8ClrSMBusIntFlag);
<> 149:156823d33999 398 void I2C_SMBusSetPacketByteCount(I2C_T *i2c, uint32_t u32PktSize);
<> 149:156823d33999 399 void I2C_SMBusOpen(I2C_T *i2c, uint8_t u8HostDevice);
<> 149:156823d33999 400 void I2C_SMBusClose(I2C_T *i2c);
<> 149:156823d33999 401 void I2C_SMBusPECTxEnable(I2C_T *i2c, uint8_t u8PECTxEn);
<> 149:156823d33999 402 uint8_t I2C_SMBusGetPECValue(I2C_T *i2c);
<> 149:156823d33999 403 void I2C_SMBusIdleTimeout(I2C_T *i2c, uint32_t us, uint32_t u32Hclk);
<> 149:156823d33999 404 void I2C_SMBusTimeout(I2C_T *i2c, uint32_t ms, uint32_t u32Pclk);
<> 149:156823d33999 405 void I2C_SMBusClockLoTimeout(I2C_T *i2c, uint32_t ms, uint32_t u32Pclk);
<> 149:156823d33999 406 /*@}*/ /* end of group I2C_EXPORTED_FUNCTIONS */
<> 149:156823d33999 407
<> 149:156823d33999 408 /*@}*/ /* end of group I2C_Driver */
<> 149:156823d33999 409
<> 149:156823d33999 410 /*@}*/ /* end of group Standard_Driver */
<> 149:156823d33999 411
<> 149:156823d33999 412 #ifdef __cplusplus
<> 149:156823d33999 413 }
<> 149:156823d33999 414 #endif
<> 149:156823d33999 415 #endif //__I2C_H__