mbed library sources. Supersedes mbed-src.
Fork of mbed-dev by
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c@149:156823d33999, 2016-10-28 (annotated)
- Committer:
- <>
- Date:
- Fri Oct 28 11:17:30 2016 +0100
- Revision:
- 149:156823d33999
- Parent:
- targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c@144:ef7eb2e8f9f7
This updates the lib to the mbed lib v128
NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2013 Nordic Semiconductor |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | // math.h required for floating point operations for baud rate calculation |
<> | 144:ef7eb2e8f9f7 | 17 | //#include <math.h> |
<> | 144:ef7eb2e8f9f7 | 18 | #include <string.h> |
<> | 144:ef7eb2e8f9f7 | 19 | #include "mbed_assert.h" |
<> | 144:ef7eb2e8f9f7 | 20 | |
<> | 144:ef7eb2e8f9f7 | 21 | #include "serial_api.h" |
<> | 144:ef7eb2e8f9f7 | 22 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 23 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 24 | |
<> | 144:ef7eb2e8f9f7 | 25 | /****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 26 | * INITIALIZATION |
<> | 144:ef7eb2e8f9f7 | 27 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 28 | #define UART_NUM 1 |
<> | 144:ef7eb2e8f9f7 | 29 | |
<> | 144:ef7eb2e8f9f7 | 30 | static uint32_t serial_irq_ids[UART_NUM] = {0}; |
<> | 144:ef7eb2e8f9f7 | 31 | static uart_irq_handler irq_handler; |
<> | 144:ef7eb2e8f9f7 | 32 | static const int acceptedSpeeds[18][2] = { |
<> | 144:ef7eb2e8f9f7 | 33 | {1200, UART_BAUDRATE_BAUDRATE_Baud1200}, |
<> | 144:ef7eb2e8f9f7 | 34 | {2400, UART_BAUDRATE_BAUDRATE_Baud2400}, |
<> | 144:ef7eb2e8f9f7 | 35 | {4800, UART_BAUDRATE_BAUDRATE_Baud4800}, |
<> | 144:ef7eb2e8f9f7 | 36 | {9600, UART_BAUDRATE_BAUDRATE_Baud9600}, |
<> | 144:ef7eb2e8f9f7 | 37 | {14400, UART_BAUDRATE_BAUDRATE_Baud14400}, |
<> | 144:ef7eb2e8f9f7 | 38 | {19200, UART_BAUDRATE_BAUDRATE_Baud19200}, |
<> | 144:ef7eb2e8f9f7 | 39 | {28800, UART_BAUDRATE_BAUDRATE_Baud28800}, |
<> | 144:ef7eb2e8f9f7 | 40 | {31250, (0x00800000UL) /* 31250 baud */}, |
<> | 144:ef7eb2e8f9f7 | 41 | {38400, UART_BAUDRATE_BAUDRATE_Baud38400}, |
<> | 144:ef7eb2e8f9f7 | 42 | {56000, (0x00E51000UL) /* 56000 baud */}, |
<> | 144:ef7eb2e8f9f7 | 43 | {57600, UART_BAUDRATE_BAUDRATE_Baud57600}, |
<> | 144:ef7eb2e8f9f7 | 44 | {76800, UART_BAUDRATE_BAUDRATE_Baud76800}, |
<> | 144:ef7eb2e8f9f7 | 45 | {115200, UART_BAUDRATE_BAUDRATE_Baud115200}, |
<> | 144:ef7eb2e8f9f7 | 46 | {230400, UART_BAUDRATE_BAUDRATE_Baud230400}, |
<> | 144:ef7eb2e8f9f7 | 47 | {250000, UART_BAUDRATE_BAUDRATE_Baud250000}, |
<> | 144:ef7eb2e8f9f7 | 48 | {460800, UART_BAUDRATE_BAUDRATE_Baud460800}, |
<> | 144:ef7eb2e8f9f7 | 49 | {921600, UART_BAUDRATE_BAUDRATE_Baud921600}, |
<> | 144:ef7eb2e8f9f7 | 50 | {1000000, UART_BAUDRATE_BAUDRATE_Baud1M} |
<> | 144:ef7eb2e8f9f7 | 51 | }; |
<> | 144:ef7eb2e8f9f7 | 52 | |
<> | 144:ef7eb2e8f9f7 | 53 | int stdio_uart_inited = 0; |
<> | 144:ef7eb2e8f9f7 | 54 | serial_t stdio_uart; |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | |
<> | 144:ef7eb2e8f9f7 | 57 | void serial_init(serial_t *obj, PinName tx, PinName rx) { |
<> | 144:ef7eb2e8f9f7 | 58 | UARTName uart = UART_0; |
<> | 144:ef7eb2e8f9f7 | 59 | obj->uart = (NRF_UART_Type *)uart; |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 144:ef7eb2e8f9f7 | 61 | //pin configurations -- |
<> | 144:ef7eb2e8f9f7 | 62 | NRF_GPIO->OUT |= (1 << tx); |
<> | 144:ef7eb2e8f9f7 | 63 | NRF_GPIO->OUT |= (1 << RTS_PIN_NUMBER); |
<> | 144:ef7eb2e8f9f7 | 64 | NRF_GPIO->DIR |= (1 << tx); //TX_PIN_NUMBER); |
<> | 144:ef7eb2e8f9f7 | 65 | NRF_GPIO->DIR |= (1 << RTS_PIN_NUMBER); |
<> | 144:ef7eb2e8f9f7 | 66 | |
<> | 144:ef7eb2e8f9f7 | 67 | NRF_GPIO->DIR &= ~(1 << rx); //RX_PIN_NUMBER); |
<> | 144:ef7eb2e8f9f7 | 68 | NRF_GPIO->DIR &= ~(1 << CTS_PIN_NUMBER); |
<> | 144:ef7eb2e8f9f7 | 69 | |
<> | 144:ef7eb2e8f9f7 | 70 | |
<> | 144:ef7eb2e8f9f7 | 71 | // set default baud rate and format |
<> | 144:ef7eb2e8f9f7 | 72 | serial_baud (obj, 9600); |
<> | 144:ef7eb2e8f9f7 | 73 | serial_format(obj, 8, ParityNone, 1); |
<> | 144:ef7eb2e8f9f7 | 74 | |
<> | 144:ef7eb2e8f9f7 | 75 | obj->uart->ENABLE = (UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos); |
<> | 144:ef7eb2e8f9f7 | 76 | obj->uart->TASKS_STARTTX = 1; |
<> | 144:ef7eb2e8f9f7 | 77 | obj->uart->TASKS_STARTRX = 1; |
<> | 144:ef7eb2e8f9f7 | 78 | obj->uart->EVENTS_RXDRDY = 0; |
<> | 144:ef7eb2e8f9f7 | 79 | // dummy write needed or TXDRDY trails write rather than leads write. |
<> | 144:ef7eb2e8f9f7 | 80 | // pins are disconnected so nothing is physically transmitted on the wire |
<> | 144:ef7eb2e8f9f7 | 81 | obj->uart->PSELTXD = 0xFFFFFFFF; |
<> | 144:ef7eb2e8f9f7 | 82 | obj->uart->EVENTS_TXDRDY = 0; |
<> | 144:ef7eb2e8f9f7 | 83 | obj->uart->TXD = 0; |
<> | 144:ef7eb2e8f9f7 | 84 | while (obj->uart->EVENTS_TXDRDY != 1); |
<> | 144:ef7eb2e8f9f7 | 85 | |
<> | 144:ef7eb2e8f9f7 | 86 | obj->index = 0; |
<> | 144:ef7eb2e8f9f7 | 87 | |
<> | 144:ef7eb2e8f9f7 | 88 | obj->uart->PSELRTS = RTS_PIN_NUMBER; |
<> | 144:ef7eb2e8f9f7 | 89 | obj->uart->PSELTXD = tx; //TX_PIN_NUMBER; |
<> | 144:ef7eb2e8f9f7 | 90 | obj->uart->PSELCTS = CTS_PIN_NUMBER; |
<> | 144:ef7eb2e8f9f7 | 91 | obj->uart->PSELRXD = rx; //RX_PIN_NUMBER; |
<> | 144:ef7eb2e8f9f7 | 92 | |
<> | 144:ef7eb2e8f9f7 | 93 | // set rx/tx pins in PullUp mode |
<> | 144:ef7eb2e8f9f7 | 94 | if (tx != NC) { |
<> | 144:ef7eb2e8f9f7 | 95 | pin_mode(tx, PullUp); |
<> | 144:ef7eb2e8f9f7 | 96 | } |
<> | 144:ef7eb2e8f9f7 | 97 | if (rx != NC) { |
<> | 144:ef7eb2e8f9f7 | 98 | pin_mode(rx, PullUp); |
<> | 144:ef7eb2e8f9f7 | 99 | } |
<> | 144:ef7eb2e8f9f7 | 100 | |
<> | 144:ef7eb2e8f9f7 | 101 | if (uart == STDIO_UART) { |
<> | 144:ef7eb2e8f9f7 | 102 | stdio_uart_inited = 1; |
<> | 144:ef7eb2e8f9f7 | 103 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
<> | 144:ef7eb2e8f9f7 | 104 | } |
<> | 144:ef7eb2e8f9f7 | 105 | } |
<> | 144:ef7eb2e8f9f7 | 106 | |
<> | 144:ef7eb2e8f9f7 | 107 | void serial_free(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 108 | { |
<> | 144:ef7eb2e8f9f7 | 109 | serial_irq_ids[obj->index] = 0; |
<> | 144:ef7eb2e8f9f7 | 110 | } |
<> | 144:ef7eb2e8f9f7 | 111 | |
<> | 144:ef7eb2e8f9f7 | 112 | // serial_baud |
<> | 144:ef7eb2e8f9f7 | 113 | // set the baud rate, taking in to account the current SystemFrequency |
<> | 144:ef7eb2e8f9f7 | 114 | void serial_baud(serial_t *obj, int baudrate) |
<> | 144:ef7eb2e8f9f7 | 115 | { |
<> | 144:ef7eb2e8f9f7 | 116 | if (baudrate<=1200) { |
<> | 144:ef7eb2e8f9f7 | 117 | obj->uart->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1200; |
<> | 144:ef7eb2e8f9f7 | 118 | return; |
<> | 144:ef7eb2e8f9f7 | 119 | } |
<> | 144:ef7eb2e8f9f7 | 120 | |
<> | 144:ef7eb2e8f9f7 | 121 | for (int i = 1; i<17; i++) { |
<> | 144:ef7eb2e8f9f7 | 122 | if (baudrate<acceptedSpeeds[i][0]) { |
<> | 144:ef7eb2e8f9f7 | 123 | obj->uart->BAUDRATE = acceptedSpeeds[i - 1][1]; |
<> | 144:ef7eb2e8f9f7 | 124 | return; |
<> | 144:ef7eb2e8f9f7 | 125 | } |
<> | 144:ef7eb2e8f9f7 | 126 | } |
<> | 144:ef7eb2e8f9f7 | 127 | obj->uart->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1M; |
<> | 144:ef7eb2e8f9f7 | 128 | } |
<> | 144:ef7eb2e8f9f7 | 129 | |
<> | 144:ef7eb2e8f9f7 | 130 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) |
<> | 144:ef7eb2e8f9f7 | 131 | { |
<> | 144:ef7eb2e8f9f7 | 132 | // 0: 1 stop bits, 1: 2 stop bits |
<> | 144:ef7eb2e8f9f7 | 133 | // int parity_enable, parity_select; |
<> | 144:ef7eb2e8f9f7 | 134 | switch (parity) { |
<> | 144:ef7eb2e8f9f7 | 135 | case ParityNone: |
<> | 144:ef7eb2e8f9f7 | 136 | obj->uart->CONFIG = 0; |
<> | 144:ef7eb2e8f9f7 | 137 | break; |
<> | 144:ef7eb2e8f9f7 | 138 | default: |
<> | 144:ef7eb2e8f9f7 | 139 | obj->uart->CONFIG = (UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos); |
<> | 144:ef7eb2e8f9f7 | 140 | return; |
<> | 144:ef7eb2e8f9f7 | 141 | } |
<> | 144:ef7eb2e8f9f7 | 142 | //no Flow Control |
<> | 144:ef7eb2e8f9f7 | 143 | } |
<> | 144:ef7eb2e8f9f7 | 144 | |
<> | 144:ef7eb2e8f9f7 | 145 | //****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 146 | // * INTERRUPT HANDLING |
<> | 144:ef7eb2e8f9f7 | 147 | //****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 148 | static inline void uart_irq(uint32_t iir, uint32_t index) |
<> | 144:ef7eb2e8f9f7 | 149 | { |
<> | 144:ef7eb2e8f9f7 | 150 | SerialIrq irq_type; |
<> | 144:ef7eb2e8f9f7 | 151 | switch (iir) { |
<> | 144:ef7eb2e8f9f7 | 152 | case 1: |
<> | 144:ef7eb2e8f9f7 | 153 | irq_type = TxIrq; |
<> | 144:ef7eb2e8f9f7 | 154 | break; |
<> | 144:ef7eb2e8f9f7 | 155 | case 2: |
<> | 144:ef7eb2e8f9f7 | 156 | irq_type = RxIrq; |
<> | 144:ef7eb2e8f9f7 | 157 | break; |
<> | 144:ef7eb2e8f9f7 | 158 | |
<> | 144:ef7eb2e8f9f7 | 159 | default: |
<> | 144:ef7eb2e8f9f7 | 160 | return; |
<> | 144:ef7eb2e8f9f7 | 161 | } |
<> | 144:ef7eb2e8f9f7 | 162 | |
<> | 144:ef7eb2e8f9f7 | 163 | if (serial_irq_ids[index] != 0) { |
<> | 144:ef7eb2e8f9f7 | 164 | irq_handler(serial_irq_ids[index], irq_type); |
<> | 144:ef7eb2e8f9f7 | 165 | } |
<> | 144:ef7eb2e8f9f7 | 166 | } |
<> | 144:ef7eb2e8f9f7 | 167 | |
<> | 144:ef7eb2e8f9f7 | 168 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 169 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 170 | #endif |
<> | 144:ef7eb2e8f9f7 | 171 | void UART0_IRQHandler() |
<> | 144:ef7eb2e8f9f7 | 172 | { |
<> | 144:ef7eb2e8f9f7 | 173 | uint32_t irtype = 0; |
<> | 144:ef7eb2e8f9f7 | 174 | |
<> | 144:ef7eb2e8f9f7 | 175 | if((NRF_UART0->INTENSET & 0x80) && NRF_UART0->EVENTS_TXDRDY) { |
<> | 144:ef7eb2e8f9f7 | 176 | irtype = 1; |
<> | 144:ef7eb2e8f9f7 | 177 | } else if((NRF_UART0->INTENSET & 0x04) && NRF_UART0->EVENTS_RXDRDY) { |
<> | 144:ef7eb2e8f9f7 | 178 | irtype = 2; |
<> | 144:ef7eb2e8f9f7 | 179 | } |
<> | 144:ef7eb2e8f9f7 | 180 | uart_irq(irtype, 0); |
<> | 144:ef7eb2e8f9f7 | 181 | } |
<> | 144:ef7eb2e8f9f7 | 182 | |
<> | 144:ef7eb2e8f9f7 | 183 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 184 | } |
<> | 144:ef7eb2e8f9f7 | 185 | #endif |
<> | 144:ef7eb2e8f9f7 | 186 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) |
<> | 144:ef7eb2e8f9f7 | 187 | { |
<> | 144:ef7eb2e8f9f7 | 188 | irq_handler = handler; |
<> | 144:ef7eb2e8f9f7 | 189 | serial_irq_ids[obj->index] = id; |
<> | 144:ef7eb2e8f9f7 | 190 | } |
<> | 144:ef7eb2e8f9f7 | 191 | |
<> | 144:ef7eb2e8f9f7 | 192 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) |
<> | 144:ef7eb2e8f9f7 | 193 | { |
<> | 144:ef7eb2e8f9f7 | 194 | IRQn_Type irq_n = (IRQn_Type)0; |
<> | 144:ef7eb2e8f9f7 | 195 | |
<> | 144:ef7eb2e8f9f7 | 196 | switch ((int)obj->uart) { |
<> | 144:ef7eb2e8f9f7 | 197 | case UART_0: |
<> | 144:ef7eb2e8f9f7 | 198 | irq_n = UART0_IRQn; |
<> | 144:ef7eb2e8f9f7 | 199 | break; |
<> | 144:ef7eb2e8f9f7 | 200 | } |
<> | 144:ef7eb2e8f9f7 | 201 | |
<> | 144:ef7eb2e8f9f7 | 202 | if (enable) { |
<> | 144:ef7eb2e8f9f7 | 203 | switch (irq) { |
<> | 144:ef7eb2e8f9f7 | 204 | case RxIrq: |
<> | 144:ef7eb2e8f9f7 | 205 | obj->uart->INTENSET = (UART_INTENSET_RXDRDY_Msk); |
<> | 144:ef7eb2e8f9f7 | 206 | break; |
<> | 144:ef7eb2e8f9f7 | 207 | case TxIrq: |
<> | 144:ef7eb2e8f9f7 | 208 | obj->uart->INTENSET = (UART_INTENSET_TXDRDY_Msk); |
<> | 144:ef7eb2e8f9f7 | 209 | break; |
<> | 144:ef7eb2e8f9f7 | 210 | } |
<> | 144:ef7eb2e8f9f7 | 211 | NVIC_SetPriority(irq_n, 3); |
<> | 144:ef7eb2e8f9f7 | 212 | NVIC_EnableIRQ(irq_n); |
<> | 144:ef7eb2e8f9f7 | 213 | } else { // disable |
<> | 144:ef7eb2e8f9f7 | 214 | // maseked writes to INTENSET dont disable and masked writes to |
<> | 144:ef7eb2e8f9f7 | 215 | // INTENCLR seemed to clear the entire register, not bits. |
<> | 144:ef7eb2e8f9f7 | 216 | // Added INTEN to memory map and seems to allow set and clearing of specific bits as desired |
<> | 144:ef7eb2e8f9f7 | 217 | int all_disabled = 0; |
<> | 144:ef7eb2e8f9f7 | 218 | switch (irq) { |
<> | 144:ef7eb2e8f9f7 | 219 | case RxIrq: |
<> | 144:ef7eb2e8f9f7 | 220 | obj->uart->INTENCLR = (UART_INTENCLR_RXDRDY_Msk); |
<> | 144:ef7eb2e8f9f7 | 221 | all_disabled = (obj->uart->INTENCLR & (UART_INTENCLR_TXDRDY_Msk)) == 0; |
<> | 144:ef7eb2e8f9f7 | 222 | break; |
<> | 144:ef7eb2e8f9f7 | 223 | case TxIrq: |
<> | 144:ef7eb2e8f9f7 | 224 | obj->uart->INTENCLR = (UART_INTENCLR_TXDRDY_Msk); |
<> | 144:ef7eb2e8f9f7 | 225 | all_disabled = (obj->uart->INTENCLR & (UART_INTENCLR_RXDRDY_Msk)) == 0; |
<> | 144:ef7eb2e8f9f7 | 226 | break; |
<> | 144:ef7eb2e8f9f7 | 227 | } |
<> | 144:ef7eb2e8f9f7 | 228 | |
<> | 144:ef7eb2e8f9f7 | 229 | if (all_disabled) { |
<> | 144:ef7eb2e8f9f7 | 230 | NVIC_DisableIRQ(irq_n); |
<> | 144:ef7eb2e8f9f7 | 231 | } |
<> | 144:ef7eb2e8f9f7 | 232 | } |
<> | 144:ef7eb2e8f9f7 | 233 | } |
<> | 144:ef7eb2e8f9f7 | 234 | |
<> | 144:ef7eb2e8f9f7 | 235 | //****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 236 | //* READ/WRITE |
<> | 144:ef7eb2e8f9f7 | 237 | //****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 238 | int serial_getc(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 239 | { |
<> | 144:ef7eb2e8f9f7 | 240 | while (!serial_readable(obj)) { |
<> | 144:ef7eb2e8f9f7 | 241 | } |
<> | 144:ef7eb2e8f9f7 | 242 | |
<> | 144:ef7eb2e8f9f7 | 243 | obj->uart->EVENTS_RXDRDY = 0; |
<> | 144:ef7eb2e8f9f7 | 244 | |
<> | 144:ef7eb2e8f9f7 | 245 | return (uint8_t)obj->uart->RXD; |
<> | 144:ef7eb2e8f9f7 | 246 | } |
<> | 144:ef7eb2e8f9f7 | 247 | |
<> | 144:ef7eb2e8f9f7 | 248 | void serial_putc(serial_t *obj, int c) |
<> | 144:ef7eb2e8f9f7 | 249 | { |
<> | 144:ef7eb2e8f9f7 | 250 | while (!serial_writable(obj)) { |
<> | 144:ef7eb2e8f9f7 | 251 | } |
<> | 144:ef7eb2e8f9f7 | 252 | |
<> | 144:ef7eb2e8f9f7 | 253 | obj->uart->EVENTS_TXDRDY = 0; |
<> | 144:ef7eb2e8f9f7 | 254 | obj->uart->TXD = (uint8_t)c; |
<> | 144:ef7eb2e8f9f7 | 255 | } |
<> | 144:ef7eb2e8f9f7 | 256 | |
<> | 144:ef7eb2e8f9f7 | 257 | int serial_readable(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 258 | { |
<> | 144:ef7eb2e8f9f7 | 259 | return (obj->uart->EVENTS_RXDRDY == 1); |
<> | 144:ef7eb2e8f9f7 | 260 | } |
<> | 144:ef7eb2e8f9f7 | 261 | |
<> | 144:ef7eb2e8f9f7 | 262 | int serial_writable(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 263 | { |
<> | 144:ef7eb2e8f9f7 | 264 | return (obj->uart->EVENTS_TXDRDY == 1); |
<> | 144:ef7eb2e8f9f7 | 265 | } |
<> | 144:ef7eb2e8f9f7 | 266 | |
<> | 144:ef7eb2e8f9f7 | 267 | void serial_break_set(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 268 | { |
<> | 144:ef7eb2e8f9f7 | 269 | obj->uart->TASKS_SUSPEND = 1; |
<> | 144:ef7eb2e8f9f7 | 270 | } |
<> | 144:ef7eb2e8f9f7 | 271 | |
<> | 144:ef7eb2e8f9f7 | 272 | void serial_break_clear(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 273 | { |
<> | 144:ef7eb2e8f9f7 | 274 | obj->uart->TASKS_STARTTX = 1; |
<> | 144:ef7eb2e8f9f7 | 275 | obj->uart->TASKS_STARTRX = 1; |
<> | 144:ef7eb2e8f9f7 | 276 | } |
<> | 144:ef7eb2e8f9f7 | 277 | |
<> | 144:ef7eb2e8f9f7 | 278 | void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) |
<> | 144:ef7eb2e8f9f7 | 279 | { |
<> | 144:ef7eb2e8f9f7 | 280 | |
<> | 144:ef7eb2e8f9f7 | 281 | if (type == FlowControlRTSCTS || type == FlowControlRTS) { |
<> | 144:ef7eb2e8f9f7 | 282 | NRF_GPIO->DIR |= (1<<rxflow); |
<> | 144:ef7eb2e8f9f7 | 283 | pin_mode(rxflow, PullUp); |
<> | 144:ef7eb2e8f9f7 | 284 | obj->uart->PSELRTS = rxflow; |
<> | 144:ef7eb2e8f9f7 | 285 | |
<> | 144:ef7eb2e8f9f7 | 286 | obj->uart->CONFIG |= 0x01; // Enable HWFC |
<> | 144:ef7eb2e8f9f7 | 287 | } |
<> | 144:ef7eb2e8f9f7 | 288 | |
<> | 144:ef7eb2e8f9f7 | 289 | if (type == FlowControlRTSCTS || type == FlowControlCTS) { |
<> | 144:ef7eb2e8f9f7 | 290 | NRF_GPIO->DIR &= ~(1<<txflow); |
<> | 144:ef7eb2e8f9f7 | 291 | pin_mode(txflow, PullUp); |
<> | 144:ef7eb2e8f9f7 | 292 | obj->uart->PSELCTS = txflow; |
<> | 144:ef7eb2e8f9f7 | 293 | |
<> | 144:ef7eb2e8f9f7 | 294 | obj->uart->CONFIG |= 0x01; // Enable HWFC; |
<> | 144:ef7eb2e8f9f7 | 295 | } |
<> | 144:ef7eb2e8f9f7 | 296 | |
<> | 144:ef7eb2e8f9f7 | 297 | if (type == FlowControlNone) { |
<> | 144:ef7eb2e8f9f7 | 298 | obj->uart->PSELRTS = 0xFFFFFFFF; // Disable RTS |
<> | 144:ef7eb2e8f9f7 | 299 | obj->uart->PSELCTS = 0xFFFFFFFF; // Disable CTS |
<> | 144:ef7eb2e8f9f7 | 300 | |
<> | 144:ef7eb2e8f9f7 | 301 | obj->uart->CONFIG &= ~0x01; // Enable HWFC; |
<> | 144:ef7eb2e8f9f7 | 302 | } |
<> | 144:ef7eb2e8f9f7 | 303 | } |
<> | 144:ef7eb2e8f9f7 | 304 | |
<> | 144:ef7eb2e8f9f7 | 305 | void serial_clear(serial_t *obj) { |
<> | 144:ef7eb2e8f9f7 | 306 | } |