Zeroday Hong / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/TARGET_STM/gpio_api.c@160:d5399cc887bb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:40:56 2017 +0000
Revision:
160:d5399cc887bb
Parent:
157:ff67d9f36b67 
This updates the lib to the mbed lib v138

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /* mbed Microcontroller Library
<> 157:ff67d9f36b67 2 *******************************************************************************
<> 157:ff67d9f36b67 3 * Copyright (c) 2015, STMicroelectronics
<> 157:ff67d9f36b67 4 * All rights reserved.
<> 157:ff67d9f36b67 5 *
<> 157:ff67d9f36b67 6 * Redistribution and use in source and binary forms, with or without
<> 157:ff67d9f36b67 7 * modification, are permitted provided that the following conditions are met:
<> 157:ff67d9f36b67 8 *
<> 157:ff67d9f36b67 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 157:ff67d9f36b67 10 * this list of conditions and the following disclaimer.
<> 157:ff67d9f36b67 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 157:ff67d9f36b67 12 * this list of conditions and the following disclaimer in the documentation
<> 157:ff67d9f36b67 13 * and/or other materials provided with the distribution.
<> 157:ff67d9f36b67 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 157:ff67d9f36b67 15 * may be used to endorse or promote products derived from this software
<> 157:ff67d9f36b67 16 * without specific prior written permission.
<> 157:ff67d9f36b67 17 *
<> 157:ff67d9f36b67 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 157:ff67d9f36b67 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 157:ff67d9f36b67 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 157:ff67d9f36b67 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 157:ff67d9f36b67 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 157:ff67d9f36b67 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 157:ff67d9f36b67 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 157:ff67d9f36b67 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 157:ff67d9f36b67 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 157:ff67d9f36b67 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 157:ff67d9f36b67 28 *******************************************************************************
<> 157:ff67d9f36b67 29 */
<> 157:ff67d9f36b67 30 #include "mbed_assert.h"
<> 157:ff67d9f36b67 31 #include "gpio_api.h"
<> 157:ff67d9f36b67 32 #include "pinmap.h"
<> 157:ff67d9f36b67 33 #include "mbed_error.h"
<> 160:d5399cc887bb 34 #include "pin_device.h"
<> 157:ff67d9f36b67 35
<> 160:d5399cc887bb 36 extern const uint32_t ll_pin_defines[16];
<> 160:d5399cc887bb 37
<> 160:d5399cc887bb 38 // Enable GPIO clock and return GPIO base address
<> 160:d5399cc887bb 39 GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx) {
<> 160:d5399cc887bb 40 uint32_t gpio_add = 0;
<> 160:d5399cc887bb 41 switch (port_idx) {
<> 160:d5399cc887bb 42 case PortA:
<> 160:d5399cc887bb 43 gpio_add = GPIOA_BASE;
<> 160:d5399cc887bb 44 __GPIOA_CLK_ENABLE();
<> 160:d5399cc887bb 45 break;
<> 160:d5399cc887bb 46 case PortB:
<> 160:d5399cc887bb 47 gpio_add = GPIOB_BASE;
<> 160:d5399cc887bb 48 __GPIOB_CLK_ENABLE();
<> 160:d5399cc887bb 49 break;
<> 160:d5399cc887bb 50 #if defined(GPIOC_BASE)
<> 160:d5399cc887bb 51 case PortC:
<> 160:d5399cc887bb 52 gpio_add = GPIOC_BASE;
<> 160:d5399cc887bb 53 __GPIOC_CLK_ENABLE();
<> 160:d5399cc887bb 54 break;
<> 160:d5399cc887bb 55 #endif
<> 160:d5399cc887bb 56 #if defined GPIOD_BASE
<> 160:d5399cc887bb 57 case PortD:
<> 160:d5399cc887bb 58 gpio_add = GPIOD_BASE;
<> 160:d5399cc887bb 59 __GPIOD_CLK_ENABLE();
<> 160:d5399cc887bb 60 break;
<> 160:d5399cc887bb 61 #endif
<> 160:d5399cc887bb 62 #if defined GPIOE_BASE
<> 160:d5399cc887bb 63 case PortE:
<> 160:d5399cc887bb 64 gpio_add = GPIOE_BASE;
<> 160:d5399cc887bb 65 __GPIOE_CLK_ENABLE();
<> 160:d5399cc887bb 66 break;
<> 160:d5399cc887bb 67 #endif
<> 160:d5399cc887bb 68 #if defined GPIOF_BASE
<> 160:d5399cc887bb 69 case PortF:
<> 160:d5399cc887bb 70 gpio_add = GPIOF_BASE;
<> 160:d5399cc887bb 71 __GPIOF_CLK_ENABLE();
<> 160:d5399cc887bb 72 break;
<> 160:d5399cc887bb 73 #endif
<> 160:d5399cc887bb 74 #if defined GPIOG_BASE
<> 160:d5399cc887bb 75 case PortG:
<> 160:d5399cc887bb 76 #if defined TARGET_STM32L4
<> 160:d5399cc887bb 77 __HAL_RCC_PWR_CLK_ENABLE();
<> 160:d5399cc887bb 78 HAL_PWREx_EnableVddIO2();
<> 160:d5399cc887bb 79 #endif
<> 160:d5399cc887bb 80 gpio_add = GPIOG_BASE;
<> 160:d5399cc887bb 81 __GPIOG_CLK_ENABLE();
<> 160:d5399cc887bb 82 break;
<> 160:d5399cc887bb 83 #endif
<> 160:d5399cc887bb 84 #if defined GPIOH_BASE
<> 160:d5399cc887bb 85 case PortH:
<> 160:d5399cc887bb 86 gpio_add = GPIOH_BASE;
<> 160:d5399cc887bb 87 __GPIOH_CLK_ENABLE();
<> 160:d5399cc887bb 88 break;
<> 160:d5399cc887bb 89 #endif
<> 160:d5399cc887bb 90 #if defined GPIOI_BASE
<> 160:d5399cc887bb 91 case PortI:
<> 160:d5399cc887bb 92 gpio_add = GPIOI_BASE;
<> 160:d5399cc887bb 93 __GPIOI_CLK_ENABLE();
<> 160:d5399cc887bb 94 break;
<> 160:d5399cc887bb 95 #endif
<> 160:d5399cc887bb 96 #if defined GPIOJ_BASE
<> 160:d5399cc887bb 97 case PortJ:
<> 160:d5399cc887bb 98 gpio_add = GPIOJ_BASE;
<> 160:d5399cc887bb 99 __GPIOJ_CLK_ENABLE();
<> 160:d5399cc887bb 100 break;
<> 160:d5399cc887bb 101 #endif
<> 160:d5399cc887bb 102 #if defined GPIOK_BASE
<> 160:d5399cc887bb 103 case PortK:
<> 160:d5399cc887bb 104 gpio_add = GPIOK_BASE;
<> 160:d5399cc887bb 105 __GPIOK_CLK_ENABLE();
<> 160:d5399cc887bb 106 break;
<> 160:d5399cc887bb 107 #endif
<> 160:d5399cc887bb 108 default:
<> 160:d5399cc887bb 109 error("Pinmap error: wrong port number.");
<> 160:d5399cc887bb 110 break;
<> 160:d5399cc887bb 111 }
<> 160:d5399cc887bb 112 return (GPIO_TypeDef *) gpio_add;
<> 160:d5399cc887bb 113 }
<> 157:ff67d9f36b67 114
<> 157:ff67d9f36b67 115 uint32_t gpio_set(PinName pin) {
<> 157:ff67d9f36b67 116 MBED_ASSERT(pin != (PinName)NC);
<> 157:ff67d9f36b67 117
<> 157:ff67d9f36b67 118 pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
<> 157:ff67d9f36b67 119
<> 157:ff67d9f36b67 120 return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
<> 157:ff67d9f36b67 121 }
<> 157:ff67d9f36b67 122
<> 160:d5399cc887bb 123
<> 157:ff67d9f36b67 124 void gpio_init(gpio_t *obj, PinName pin) {
<> 157:ff67d9f36b67 125 obj->pin = pin;
<> 157:ff67d9f36b67 126 if (pin == (PinName)NC) {
<> 157:ff67d9f36b67 127 return;
<> 157:ff67d9f36b67 128 }
<> 157:ff67d9f36b67 129
<> 157:ff67d9f36b67 130 uint32_t port_index = STM_PORT(pin);
<> 157:ff67d9f36b67 131
<> 157:ff67d9f36b67 132 // Enable GPIO clock
<> 160:d5399cc887bb 133 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
<> 157:ff67d9f36b67 134
<> 157:ff67d9f36b67 135 // Fill GPIO object structure for future use
<> 157:ff67d9f36b67 136 obj->mask = gpio_set(pin);
<> 160:d5399cc887bb 137 obj->gpio = gpio;
<> 160:d5399cc887bb 138 obj->ll_pin = ll_pin_defines[STM_PIN(obj->pin)];
<> 157:ff67d9f36b67 139 obj->reg_in = &gpio->IDR;
<> 157:ff67d9f36b67 140 obj->reg_set = &gpio->BSRR;
<> 157:ff67d9f36b67 141 #ifdef GPIO_IP_WITHOUT_BRR
<> 157:ff67d9f36b67 142 obj->reg_clr = &gpio->BSRR;
<> 157:ff67d9f36b67 143 #else
<> 157:ff67d9f36b67 144 obj->reg_clr = &gpio->BRR;
<> 157:ff67d9f36b67 145 #endif
<> 157:ff67d9f36b67 146 }
<> 157:ff67d9f36b67 147
<> 157:ff67d9f36b67 148 void gpio_mode(gpio_t *obj, PinMode mode) {
<> 157:ff67d9f36b67 149 pin_mode(obj->pin, mode);
<> 157:ff67d9f36b67 150 }
<> 157:ff67d9f36b67 151
<> 160:d5399cc887bb 152 inline void gpio_dir(gpio_t *obj, PinDirection direction) {
<> 160:d5399cc887bb 153 if (direction == PIN_INPUT) {
<> 160:d5399cc887bb 154 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_INPUT);
<> 160:d5399cc887bb 155 } else {
<> 160:d5399cc887bb 156 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_OUTPUT);
<> 157:ff67d9f36b67 157 }
<> 157:ff67d9f36b67 158 }
<> 160:d5399cc887bb 159