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targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/TARGET_FRDM/PeripheralNames.h@154:37f96f9d4de2, 2017-01-04 (annotated)

Committer:
<>
Date:
Wed Jan 04 16:58:05 2017 +0000
Revision:
154:37f96f9d4de2
This updates the lib to the mbed lib v133

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /* mbed Microcontroller Library
<> 154:37f96f9d4de2 2 * Copyright (c) 2006-2013 ARM Limited
<> 154:37f96f9d4de2 3 *
<> 154:37f96f9d4de2 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 154:37f96f9d4de2 5 * you may not use this file except in compliance with the License.
<> 154:37f96f9d4de2 6 * You may obtain a copy of the License at
<> 154:37f96f9d4de2 7 *
<> 154:37f96f9d4de2 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 154:37f96f9d4de2 9 *
<> 154:37f96f9d4de2 10 * Unless required by applicable law or agreed to in writing, software
<> 154:37f96f9d4de2 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 154:37f96f9d4de2 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 154:37f96f9d4de2 13 * See the License for the specific language governing permissions and
<> 154:37f96f9d4de2 14 * limitations under the License.
<> 154:37f96f9d4de2 15 */
<> 154:37f96f9d4de2 16 #ifndef MBED_PERIPHERALNAMES_H
<> 154:37f96f9d4de2 17 #define MBED_PERIPHERALNAMES_H
<> 154:37f96f9d4de2 18
<> 154:37f96f9d4de2 19 #include "cmsis.h"
<> 154:37f96f9d4de2 20
<> 154:37f96f9d4de2 21 #ifdef __cplusplus
<> 154:37f96f9d4de2 22 extern "C" {
<> 154:37f96f9d4de2 23 #endif
<> 154:37f96f9d4de2 24
<> 154:37f96f9d4de2 25 typedef enum {
<> 154:37f96f9d4de2 26 OSC32KCLK = 0,
<> 154:37f96f9d4de2 27 } RTCName;
<> 154:37f96f9d4de2 28
<> 154:37f96f9d4de2 29 typedef enum {
<> 154:37f96f9d4de2 30 UART_0 = 0,
<> 154:37f96f9d4de2 31 UART_1 = 1,
<> 154:37f96f9d4de2 32 UART_2 = 2,
<> 154:37f96f9d4de2 33 UART_3 = 3,
<> 154:37f96f9d4de2 34 UART_4 = 4,
<> 154:37f96f9d4de2 35 } UARTName;
<> 154:37f96f9d4de2 36
<> 154:37f96f9d4de2 37 #define STDIO_UART_TX USBTX
<> 154:37f96f9d4de2 38 #define STDIO_UART_RX USBRX
<> 154:37f96f9d4de2 39 #define STDIO_UART UART_0
<> 154:37f96f9d4de2 40
<> 154:37f96f9d4de2 41 typedef enum {
<> 154:37f96f9d4de2 42 I2C_0 = 0,
<> 154:37f96f9d4de2 43 I2C_1 = 1,
<> 154:37f96f9d4de2 44 I2C_2 = 2,
<> 154:37f96f9d4de2 45 I2C_3 = 3,
<> 154:37f96f9d4de2 46 } I2CName;
<> 154:37f96f9d4de2 47
<> 154:37f96f9d4de2 48 #define TPM_SHIFT 8
<> 154:37f96f9d4de2 49 typedef enum {
<> 154:37f96f9d4de2 50 PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
<> 154:37f96f9d4de2 51 PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
<> 154:37f96f9d4de2 52 PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
<> 154:37f96f9d4de2 53 PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
<> 154:37f96f9d4de2 54 PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
<> 154:37f96f9d4de2 55 PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
<> 154:37f96f9d4de2 56 PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
<> 154:37f96f9d4de2 57 PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
<> 154:37f96f9d4de2 58 PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
<> 154:37f96f9d4de2 59 PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
<> 154:37f96f9d4de2 60 PWM_11 = (1 << TPM_SHIFT) | (2), // FTM1 CH2
<> 154:37f96f9d4de2 61 PWM_12 = (1 << TPM_SHIFT) | (3), // FTM1 CH3
<> 154:37f96f9d4de2 62 PWM_13 = (1 << TPM_SHIFT) | (4), // FTM1 CH4
<> 154:37f96f9d4de2 63 PWM_14 = (1 << TPM_SHIFT) | (5), // FTM1 CH5
<> 154:37f96f9d4de2 64 PWM_15 = (1 << TPM_SHIFT) | (6), // FTM1 CH6
<> 154:37f96f9d4de2 65 PWM_16 = (1 << TPM_SHIFT) | (7), // FTM1 CH7
<> 154:37f96f9d4de2 66 PWM_17 = (2 << TPM_SHIFT) | (0), // FTM2 CH0
<> 154:37f96f9d4de2 67 PWM_18 = (2 << TPM_SHIFT) | (1), // FTM2 CH1
<> 154:37f96f9d4de2 68 PWM_19 = (2 << TPM_SHIFT) | (2), // FTM2 CH2
<> 154:37f96f9d4de2 69 PWM_20 = (2 << TPM_SHIFT) | (3), // FTM2 CH3
<> 154:37f96f9d4de2 70 PWM_21 = (2 << TPM_SHIFT) | (4), // FTM2 CH4
<> 154:37f96f9d4de2 71 PWM_22 = (2 << TPM_SHIFT) | (5), // FTM2 CH5
<> 154:37f96f9d4de2 72 PWM_23 = (2 << TPM_SHIFT) | (6), // FTM2 CH6
<> 154:37f96f9d4de2 73 PWM_24 = (2 << TPM_SHIFT) | (7), // FTM2 CH7
<> 154:37f96f9d4de2 74 PWM_25 = (3 << TPM_SHIFT) | (0), // FTM3 CH0
<> 154:37f96f9d4de2 75 PWM_26 = (3 << TPM_SHIFT) | (1), // FTM3 CH1
<> 154:37f96f9d4de2 76 PWM_27 = (3 << TPM_SHIFT) | (2), // FTM3 CH2
<> 154:37f96f9d4de2 77 PWM_28 = (3 << TPM_SHIFT) | (3), // FTM3 CH3
<> 154:37f96f9d4de2 78 PWM_29 = (3 << TPM_SHIFT) | (4), // FTM3 CH4
<> 154:37f96f9d4de2 79 PWM_30 = (3 << TPM_SHIFT) | (5), // FTM3 CH5
<> 154:37f96f9d4de2 80 PWM_31 = (3 << TPM_SHIFT) | (6), // FTM3 CH6
<> 154:37f96f9d4de2 81 PWM_32 = (3 << TPM_SHIFT) | (7), // FTM3 CH7
<> 154:37f96f9d4de2 82 } PWMName;
<> 154:37f96f9d4de2 83
<> 154:37f96f9d4de2 84 #define ADC_INSTANCE_SHIFT 8
<> 154:37f96f9d4de2 85 #define ADC_B_CHANNEL_SHIFT 5
<> 154:37f96f9d4de2 86 typedef enum {
<> 154:37f96f9d4de2 87 ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
<> 154:37f96f9d4de2 88 ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
<> 154:37f96f9d4de2 89 ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
<> 154:37f96f9d4de2 90 ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
<> 154:37f96f9d4de2 91 ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8,
<> 154:37f96f9d4de2 92 ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9,
<> 154:37f96f9d4de2 93 ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
<> 154:37f96f9d4de2 94 ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
<> 154:37f96f9d4de2 95 ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
<> 154:37f96f9d4de2 96 ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
<> 154:37f96f9d4de2 97 ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
<> 154:37f96f9d4de2 98 ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
<> 154:37f96f9d4de2 99 ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
<> 154:37f96f9d4de2 100 ADC0_SE21 = (0 << ADC_INSTANCE_SHIFT) | 21,
<> 154:37f96f9d4de2 101 ADC0_SE22 = (0 << ADC_INSTANCE_SHIFT) | 22,
<> 154:37f96f9d4de2 102 ADC0_SE23 = (0 << ADC_INSTANCE_SHIFT) | 23,
<> 154:37f96f9d4de2 103 ADC1_SE4a = (1 << ADC_INSTANCE_SHIFT) | 4,
<> 154:37f96f9d4de2 104 ADC1_SE5a = (1 << ADC_INSTANCE_SHIFT) | 5,
<> 154:37f96f9d4de2 105 ADC1_SE6a = (1 << ADC_INSTANCE_SHIFT) | 6,
<> 154:37f96f9d4de2 106 ADC1_SE7a = (1 << ADC_INSTANCE_SHIFT) | 7,
<> 154:37f96f9d4de2 107 ADC1_SE4b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
<> 154:37f96f9d4de2 108 ADC1_SE5b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
<> 154:37f96f9d4de2 109 ADC1_SE6b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
<> 154:37f96f9d4de2 110 ADC1_SE7b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
<> 154:37f96f9d4de2 111 ADC1_SE8 = (1 << ADC_INSTANCE_SHIFT) | 8,
<> 154:37f96f9d4de2 112 ADC1_SE9 = (1 << ADC_INSTANCE_SHIFT) | 9,
<> 154:37f96f9d4de2 113 ADC1_SE12 = (1 << ADC_INSTANCE_SHIFT) | 12,
<> 154:37f96f9d4de2 114 ADC1_SE13 = (1 << ADC_INSTANCE_SHIFT) | 13,
<> 154:37f96f9d4de2 115 ADC1_SE14 = (1 << ADC_INSTANCE_SHIFT) | 14,
<> 154:37f96f9d4de2 116 ADC1_SE15 = (1 << ADC_INSTANCE_SHIFT) | 15,
<> 154:37f96f9d4de2 117 ADC1_SE16 = (1 << ADC_INSTANCE_SHIFT) | 16,
<> 154:37f96f9d4de2 118 ADC1_SE17 = (1 << ADC_INSTANCE_SHIFT) | 17,
<> 154:37f96f9d4de2 119 ADC1_SE18 = (1 << ADC_INSTANCE_SHIFT) | 18,
<> 154:37f96f9d4de2 120 ADC1_SE23 = (1 << ADC_INSTANCE_SHIFT) | 23,
<> 154:37f96f9d4de2 121 } ADCName;
<> 154:37f96f9d4de2 122
<> 154:37f96f9d4de2 123 typedef enum {
<> 154:37f96f9d4de2 124 DAC_0 = 0
<> 154:37f96f9d4de2 125 } DACName;
<> 154:37f96f9d4de2 126
<> 154:37f96f9d4de2 127
<> 154:37f96f9d4de2 128 typedef enum {
<> 154:37f96f9d4de2 129 SPI_0 = 0,
<> 154:37f96f9d4de2 130 SPI_1 = 1,
<> 154:37f96f9d4de2 131 SPI_2 = 2,
<> 154:37f96f9d4de2 132 } SPIName;
<> 154:37f96f9d4de2 133
<> 154:37f96f9d4de2 134 #ifdef __cplusplus
<> 154:37f96f9d4de2 135 }
<> 154:37f96f9d4de2 136 #endif
<> 154:37f96f9d4de2 137
<> 154:37f96f9d4de2 138 #endif