mbed library sources. Supersedes mbed-src.
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targets/TARGET_NXP/TARGET_LPC15XX/gpio_api.c@162:16168a1438f3, 2017-04-08 (annotated)
- Committer:
- funshine
- Date:
- Sat Apr 08 17:03:55 2017 +0000
- Revision:
- 162:16168a1438f3
- Parent:
- 149:156823d33999
add code to handle serial port rx error in uart_irq()
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2014 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | #include "mbed_assert.h" |
<> | 144:ef7eb2e8f9f7 | 17 | #include "gpio_api.h" |
<> | 144:ef7eb2e8f9f7 | 18 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 19 | |
<> | 144:ef7eb2e8f9f7 | 20 | static int gpio_enabled = 0; |
<> | 144:ef7eb2e8f9f7 | 21 | |
<> | 144:ef7eb2e8f9f7 | 22 | static void gpio_enable(void) { |
<> | 144:ef7eb2e8f9f7 | 23 | gpio_enabled = 1; |
<> | 144:ef7eb2e8f9f7 | 24 | |
<> | 144:ef7eb2e8f9f7 | 25 | /* Enable AHB clock to the GPIO0/1/2 and IOCON domain. */ |
<> | 144:ef7eb2e8f9f7 | 26 | LPC_SYSCON->SYSAHBCLKCTRL0 |= (0xFUL << 13); |
<> | 144:ef7eb2e8f9f7 | 27 | } |
<> | 144:ef7eb2e8f9f7 | 28 | |
<> | 144:ef7eb2e8f9f7 | 29 | uint32_t gpio_set(PinName pin) { |
<> | 144:ef7eb2e8f9f7 | 30 | MBED_ASSERT(pin != (PinName)NC); |
<> | 144:ef7eb2e8f9f7 | 31 | if (!gpio_enabled) |
<> | 144:ef7eb2e8f9f7 | 32 | gpio_enable(); |
<> | 144:ef7eb2e8f9f7 | 33 | |
<> | 144:ef7eb2e8f9f7 | 34 | return (1UL << ((int)pin & 0x1f)); |
<> | 144:ef7eb2e8f9f7 | 35 | } |
<> | 144:ef7eb2e8f9f7 | 36 | |
<> | 144:ef7eb2e8f9f7 | 37 | void gpio_init(gpio_t *obj, PinName pin) { |
<> | 144:ef7eb2e8f9f7 | 38 | obj->pin = pin; |
<> | 144:ef7eb2e8f9f7 | 39 | if (pin == (PinName)NC) |
<> | 144:ef7eb2e8f9f7 | 40 | return; |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | obj->mask = gpio_set(pin); |
<> | 144:ef7eb2e8f9f7 | 43 | |
<> | 144:ef7eb2e8f9f7 | 44 | unsigned int port = (unsigned int)(pin >> 5); |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | obj->reg_set = &LPC_GPIO_PORT->SET[port]; |
<> | 144:ef7eb2e8f9f7 | 47 | obj->reg_clr = &LPC_GPIO_PORT->CLR[port]; |
<> | 144:ef7eb2e8f9f7 | 48 | obj->reg_in = &LPC_GPIO_PORT->PIN[port]; |
<> | 144:ef7eb2e8f9f7 | 49 | obj->reg_dir = &LPC_GPIO_PORT->DIR[port]; |
<> | 144:ef7eb2e8f9f7 | 50 | } |
<> | 144:ef7eb2e8f9f7 | 51 | |
<> | 144:ef7eb2e8f9f7 | 52 | void gpio_mode(gpio_t *obj, PinMode mode) { |
<> | 144:ef7eb2e8f9f7 | 53 | pin_mode(obj->pin, mode); |
<> | 144:ef7eb2e8f9f7 | 54 | } |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | void gpio_dir(gpio_t *obj, PinDirection direction) { |
<> | 144:ef7eb2e8f9f7 | 57 | MBED_ASSERT(obj->pin != (PinName)NC); |
<> | 144:ef7eb2e8f9f7 | 58 | switch (direction) { |
<> | 144:ef7eb2e8f9f7 | 59 | case PIN_INPUT : |
<> | 144:ef7eb2e8f9f7 | 60 | *obj->reg_dir &= ~obj->mask; |
<> | 144:ef7eb2e8f9f7 | 61 | break; |
<> | 144:ef7eb2e8f9f7 | 62 | case PIN_OUTPUT: |
<> | 144:ef7eb2e8f9f7 | 63 | *obj->reg_dir |= obj->mask; |
<> | 144:ef7eb2e8f9f7 | 64 | break; |
<> | 144:ef7eb2e8f9f7 | 65 | } |
<> | 144:ef7eb2e8f9f7 | 66 | } |