Zeroday Hong / mbed-dev

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Fork of mbed-dev by mbed official

targets/TARGET_RENESAS/TARGET_VK_RZ_A1H/pwmout_api.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 * Copyright (c) 2006-2013 ARM Limited
<> 149:156823d33999 3 *
<> 149:156823d33999 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 149:156823d33999 5 * you may not use this file except in compliance with the License.
<> 149:156823d33999 6 * You may obtain a copy of the License at
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 9 *
<> 149:156823d33999 10 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 149:156823d33999 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 13 * See the License for the specific language governing permissions and
<> 149:156823d33999 14 * limitations under the License.
<> 149:156823d33999 15 */
<> 149:156823d33999 16 #include "mbed_assert.h"
<> 149:156823d33999 17 #include "pwmout_api.h"
<> 149:156823d33999 18 #include "cmsis.h"
<> 149:156823d33999 19 #include "pinmap.h"
<> 149:156823d33999 20 #include "RZ_A1_Init.h"
<> 149:156823d33999 21 #include "cpg_iodefine.h"
<> 149:156823d33999 22 #include "pwm_iodefine.h"
<> 149:156823d33999 23 #include "gpio_addrdefine.h"
<> 149:156823d33999 24
<> 149:156823d33999 25 #ifdef MAX_PERI
<> 149:156823d33999 26 #define MTU2_PWM_NUM 27
<> 149:156823d33999 27 #define MTU2_PWM_SIGNAL 2
<> 149:156823d33999 28 #define MTU2_PWM_OFFSET 0x20
<> 149:156823d33999 29
<> 149:156823d33999 30 // PORT ID, PWM ID, Pin function
<> 149:156823d33999 31 static const PinMap PinMap_PWM[] = {
<> 149:156823d33999 32 // TIOC0 A,C
<> 149:156823d33999 33 {P4_0 , MTU2_PWM0_PIN , 2}, //TIOC0A
<> 149:156823d33999 34 {P5_0 , MTU2_PWM1_PIN , 6}, //TIOC0A
<> 149:156823d33999 35 {P7_0 , MTU2_PWM2_PIN , 7}, //TIOC0A
<> 149:156823d33999 36 {P4_2 , MTU2_PWM3_PIN , 2}, //TIOC0C
<> 149:156823d33999 37 {P5_5 , MTU2_PWM4_PIN , 6}, //TIOC0C
<> 149:156823d33999 38 {P7_2 , MTU2_PWM5_PIN , 7}, //TIOC0C
<> 149:156823d33999 39 //TIOC1 A
<> 149:156823d33999 40 {P2_11 , MTU2_PWM6_PIN , 5}, //TIOC1A
<> 149:156823d33999 41 {P6_0 , MTU2_PWM7_PIN , 5}, //TIOC1A
<> 149:156823d33999 42 {P7_4 , MTU2_PWM8_PIN , 7}, //TIOC1A
<> 149:156823d33999 43 {P8_8 , MTU2_PWM9_PIN , 5}, //TIOC1A
<> 149:156823d33999 44 {P9_7 , MTU2_PWM10_PIN , 4}, //TIOC1A
<> 149:156823d33999 45 //TIOC2 A
<> 149:156823d33999 46 {P2_1 , MTU2_PWM11_PIN , 6}, //TIOC2A
<> 149:156823d33999 47 {P6_2 , MTU2_PWM12_PIN , 6}, //TIOC2A
<> 149:156823d33999 48 {P7_6 , MTU2_PWM13_PIN , 7}, //TIOC2A
<> 149:156823d33999 49 {P8_14 , MTU2_PWM14_PIN , 4}, //TIOC2A
<> 149:156823d33999 50 //TIOC3 A,C
<> 149:156823d33999 51 {P3_4 , MTU2_PWM15_PIN , 6}, //TIOC3A
<> 149:156823d33999 52 {P7_8 , MTU2_PWM16_PIN , 7}, //TIOC3A
<> 149:156823d33999 53 {P8_10 , MTU2_PWM17_PIN , 4}, //TIOC3A
<> 149:156823d33999 54 {P3_6 , MTU2_PWM18_PIN , 6}, //TIOC3C
<> 149:156823d33999 55 {P7_10 , MTU2_PWM19_PIN , 7}, //TIOC3C
<> 149:156823d33999 56 {P8_12 , MTU2_PWM20_PIN , 4}, //TIOC3C
<> 149:156823d33999 57 //TIOC4 A,C
<> 149:156823d33999 58 {P3_8 , MTU2_PWM21_PIN , 6}, //TIOC4A
<> 149:156823d33999 59 {P4_4 , MTU2_PWM22_PIN , 3}, //TIOC4A
<> 149:156823d33999 60 {P7_12 , MTU2_PWM23_PIN , 7}, //TIOC4A
<> 149:156823d33999 61 {P3_10 , MTU2_PWM24_PIN , 6}, //TIOC4C
<> 149:156823d33999 62 {P4_6 , MTU2_PWM25_PIN , 3}, //TIOC4C
<> 149:156823d33999 63 {P7_14 , MTU2_PWM26_PIN , 7}, //TIOC4C
<> 149:156823d33999 64 //PWM1
<> 149:156823d33999 65 {P8_8 , PWM0_PIN , 6}, //PWM1A
<> 149:156823d33999 66 {P8_9 , PWM1_PIN , 6}, //PWM1B
<> 149:156823d33999 67 {P8_10 , PWM2_PIN , 6}, //PWM1C
<> 149:156823d33999 68 {P8_11 , PWM3_PIN , 6}, //PWM1D
<> 149:156823d33999 69 {P8_12 , PWM4_PIN , 6}, //PWM1E
<> 149:156823d33999 70 {P8_13 , PWM5_PIN , 6}, //PWM1F
<> 149:156823d33999 71 {P8_14 , PWM6_PIN , 6}, //PWM1G
<> 149:156823d33999 72 {P8_15 , PWM7_PIN , 6}, //PWM1H
<> 149:156823d33999 73 //PWM2
<> 149:156823d33999 74 {P3_0 , PWM8_PIN , 7}, //PWM2A
<> 149:156823d33999 75 {P3_1 , PWM9_PIN , 7}, //PWM2B
<> 149:156823d33999 76 {P3_2 , PWM10_PIN , 7}, //PWM2C
<> 149:156823d33999 77 {P3_3 , PWM11_PIN , 7}, //PWM2D
<> 149:156823d33999 78 {P4_4 , PWM12_PIN , 4}, //PWM2E
<> 149:156823d33999 79 {P4_5 , PWM13_PIN , 4}, //PWM2F
<> 149:156823d33999 80 {P4_6 , PWM14_PIN , 4}, //PWM2G
<> 149:156823d33999 81 {P4_7 , PWM15_PIN , 4}, //PWM2H
<> 149:156823d33999 82 {NC , NC , 0}
<> 149:156823d33999 83 };
<> 149:156823d33999 84
<> 149:156823d33999 85 static const PWMType PORT[] = {
<> 149:156823d33999 86 PWM1A, // PWM0_PIN
<> 149:156823d33999 87 PWM1B, // PWM1_PIN
<> 149:156823d33999 88 PWM1C, // PWM2_PIN
<> 149:156823d33999 89 PWM1D, // PWM3_PIN
<> 149:156823d33999 90 PWM1E, // PWM4_PIN
<> 149:156823d33999 91 PWM1F, // PWM5_PIN
<> 149:156823d33999 92 PWM1G, // PWM6_PIN
<> 149:156823d33999 93 PWM1H, // PWM7_PIN
<> 149:156823d33999 94 PWM2A, // PWM8_PIN
<> 149:156823d33999 95 PWM2B, // PWM9_PIN
<> 149:156823d33999 96 PWM2C, // PWM10_PIN
<> 149:156823d33999 97 PWM2D, // PWM11_PIN
<> 149:156823d33999 98 PWM2E, // PWM12_PIN
<> 149:156823d33999 99 PWM2F, // PWM13_PIN
<> 149:156823d33999 100 PWM2G, // PWM14_PIN
<> 149:156823d33999 101 PWM2H, // PWM15_PIN
<> 149:156823d33999 102 };
<> 149:156823d33999 103
<> 149:156823d33999 104 static const MTU2_PWMType MTU2_PORT[] = {
<> 149:156823d33999 105 TIOC0A, // MTU2_PWM0_PIN
<> 149:156823d33999 106 TIOC0A, // MTU2_PWM1_PIN
<> 149:156823d33999 107 TIOC0A, // MTU2_PWM2_PIN
<> 149:156823d33999 108 TIOC0C, // MTU2_PWM3_PIN
<> 149:156823d33999 109 TIOC0C, // MTU2_PWM4_PIN
<> 149:156823d33999 110 TIOC0C, // MTU2_PWM5_PIN
<> 149:156823d33999 111 TIOC1A, // MTU2_PWM6_PIN
<> 149:156823d33999 112 TIOC1A, // MTU2_PWM7_PIN
<> 149:156823d33999 113 TIOC1A, // MTU2_PWM8_PIN
<> 149:156823d33999 114 TIOC1A, // MTU2_PWM9_PIN
<> 149:156823d33999 115 TIOC1A, // MTU2_PWM10_PIN
<> 149:156823d33999 116 TIOC2A, // MTU2_PWM11_PIN
<> 149:156823d33999 117 TIOC2A, // MTU2_PWM12_PIN
<> 149:156823d33999 118 TIOC2A, // MTU2_PWM13_PIN
<> 149:156823d33999 119 TIOC2A, // MTU2_PWM14_PIN
<> 149:156823d33999 120 TIOC3A, // MTU2_PWM15_PIN
<> 149:156823d33999 121 TIOC3A, // MTU2_PWM16_PIN
<> 149:156823d33999 122 TIOC3A, // MTU2_PWM17_PIN
<> 149:156823d33999 123 TIOC3C, // MTU2_PWM18_PIN
<> 149:156823d33999 124 TIOC3C, // MTU2_PWM19_PIN
<> 149:156823d33999 125 TIOC3C, // MTU2_PWM20_PIN
<> 149:156823d33999 126 TIOC4A, // MTU2_PWM21_PIN
<> 149:156823d33999 127 TIOC4A, // MTU2_PWM22_PIN
<> 149:156823d33999 128 TIOC4A, // MTU2_PWM23_PIN
<> 149:156823d33999 129 TIOC4C, // MTU2_PWM24_PIN
<> 149:156823d33999 130 TIOC4C, // MTU2_PWM25_PIN
<> 149:156823d33999 131 TIOC4C, // MTU2_PWM26_PIN
<> 149:156823d33999 132 };
<> 149:156823d33999 133
<> 149:156823d33999 134 static __IO uint16_t *PWM_MATCH[] = {
<> 149:156823d33999 135 &PWMPWBFR_1A, // PWM0_PIN
<> 149:156823d33999 136 &PWMPWBFR_1A, // PWM1_PIN
<> 149:156823d33999 137 &PWMPWBFR_1C, // PWM2_PIN
<> 149:156823d33999 138 &PWMPWBFR_1C, // PWM3_PIN
<> 149:156823d33999 139 &PWMPWBFR_1E, // PWM4_PIN
<> 149:156823d33999 140 &PWMPWBFR_1E, // PWM5_PIN
<> 149:156823d33999 141 &PWMPWBFR_1G, // PWM6_PIN
<> 149:156823d33999 142 &PWMPWBFR_1G, // PWM7_PIN
<> 149:156823d33999 143 &PWMPWBFR_2A, // PWM8_PIN
<> 149:156823d33999 144 &PWMPWBFR_2A, // PWM9_PIN
<> 149:156823d33999 145 &PWMPWBFR_2C, // PWM10_PIN
<> 149:156823d33999 146 &PWMPWBFR_2C, // PWM11_PIN
<> 149:156823d33999 147 &PWMPWBFR_2E, // PWM12_PIN
<> 149:156823d33999 148 &PWMPWBFR_2E, // PWM13_PIN
<> 149:156823d33999 149 &PWMPWBFR_2G, // PWM14_PIN
<> 149:156823d33999 150 &PWMPWBFR_2G, // PWM15_PIN
<> 149:156823d33999 151 };
<> 149:156823d33999 152
<> 149:156823d33999 153 static __IO uint16_t *MTU2_PWM_MATCH[MTU2_PWM_NUM][MTU2_PWM_SIGNAL] = {
<> 149:156823d33999 154 { &MTU2TGRA_0, &MTU2TGRB_0 } // MTU2_PWM0_PIN
<> 149:156823d33999 155 { &MTU2TGRA_0, &MTU2TGRB_0 } // MTU2_PWM1_PIN
<> 149:156823d33999 156 { &MTU2TGRA_0, &MTU2TGRB_0 } // MTU2_PWM2_PIN
<> 149:156823d33999 157 { &MTU2TGRC_0, &MTU2TGRD_0 } // MTU2_PWM3_PIN
<> 149:156823d33999 158 { &MTU2TGRC_0, &MTU2TGRD_0 } // MTU2_PWM4_PIN
<> 149:156823d33999 159 { &MTU2TGRC_0, &MTU2TGRD_0 } // MTU2_PWM5_PIN
<> 149:156823d33999 160 { &MTU2TGRA_1, &MTU2TGRB_1 } // MTU2_PWM6_PIN
<> 149:156823d33999 161 { &MTU2TGRA_1, &MTU2TGRB_1 } // MTU2_PWM7_PIN
<> 149:156823d33999 162 { &MTU2TGRA_1, &MTU2TGRB_1 } // MTU2_PWM8_PIN
<> 149:156823d33999 163 { &MTU2TGRA_1, &MTU2TGRB_1 } // MTU2_PWM9_PIN
<> 149:156823d33999 164 { &MTU2TGRA_1, &MTU2TGRB_1 } // MTU2_PWM10_PIN
<> 149:156823d33999 165 { &MTU2TGRA_2, &MTU2TGRB_2 } // MTU2_PWM11_PIN
<> 149:156823d33999 166 { &MTU2TGRA_2, &MTU2TGRB_2 } // MTU2_PWM12_PIN
<> 149:156823d33999 167 { &MTU2TGRA_2, &MTU2TGRB_2 } // MTU2_PWM13_PIN
<> 149:156823d33999 168 { &MTU2TGRA_2, &MTU2TGRB_2 } // MTU2_PWM14_PIN
<> 149:156823d33999 169 { &MTU2TGRA_3, &MTU2TGRB_3 } // MTU2_PWM15_PIN
<> 149:156823d33999 170 { &MTU2TGRA_3, &MTU2TGRB_3 } // MTU2_PWM16_PIN
<> 149:156823d33999 171 { &MTU2TGRA_3, &MTU2TGRB_3 } // MTU2_PWM17_PIN
<> 149:156823d33999 172 { &MTU2TGRC_3, &MTU2TGRD_3 } // MTU2_PWM18_PIN
<> 149:156823d33999 173 { &MTU2TGRC_3, &MTU2TGRD_3 } // MTU2_PWM19_PIN
<> 149:156823d33999 174 { &MTU2TGRC_3, &MTU2TGRD_3 } // MTU2_PWM20_PIN
<> 149:156823d33999 175 { &MTU2TGRA_4, &MTU2TGRB_2 } // MTU2_PWM21_PIN
<> 149:156823d33999 176 { &MTU2TGRA_4, &MTU2TGRB_2 } // MTU2_PWM22_PIN
<> 149:156823d33999 177 { &MTU2TGRA_4, &MTU2TGRB_2 } // MTU2_PWM23_PIN
<> 149:156823d33999 178 { &MTU2TGRC_4, &MTU2TGRD_4 } // MTU2_PWM24_PIN
<> 149:156823d33999 179 { &MTU2TGRC_4, &MTU2TGRD_4 } // MTU2_PWM25_PIN
<> 149:156823d33999 180 { &MTU2TGRC_4, &MTU2TGRD_4 } // MTU2_PWM26_PIN
<> 149:156823d33999 181 };
<> 149:156823d33999 182 #else
<> 149:156823d33999 183 #define MTU2_PWM_NUM 12
<> 149:156823d33999 184 #define MTU2_PWM_SIGNAL 2
<> 149:156823d33999 185 #define MTU2_PWM_OFFSET 0x20
<> 149:156823d33999 186
<> 149:156823d33999 187 // PORT ID, PWM ID, Pin function
<> 149:156823d33999 188 static const PinMap PinMap_PWM[] = {
<> 149:156823d33999 189 //TIOC0 A,C
<> 149:156823d33999 190 {P4_0 , MTU2_PWM0_PIN , 2}, //TIOC0A
<> 149:156823d33999 191 {P5_0 , MTU2_PWM1_PIN , 6}, //TIOC0A
<> 149:156823d33999 192 {P4_2 , MTU2_PWM2_PIN , 2}, //TIOC0C
<> 149:156823d33999 193 {P5_5 , MTU2_PWM3_PIN , 6}, //TIOC0C
<> 149:156823d33999 194 //TIOC2 A
<> 149:156823d33999 195 {P8_14 , MTU2_PWM4_PIN , 4}, //TIOC2A
<> 149:156823d33999 196 //TIOC3 A,C
<> 149:156823d33999 197 {P8_10 , MTU2_PWM5_PIN , 4}, //TIOC3A
<> 149:156823d33999 198 {P5_3 , MTU2_PWM6_PIN , 6}, //TIOC3C
<> 149:156823d33999 199 {P8_12 , MTU2_PWM7_PIN , 4}, //TIOC3C
<> 149:156823d33999 200 //TIOC4 A,C
<> 149:156823d33999 201 {P3_8 , MTU2_PWM8_PIN , 6}, //TIOC4A
<> 149:156823d33999 202 {P4_4 , MTU2_PWM9_PIN , 3}, //TIOC4A
<> 149:156823d33999 203 {P3_10 , MTU2_PWM10_PIN , 6}, //TIOC4C
<> 149:156823d33999 204 {P4_6 , MTU2_PWM11_PIN , 3}, //TIOC4C
<> 149:156823d33999 205 //PWM1
<> 149:156823d33999 206 {P8_10 , PWM0_PIN , 6}, //PWM1C
<> 149:156823d33999 207 {P8_11 , PWM1_PIN , 6}, //PWM1D
<> 149:156823d33999 208 {P8_12 , PWM2_PIN , 6}, //PWM1E
<> 149:156823d33999 209 {P8_13 , PWM3_PIN , 6}, //PWM1F
<> 149:156823d33999 210 {P8_14 , PWM4_PIN , 6}, //PWM1G
<> 149:156823d33999 211 {P8_15 , PWM5_PIN , 6}, //PWM1H
<> 149:156823d33999 212 //PWM2
<> 149:156823d33999 213 {P3_0 , PWM6_PIN , 7}, //PWM2A
<> 149:156823d33999 214 {P3_1 , PWM7_PIN , 7}, //PWM2B
<> 149:156823d33999 215 {P3_2 , PWM8_PIN , 7}, //PWM2C
<> 149:156823d33999 216 {P4_4 , PWM9_PIN , 4}, //PWM2E
<> 149:156823d33999 217 {P4_5 , PWM10_PIN , 4}, //PWM2F
<> 149:156823d33999 218 {P4_6 , PWM11_PIN , 4}, //PWM2G
<> 149:156823d33999 219 {P4_7 , PWM12_PIN , 4}, //PWM2H
<> 149:156823d33999 220 {NC , NC , 0}
<> 149:156823d33999 221 };
<> 149:156823d33999 222
<> 149:156823d33999 223 static const PWMType PORT[] = {
<> 149:156823d33999 224 PWM1C, // PWM0_PIN
<> 149:156823d33999 225 PWM1D, // PWM1_PIN
<> 149:156823d33999 226 PWM1E, // PWM2_PIN
<> 149:156823d33999 227 PWM1F, // PWM3_PIN
<> 149:156823d33999 228 PWM1G, // PWM4_PIN
<> 149:156823d33999 229 PWM1H, // PWM5_PIN
<> 149:156823d33999 230 PWM2A, // PWM6_PIN
<> 149:156823d33999 231 PWM2B, // PWM7_PIN
<> 149:156823d33999 232 PWM2C, // PWM8_PIN
<> 149:156823d33999 233 PWM2E, // PWM9_PIN
<> 149:156823d33999 234 PWM2F, // PWM10_PIN
<> 149:156823d33999 235 PWM2G, // PWM11_PIN
<> 149:156823d33999 236 PWM2H, // PWM12_PIN
<> 149:156823d33999 237 };
<> 149:156823d33999 238
<> 149:156823d33999 239 static const MTU2_PWMType MTU2_PORT[] = {
<> 149:156823d33999 240 TIOC0A, // MTU2_PWM0_PIN
<> 149:156823d33999 241 TIOC0A, // MTU2_PWM1_PIN
<> 149:156823d33999 242 TIOC0C, // MTU2_PWM2_PIN
<> 149:156823d33999 243 TIOC0C, // MTU2_PWM3_PIN
<> 149:156823d33999 244 TIOC2A, // MTU2_PWM4_PIN
<> 149:156823d33999 245 TIOC3A, // MTU2_PWM5_PIN
<> 149:156823d33999 246 TIOC3C, // MTU2_PWM6_PIN
<> 149:156823d33999 247 TIOC3C, // MTU2_PWM7_PIN
<> 149:156823d33999 248 TIOC4A, // MTU2_PWM8_PIN
<> 149:156823d33999 249 TIOC4A, // MTU2_PWM9_PIN
<> 149:156823d33999 250 TIOC4C, // MTU2_PWM10_PIN
<> 149:156823d33999 251 TIOC4C, // MTU2_PWM11_PIN
<> 149:156823d33999 252 };
<> 149:156823d33999 253
<> 149:156823d33999 254 static __IO uint16_t *PWM_MATCH[] = {
<> 149:156823d33999 255 &PWMPWBFR_1C, // PWM0_PIN
<> 149:156823d33999 256 &PWMPWBFR_1C, // PWM1_PIN
<> 149:156823d33999 257 &PWMPWBFR_1E, // PWM2_PIN
<> 149:156823d33999 258 &PWMPWBFR_1E, // PWM3_PIN
<> 149:156823d33999 259 &PWMPWBFR_1G, // PWM4_PIN
<> 149:156823d33999 260 &PWMPWBFR_1G, // PWM5_PIN
<> 149:156823d33999 261 &PWMPWBFR_2A, // PWM6_PIN
<> 149:156823d33999 262 &PWMPWBFR_2A, // PWM7_PIN
<> 149:156823d33999 263 &PWMPWBFR_2C, // PWM8_PIN
<> 149:156823d33999 264 &PWMPWBFR_2E, // PWM9_PIN
<> 149:156823d33999 265 &PWMPWBFR_2E, // PWM10_PIN
<> 149:156823d33999 266 &PWMPWBFR_2G, // PWM11_PIN
<> 149:156823d33999 267 &PWMPWBFR_2G, // PWM12_PIN
<> 149:156823d33999 268 };
<> 149:156823d33999 269
<> 149:156823d33999 270 static __IO uint16_t *MTU2_PWM_MATCH[MTU2_PWM_NUM][MTU2_PWM_SIGNAL] = {
<> 149:156823d33999 271 { &MTU2TGRA_0, &MTU2TGRB_0 }, // MTU2_PWM0_PIN
<> 149:156823d33999 272 { &MTU2TGRA_0, &MTU2TGRB_0 }, // MTU2_PWM1_PIN
<> 149:156823d33999 273 { &MTU2TGRC_0, &MTU2TGRD_0 }, // MTU2_PWM2_PIN
<> 149:156823d33999 274 { &MTU2TGRC_0, &MTU2TGRD_0 }, // MTU2_PWM3_PIN
<> 149:156823d33999 275 { &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM4_PIN
<> 149:156823d33999 276 { &MTU2TGRA_3, &MTU2TGRB_3 }, // MTU2_PWM5_PIN
<> 149:156823d33999 277 { &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM6_PIN
<> 149:156823d33999 278 { &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM7_PIN
<> 149:156823d33999 279 { &MTU2TGRA_4, &MTU2TGRB_2 }, // MTU2_PWM8_PIN
<> 149:156823d33999 280 { &MTU2TGRA_4, &MTU2TGRB_2 }, // MTU2_PWM9_PIN
<> 149:156823d33999 281 { &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM10_PIN
<> 149:156823d33999 282 { &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM11_PIN
<> 149:156823d33999 283 };
<> 149:156823d33999 284 #endif
<> 149:156823d33999 285
<> 149:156823d33999 286
<> 149:156823d33999 287 static __IO uint8_t *TCR_MATCH[] = {
<> 149:156823d33999 288 &MTU2TCR_0,
<> 149:156823d33999 289 &MTU2TCR_1,
<> 149:156823d33999 290 &MTU2TCR_2,
<> 149:156823d33999 291 &MTU2TCR_3,
<> 149:156823d33999 292 &MTU2TCR_4,
<> 149:156823d33999 293 };
<> 149:156823d33999 294
<> 149:156823d33999 295 static __IO uint8_t *TIORH_MATCH[] = {
<> 149:156823d33999 296 &MTU2TIORH_0,
<> 149:156823d33999 297 &MTU2TIOR_1,
<> 149:156823d33999 298 &MTU2TIOR_2,
<> 149:156823d33999 299 &MTU2TIORH_3,
<> 149:156823d33999 300 &MTU2TIORH_4,
<> 149:156823d33999 301 };
<> 149:156823d33999 302
<> 149:156823d33999 303 static __IO uint8_t *TIORL_MATCH[] = {
<> 149:156823d33999 304 &MTU2TIORL_0,
<> 149:156823d33999 305 NULL,
<> 149:156823d33999 306 NULL,
<> 149:156823d33999 307 &MTU2TIORL_3,
<> 149:156823d33999 308 &MTU2TIORL_4,
<> 149:156823d33999 309 };
<> 149:156823d33999 310
<> 149:156823d33999 311 static __IO uint16_t *TGRA_MATCH[] = {
<> 149:156823d33999 312 &MTU2TGRA_0,
<> 149:156823d33999 313 &MTU2TGRA_1,
<> 149:156823d33999 314 &MTU2TGRA_2,
<> 149:156823d33999 315 &MTU2TGRA_3,
<> 149:156823d33999 316 &MTU2TGRA_4,
<> 149:156823d33999 317 };
<> 149:156823d33999 318
<> 149:156823d33999 319 static __IO uint16_t *TGRC_MATCH[] = {
<> 149:156823d33999 320 &MTU2TGRC_0,
<> 149:156823d33999 321 NULL,
<> 149:156823d33999 322 NULL,
<> 149:156823d33999 323 &MTU2TGRC_3,
<> 149:156823d33999 324 &MTU2TGRC_4,
<> 149:156823d33999 325 };
<> 149:156823d33999 326
<> 149:156823d33999 327 static __IO uint8_t *TMDR_MATCH[] = {
<> 149:156823d33999 328 &MTU2TMDR_0,
<> 149:156823d33999 329 &MTU2TMDR_1,
<> 149:156823d33999 330 &MTU2TMDR_2,
<> 149:156823d33999 331 &MTU2TMDR_3,
<> 149:156823d33999 332 &MTU2TMDR_4,
<> 149:156823d33999 333 };
<> 149:156823d33999 334
<> 149:156823d33999 335 static int MAX_PERIOD[] = {
<> 149:156823d33999 336 125000,
<> 149:156823d33999 337 503000,
<> 149:156823d33999 338 2000000,
<> 149:156823d33999 339 2000000,
<> 149:156823d33999 340 2000000,
<> 149:156823d33999 341 };
<> 149:156823d33999 342
<> 149:156823d33999 343 typedef enum {
<> 149:156823d33999 344 MODE_PWM = 0,
<> 149:156823d33999 345 MODE_MTU2
<> 149:156823d33999 346 } PWMmode;
<> 149:156823d33999 347
<> 149:156823d33999 348 typedef enum {
<> 149:156823d33999 349 MTU2_PULSE = 0,
<> 149:156823d33999 350 MTU2_PERIOD
<> 149:156823d33999 351 } MTU2Signal;
<> 149:156823d33999 352
<> 149:156823d33999 353 static int pwm_mode = MODE_PWM;
<> 149:156823d33999 354 static uint16_t init_period_ch1 = 0;
<> 149:156823d33999 355 static uint16_t init_period_ch2 = 0;
<> 149:156823d33999 356 static uint16_t init_mtu2_period_ch[5] = {0};
<> 149:156823d33999 357 static int32_t period_ch1 = 1;
<> 149:156823d33999 358 static int32_t period_ch2 = 1;
<> 149:156823d33999 359 static int32_t mtu2_period_ch[5] = {1, 1, 1, 1, 1};
<> 149:156823d33999 360
<> 149:156823d33999 361 void pwmout_init(pwmout_t* obj, PinName pin) {
<> 149:156823d33999 362 // determine the channel
<> 149:156823d33999 363 PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
<> 149:156823d33999 364 MBED_ASSERT(pwm != (PWMName)NC);
<> 149:156823d33999 365
<> 149:156823d33999 366 if (pwm >= MTU2_PWM_OFFSET) {
<> 149:156823d33999 367 /* PWM by MTU2 */
<> 149:156823d33999 368 int tmp_pwm;
<> 149:156823d33999 369
<> 149:156823d33999 370 pwm_mode = MODE_MTU2;
<> 149:156823d33999 371 // power on
<> 149:156823d33999 372 CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP33);
<> 149:156823d33999 373
<> 149:156823d33999 374 obj->pwm = pwm;
<> 149:156823d33999 375 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
<> 149:156823d33999 376 if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000040) == 0x00000040) {
<> 149:156823d33999 377 obj->ch = 4;
<> 149:156823d33999 378 MTU2TOER |= 0x36;
<> 149:156823d33999 379 } else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000030) == 0x00000030) {
<> 149:156823d33999 380 obj->ch = 3;
<> 149:156823d33999 381 MTU2TOER |= 0x09;
<> 149:156823d33999 382 } else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000020) == 0x00000020) {
<> 149:156823d33999 383 obj->ch = 2;
<> 149:156823d33999 384 } else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000010) == 0x00000010) {
<> 149:156823d33999 385 obj->ch = 1;
<> 149:156823d33999 386 } else {
<> 149:156823d33999 387 obj->ch = 0;
<> 149:156823d33999 388 }
<> 149:156823d33999 389 // Wire pinout
<> 149:156823d33999 390 pinmap_pinout(pin, PinMap_PWM);
<> 149:156823d33999 391
<> 149:156823d33999 392 int bitmask = 1 << (pin & 0xf);
<> 149:156823d33999 393
<> 149:156823d33999 394 *PMSR(PINGROUP(pin)) = (bitmask << 16) | 0;
<> 149:156823d33999 395
<> 149:156823d33999 396 // default duty 0.0f
<> 149:156823d33999 397 pwmout_write(obj, 0);
<> 149:156823d33999 398 if (init_mtu2_period_ch[obj->ch] == 0) {
<> 149:156823d33999 399 // default period 1ms
<> 149:156823d33999 400 pwmout_period_us(obj, 1000);
<> 149:156823d33999 401 init_mtu2_period_ch[obj->ch] = 1;
<> 149:156823d33999 402 }
<> 149:156823d33999 403 } else {
<> 149:156823d33999 404 /* PWM */
<> 149:156823d33999 405 pwm_mode = MODE_PWM;
<> 149:156823d33999 406 // power on
<> 149:156823d33999 407 CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP30);
<> 149:156823d33999 408
<> 149:156823d33999 409 obj->pwm = pwm;
<> 149:156823d33999 410 if (((uint32_t)PORT[obj->pwm] & 0x00000010) == 0x00000010) {
<> 149:156823d33999 411 obj->ch = 2;
<> 149:156823d33999 412 PWMPWPR_2_BYTE_L = 0x00;
<> 149:156823d33999 413 } else {
<> 149:156823d33999 414 obj->ch = 1;
<> 149:156823d33999 415 PWMPWPR_1_BYTE_L = 0x00;
<> 149:156823d33999 416 }
<> 149:156823d33999 417
<> 149:156823d33999 418 // Wire pinout
<> 149:156823d33999 419 pinmap_pinout(pin, PinMap_PWM);
<> 149:156823d33999 420
<> 149:156823d33999 421 // default to 491us: standard for servos, and fine for e.g. brightness control
<> 149:156823d33999 422 pwmout_write(obj, 0);
<> 149:156823d33999 423 if ((obj->ch == 2) && (init_period_ch2 == 0)) {
<> 149:156823d33999 424 pwmout_period_us(obj, 491);
<> 149:156823d33999 425 init_period_ch2 = 1;
<> 149:156823d33999 426 }
<> 149:156823d33999 427 if ((obj->ch == 1) && (init_period_ch1 == 0)) {
<> 149:156823d33999 428 pwmout_period_us(obj, 491);
<> 149:156823d33999 429 init_period_ch1 = 1;
<> 149:156823d33999 430 }
<> 149:156823d33999 431 }
<> 149:156823d33999 432 }
<> 149:156823d33999 433
<> 149:156823d33999 434 void pwmout_free(pwmout_t* obj) {
<> 149:156823d33999 435 pwmout_write(obj, 0);
<> 149:156823d33999 436 }
<> 149:156823d33999 437
<> 149:156823d33999 438 void pwmout_write(pwmout_t* obj, float value) {
<> 149:156823d33999 439 uint32_t wk_cycle;
<> 149:156823d33999 440 uint16_t v;
<> 149:156823d33999 441
<> 149:156823d33999 442 if (pwm_mode == MODE_MTU2) {
<> 149:156823d33999 443 /* PWM by MTU2 */
<> 149:156823d33999 444 int tmp_pwm;
<> 149:156823d33999 445
<> 149:156823d33999 446 if (value < 0.0f) {
<> 149:156823d33999 447 value = 0.0f;
<> 149:156823d33999 448 } else if (value > 1.0f) {
<> 149:156823d33999 449 value = 1.0f;
<> 149:156823d33999 450 } else {
<> 149:156823d33999 451 // Do Nothing
<> 149:156823d33999 452 }
<> 149:156823d33999 453 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
<> 149:156823d33999 454 wk_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
<> 149:156823d33999 455 // set channel match to percentage
<> 149:156823d33999 456 *MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] = (uint16_t)((float)wk_cycle * value);
<> 149:156823d33999 457 } else {
<> 149:156823d33999 458 /* PWM */
<> 149:156823d33999 459 if (value < 0.0f) {
<> 149:156823d33999 460 value = 0.0f;
<> 149:156823d33999 461 } else if (value > 1.0f) {
<> 149:156823d33999 462 value = 1.0f;
<> 149:156823d33999 463 } else {
<> 149:156823d33999 464 // Do Nothing
<> 149:156823d33999 465 }
<> 149:156823d33999 466
<> 149:156823d33999 467 if (obj->ch == 2) {
<> 149:156823d33999 468 wk_cycle = PWMPWCYR_2 & 0x03ff;
<> 149:156823d33999 469 } else {
<> 149:156823d33999 470 wk_cycle = PWMPWCYR_1 & 0x03ff;
<> 149:156823d33999 471 }
<> 149:156823d33999 472
<> 149:156823d33999 473 // set channel match to percentage
<> 149:156823d33999 474 v = (uint16_t)((float)wk_cycle * value);
<> 149:156823d33999 475 *PWM_MATCH[obj->pwm] = (v | ((PORT[obj->pwm] & 1) << 12));
<> 149:156823d33999 476 }
<> 149:156823d33999 477 }
<> 149:156823d33999 478
<> 149:156823d33999 479 float pwmout_read(pwmout_t* obj) {
<> 149:156823d33999 480 uint32_t wk_cycle;
<> 149:156823d33999 481 float value;
<> 149:156823d33999 482
<> 149:156823d33999 483 if (pwm_mode == MODE_MTU2) {
<> 149:156823d33999 484 /* PWM by MTU2 */
<> 149:156823d33999 485 uint32_t wk_pulse;
<> 149:156823d33999 486 int tmp_pwm;
<> 149:156823d33999 487
<> 149:156823d33999 488 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
<> 149:156823d33999 489 wk_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
<> 149:156823d33999 490 wk_pulse = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] & 0xffff;
<> 149:156823d33999 491 value = ((float)wk_pulse / (float)wk_cycle);
<> 149:156823d33999 492 } else {
<> 149:156823d33999 493 /* PWM */
<> 149:156823d33999 494 if (obj->ch == 2) {
<> 149:156823d33999 495 wk_cycle = PWMPWCYR_2 & 0x03ff;
<> 149:156823d33999 496 } else {
<> 149:156823d33999 497 wk_cycle = PWMPWCYR_1 & 0x03ff;
<> 149:156823d33999 498 }
<> 149:156823d33999 499 value = ((float)(*PWM_MATCH[obj->pwm] & 0x03ff) / (float)wk_cycle);
<> 149:156823d33999 500 }
<> 149:156823d33999 501
<> 149:156823d33999 502 return (value > 1.0f) ? (1.0f) : (value);
<> 149:156823d33999 503 }
<> 149:156823d33999 504
<> 149:156823d33999 505 void pwmout_period(pwmout_t* obj, float seconds) {
<> 149:156823d33999 506 pwmout_period_us(obj, seconds * 1000000.0f);
<> 149:156823d33999 507 }
<> 149:156823d33999 508
<> 149:156823d33999 509 void pwmout_period_ms(pwmout_t* obj, int ms) {
<> 149:156823d33999 510 pwmout_period_us(obj, ms * 1000);
<> 149:156823d33999 511 }
<> 149:156823d33999 512
<> 149:156823d33999 513 static void set_duty_again(__IO uint16_t *p_pwmpbfr, uint16_t last_cycle, uint16_t new_cycle){
<> 149:156823d33999 514 uint16_t wk_pwmpbfr;
<> 149:156823d33999 515 float value;
<> 149:156823d33999 516 uint16_t v;
<> 149:156823d33999 517
<> 149:156823d33999 518 wk_pwmpbfr = *p_pwmpbfr;
<> 149:156823d33999 519 value = ((float)(wk_pwmpbfr & 0x03ff) / (float)last_cycle);
<> 149:156823d33999 520 v = (uint16_t)((float)new_cycle * value);
<> 149:156823d33999 521 *p_pwmpbfr = (v | (wk_pwmpbfr & 0x1000));
<> 149:156823d33999 522 }
<> 149:156823d33999 523
<> 149:156823d33999 524 static void set_mtu2_duty_again(__IO uint16_t *p_pwmpbfr, uint16_t last_cycle, uint16_t new_cycle){
<> 149:156823d33999 525 uint16_t wk_pwmpbfr;
<> 149:156823d33999 526 float value;
<> 149:156823d33999 527
<> 149:156823d33999 528 wk_pwmpbfr = *p_pwmpbfr;
<> 149:156823d33999 529 value = ((float)(wk_pwmpbfr & 0xffff) / (float)last_cycle);
<> 149:156823d33999 530 *p_pwmpbfr = (uint16_t)((float)new_cycle * value);
<> 149:156823d33999 531 }
<> 149:156823d33999 532
<> 149:156823d33999 533 // Set the PWM period, keeping the duty cycle the same.
<> 149:156823d33999 534 void pwmout_period_us(pwmout_t* obj, int us) {
<> 149:156823d33999 535 uint64_t wk_cycle_mtu2;
<> 149:156823d33999 536 uint32_t pclk_base;
<> 149:156823d33999 537 uint32_t wk_cycle;
<> 149:156823d33999 538 uint32_t wk_cks = 0;
<> 149:156823d33999 539 uint16_t wk_last_cycle;
<> 149:156823d33999 540 int max_us = 0;
<> 149:156823d33999 541
<> 149:156823d33999 542 if (pwm_mode == MODE_MTU2) {
<> 149:156823d33999 543 /* PWM by MTU2 */
<> 149:156823d33999 544 int tmp_pwm;
<> 149:156823d33999 545 uint8_t tmp_tcr_up;
<> 149:156823d33999 546 uint8_t tmp_tstr_sp;
<> 149:156823d33999 547 uint8_t tmp_tstr_st;
<> 149:156823d33999 548
<> 149:156823d33999 549 max_us = MAX_PERIOD[obj->ch];
<> 149:156823d33999 550 if (us > max_us) {
<> 149:156823d33999 551 us = max_us;
<> 149:156823d33999 552 } else if (us < 1) {
<> 149:156823d33999 553 us = 1;
<> 149:156823d33999 554 } else {
<> 149:156823d33999 555 // Do Nothing
<> 149:156823d33999 556 }
<> 149:156823d33999 557
<> 149:156823d33999 558 if (RZ_A1_IsClockMode0() == false) {
<> 149:156823d33999 559 pclk_base = (uint32_t)CM1_RENESAS_RZ_A1_P0_CLK;
<> 149:156823d33999 560 } else {
<> 149:156823d33999 561 pclk_base = (uint32_t)CM0_RENESAS_RZ_A1_P0_CLK;
<> 149:156823d33999 562 }
<> 149:156823d33999 563
<> 149:156823d33999 564 wk_cycle_mtu2 = (uint64_t)pclk_base * us;
<> 149:156823d33999 565 while (wk_cycle_mtu2 >= 65535000000) {
<> 149:156823d33999 566 if ((obj->ch == 1) && (wk_cks == 3)) {
<> 149:156823d33999 567 wk_cks+=2;
<> 149:156823d33999 568 } else if ((obj->ch == 2) && (wk_cks == 3)) {
<> 149:156823d33999 569 wk_cycle_mtu2 >>= 2;
<> 149:156823d33999 570 wk_cks+=3;
<> 149:156823d33999 571 }
<> 149:156823d33999 572 wk_cycle_mtu2 >>= 2;
<> 149:156823d33999 573 wk_cks++;
<> 149:156823d33999 574 }
<> 149:156823d33999 575 wk_cycle = (uint32_t)(wk_cycle_mtu2 / 1000000);
<> 149:156823d33999 576
<> 149:156823d33999 577 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
<> 149:156823d33999 578 if (((uint8_t)MTU2_PORT[tmp_pwm] & 0x02) == 0x02) {
<> 149:156823d33999 579 tmp_tcr_up = 0xC0;
<> 149:156823d33999 580 } else {
<> 149:156823d33999 581 tmp_tcr_up = 0x40;
<> 149:156823d33999 582 }
<> 149:156823d33999 583 if ((obj->ch == 4) || (obj->ch == 3)) {
<> 149:156823d33999 584 tmp_tstr_sp = ~(0x38 | (1 << (obj->ch + 3)));
<> 149:156823d33999 585 tmp_tstr_st = (1 << (obj->ch + 3));
<> 149:156823d33999 586 } else {
<> 149:156823d33999 587 tmp_tstr_sp = ~(0x38 | (1 << obj->ch));
<> 149:156823d33999 588 tmp_tstr_st = (1 << obj->ch);
<> 149:156823d33999 589 }
<> 149:156823d33999 590 // Counter Stop
<> 149:156823d33999 591 MTU2TSTR &= tmp_tstr_sp;
<> 149:156823d33999 592 wk_last_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
<> 149:156823d33999 593 *TCR_MATCH[obj->ch] = tmp_tcr_up | wk_cks;
<> 149:156823d33999 594 *TIORH_MATCH[obj->ch] = 0x21;
<> 149:156823d33999 595 if ((obj->ch == 0) || (obj->ch == 3) || (obj->ch == 4)) {
<> 149:156823d33999 596 *TIORL_MATCH[obj->ch] = 0x21;
<> 149:156823d33999 597 }
<> 149:156823d33999 598 *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] = (uint16_t)wk_cycle; // Set period
<> 149:156823d33999 599
<> 149:156823d33999 600 // Set duty again(TGRA)
<> 149:156823d33999 601 set_mtu2_duty_again(TGRA_MATCH[obj->ch], wk_last_cycle, wk_cycle);
<> 149:156823d33999 602 if ((obj->ch == 0) || (obj->ch == 3) || (obj->ch == 4)) {
<> 149:156823d33999 603 // Set duty again(TGRC)
<> 149:156823d33999 604 set_mtu2_duty_again(TGRC_MATCH[obj->ch], wk_last_cycle, wk_cycle);
<> 149:156823d33999 605 }
<> 149:156823d33999 606 *TMDR_MATCH[obj->ch] = 0x02; // PWM mode 1
<> 149:156823d33999 607
<> 149:156823d33999 608 // Counter Start
<> 149:156823d33999 609 MTU2TSTR |= tmp_tstr_st;
<> 149:156823d33999 610 // Save for future use
<> 149:156823d33999 611 mtu2_period_ch[obj->ch] = us;
<> 149:156823d33999 612 } else {
<> 149:156823d33999 613 /* PWM */
<> 149:156823d33999 614 if (us > 491) {
<> 149:156823d33999 615 us = 491;
<> 149:156823d33999 616 } else if (us < 1) {
<> 149:156823d33999 617 us = 1;
<> 149:156823d33999 618 } else {
<> 149:156823d33999 619 // Do Nothing
<> 149:156823d33999 620 }
<> 149:156823d33999 621
<> 149:156823d33999 622 if (RZ_A1_IsClockMode0() == false) {
<> 149:156823d33999 623 pclk_base = (uint32_t)CM1_RENESAS_RZ_A1_P0_CLK / 10000;
<> 149:156823d33999 624 } else {
<> 149:156823d33999 625 pclk_base = (uint32_t)CM0_RENESAS_RZ_A1_P0_CLK / 10000;
<> 149:156823d33999 626 }
<> 149:156823d33999 627
<> 149:156823d33999 628 wk_cycle = pclk_base * us;
<> 149:156823d33999 629 while (wk_cycle >= 102350) {
<> 149:156823d33999 630 wk_cycle >>= 1;
<> 149:156823d33999 631 wk_cks++;
<> 149:156823d33999 632 }
<> 149:156823d33999 633 wk_cycle = (wk_cycle + 50) / 100;
<> 149:156823d33999 634
<> 149:156823d33999 635 if (obj->ch == 2) {
<> 149:156823d33999 636 wk_last_cycle = PWMPWCYR_2 & 0x03ff;
<> 149:156823d33999 637 PWMPWCR_2_BYTE_L = 0xc0 | wk_cks;
<> 149:156823d33999 638 PWMPWCYR_2 = (uint16_t)wk_cycle;
<> 149:156823d33999 639
<> 149:156823d33999 640 // Set duty again
<> 149:156823d33999 641 set_duty_again(&PWMPWBFR_2A, wk_last_cycle, wk_cycle);
<> 149:156823d33999 642 set_duty_again(&PWMPWBFR_2C, wk_last_cycle, wk_cycle);
<> 149:156823d33999 643 set_duty_again(&PWMPWBFR_2E, wk_last_cycle, wk_cycle);
<> 149:156823d33999 644 set_duty_again(&PWMPWBFR_2G, wk_last_cycle, wk_cycle);
<> 149:156823d33999 645
<> 149:156823d33999 646 // Counter Start
<> 149:156823d33999 647 PWMPWCR_2_BYTE_L |= 0x08;
<> 149:156823d33999 648
<> 149:156823d33999 649 // Save for future use
<> 149:156823d33999 650 period_ch2 = us;
<> 149:156823d33999 651 } else {
<> 149:156823d33999 652 wk_last_cycle = PWMPWCYR_1 & 0x03ff;
<> 149:156823d33999 653 PWMPWCR_1_BYTE_L = 0xc0 | wk_cks;
<> 149:156823d33999 654 PWMPWCYR_1 = (uint16_t)wk_cycle;
<> 149:156823d33999 655
<> 149:156823d33999 656 // Set duty again
<> 149:156823d33999 657 set_duty_again(&PWMPWBFR_1A, wk_last_cycle, wk_cycle);
<> 149:156823d33999 658 set_duty_again(&PWMPWBFR_1C, wk_last_cycle, wk_cycle);
<> 149:156823d33999 659 set_duty_again(&PWMPWBFR_1E, wk_last_cycle, wk_cycle);
<> 149:156823d33999 660 set_duty_again(&PWMPWBFR_1G, wk_last_cycle, wk_cycle);
<> 149:156823d33999 661
<> 149:156823d33999 662 // Counter Start
<> 149:156823d33999 663 PWMPWCR_1_BYTE_L |= 0x08;
<> 149:156823d33999 664
<> 149:156823d33999 665 // Save for future use
<> 149:156823d33999 666 period_ch1 = us;
<> 149:156823d33999 667 }
<> 149:156823d33999 668 }
<> 149:156823d33999 669 }
<> 149:156823d33999 670
<> 149:156823d33999 671 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
<> 149:156823d33999 672 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
<> 149:156823d33999 673 }
<> 149:156823d33999 674
<> 149:156823d33999 675 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
<> 149:156823d33999 676 pwmout_pulsewidth_us(obj, ms * 1000);
<> 149:156823d33999 677 }
<> 149:156823d33999 678
<> 149:156823d33999 679 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
<> 149:156823d33999 680 float value = 0;
<> 149:156823d33999 681
<> 149:156823d33999 682 if (pwm_mode == MODE_MTU2) {
<> 149:156823d33999 683 /* PWM by MTU2 */
<> 149:156823d33999 684 if (mtu2_period_ch[obj->ch] != 0) {
<> 149:156823d33999 685 value = (float)us / (float)mtu2_period_ch[obj->ch];
<> 149:156823d33999 686 }
<> 149:156823d33999 687 } else {
<> 149:156823d33999 688 /* PWM */
<> 149:156823d33999 689 if (obj->ch == 2) {
<> 149:156823d33999 690 if (period_ch2 != 0) {
<> 149:156823d33999 691 value = (float)us / (float)period_ch2;
<> 149:156823d33999 692 }
<> 149:156823d33999 693 } else {
<> 149:156823d33999 694 if (period_ch1 != 0) {
<> 149:156823d33999 695 value = (float)us / (float)period_ch1;
<> 149:156823d33999 696 }
<> 149:156823d33999 697 }
<> 149:156823d33999 698 }
<> 149:156823d33999 699 pwmout_write(obj, value);
<> 149:156823d33999 700 }