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targets/TARGET_Atmel/TARGET_SAM_CortexM4/lp_ticker.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_Atmel/TARGET_SAM_CortexM4/lp_ticker.c@107:414e9c822e99 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 107:414e9c822e99 1 /* mbed Microcontroller Library
mbed_official 107:414e9c822e99 2 * Copyright (c) 2006-2015 ARM Limited
mbed_official 107:414e9c822e99 3 *
mbed_official 107:414e9c822e99 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 107:414e9c822e99 5 * you may not use this file except in compliance with the License.
mbed_official 107:414e9c822e99 6 * You may obtain a copy of the License at
mbed_official 107:414e9c822e99 7 *
mbed_official 107:414e9c822e99 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 107:414e9c822e99 9 *
mbed_official 107:414e9c822e99 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 107:414e9c822e99 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 107:414e9c822e99 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 107:414e9c822e99 13 * See the License for the specific language governing permissions and
mbed_official 107:414e9c822e99 14 * limitations under the License.
mbed_official 107:414e9c822e99 15 */
mbed_official 107:414e9c822e99 16
mbed_official 107:414e9c822e99 17 #include "cmsis.h"
mbed_official 107:414e9c822e99 18 #include <stddef.h>
mbed_official 107:414e9c822e99 19 #include "lp_ticker_api.h"
mbed_official 107:414e9c822e99 20 #include "mbed_assert.h"
mbed_official 107:414e9c822e99 21 #include "sleep_api.h"
mbed_official 107:414e9c822e99 22 #include "compiler.h"
mbed_official 107:414e9c822e99 23 #include "sysclk.h"
mbed_official 107:414e9c822e99 24 #include "tc.h"
mbed_official 107:414e9c822e99 25 #include "us_ticker_api.h"
mbed_official 107:414e9c822e99 26
mbed_official 107:414e9c822e99 27 uint8_t lp_ticker_inited = 0;
mbed_official 107:414e9c822e99 28 extern volatile uint8_t us_ticker_inited;
mbed_official 107:414e9c822e99 29 extern uint8_t g_sys_init;
mbed_official 107:414e9c822e99 30 extern volatile uint32_t overflow32bitcounter;
mbed_official 107:414e9c822e99 31 volatile uint16_t lp_ticker_16bit_counter;
mbed_official 107:414e9c822e99 32 volatile uint16_t lp_ticker_interrupt_counter;
mbed_official 107:414e9c822e99 33 volatile uint16_t lp_ticker_interrupt_offset;
mbed_official 107:414e9c822e99 34 volatile uint32_t lpoverflow32bitcounter = 0;
mbed_official 107:414e9c822e99 35
mbed_official 107:414e9c822e99 36 #define TICKER_COUNTER_lp TC0
mbed_official 107:414e9c822e99 37
mbed_official 107:414e9c822e99 38 #define TICKER_COUNTER_CLK2 ID_TC2
mbed_official 107:414e9c822e99 39
mbed_official 107:414e9c822e99 40 #define TICKER_COUNTER_CHANNEL2 2
mbed_official 107:414e9c822e99 41 #define TICKER_COUNTER_IRQn2 TC2_IRQn
mbed_official 107:414e9c822e99 42 #define TICKER_COUNTER_Handlr2 TC2_Handler
mbed_official 107:414e9c822e99 43
mbed_official 107:414e9c822e99 44 #define OVERFLOW_16bit_VALUE 0xFFFF
mbed_official 107:414e9c822e99 45
mbed_official 107:414e9c822e99 46
mbed_official 107:414e9c822e99 47 void TICKER_COUNTER_Handlr2(void)
mbed_official 107:414e9c822e99 48 {
mbed_official 107:414e9c822e99 49 uint32_t status=tc_get_status(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
mbed_official 107:414e9c822e99 50 uint32_t interrupmask=tc_get_interrupt_mask(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
mbed_official 107:414e9c822e99 51
mbed_official 107:414e9c822e99 52 if (((status & interrupmask) & TC_IER_CPCS)) {
mbed_official 107:414e9c822e99 53 if(lp_ticker_interrupt_counter) {
mbed_official 107:414e9c822e99 54 lp_ticker_interrupt_counter--;
mbed_official 107:414e9c822e99 55 } else {
mbed_official 107:414e9c822e99 56 if(lp_ticker_interrupt_offset) {
mbed_official 107:414e9c822e99 57 tc_stop(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
mbed_official 107:414e9c822e99 58 tc_write_rc(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, (uint32_t)lp_ticker_interrupt_offset);
mbed_official 107:414e9c822e99 59 tc_start(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
mbed_official 107:414e9c822e99 60 lp_ticker_interrupt_offset=0;
mbed_official 107:414e9c822e99 61 } else {
mbed_official 107:414e9c822e99 62 lp_ticker_irq_handler();
mbed_official 107:414e9c822e99 63 }
mbed_official 107:414e9c822e99 64 }
mbed_official 107:414e9c822e99 65 }
mbed_official 107:414e9c822e99 66 }
mbed_official 107:414e9c822e99 67
mbed_official 107:414e9c822e99 68 void lp_ticker_init(void)
mbed_official 107:414e9c822e99 69 {
mbed_official 107:414e9c822e99 70 if(lp_ticker_inited)
mbed_official 107:414e9c822e99 71 return;
mbed_official 107:414e9c822e99 72 if (!us_ticker_inited)
mbed_official 107:414e9c822e99 73 us_ticker_init();
mbed_official 107:414e9c822e99 74 sysclk_enable_peripheral_clock(TICKER_COUNTER_CLK2);
mbed_official 107:414e9c822e99 75 tc_init(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, TC_CMR_TCCLKS_TIMER_CLOCK4);
mbed_official 107:414e9c822e99 76 lp_ticker_inited = 1;
mbed_official 107:414e9c822e99 77 }
mbed_official 107:414e9c822e99 78
mbed_official 107:414e9c822e99 79 uint32_t lp_ticker_read()
mbed_official 107:414e9c822e99 80 {
mbed_official 107:414e9c822e99 81 if (!lp_ticker_inited)
mbed_official 107:414e9c822e99 82 lp_ticker_init();
mbed_official 107:414e9c822e99 83 return us_ticker_read();
mbed_official 107:414e9c822e99 84 }
mbed_official 107:414e9c822e99 85
mbed_official 107:414e9c822e99 86 void lp_ticker_set_interrupt(timestamp_t timestamp)
mbed_official 107:414e9c822e99 87 {
mbed_official 107:414e9c822e99 88 uint32_t cur_time;
mbed_official 107:414e9c822e99 89 int32_t delta;
mbed_official 107:414e9c822e99 90
mbed_official 107:414e9c822e99 91 cur_time = lp_ticker_read();
mbed_official 107:414e9c822e99 92 delta = (int32_t)((uint32_t)timestamp - cur_time);
mbed_official 107:414e9c822e99 93 if (delta < 0) {
mbed_official 107:414e9c822e99 94 /* Event already occurred in past */
mbed_official 107:414e9c822e99 95 lp_ticker_irq_handler();
mbed_official 107:414e9c822e99 96 return;
mbed_official 107:414e9c822e99 97 }
mbed_official 107:414e9c822e99 98
mbed_official 107:414e9c822e99 99 uint16_t interruptat=0;
mbed_official 107:414e9c822e99 100
mbed_official 107:414e9c822e99 101 if(delta > OVERFLOW_16bit_VALUE) {
mbed_official 107:414e9c822e99 102 lp_ticker_interrupt_counter= (delta/OVERFLOW_16bit_VALUE) -1;
mbed_official 107:414e9c822e99 103 lp_ticker_interrupt_offset=delta%OVERFLOW_16bit_VALUE;
mbed_official 107:414e9c822e99 104 interruptat=OVERFLOW_16bit_VALUE;
mbed_official 107:414e9c822e99 105 } else {
mbed_official 107:414e9c822e99 106 lp_ticker_interrupt_counter=0;
mbed_official 107:414e9c822e99 107 lp_ticker_interrupt_offset=0;
mbed_official 107:414e9c822e99 108 interruptat=delta;
mbed_official 107:414e9c822e99 109 }
mbed_official 107:414e9c822e99 110
mbed_official 107:414e9c822e99 111 NVIC_DisableIRQ(TICKER_COUNTER_IRQn2);
mbed_official 107:414e9c822e99 112
mbed_official 107:414e9c822e99 113 tc_write_rc(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, (uint32_t)interruptat);
mbed_official 107:414e9c822e99 114
mbed_official 107:414e9c822e99 115 NVIC_ClearPendingIRQ(TICKER_COUNTER_IRQn2);
mbed_official 107:414e9c822e99 116 NVIC_SetPriority(TICKER_COUNTER_IRQn2, 0);
mbed_official 107:414e9c822e99 117 NVIC_EnableIRQ(TICKER_COUNTER_IRQn2);
mbed_official 107:414e9c822e99 118 tc_enable_interrupt(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, TC_IDR_CPCS );
mbed_official 107:414e9c822e99 119
mbed_official 107:414e9c822e99 120 tc_start(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
mbed_official 107:414e9c822e99 121 }
mbed_official 107:414e9c822e99 122
mbed_official 107:414e9c822e99 123 void lp_ticker_disable_interrupt(void)
mbed_official 107:414e9c822e99 124 {
mbed_official 107:414e9c822e99 125 tc_stop(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2);
mbed_official 107:414e9c822e99 126 tc_disable_interrupt(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, TC_IDR_CPCS);
mbed_official 107:414e9c822e99 127 NVIC_DisableIRQ(TICKER_COUNTER_IRQn2);
mbed_official 107:414e9c822e99 128 }
mbed_official 107:414e9c822e99 129
mbed_official 107:414e9c822e99 130 void lp_ticker_clear_interrupt(void)
mbed_official 107:414e9c822e99 131 {
mbed_official 107:414e9c822e99 132 NVIC_ClearPendingIRQ(TICKER_COUNTER_IRQn2);
mbed_official 107:414e9c822e99 133 }