Date: March 20, 2011 This library is created from "LPC17xx CMSIS-Compliant Standard Peripheral Firmware Driver Library (GNU, Keil, IAR) (Jan 28, 2011)", available from NXP's website, under "All microcontrollers support documents" [[http://ics.nxp.com/support/documents/microcontrollers/?type=software]] You will need to follow [[/projects/libraries/svn/mbed/trunk/LPC1768/LPC17xx.h]] while using this library Examples provided here [[/users/frank26080115/programs/LPC1700CMSIS_Examples/]] The beautiful thing is that NXP does not place copyright protection on any of the files in here Only a few modifications are made to make it compile with the mbed online compiler, I fixed some warnings as well. This is untested as of March 20, 2011 Forum post about this library: [[/forum/mbed/topic/2030/]]
lpc17xx_pwm.h@0:84d7747641aa, 2011-03-20 (annotated)
- Committer:
- frank26080115
- Date:
- Sun Mar 20 18:45:15 2011 +0000
- Revision:
- 0:84d7747641aa
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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frank26080115 | 0:84d7747641aa | 1 | /***********************************************************************//** |
frank26080115 | 0:84d7747641aa | 2 | * @file lpc17xx_pwm.h |
frank26080115 | 0:84d7747641aa | 3 | * @brief Contains all macro definitions and function prototypes |
frank26080115 | 0:84d7747641aa | 4 | * support for PWM firmware library on LPC17xx |
frank26080115 | 0:84d7747641aa | 5 | * @version 2.0 |
frank26080115 | 0:84d7747641aa | 6 | * @date 21. May. 2010 |
frank26080115 | 0:84d7747641aa | 7 | * @author NXP MCU SW Application Team |
frank26080115 | 0:84d7747641aa | 8 | ************************************************************************** |
frank26080115 | 0:84d7747641aa | 9 | * Software that is described herein is for illustrative purposes only |
frank26080115 | 0:84d7747641aa | 10 | * which provides customers with programming information regarding the |
frank26080115 | 0:84d7747641aa | 11 | * products. This software is supplied "AS IS" without any warranties. |
frank26080115 | 0:84d7747641aa | 12 | * NXP Semiconductors assumes no responsibility or liability for the |
frank26080115 | 0:84d7747641aa | 13 | * use of the software, conveys no license or title under any patent, |
frank26080115 | 0:84d7747641aa | 14 | * copyright, or mask work right to the product. NXP Semiconductors |
frank26080115 | 0:84d7747641aa | 15 | * reserves the right to make changes in the software without |
frank26080115 | 0:84d7747641aa | 16 | * notification. NXP Semiconductors also make no representation or |
frank26080115 | 0:84d7747641aa | 17 | * warranty that such application will be suitable for the specified |
frank26080115 | 0:84d7747641aa | 18 | * use without further testing or modification. |
frank26080115 | 0:84d7747641aa | 19 | **************************************************************************/ |
frank26080115 | 0:84d7747641aa | 20 | |
frank26080115 | 0:84d7747641aa | 21 | /* Peripheral group ----------------------------------------------------------- */ |
frank26080115 | 0:84d7747641aa | 22 | /** @defgroup PWM PWM |
frank26080115 | 0:84d7747641aa | 23 | * @ingroup LPC1700CMSIS_FwLib_Drivers |
frank26080115 | 0:84d7747641aa | 24 | * @{ |
frank26080115 | 0:84d7747641aa | 25 | */ |
frank26080115 | 0:84d7747641aa | 26 | |
frank26080115 | 0:84d7747641aa | 27 | #ifndef LPC17XX_PWM_H_ |
frank26080115 | 0:84d7747641aa | 28 | #define LPC17XX_PWM_H_ |
frank26080115 | 0:84d7747641aa | 29 | |
frank26080115 | 0:84d7747641aa | 30 | /* Includes ------------------------------------------------------------------- */ |
frank26080115 | 0:84d7747641aa | 31 | #include "LPC17xx.h" |
frank26080115 | 0:84d7747641aa | 32 | #include "lpc_types.h" |
frank26080115 | 0:84d7747641aa | 33 | |
frank26080115 | 0:84d7747641aa | 34 | |
frank26080115 | 0:84d7747641aa | 35 | #ifdef __cplusplus |
frank26080115 | 0:84d7747641aa | 36 | extern "C" |
frank26080115 | 0:84d7747641aa | 37 | { |
frank26080115 | 0:84d7747641aa | 38 | #endif |
frank26080115 | 0:84d7747641aa | 39 | |
frank26080115 | 0:84d7747641aa | 40 | |
frank26080115 | 0:84d7747641aa | 41 | /* Private Macros ------------------------------------------------------------- */ |
frank26080115 | 0:84d7747641aa | 42 | /** @defgroup PWM_Private_Macros PWM Private Macros |
frank26080115 | 0:84d7747641aa | 43 | * @{ |
frank26080115 | 0:84d7747641aa | 44 | */ |
frank26080115 | 0:84d7747641aa | 45 | |
frank26080115 | 0:84d7747641aa | 46 | /* --------------------- BIT DEFINITIONS -------------------------------------- */ |
frank26080115 | 0:84d7747641aa | 47 | /********************************************************************** |
frank26080115 | 0:84d7747641aa | 48 | * IR register definitions |
frank26080115 | 0:84d7747641aa | 49 | **********************************************************************/ |
frank26080115 | 0:84d7747641aa | 50 | /** Interrupt flag for PWM match channel for 6 channel */ |
frank26080115 | 0:84d7747641aa | 51 | #define PWM_IR_PWMMRn(n) ((uint32_t)((n<4)?(1<<n):(1<<(n+4)))) |
frank26080115 | 0:84d7747641aa | 52 | /** Interrupt flag for capture input */ |
frank26080115 | 0:84d7747641aa | 53 | #define PWM_IR_PWMCAPn(n) ((uint32_t)(1<<(n+4))) |
frank26080115 | 0:84d7747641aa | 54 | /** IR register mask */ |
frank26080115 | 0:84d7747641aa | 55 | #define PWM_IR_BITMASK ((uint32_t)(0x0000073F)) |
frank26080115 | 0:84d7747641aa | 56 | |
frank26080115 | 0:84d7747641aa | 57 | /********************************************************************** |
frank26080115 | 0:84d7747641aa | 58 | * TCR register definitions |
frank26080115 | 0:84d7747641aa | 59 | **********************************************************************/ |
frank26080115 | 0:84d7747641aa | 60 | /** TCR register mask */ |
frank26080115 | 0:84d7747641aa | 61 | #define PWM_TCR_BITMASK ((uint32_t)(0x0000000B)) |
frank26080115 | 0:84d7747641aa | 62 | #define PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0)) /*!< PWM Counter Enable */ |
frank26080115 | 0:84d7747641aa | 63 | #define PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1)) /*!< PWM Counter Reset */ |
frank26080115 | 0:84d7747641aa | 64 | #define PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3)) /*!< PWM Enable */ |
frank26080115 | 0:84d7747641aa | 65 | |
frank26080115 | 0:84d7747641aa | 66 | /********************************************************************** |
frank26080115 | 0:84d7747641aa | 67 | * CTCR register definitions |
frank26080115 | 0:84d7747641aa | 68 | **********************************************************************/ |
frank26080115 | 0:84d7747641aa | 69 | /** CTCR register mask */ |
frank26080115 | 0:84d7747641aa | 70 | #define PWM_CTCR_BITMASK ((uint32_t)(0x0000000F)) |
frank26080115 | 0:84d7747641aa | 71 | /** PWM Counter-Timer Mode */ |
frank26080115 | 0:84d7747641aa | 72 | #define PWM_CTCR_MODE(n) ((uint32_t)(n&0x03)) |
frank26080115 | 0:84d7747641aa | 73 | /** PWM Capture input select */ |
frank26080115 | 0:84d7747641aa | 74 | #define PWM_CTCR_SELECT_INPUT(n) ((uint32_t)((n&0x03)<<2)) |
frank26080115 | 0:84d7747641aa | 75 | |
frank26080115 | 0:84d7747641aa | 76 | /********************************************************************** |
frank26080115 | 0:84d7747641aa | 77 | * MCR register definitions |
frank26080115 | 0:84d7747641aa | 78 | **********************************************************************/ |
frank26080115 | 0:84d7747641aa | 79 | /** MCR register mask */ |
frank26080115 | 0:84d7747641aa | 80 | #define PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF)) |
frank26080115 | 0:84d7747641aa | 81 | /** generate a PWM interrupt when a MATCHn occurs */ |
frank26080115 | 0:84d7747641aa | 82 | #define PWM_MCR_INT_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)))) |
frank26080115 | 0:84d7747641aa | 83 | /** reset the PWM when a MATCHn occurs */ |
frank26080115 | 0:84d7747641aa | 84 | #define PWM_MCR_RESET_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1))) |
frank26080115 | 0:84d7747641aa | 85 | /** stop the PWM when a MATCHn occurs */ |
frank26080115 | 0:84d7747641aa | 86 | #define PWM_MCR_STOP_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2))) |
frank26080115 | 0:84d7747641aa | 87 | |
frank26080115 | 0:84d7747641aa | 88 | /********************************************************************** |
frank26080115 | 0:84d7747641aa | 89 | * CCR register definitions |
frank26080115 | 0:84d7747641aa | 90 | **********************************************************************/ |
frank26080115 | 0:84d7747641aa | 91 | /** CCR register mask */ |
frank26080115 | 0:84d7747641aa | 92 | #define PWM_CCR_BITMASK ((uint32_t)(0x0000003F)) |
frank26080115 | 0:84d7747641aa | 93 | /** PCAPn is rising edge sensitive */ |
frank26080115 | 0:84d7747641aa | 94 | #define PWM_CCR_CAP_RISING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)))) |
frank26080115 | 0:84d7747641aa | 95 | /** PCAPn is falling edge sensitive */ |
frank26080115 | 0:84d7747641aa | 96 | #define PWM_CCR_CAP_FALLING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1))) |
frank26080115 | 0:84d7747641aa | 97 | /** PWM interrupt is generated on a PCAP event */ |
frank26080115 | 0:84d7747641aa | 98 | #define PWM_CCR_INT_ON_CAP(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2))) |
frank26080115 | 0:84d7747641aa | 99 | |
frank26080115 | 0:84d7747641aa | 100 | /********************************************************************** |
frank26080115 | 0:84d7747641aa | 101 | * PCR register definitions |
frank26080115 | 0:84d7747641aa | 102 | **********************************************************************/ |
frank26080115 | 0:84d7747641aa | 103 | /** PCR register mask */ |
frank26080115 | 0:84d7747641aa | 104 | #define PWM_PCR_BITMASK (uint32_t)0x00007E7C |
frank26080115 | 0:84d7747641aa | 105 | /** PWM output n is a single edge controlled output */ |
frank26080115 | 0:84d7747641aa | 106 | #define PWM_PCR_PWMSELn(n) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n))) |
frank26080115 | 0:84d7747641aa | 107 | /** enable PWM output n */ |
frank26080115 | 0:84d7747641aa | 108 | #define PWM_PCR_PWMENAn(n) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8)))) |
frank26080115 | 0:84d7747641aa | 109 | |
frank26080115 | 0:84d7747641aa | 110 | /********************************************************************** |
frank26080115 | 0:84d7747641aa | 111 | * LER register definitions |
frank26080115 | 0:84d7747641aa | 112 | **********************************************************************/ |
frank26080115 | 0:84d7747641aa | 113 | /** LER register mask*/ |
frank26080115 | 0:84d7747641aa | 114 | #define PWM_LER_BITMASK ((uint32_t)(0x0000007F)) |
frank26080115 | 0:84d7747641aa | 115 | /** PWM MATCHn register update control */ |
frank26080115 | 0:84d7747641aa | 116 | #define PWM_LER_EN_MATCHn_LATCH(n) ((uint32_t)((n<7) ? (1<<n) : 0)) |
frank26080115 | 0:84d7747641aa | 117 | |
frank26080115 | 0:84d7747641aa | 118 | /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */ |
frank26080115 | 0:84d7747641aa | 119 | /** Macro to determine if it is valid PWM peripheral or not */ |
frank26080115 | 0:84d7747641aa | 120 | #define PARAM_PWMx(n) (((uint32_t *)n)==((uint32_t *)LPC_PWM1)) |
frank26080115 | 0:84d7747641aa | 121 | |
frank26080115 | 0:84d7747641aa | 122 | /** Macro check PWM1 match channel value */ |
frank26080115 | 0:84d7747641aa | 123 | #define PARAM_PWM1_MATCH_CHANNEL(n) ((n)<=6) |
frank26080115 | 0:84d7747641aa | 124 | |
frank26080115 | 0:84d7747641aa | 125 | /** Macro check PWM1 channel value */ |
frank26080115 | 0:84d7747641aa | 126 | #define PARAM_PWM1_CHANNEL(n) ((n>=1) && (n<=6)) |
frank26080115 | 0:84d7747641aa | 127 | |
frank26080115 | 0:84d7747641aa | 128 | /** Macro check PWM1 edge channel mode */ |
frank26080115 | 0:84d7747641aa | 129 | #define PARAM_PWM1_EDGE_MODE_CHANNEL(n) ((n>=2) && (n<=6)) |
frank26080115 | 0:84d7747641aa | 130 | |
frank26080115 | 0:84d7747641aa | 131 | /** Macro check PWM1 capture channel mode */ |
frank26080115 | 0:84d7747641aa | 132 | #define PARAM_PWM1_CAPTURE_CHANNEL(n) ((n==0) || (n==1)) |
frank26080115 | 0:84d7747641aa | 133 | |
frank26080115 | 0:84d7747641aa | 134 | /** Macro check PWM1 interrupt status type */ |
frank26080115 | 0:84d7747641aa | 135 | #define PARAM_PWM_INTSTAT(n) ((n==PWM_INTSTAT_MR0) || (n==PWM_INTSTAT_MR1) || (n==PWM_INTSTAT_MR2) \ |
frank26080115 | 0:84d7747641aa | 136 | || (n==PWM_INTSTAT_MR3) || (n==PWM_INTSTAT_MR4) || (n==PWM_INTSTAT_MR5) \ |
frank26080115 | 0:84d7747641aa | 137 | || (n==PWM_INTSTAT_MR6) || (n==PWM_INTSTAT_CAP0) || (n==PWM_INTSTAT_CAP1)) |
frank26080115 | 0:84d7747641aa | 138 | /** |
frank26080115 | 0:84d7747641aa | 139 | * @} |
frank26080115 | 0:84d7747641aa | 140 | */ |
frank26080115 | 0:84d7747641aa | 141 | |
frank26080115 | 0:84d7747641aa | 142 | |
frank26080115 | 0:84d7747641aa | 143 | /* Public Types --------------------------------------------------------------- */ |
frank26080115 | 0:84d7747641aa | 144 | /** @defgroup PWM_Public_Types PWM Public Types |
frank26080115 | 0:84d7747641aa | 145 | * @{ |
frank26080115 | 0:84d7747641aa | 146 | */ |
frank26080115 | 0:84d7747641aa | 147 | |
frank26080115 | 0:84d7747641aa | 148 | /** @brief Configuration structure in PWM TIMER mode */ |
frank26080115 | 0:84d7747641aa | 149 | typedef struct { |
frank26080115 | 0:84d7747641aa | 150 | |
frank26080115 | 0:84d7747641aa | 151 | uint8_t PrescaleOption; /**< Prescale option, should be: |
frank26080115 | 0:84d7747641aa | 152 | - PWM_TIMER_PRESCALE_TICKVAL: Prescale in absolute value |
frank26080115 | 0:84d7747641aa | 153 | - PWM_TIMER_PRESCALE_USVAL: Prescale in microsecond value |
frank26080115 | 0:84d7747641aa | 154 | */ |
frank26080115 | 0:84d7747641aa | 155 | uint8_t Reserved[3]; |
frank26080115 | 0:84d7747641aa | 156 | uint32_t PrescaleValue; /**< Prescale value, 32-bit long, should be matched |
frank26080115 | 0:84d7747641aa | 157 | with PrescaleOption |
frank26080115 | 0:84d7747641aa | 158 | */ |
frank26080115 | 0:84d7747641aa | 159 | } PWM_TIMERCFG_Type; |
frank26080115 | 0:84d7747641aa | 160 | |
frank26080115 | 0:84d7747641aa | 161 | /** @brief Configuration structure in PWM COUNTER mode */ |
frank26080115 | 0:84d7747641aa | 162 | typedef struct { |
frank26080115 | 0:84d7747641aa | 163 | |
frank26080115 | 0:84d7747641aa | 164 | uint8_t CounterOption; /**< Counter Option, should be: |
frank26080115 | 0:84d7747641aa | 165 | - PWM_COUNTER_RISING: Rising Edge |
frank26080115 | 0:84d7747641aa | 166 | - PWM_COUNTER_FALLING: Falling Edge |
frank26080115 | 0:84d7747641aa | 167 | - PWM_COUNTER_ANY: Both rising and falling mode |
frank26080115 | 0:84d7747641aa | 168 | */ |
frank26080115 | 0:84d7747641aa | 169 | uint8_t CountInputSelect; /**< Counter input select, should be: |
frank26080115 | 0:84d7747641aa | 170 | - PWM_COUNTER_PCAP1_0: PWM Counter input selected is PCAP1.0 pin |
frank26080115 | 0:84d7747641aa | 171 | - PWM_COUNTER_PCAP1_1: PWM Counter input selected is PCAP1.1 pin |
frank26080115 | 0:84d7747641aa | 172 | */ |
frank26080115 | 0:84d7747641aa | 173 | uint8_t Reserved[2]; |
frank26080115 | 0:84d7747641aa | 174 | } PWM_COUNTERCFG_Type; |
frank26080115 | 0:84d7747641aa | 175 | |
frank26080115 | 0:84d7747641aa | 176 | /** @brief PWM Match channel configuration structure */ |
frank26080115 | 0:84d7747641aa | 177 | typedef struct { |
frank26080115 | 0:84d7747641aa | 178 | uint8_t MatchChannel; /**< Match channel, should be in range |
frank26080115 | 0:84d7747641aa | 179 | from 0..6 */ |
frank26080115 | 0:84d7747641aa | 180 | uint8_t IntOnMatch; /**< Interrupt On match, should be: |
frank26080115 | 0:84d7747641aa | 181 | - ENABLE: Enable this function. |
frank26080115 | 0:84d7747641aa | 182 | - DISABLE: Disable this function. |
frank26080115 | 0:84d7747641aa | 183 | */ |
frank26080115 | 0:84d7747641aa | 184 | uint8_t StopOnMatch; /**< Stop On match, should be: |
frank26080115 | 0:84d7747641aa | 185 | - ENABLE: Enable this function. |
frank26080115 | 0:84d7747641aa | 186 | - DISABLE: Disable this function. |
frank26080115 | 0:84d7747641aa | 187 | */ |
frank26080115 | 0:84d7747641aa | 188 | uint8_t ResetOnMatch; /**< Reset On match, should be: |
frank26080115 | 0:84d7747641aa | 189 | - ENABLE: Enable this function. |
frank26080115 | 0:84d7747641aa | 190 | - DISABLE: Disable this function. |
frank26080115 | 0:84d7747641aa | 191 | */ |
frank26080115 | 0:84d7747641aa | 192 | } PWM_MATCHCFG_Type; |
frank26080115 | 0:84d7747641aa | 193 | |
frank26080115 | 0:84d7747641aa | 194 | |
frank26080115 | 0:84d7747641aa | 195 | /** @brief PWM Capture Input configuration structure */ |
frank26080115 | 0:84d7747641aa | 196 | typedef struct { |
frank26080115 | 0:84d7747641aa | 197 | uint8_t CaptureChannel; /**< Capture channel, should be in range |
frank26080115 | 0:84d7747641aa | 198 | from 0..1 */ |
frank26080115 | 0:84d7747641aa | 199 | uint8_t RisingEdge; /**< caption rising edge, should be: |
frank26080115 | 0:84d7747641aa | 200 | - ENABLE: Enable rising edge. |
frank26080115 | 0:84d7747641aa | 201 | - DISABLE: Disable this function. |
frank26080115 | 0:84d7747641aa | 202 | */ |
frank26080115 | 0:84d7747641aa | 203 | uint8_t FallingEdge; /**< caption falling edge, should be: |
frank26080115 | 0:84d7747641aa | 204 | - ENABLE: Enable falling edge. |
frank26080115 | 0:84d7747641aa | 205 | - DISABLE: Disable this function. |
frank26080115 | 0:84d7747641aa | 206 | */ |
frank26080115 | 0:84d7747641aa | 207 | uint8_t IntOnCaption; /**< Interrupt On caption, should be: |
frank26080115 | 0:84d7747641aa | 208 | - ENABLE: Enable interrupt function. |
frank26080115 | 0:84d7747641aa | 209 | - DISABLE: Disable this function. |
frank26080115 | 0:84d7747641aa | 210 | */ |
frank26080115 | 0:84d7747641aa | 211 | } PWM_CAPTURECFG_Type; |
frank26080115 | 0:84d7747641aa | 212 | |
frank26080115 | 0:84d7747641aa | 213 | /* Timer/Counter in PWM configuration type definition -----------------------------------*/ |
frank26080115 | 0:84d7747641aa | 214 | |
frank26080115 | 0:84d7747641aa | 215 | /** @brief PMW TC mode select option */ |
frank26080115 | 0:84d7747641aa | 216 | typedef enum { |
frank26080115 | 0:84d7747641aa | 217 | PWM_MODE_TIMER = 0, /*!< PWM using Timer mode */ |
frank26080115 | 0:84d7747641aa | 218 | PWM_MODE_COUNTER, /*!< PWM using Counter mode */ |
frank26080115 | 0:84d7747641aa | 219 | } PWM_TC_MODE_OPT; |
frank26080115 | 0:84d7747641aa | 220 | |
frank26080115 | 0:84d7747641aa | 221 | #define PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER)) |
frank26080115 | 0:84d7747641aa | 222 | |
frank26080115 | 0:84d7747641aa | 223 | |
frank26080115 | 0:84d7747641aa | 224 | /** @brief PWM Timer/Counter prescale option */ |
frank26080115 | 0:84d7747641aa | 225 | typedef enum |
frank26080115 | 0:84d7747641aa | 226 | { |
frank26080115 | 0:84d7747641aa | 227 | PWM_TIMER_PRESCALE_TICKVAL = 0, /*!< Prescale in absolute value */ |
frank26080115 | 0:84d7747641aa | 228 | PWM_TIMER_PRESCALE_USVAL /*!< Prescale in microsecond value */ |
frank26080115 | 0:84d7747641aa | 229 | } PWM_TIMER_PRESCALE_OPT; |
frank26080115 | 0:84d7747641aa | 230 | |
frank26080115 | 0:84d7747641aa | 231 | #define PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL)) |
frank26080115 | 0:84d7747641aa | 232 | |
frank26080115 | 0:84d7747641aa | 233 | |
frank26080115 | 0:84d7747641aa | 234 | /** @brief PWM Input Select in counter mode */ |
frank26080115 | 0:84d7747641aa | 235 | typedef enum { |
frank26080115 | 0:84d7747641aa | 236 | PWM_COUNTER_PCAP1_0 = 0, /*!< PWM Counter input selected is PCAP1.0 pin */ |
frank26080115 | 0:84d7747641aa | 237 | PWM_COUNTER_PCAP1_1 /*!< PWM counter input selected is CAP1.1 pin */ |
frank26080115 | 0:84d7747641aa | 238 | } PWM_COUNTER_INPUTSEL_OPT; |
frank26080115 | 0:84d7747641aa | 239 | |
frank26080115 | 0:84d7747641aa | 240 | #define PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1)) |
frank26080115 | 0:84d7747641aa | 241 | |
frank26080115 | 0:84d7747641aa | 242 | /** @brief PWM Input Edge Option in counter mode */ |
frank26080115 | 0:84d7747641aa | 243 | typedef enum { |
frank26080115 | 0:84d7747641aa | 244 | PWM_COUNTER_RISING = 1, /*!< Rising edge mode */ |
frank26080115 | 0:84d7747641aa | 245 | PWM_COUNTER_FALLING = 2, /*!< Falling edge mode */ |
frank26080115 | 0:84d7747641aa | 246 | PWM_COUNTER_ANY = 3 /*!< Both rising and falling mode */ |
frank26080115 | 0:84d7747641aa | 247 | } PWM_COUNTER_EDGE_OPT; |
frank26080115 | 0:84d7747641aa | 248 | |
frank26080115 | 0:84d7747641aa | 249 | #define PARAM_PWM_COUNTER_EDGE(n) ((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \ |
frank26080115 | 0:84d7747641aa | 250 | || (n==PWM_COUNTER_ANY)) |
frank26080115 | 0:84d7747641aa | 251 | |
frank26080115 | 0:84d7747641aa | 252 | |
frank26080115 | 0:84d7747641aa | 253 | /* PWM configuration type definition ----------------------------------------------------- */ |
frank26080115 | 0:84d7747641aa | 254 | /** @brief PWM operating mode options */ |
frank26080115 | 0:84d7747641aa | 255 | typedef enum { |
frank26080115 | 0:84d7747641aa | 256 | PWM_CHANNEL_SINGLE_EDGE, /*!< PWM Channel Single edge mode */ |
frank26080115 | 0:84d7747641aa | 257 | PWM_CHANNEL_DUAL_EDGE /*!< PWM Channel Dual edge mode */ |
frank26080115 | 0:84d7747641aa | 258 | } PWM_CHANNEL_EDGE_OPT; |
frank26080115 | 0:84d7747641aa | 259 | |
frank26080115 | 0:84d7747641aa | 260 | #define PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE)) |
frank26080115 | 0:84d7747641aa | 261 | |
frank26080115 | 0:84d7747641aa | 262 | |
frank26080115 | 0:84d7747641aa | 263 | /** @brief PWM update type */ |
frank26080115 | 0:84d7747641aa | 264 | typedef enum { |
frank26080115 | 0:84d7747641aa | 265 | PWM_MATCH_UPDATE_NOW = 0, /**< PWM Match Channel Update Now */ |
frank26080115 | 0:84d7747641aa | 266 | PWM_MATCH_UPDATE_NEXT_RST /**< PWM Match Channel Update on next |
frank26080115 | 0:84d7747641aa | 267 | PWM Counter resetting */ |
frank26080115 | 0:84d7747641aa | 268 | } PWM_MATCH_UPDATE_OPT; |
frank26080115 | 0:84d7747641aa | 269 | |
frank26080115 | 0:84d7747641aa | 270 | #define PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST)) |
frank26080115 | 0:84d7747641aa | 271 | |
frank26080115 | 0:84d7747641aa | 272 | |
frank26080115 | 0:84d7747641aa | 273 | /** @brief PWM interrupt status type definition ----------------------------------------------------- */ |
frank26080115 | 0:84d7747641aa | 274 | /** @brief PWM Interrupt status type */ |
frank26080115 | 0:84d7747641aa | 275 | typedef enum |
frank26080115 | 0:84d7747641aa | 276 | { |
frank26080115 | 0:84d7747641aa | 277 | PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), /**< Interrupt flag for PWM match channel 0 */ |
frank26080115 | 0:84d7747641aa | 278 | PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), /**< Interrupt flag for PWM match channel 1 */ |
frank26080115 | 0:84d7747641aa | 279 | PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), /**< Interrupt flag for PWM match channel 2 */ |
frank26080115 | 0:84d7747641aa | 280 | PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3), /**< Interrupt flag for PWM match channel 3 */ |
frank26080115 | 0:84d7747641aa | 281 | PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), /**< Interrupt flag for capture input 0 */ |
frank26080115 | 0:84d7747641aa | 282 | PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), /**< Interrupt flag for capture input 1 */ |
frank26080115 | 0:84d7747641aa | 283 | PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), /**< Interrupt flag for PWM match channel 4 */ |
frank26080115 | 0:84d7747641aa | 284 | PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5), /**< Interrupt flag for PWM match channel 5 */ |
frank26080115 | 0:84d7747641aa | 285 | PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6), /**< Interrupt flag for PWM match channel 6 */ |
frank26080115 | 0:84d7747641aa | 286 | }PWM_INTSTAT_TYPE; |
frank26080115 | 0:84d7747641aa | 287 | |
frank26080115 | 0:84d7747641aa | 288 | |
frank26080115 | 0:84d7747641aa | 289 | /** |
frank26080115 | 0:84d7747641aa | 290 | * @} |
frank26080115 | 0:84d7747641aa | 291 | */ |
frank26080115 | 0:84d7747641aa | 292 | |
frank26080115 | 0:84d7747641aa | 293 | |
frank26080115 | 0:84d7747641aa | 294 | /* Public Functions ----------------------------------------------------------- */ |
frank26080115 | 0:84d7747641aa | 295 | /** @defgroup PWM_Public_Functions PWM Public Functions |
frank26080115 | 0:84d7747641aa | 296 | * @{ |
frank26080115 | 0:84d7747641aa | 297 | */ |
frank26080115 | 0:84d7747641aa | 298 | |
frank26080115 | 0:84d7747641aa | 299 | void PWM_PinConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption); |
frank26080115 | 0:84d7747641aa | 300 | IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag); |
frank26080115 | 0:84d7747641aa | 301 | void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag); |
frank26080115 | 0:84d7747641aa | 302 | void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct); |
frank26080115 | 0:84d7747641aa | 303 | void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct); |
frank26080115 | 0:84d7747641aa | 304 | void PWM_DeInit (LPC_PWM_TypeDef *PWMx); |
frank26080115 | 0:84d7747641aa | 305 | void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState); |
frank26080115 | 0:84d7747641aa | 306 | void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState); |
frank26080115 | 0:84d7747641aa | 307 | void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx); |
frank26080115 | 0:84d7747641aa | 308 | void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct); |
frank26080115 | 0:84d7747641aa | 309 | void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct); |
frank26080115 | 0:84d7747641aa | 310 | uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel); |
frank26080115 | 0:84d7747641aa | 311 | void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \ |
frank26080115 | 0:84d7747641aa | 312 | uint32_t MatchValue, uint8_t UpdateType); |
frank26080115 | 0:84d7747641aa | 313 | void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption); |
frank26080115 | 0:84d7747641aa | 314 | void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState); |
frank26080115 | 0:84d7747641aa | 315 | |
frank26080115 | 0:84d7747641aa | 316 | /** |
frank26080115 | 0:84d7747641aa | 317 | * @} |
frank26080115 | 0:84d7747641aa | 318 | */ |
frank26080115 | 0:84d7747641aa | 319 | |
frank26080115 | 0:84d7747641aa | 320 | #ifdef __cplusplus |
frank26080115 | 0:84d7747641aa | 321 | } |
frank26080115 | 0:84d7747641aa | 322 | #endif |
frank26080115 | 0:84d7747641aa | 323 | |
frank26080115 | 0:84d7747641aa | 324 | #endif /* LPC17XX_PWM_H_ */ |
frank26080115 | 0:84d7747641aa | 325 | |
frank26080115 | 0:84d7747641aa | 326 | /** |
frank26080115 | 0:84d7747641aa | 327 | * @} |
frank26080115 | 0:84d7747641aa | 328 | */ |
frank26080115 | 0:84d7747641aa | 329 | |
frank26080115 | 0:84d7747641aa | 330 | /* --------------------------------- End Of File ------------------------------ */ |