LPC1700CMSIS_Lib - Date: March 20, 2011 This library is created f…

Users » frank26080115 » Code » LPC1700CMSIS_Lib

Date: March 20, 2011 This library is created from "LPC17xx CMSIS-Compliant Standard Peripheral Firmware Driver Library (GNU, Keil, IAR) (Jan 28, 2011)", available from NXP's website, under "All microcontrollers support documents" [[http://ics.nxp.com/support/documents/microcontrollers/?type=software]] You will need to follow [[/projects/libraries/svn/mbed/trunk/LPC1768/LPC17xx.h]] while using this library Examples provided here [[/users/frank26080115/programs/LPC1700CMSIS_Examples/]] The beautiful thing is that NXP does not place copyright protection on any of the files in here Only a few modifications are made to make it compile with the mbed online compiler, I fixed some warnings as well. This is untested as of March 20, 2011 Forum post about this library: [[/forum/mbed/topic/2030/]]

lpc17xx_clkpwr.c@0:84d7747641aa, 2011-03-20 (annotated)

Committer:: frank26080115
Date:: Sun Mar 20 18:45:15 2011 +0000
Revision:: 0:84d7747641aa

Who changed what in which revision?

User	Revision	Line number	New contents of line
frank26080115	0:84d7747641aa	1	/*********************************************************************//
frank26080115	0:84d7747641aa	2	* @file lpc17xx_clkpwr.c
frank26080115	0:84d7747641aa	3	* @brief Contains all functions support for Clock and Power Control
frank26080115	0:84d7747641aa	4	* firmware library on LPC17xx
frank26080115	0:84d7747641aa	5	* @version 3.0
frank26080115	0:84d7747641aa	6	* @date 18. June. 2010
frank26080115	0:84d7747641aa	7	* @author NXP MCU SW Application Team
frank26080115	0:84d7747641aa	8	**************************************************************************
frank26080115	0:84d7747641aa	9	* Software that is described herein is for illustrative purposes only
frank26080115	0:84d7747641aa	10	* which provides customers with programming information regarding the
frank26080115	0:84d7747641aa	11	* products. This software is supplied "AS IS" without any warranties.
frank26080115	0:84d7747641aa	12	* NXP Semiconductors assumes no responsibility or liability for the
frank26080115	0:84d7747641aa	13	* use of the software, conveys no license or title under any patent,
frank26080115	0:84d7747641aa	14	* copyright, or mask work right to the product. NXP Semiconductors
frank26080115	0:84d7747641aa	15	* reserves the right to make changes in the software without
frank26080115	0:84d7747641aa	16	* notification. NXP Semiconductors also make no representation or
frank26080115	0:84d7747641aa	17	* warranty that such application will be suitable for the specified
frank26080115	0:84d7747641aa	18	* use without further testing or modification.
frank26080115	0:84d7747641aa	19	**********************************************************************/
frank26080115	0:84d7747641aa	20
frank26080115	0:84d7747641aa	21	/* Peripheral group ----------------------------------------------------------- */
frank26080115	0:84d7747641aa	22	/** @addtogroup CLKPWR
frank26080115	0:84d7747641aa	23	* @{
frank26080115	0:84d7747641aa	24	*/
frank26080115	0:84d7747641aa	25
frank26080115	0:84d7747641aa	26	/* Includes ------------------------------------------------------------------- */
frank26080115	0:84d7747641aa	27	#include "lpc17xx_clkpwr.h"
frank26080115	0:84d7747641aa	28
frank26080115	0:84d7747641aa	29
frank26080115	0:84d7747641aa	30	/* Public Functions ----------------------------------------------------------- */
frank26080115	0:84d7747641aa	31	/** @addtogroup CLKPWR_Public_Functions
frank26080115	0:84d7747641aa	32	* @{
frank26080115	0:84d7747641aa	33	*/
frank26080115	0:84d7747641aa	34
frank26080115	0:84d7747641aa	35	/*******************************************************************//
frank26080115	0:84d7747641aa	36	* @brief Set value of each Peripheral Clock Selection
frank26080115	0:84d7747641aa	37	* @param[in] ClkType Peripheral Clock Selection of each type,
frank26080115	0:84d7747641aa	38	* should be one of the following:
frank26080115	0:84d7747641aa	39	* - CLKPWR_PCLKSEL_WDT : WDT
frank26080115	0:84d7747641aa	40	- CLKPWR_PCLKSEL_TIMER0 : Timer 0
frank26080115	0:84d7747641aa	41	- CLKPWR_PCLKSEL_TIMER1 : Timer 1
frank26080115	0:84d7747641aa	42	- CLKPWR_PCLKSEL_UART0 : UART 0
frank26080115	0:84d7747641aa	43	- CLKPWR_PCLKSEL_UART1 : UART 1
frank26080115	0:84d7747641aa	44	- CLKPWR_PCLKSEL_PWM1 : PWM 1
frank26080115	0:84d7747641aa	45	- CLKPWR_PCLKSEL_I2C0 : I2C 0
frank26080115	0:84d7747641aa	46	- CLKPWR_PCLKSEL_SPI : SPI
frank26080115	0:84d7747641aa	47	- CLKPWR_PCLKSEL_SSP1 : SSP 1
frank26080115	0:84d7747641aa	48	- CLKPWR_PCLKSEL_DAC : DAC
frank26080115	0:84d7747641aa	49	- CLKPWR_PCLKSEL_ADC : ADC
frank26080115	0:84d7747641aa	50	- CLKPWR_PCLKSEL_CAN1 : CAN 1
frank26080115	0:84d7747641aa	51	- CLKPWR_PCLKSEL_CAN2 : CAN 2
frank26080115	0:84d7747641aa	52	- CLKPWR_PCLKSEL_ACF : ACF
frank26080115	0:84d7747641aa	53	- CLKPWR_PCLKSEL_QEI : QEI
frank26080115	0:84d7747641aa	54	- CLKPWR_PCLKSEL_PCB : PCB
frank26080115	0:84d7747641aa	55	- CLKPWR_PCLKSEL_I2C1 : I2C 1
frank26080115	0:84d7747641aa	56	- CLKPWR_PCLKSEL_SSP0 : SSP 0
frank26080115	0:84d7747641aa	57	- CLKPWR_PCLKSEL_TIMER2 : Timer 2
frank26080115	0:84d7747641aa	58	- CLKPWR_PCLKSEL_TIMER3 : Timer 3
frank26080115	0:84d7747641aa	59	- CLKPWR_PCLKSEL_UART2 : UART 2
frank26080115	0:84d7747641aa	60	- CLKPWR_PCLKSEL_UART3 : UART 3
frank26080115	0:84d7747641aa	61	- CLKPWR_PCLKSEL_I2C2 : I2C 2
frank26080115	0:84d7747641aa	62	- CLKPWR_PCLKSEL_I2S : I2S
frank26080115	0:84d7747641aa	63	- CLKPWR_PCLKSEL_RIT : RIT
frank26080115	0:84d7747641aa	64	- CLKPWR_PCLKSEL_SYSCON : SYSCON
frank26080115	0:84d7747641aa	65	- CLKPWR_PCLKSEL_MC : MC
frank26080115	0:84d7747641aa	66
frank26080115	0:84d7747641aa	67	* @param[in] DivVal Value of divider, should be:
frank26080115	0:84d7747641aa	68	* - CLKPWR_PCLKSEL_CCLK_DIV_4 : PCLK_peripheral = CCLK/4
frank26080115	0:84d7747641aa	69	* - CLKPWR_PCLKSEL_CCLK_DIV_1 : PCLK_peripheral = CCLK/1
frank26080115	0:84d7747641aa	70	* - CLKPWR_PCLKSEL_CCLK_DIV_2 : PCLK_peripheral = CCLK/2
frank26080115	0:84d7747641aa	71	*
frank26080115	0:84d7747641aa	72	* @return none
frank26080115	0:84d7747641aa	73	**********************************************************************/
frank26080115	0:84d7747641aa	74	void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
frank26080115	0:84d7747641aa	75	{
frank26080115	0:84d7747641aa	76	uint32_t bitpos;
frank26080115	0:84d7747641aa	77
frank26080115	0:84d7747641aa	78	bitpos = (ClkType < 32) ? (ClkType) : (ClkType - 32);
frank26080115	0:84d7747641aa	79
frank26080115	0:84d7747641aa	80	/* PCLKSEL0 selected */
frank26080115	0:84d7747641aa	81	if (ClkType < 32)
frank26080115	0:84d7747641aa	82	{
frank26080115	0:84d7747641aa	83	/* Clear two bit at bit position */
frank26080115	0:84d7747641aa	84	LPC_SC->PCLKSEL0 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos)));
frank26080115	0:84d7747641aa	85
frank26080115	0:84d7747641aa	86	/* Set two selected bit */
frank26080115	0:84d7747641aa	87	LPC_SC->PCLKSEL0 \|= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
frank26080115	0:84d7747641aa	88	}
frank26080115	0:84d7747641aa	89	/* PCLKSEL1 selected */
frank26080115	0:84d7747641aa	90	else
frank26080115	0:84d7747641aa	91	{
frank26080115	0:84d7747641aa	92	/* Clear two bit at bit position */
frank26080115	0:84d7747641aa	93	LPC_SC->PCLKSEL1 &= ~(CLKPWR_PCLKSEL_BITMASK(bitpos));
frank26080115	0:84d7747641aa	94
frank26080115	0:84d7747641aa	95	/* Set two selected bit */
frank26080115	0:84d7747641aa	96	LPC_SC->PCLKSEL1 \|= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
frank26080115	0:84d7747641aa	97	}
frank26080115	0:84d7747641aa	98	}
frank26080115	0:84d7747641aa	99
frank26080115	0:84d7747641aa	100
frank26080115	0:84d7747641aa	101	/*******************************************************************//
frank26080115	0:84d7747641aa	102	* @brief Get current value of each Peripheral Clock Selection
frank26080115	0:84d7747641aa	103	* @param[in] ClkType Peripheral Clock Selection of each type,
frank26080115	0:84d7747641aa	104	* should be one of the following:
frank26080115	0:84d7747641aa	105	* - CLKPWR_PCLKSEL_WDT : WDT
frank26080115	0:84d7747641aa	106	- CLKPWR_PCLKSEL_TIMER0 : Timer 0
frank26080115	0:84d7747641aa	107	- CLKPWR_PCLKSEL_TIMER1 : Timer 1
frank26080115	0:84d7747641aa	108	- CLKPWR_PCLKSEL_UART0 : UART 0
frank26080115	0:84d7747641aa	109	- CLKPWR_PCLKSEL_UART1 : UART 1
frank26080115	0:84d7747641aa	110	- CLKPWR_PCLKSEL_PWM1 : PWM 1
frank26080115	0:84d7747641aa	111	- CLKPWR_PCLKSEL_I2C0 : I2C 0
frank26080115	0:84d7747641aa	112	- CLKPWR_PCLKSEL_SPI : SPI
frank26080115	0:84d7747641aa	113	- CLKPWR_PCLKSEL_SSP1 : SSP 1
frank26080115	0:84d7747641aa	114	- CLKPWR_PCLKSEL_DAC : DAC
frank26080115	0:84d7747641aa	115	- CLKPWR_PCLKSEL_ADC : ADC
frank26080115	0:84d7747641aa	116	- CLKPWR_PCLKSEL_CAN1 : CAN 1
frank26080115	0:84d7747641aa	117	- CLKPWR_PCLKSEL_CAN2 : CAN 2
frank26080115	0:84d7747641aa	118	- CLKPWR_PCLKSEL_ACF : ACF
frank26080115	0:84d7747641aa	119	- CLKPWR_PCLKSEL_QEI : QEI
frank26080115	0:84d7747641aa	120	- CLKPWR_PCLKSEL_PCB : PCB
frank26080115	0:84d7747641aa	121	- CLKPWR_PCLKSEL_I2C1 : I2C 1
frank26080115	0:84d7747641aa	122	- CLKPWR_PCLKSEL_SSP0 : SSP 0
frank26080115	0:84d7747641aa	123	- CLKPWR_PCLKSEL_TIMER2 : Timer 2
frank26080115	0:84d7747641aa	124	- CLKPWR_PCLKSEL_TIMER3 : Timer 3
frank26080115	0:84d7747641aa	125	- CLKPWR_PCLKSEL_UART2 : UART 2
frank26080115	0:84d7747641aa	126	- CLKPWR_PCLKSEL_UART3 : UART 3
frank26080115	0:84d7747641aa	127	- CLKPWR_PCLKSEL_I2C2 : I2C 2
frank26080115	0:84d7747641aa	128	- CLKPWR_PCLKSEL_I2S : I2S
frank26080115	0:84d7747641aa	129	- CLKPWR_PCLKSEL_RIT : RIT
frank26080115	0:84d7747641aa	130	- CLKPWR_PCLKSEL_SYSCON : SYSCON
frank26080115	0:84d7747641aa	131	- CLKPWR_PCLKSEL_MC : MC
frank26080115	0:84d7747641aa	132
frank26080115	0:84d7747641aa	133	* @return Value of Selected Peripheral Clock Selection
frank26080115	0:84d7747641aa	134	**********************************************************************/
frank26080115	0:84d7747641aa	135	uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType)
frank26080115	0:84d7747641aa	136	{
frank26080115	0:84d7747641aa	137	uint32_t bitpos, retval;
frank26080115	0:84d7747641aa	138
frank26080115	0:84d7747641aa	139	if (ClkType < 32)
frank26080115	0:84d7747641aa	140	{
frank26080115	0:84d7747641aa	141	bitpos = ClkType;
frank26080115	0:84d7747641aa	142	retval = LPC_SC->PCLKSEL0;
frank26080115	0:84d7747641aa	143	}
frank26080115	0:84d7747641aa	144	else
frank26080115	0:84d7747641aa	145	{
frank26080115	0:84d7747641aa	146	bitpos = ClkType - 32;
frank26080115	0:84d7747641aa	147	retval = LPC_SC->PCLKSEL1;
frank26080115	0:84d7747641aa	148	}
frank26080115	0:84d7747641aa	149
frank26080115	0:84d7747641aa	150	retval = CLKPWR_PCLKSEL_GET(bitpos, retval);
frank26080115	0:84d7747641aa	151	return retval;
frank26080115	0:84d7747641aa	152	}
frank26080115	0:84d7747641aa	153
frank26080115	0:84d7747641aa	154
frank26080115	0:84d7747641aa	155
frank26080115	0:84d7747641aa	156	/*******************************************************************//
frank26080115	0:84d7747641aa	157	* @brief Get current value of each Peripheral Clock
frank26080115	0:84d7747641aa	158	* @param[in] ClkType Peripheral Clock Selection of each type,
frank26080115	0:84d7747641aa	159	* should be one of the following:
frank26080115	0:84d7747641aa	160	* - CLKPWR_PCLKSEL_WDT : WDT
frank26080115	0:84d7747641aa	161	- CLKPWR_PCLKSEL_TIMER0 : Timer 0
frank26080115	0:84d7747641aa	162	- CLKPWR_PCLKSEL_TIMER1 : Timer 1
frank26080115	0:84d7747641aa	163	- CLKPWR_PCLKSEL_UART0 : UART 0
frank26080115	0:84d7747641aa	164	- CLKPWR_PCLKSEL_UART1 : UART 1
frank26080115	0:84d7747641aa	165	- CLKPWR_PCLKSEL_PWM1 : PWM 1
frank26080115	0:84d7747641aa	166	- CLKPWR_PCLKSEL_I2C0 : I2C 0
frank26080115	0:84d7747641aa	167	- CLKPWR_PCLKSEL_SPI : SPI
frank26080115	0:84d7747641aa	168	- CLKPWR_PCLKSEL_SSP1 : SSP 1
frank26080115	0:84d7747641aa	169	- CLKPWR_PCLKSEL_DAC : DAC
frank26080115	0:84d7747641aa	170	- CLKPWR_PCLKSEL_ADC : ADC
frank26080115	0:84d7747641aa	171	- CLKPWR_PCLKSEL_CAN1 : CAN 1
frank26080115	0:84d7747641aa	172	- CLKPWR_PCLKSEL_CAN2 : CAN 2
frank26080115	0:84d7747641aa	173	- CLKPWR_PCLKSEL_ACF : ACF
frank26080115	0:84d7747641aa	174	- CLKPWR_PCLKSEL_QEI : QEI
frank26080115	0:84d7747641aa	175	- CLKPWR_PCLKSEL_PCB : PCB
frank26080115	0:84d7747641aa	176	- CLKPWR_PCLKSEL_I2C1 : I2C 1
frank26080115	0:84d7747641aa	177	- CLKPWR_PCLKSEL_SSP0 : SSP 0
frank26080115	0:84d7747641aa	178	- CLKPWR_PCLKSEL_TIMER2 : Timer 2
frank26080115	0:84d7747641aa	179	- CLKPWR_PCLKSEL_TIMER3 : Timer 3
frank26080115	0:84d7747641aa	180	- CLKPWR_PCLKSEL_UART2 : UART 2
frank26080115	0:84d7747641aa	181	- CLKPWR_PCLKSEL_UART3 : UART 3
frank26080115	0:84d7747641aa	182	- CLKPWR_PCLKSEL_I2C2 : I2C 2
frank26080115	0:84d7747641aa	183	- CLKPWR_PCLKSEL_I2S : I2S
frank26080115	0:84d7747641aa	184	- CLKPWR_PCLKSEL_RIT : RIT
frank26080115	0:84d7747641aa	185	- CLKPWR_PCLKSEL_SYSCON : SYSCON
frank26080115	0:84d7747641aa	186	- CLKPWR_PCLKSEL_MC : MC
frank26080115	0:84d7747641aa	187
frank26080115	0:84d7747641aa	188	* @return Value of Selected Peripheral Clock
frank26080115	0:84d7747641aa	189	**********************************************************************/
frank26080115	0:84d7747641aa	190	uint32_t CLKPWR_GetPCLK (uint32_t ClkType)
frank26080115	0:84d7747641aa	191	{
frank26080115	0:84d7747641aa	192	uint32_t retval, div;
frank26080115	0:84d7747641aa	193
frank26080115	0:84d7747641aa	194	retval = SystemCoreClock;
frank26080115	0:84d7747641aa	195	div = CLKPWR_GetPCLKSEL(ClkType);
frank26080115	0:84d7747641aa	196
frank26080115	0:84d7747641aa	197	switch (div)
frank26080115	0:84d7747641aa	198	{
frank26080115	0:84d7747641aa	199	case 0:
frank26080115	0:84d7747641aa	200	div = 4;
frank26080115	0:84d7747641aa	201	break;
frank26080115	0:84d7747641aa	202
frank26080115	0:84d7747641aa	203	case 1:
frank26080115	0:84d7747641aa	204	div = 1;
frank26080115	0:84d7747641aa	205	break;
frank26080115	0:84d7747641aa	206
frank26080115	0:84d7747641aa	207	case 2:
frank26080115	0:84d7747641aa	208	div = 2;
frank26080115	0:84d7747641aa	209	break;
frank26080115	0:84d7747641aa	210
frank26080115	0:84d7747641aa	211	case 3:
frank26080115	0:84d7747641aa	212	div = 8;
frank26080115	0:84d7747641aa	213	break;
frank26080115	0:84d7747641aa	214	}
frank26080115	0:84d7747641aa	215	retval /= div;
frank26080115	0:84d7747641aa	216
frank26080115	0:84d7747641aa	217	return retval;
frank26080115	0:84d7747641aa	218	}
frank26080115	0:84d7747641aa	219
frank26080115	0:84d7747641aa	220
frank26080115	0:84d7747641aa	221
frank26080115	0:84d7747641aa	222	/*******************************************************************//
frank26080115	0:84d7747641aa	223	* @brief Configure power supply for each peripheral according to NewState
frank26080115	0:84d7747641aa	224	* @param[in] PPType Type of peripheral used to enable power,
frank26080115	0:84d7747641aa	225	* should be one of the following:
frank26080115	0:84d7747641aa	226	* - CLKPWR_PCONP_PCTIM0 : Timer 0
frank26080115	0:84d7747641aa	227	- CLKPWR_PCONP_PCTIM1 : Timer 1
frank26080115	0:84d7747641aa	228	- CLKPWR_PCONP_PCUART0 : UART 0
frank26080115	0:84d7747641aa	229	- CLKPWR_PCONP_PCUART1 : UART 1
frank26080115	0:84d7747641aa	230	- CLKPWR_PCONP_PCPWM1 : PWM 1
frank26080115	0:84d7747641aa	231	- CLKPWR_PCONP_PCI2C0 : I2C 0
frank26080115	0:84d7747641aa	232	- CLKPWR_PCONP_PCSPI : SPI
frank26080115	0:84d7747641aa	233	- CLKPWR_PCONP_PCRTC : RTC
frank26080115	0:84d7747641aa	234	- CLKPWR_PCONP_PCSSP1 : SSP 1
frank26080115	0:84d7747641aa	235	- CLKPWR_PCONP_PCAD : ADC
frank26080115	0:84d7747641aa	236	- CLKPWR_PCONP_PCAN1 : CAN 1
frank26080115	0:84d7747641aa	237	- CLKPWR_PCONP_PCAN2 : CAN 2
frank26080115	0:84d7747641aa	238	- CLKPWR_PCONP_PCGPIO : GPIO
frank26080115	0:84d7747641aa	239	- CLKPWR_PCONP_PCRIT : RIT
frank26080115	0:84d7747641aa	240	- CLKPWR_PCONP_PCMC : MC
frank26080115	0:84d7747641aa	241	- CLKPWR_PCONP_PCQEI : QEI
frank26080115	0:84d7747641aa	242	- CLKPWR_PCONP_PCI2C1 : I2C 1
frank26080115	0:84d7747641aa	243	- CLKPWR_PCONP_PCSSP0 : SSP 0
frank26080115	0:84d7747641aa	244	- CLKPWR_PCONP_PCTIM2 : Timer 2
frank26080115	0:84d7747641aa	245	- CLKPWR_PCONP_PCTIM3 : Timer 3
frank26080115	0:84d7747641aa	246	- CLKPWR_PCONP_PCUART2 : UART 2
frank26080115	0:84d7747641aa	247	- CLKPWR_PCONP_PCUART3 : UART 3
frank26080115	0:84d7747641aa	248	- CLKPWR_PCONP_PCI2C2 : I2C 2
frank26080115	0:84d7747641aa	249	- CLKPWR_PCONP_PCI2S : I2S
frank26080115	0:84d7747641aa	250	- CLKPWR_PCONP_PCGPDMA : GPDMA
frank26080115	0:84d7747641aa	251	- CLKPWR_PCONP_PCENET : Ethernet
frank26080115	0:84d7747641aa	252	- CLKPWR_PCONP_PCUSB : USB
frank26080115	0:84d7747641aa	253	*
frank26080115	0:84d7747641aa	254	* @param[in] NewState New state of Peripheral Power, should be:
frank26080115	0:84d7747641aa	255	* - ENABLE : Enable power for this peripheral
frank26080115	0:84d7747641aa	256	* - DISABLE : Disable power for this peripheral
frank26080115	0:84d7747641aa	257	*
frank26080115	0:84d7747641aa	258	* @return none
frank26080115	0:84d7747641aa	259	**********************************************************************/
frank26080115	0:84d7747641aa	260	void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
frank26080115	0:84d7747641aa	261	{
frank26080115	0:84d7747641aa	262	if (NewState == ENABLE)
frank26080115	0:84d7747641aa	263	{
frank26080115	0:84d7747641aa	264	LPC_SC->PCONP \|= PPType & CLKPWR_PCONP_BITMASK;
frank26080115	0:84d7747641aa	265	}
frank26080115	0:84d7747641aa	266	else if (NewState == DISABLE)
frank26080115	0:84d7747641aa	267	{
frank26080115	0:84d7747641aa	268	LPC_SC->PCONP &= (~PPType) & CLKPWR_PCONP_BITMASK;
frank26080115	0:84d7747641aa	269	}
frank26080115	0:84d7747641aa	270	}
frank26080115	0:84d7747641aa	271
frank26080115	0:84d7747641aa	272
frank26080115	0:84d7747641aa	273	/*******************************************************************//
frank26080115	0:84d7747641aa	274	* @brief Enter Sleep mode with co-operated instruction by the Cortex-M3.
frank26080115	0:84d7747641aa	275	* @param[in] None
frank26080115	0:84d7747641aa	276	* @return None
frank26080115	0:84d7747641aa	277	**********************************************************************/
frank26080115	0:84d7747641aa	278	void CLKPWR_Sleep(void)
frank26080115	0:84d7747641aa	279	{
frank26080115	0:84d7747641aa	280	LPC_SC->PCON = 0x00;
frank26080115	0:84d7747641aa	281	/* Sleep Mode*/
frank26080115	0:84d7747641aa	282	__WFI();
frank26080115	0:84d7747641aa	283	}
frank26080115	0:84d7747641aa	284
frank26080115	0:84d7747641aa	285
frank26080115	0:84d7747641aa	286	/*******************************************************************//
frank26080115	0:84d7747641aa	287	* @brief Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
frank26080115	0:84d7747641aa	288	* @param[in] None
frank26080115	0:84d7747641aa	289	* @return None
frank26080115	0:84d7747641aa	290	**********************************************************************/
frank26080115	0:84d7747641aa	291	void CLKPWR_DeepSleep(void)
frank26080115	0:84d7747641aa	292	{
frank26080115	0:84d7747641aa	293	/* Deep-Sleep Mode, set SLEEPDEEP bit */
frank26080115	0:84d7747641aa	294	SCB->SCR = 0x4;
frank26080115	0:84d7747641aa	295	LPC_SC->PCON = 0x8;
frank26080115	0:84d7747641aa	296	/* Deep Sleep Mode*/
frank26080115	0:84d7747641aa	297	__WFI();
frank26080115	0:84d7747641aa	298	}
frank26080115	0:84d7747641aa	299
frank26080115	0:84d7747641aa	300
frank26080115	0:84d7747641aa	301	/*******************************************************************//
frank26080115	0:84d7747641aa	302	* @brief Enter Power Down mode with co-operated instruction by the Cortex-M3.
frank26080115	0:84d7747641aa	303	* @param[in] None
frank26080115	0:84d7747641aa	304	* @return None
frank26080115	0:84d7747641aa	305	**********************************************************************/
frank26080115	0:84d7747641aa	306	void CLKPWR_PowerDown(void)
frank26080115	0:84d7747641aa	307	{
frank26080115	0:84d7747641aa	308	/* Deep-Sleep Mode, set SLEEPDEEP bit */
frank26080115	0:84d7747641aa	309	SCB->SCR = 0x4;
frank26080115	0:84d7747641aa	310	LPC_SC->PCON = 0x09;
frank26080115	0:84d7747641aa	311	/* Power Down Mode*/
frank26080115	0:84d7747641aa	312	__WFI();
frank26080115	0:84d7747641aa	313	}
frank26080115	0:84d7747641aa	314
frank26080115	0:84d7747641aa	315
frank26080115	0:84d7747641aa	316	/*******************************************************************//
frank26080115	0:84d7747641aa	317	* @brief Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.
frank26080115	0:84d7747641aa	318	* @param[in] None
frank26080115	0:84d7747641aa	319	* @return None
frank26080115	0:84d7747641aa	320	**********************************************************************/
frank26080115	0:84d7747641aa	321	void CLKPWR_DeepPowerDown(void)
frank26080115	0:84d7747641aa	322	{
frank26080115	0:84d7747641aa	323	/* Deep-Sleep Mode, set SLEEPDEEP bit */
frank26080115	0:84d7747641aa	324	SCB->SCR = 0x4;
frank26080115	0:84d7747641aa	325	LPC_SC->PCON = 0x03;
frank26080115	0:84d7747641aa	326	/* Deep Power Down Mode*/
frank26080115	0:84d7747641aa	327	__WFI();
frank26080115	0:84d7747641aa	328	}
frank26080115	0:84d7747641aa	329
frank26080115	0:84d7747641aa	330	/**
frank26080115	0:84d7747641aa	331	* @}
frank26080115	0:84d7747641aa	332	*/
frank26080115	0:84d7747641aa	333
frank26080115	0:84d7747641aa	334	/**
frank26080115	0:84d7747641aa	335	* @}
frank26080115	0:84d7747641aa	336	*/
frank26080115	0:84d7747641aa	337
frank26080115	0:84d7747641aa	338	/* --------------------------------- End Of File ------------------------------ */

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Type:	Library
Created:	20 Mar 2011
Imports:	652
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	0
Followers:	20

lpc17xx_clkpwr.c@0:84d7747641aa, 2011-03-20 (annotated)

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