sd-driver with adjustable spi freq.

Committer:
flombella
Date:
Wed May 05 07:18:48 2021 +0000
Revision:
2:7b302d81ede0
Parent:
0:f32a15965d96
Esempio utilizzo di file system simulato sulla RAM della scheda

Who changed what in which revision?

UserRevisionLine numberNew contents of line
coverxit 0:f32a15965d96 1 {
coverxit 0:f32a15965d96 2 "name": "sd",
coverxit 0:f32a15965d96 3 "config": {
coverxit 0:f32a15965d96 4 "UART_RX": "D0",
coverxit 0:f32a15965d96 5 "UART_TX": "D1",
coverxit 0:f32a15965d96 6 "DIO_0": "D0",
coverxit 0:f32a15965d96 7 "DIO_1": "D1",
coverxit 0:f32a15965d96 8 "DIO_2": "D2",
coverxit 0:f32a15965d96 9 "DIO_3": "D3",
coverxit 0:f32a15965d96 10 "DIO_4": "D4",
coverxit 0:f32a15965d96 11 "DIO_5": "D5",
coverxit 0:f32a15965d96 12 "DIO_6": "D6",
coverxit 0:f32a15965d96 13 "DIO_7": "D7",
coverxit 0:f32a15965d96 14 "DIO_8": "D8",
coverxit 0:f32a15965d96 15 "DIO_9": "D9",
coverxit 0:f32a15965d96 16 "SPI_CS": "D10",
coverxit 0:f32a15965d96 17 "SPI_MOSI": "D11",
coverxit 0:f32a15965d96 18 "SPI_MISO": "D12",
coverxit 0:f32a15965d96 19 "SPI_CLK": "D13",
coverxit 0:f32a15965d96 20 "I2C_SDA": "D14",
coverxit 0:f32a15965d96 21 "I2C_SCL": "D15",
coverxit 0:f32a15965d96 22 "I2C_TEMP_ADDR":"0x90",
coverxit 0:f32a15965d96 23 "I2C_EEPROM_ADDR":"0xA0",
coverxit 0:f32a15965d96 24 "AIN_0": "A0",
coverxit 0:f32a15965d96 25 "AIN_1": "A1",
coverxit 0:f32a15965d96 26 "AIN_2": "A2",
coverxit 0:f32a15965d96 27 "AIN_3": "A3",
coverxit 0:f32a15965d96 28 "AIN_4": "A4",
coverxit 0:f32a15965d96 29 "AIN_5": "A5",
coverxit 0:f32a15965d96 30 "AOUT" : "A5",
coverxit 0:f32a15965d96 31 "PWM_0": "D3",
coverxit 0:f32a15965d96 32 "PWM_1": "D5",
coverxit 0:f32a15965d96 33 "PWM_2": "D6",
coverxit 0:f32a15965d96 34 "PWM_3": "D9",
coverxit 0:f32a15965d96 35 "DEBUG_MSG": 0,
coverxit 0:f32a15965d96 36 "DEVICE_SPI": 1,
coverxit 0:f32a15965d96 37 "FSFAT_SDCARD_INSTALLED": 1
coverxit 0:f32a15965d96 38 },
coverxit 0:f32a15965d96 39 "target_overrides": {
coverxit 0:f32a15965d96 40 "DISCO_F051R8": {
coverxit 0:f32a15965d96 41 "SPI_MOSI": "SPI_MOSI",
coverxit 0:f32a15965d96 42 "SPI_MISO": "SPI_MISO",
coverxit 0:f32a15965d96 43 "SPI_CLK": "SPI_SCK",
coverxit 0:f32a15965d96 44 "SPI_CS": "SPI_CS"
coverxit 0:f32a15965d96 45 },
coverxit 0:f32a15965d96 46 "K20D50M": {
coverxit 0:f32a15965d96 47 "SPI_MOSI": "PTD2",
coverxit 0:f32a15965d96 48 "SPI_MISO": "PTD3",
coverxit 0:f32a15965d96 49 "SPI_CLK": "PTD1",
coverxit 0:f32a15965d96 50 "SPI_CS": "PTC2"
coverxit 0:f32a15965d96 51 },
coverxit 0:f32a15965d96 52 "KL22F": {
coverxit 0:f32a15965d96 53 "SPI_MOSI": "PTD6",
coverxit 0:f32a15965d96 54 "SPI_MISO": "PTD7",
coverxit 0:f32a15965d96 55 "SPI_CLK": "PTD5",
coverxit 0:f32a15965d96 56 "SPI_CS": "PTD4"
coverxit 0:f32a15965d96 57 },
coverxit 0:f32a15965d96 58 "KL25Z": {
coverxit 0:f32a15965d96 59 "SPI_MOSI": "PTD2",
coverxit 0:f32a15965d96 60 "SPI_MISO": "PTD3",
coverxit 0:f32a15965d96 61 "SPI_CLK": "PTD1",
coverxit 0:f32a15965d96 62 "SPI_CS": "PTD0"
coverxit 0:f32a15965d96 63 },
coverxit 0:f32a15965d96 64 "KL43Z": {
coverxit 0:f32a15965d96 65 "SPI_MOSI": "PTD6",
coverxit 0:f32a15965d96 66 "SPI_MISO": "PTD7",
coverxit 0:f32a15965d96 67 "SPI_CLK": "PTD5",
coverxit 0:f32a15965d96 68 "SPI_CS": "PTD4"
coverxit 0:f32a15965d96 69 },
coverxit 0:f32a15965d96 70 "KL46Z": {
coverxit 0:f32a15965d96 71 "SPI_MOSI": "PTD6",
coverxit 0:f32a15965d96 72 "SPI_MISO": "PTD7",
coverxit 0:f32a15965d96 73 "SPI_CLK": "PTD5",
coverxit 0:f32a15965d96 74 "SPI_CS": "PTD4"
coverxit 0:f32a15965d96 75 },
coverxit 0:f32a15965d96 76 "K64F": {
coverxit 0:f32a15965d96 77 "SPI_MOSI": "PTE3",
coverxit 0:f32a15965d96 78 "SPI_MISO": "PTE1",
coverxit 0:f32a15965d96 79 "SPI_CLK": "PTE2",
coverxit 0:f32a15965d96 80 "SPI_CS": "PTE4"
coverxit 0:f32a15965d96 81 },
coverxit 0:f32a15965d96 82 "K66F": {
coverxit 0:f32a15965d96 83 "SPI_MOSI": "PTE3",
coverxit 0:f32a15965d96 84 "SPI_MISO": "PTE1",
coverxit 0:f32a15965d96 85 "SPI_CLK": "PTE2",
coverxit 0:f32a15965d96 86 "SPI_CS": "PTE4"
coverxit 0:f32a15965d96 87 },
coverxit 0:f32a15965d96 88 "LPC11U37H_401": {
coverxit 0:f32a15965d96 89 "SPI_MOSI": "SDMOSI",
coverxit 0:f32a15965d96 90 "SPI_MISO": "SDMISO",
coverxit 0:f32a15965d96 91 "SPI_CLK": "SDSCLK",
coverxit 0:f32a15965d96 92 "SPI_CS": "SDSSEL"
coverxit 0:f32a15965d96 93 },
coverxit 0:f32a15965d96 94 "LPC2368": {
coverxit 0:f32a15965d96 95 "SPI_MOSI": "p11",
coverxit 0:f32a15965d96 96 "SPI_MISO": "p12",
coverxit 0:f32a15965d96 97 "SPI_CLK": "p13",
coverxit 0:f32a15965d96 98 "SPI_CS": "p14"
coverxit 0:f32a15965d96 99 },
coverxit 0:f32a15965d96 100 "NUCLEO_L031K6": {
coverxit 0:f32a15965d96 101 "SPI_MOSI": "SPI_MOSI",
coverxit 0:f32a15965d96 102 "SPI_MISO": "SPI_MISO",
coverxit 0:f32a15965d96 103 "SPI_CLK": "SPI_SCK",
coverxit 0:f32a15965d96 104 "SPI_CS": "SPI_CS"
coverxit 0:f32a15965d96 105 },
coverxit 0:f32a15965d96 106 "NUMAKER_PFM_M453": {
coverxit 0:f32a15965d96 107 "SPI_MOSI": "PD_13",
coverxit 0:f32a15965d96 108 "SPI_MISO": "PD_14",
coverxit 0:f32a15965d96 109 "SPI_CLK": "PD_15",
coverxit 0:f32a15965d96 110 "SPI_CS": "PD_12"
coverxit 0:f32a15965d96 111 },
coverxit 0:f32a15965d96 112 "NUMAKER_PFM_NUC472": {
coverxit 0:f32a15965d96 113 "SPI_MOSI": "PF_0",
coverxit 0:f32a15965d96 114 "SPI_MISO": "PD_15",
coverxit 0:f32a15965d96 115 "SPI_CLK": "PD_14",
coverxit 0:f32a15965d96 116 "SPI_CS": "PD_13"
coverxit 0:f32a15965d96 117 },
coverxit 0:f32a15965d96 118 "nRF51822": {
coverxit 0:f32a15965d96 119 "SPI_MOSI": "p12",
coverxit 0:f32a15965d96 120 "SPI_MISO": "p13",
coverxit 0:f32a15965d96 121 "SPI_CLK": "p15",
coverxit 0:f32a15965d96 122 "SPI_CS": "p14"
coverxit 0:f32a15965d96 123 },
coverxit 0:f32a15965d96 124 "UBLOX_EVK_ODIN_W2": {
coverxit 0:f32a15965d96 125 "SPI_CS": "D9",
coverxit 0:f32a15965d96 126 "SPI_MOSI": "D11",
coverxit 0:f32a15965d96 127 "SPI_MISO": "D12",
coverxit 0:f32a15965d96 128 "SPI_CLK": "D13"
coverxit 0:f32a15965d96 129 },
coverxit 0:f32a15965d96 130 "RZ_A1H": {
coverxit 0:f32a15965d96 131 "SPI_MOSI": "P8_5",
coverxit 0:f32a15965d96 132 "SPI_MISO": "P8_6",
coverxit 0:f32a15965d96 133 "SPI_CLK": "P8_3",
coverxit 0:f32a15965d96 134 "SPI_CS": "P8_4"
flombella 2:7b302d81ede0 135 },
flombella 2:7b302d81ede0 136 "NUCLEO-F401RE": {
flombella 2:7b302d81ede0 137 "SPI_MOSI": "P8_5",
flombella 2:7b302d81ede0 138 "SPI_MISO": "P8_6",
flombella 2:7b302d81ede0 139 "SPI_CLK": "P8_3",
flombella 2:7b302d81ede0 140 "SPI_CS": "P8_4"
flombella 2:7b302d81ede0 141 }
coverxit 0:f32a15965d96 142 }
coverxit 0:f32a15965d96 143 }