Flo rian / RF22KL25Z

Library for HopeRF RFM22 transceiver module ported to mbed. Original Software from Mike McCauley (mikem@open.com.au) . See http://www.open.com.au/mikem/arduino/RF22/

Fork of RF22 by Karl Zweimüller

RF22.cpp@5:0386600f3408, 2013-03-02 (annotated)

Committer:
charly
Date:
Sat Mar 02 20:49:07 2013 +0000
Revision:
5:0386600f3408
Parent:
4:f0bf38bb0ff8
Child:
7:b86825b9d74b
Updated to Revision 1.25 of original package

Who changed what in which revision?

UserRevisionLine numberNew contents of line
charly 0:79c6d0071c4c 1 // RF22.cpp
charly 0:79c6d0071c4c 2 //
charly 0:79c6d0071c4c 3 // Copyright (C) 2011 Mike McCauley
charly 5:0386600f3408 4 // $Id: RF22.cpp,v 1.17 2013/02/06 21:33:56 mikem Exp mikem $
charly 0:79c6d0071c4c 5 // ported to mbed by Karl Zweimueller
charly 0:79c6d0071c4c 6
charly 0:79c6d0071c4c 7
charly 0:79c6d0071c4c 8 #include "mbed.h"
charly 0:79c6d0071c4c 9 #include "RF22.h"
charly 0:79c6d0071c4c 10 //#include <SPI.h>
charly 0:79c6d0071c4c 11
charly 0:79c6d0071c4c 12
charly 0:79c6d0071c4c 13 // Interrupt vectors for the 2 Arduino interrupt pins
charly 0:79c6d0071c4c 14 // Each interrupt can be handled by a different instance of RF22, allowing you to have
charly 0:79c6d0071c4c 15 // 2 RF22s per Arduino
charly 0:79c6d0071c4c 16 //RF22* RF22::_RF22ForInterrupt[2] = {0, 0};
charly 0:79c6d0071c4c 17
charly 0:79c6d0071c4c 18 // These are indexed by the values of ModemConfigChoice
charly 0:79c6d0071c4c 19 // Canned modem configurations generated with
charly 5:0386600f3408 20 // http://www.hoperf.com/upload/rf/RF22B%2023B%2031B%2042B%2043B%20Register%20Settings_RevB1-v5.xls
charly 0:79c6d0071c4c 21 // Stored in flash (program) memory to save SRAM
charly 0:79c6d0071c4c 22 /*PROGMEM */ static const RF22::ModemConfig MODEM_CONFIG_TABLE[] =
charly 0:79c6d0071c4c 23 {
charly 0:79c6d0071c4c 24 { 0x2b, 0x03, 0xf4, 0x20, 0x41, 0x89, 0x00, 0x36, 0x40, 0x0a, 0x1d, 0x80, 0x60, 0x10, 0x62, 0x2c, 0x00, 0x08 }, // Unmodulated carrier
charly 0:79c6d0071c4c 25 { 0x2b, 0x03, 0xf4, 0x20, 0x41, 0x89, 0x00, 0x36, 0x40, 0x0a, 0x1d, 0x80, 0x60, 0x10, 0x62, 0x2c, 0x33, 0x08 }, // FSK, PN9 random modulation, 2, 5
charly 0:79c6d0071c4c 26
charly 5:0386600f3408 27 // All the following enable FIFO with reg 71
charly 0:79c6d0071c4c 28 // 1c, 1f, 20, 21, 22, 23, 24, 25, 2c, 2d, 2e, 58, 69, 6e, 6f, 70, 71, 72
charly 0:79c6d0071c4c 29 // FSK, No Manchester, Max Rb err <1%, Xtal Tol 20ppm
charly 0:79c6d0071c4c 30 { 0x2b, 0x03, 0xf4, 0x20, 0x41, 0x89, 0x00, 0x36, 0x40, 0x0a, 0x1d, 0x80, 0x60, 0x10, 0x62, 0x2c, 0x22, 0x08 }, // 2, 5
charly 0:79c6d0071c4c 31 { 0x1b, 0x03, 0x41, 0x60, 0x27, 0x52, 0x00, 0x07, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x22, 0x3a }, // 2.4, 36
charly 0:79c6d0071c4c 32 { 0x1d, 0x03, 0xa1, 0x20, 0x4e, 0xa5, 0x00, 0x13, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x27, 0x52, 0x2c, 0x22, 0x48 }, // 4.8, 45
charly 0:79c6d0071c4c 33 { 0x1e, 0x03, 0xd0, 0x00, 0x9d, 0x49, 0x00, 0x45, 0x40, 0x0a, 0x20, 0x80, 0x60, 0x4e, 0xa5, 0x2c, 0x22, 0x48 }, // 9.6, 45
charly 0:79c6d0071c4c 34 { 0x2b, 0x03, 0x34, 0x02, 0x75, 0x25, 0x07, 0xff, 0x40, 0x0a, 0x1b, 0x80, 0x60, 0x9d, 0x49, 0x2c, 0x22, 0x0f }, // 19.2, 9.6
charly 0:79c6d0071c4c 35 { 0x02, 0x03, 0x68, 0x01, 0x3a, 0x93, 0x04, 0xd5, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x09, 0xd5, 0x0c, 0x22, 0x1f }, // 38.4, 19.6
charly 0:79c6d0071c4c 36 { 0x06, 0x03, 0x45, 0x01, 0xd7, 0xdc, 0x07, 0x6e, 0x40, 0x0a, 0x2d, 0x80, 0x60, 0x0e, 0xbf, 0x0c, 0x22, 0x2e }, // 57.6. 28.8
charly 0:79c6d0071c4c 37 { 0x8a, 0x03, 0x60, 0x01, 0x55, 0x55, 0x02, 0xad, 0x40, 0x0a, 0x50, 0x80, 0x60, 0x20, 0x00, 0x0c, 0x22, 0xc8 }, // 125, 125
charly 0:79c6d0071c4c 38
charly 0:79c6d0071c4c 39 // GFSK, No Manchester, Max Rb err <1%, Xtal Tol 20ppm
charly 0:79c6d0071c4c 40 // These differ from FSK only in register 71, for the modulation type
charly 0:79c6d0071c4c 41 { 0x2b, 0x03, 0xf4, 0x20, 0x41, 0x89, 0x00, 0x36, 0x40, 0x0a, 0x1d, 0x80, 0x60, 0x10, 0x62, 0x2c, 0x23, 0x08 }, // 2, 5
charly 0:79c6d0071c4c 42 { 0x1b, 0x03, 0x41, 0x60, 0x27, 0x52, 0x00, 0x07, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x23, 0x3a }, // 2.4, 36
charly 0:79c6d0071c4c 43 { 0x1d, 0x03, 0xa1, 0x20, 0x4e, 0xa5, 0x00, 0x13, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x27, 0x52, 0x2c, 0x23, 0x48 }, // 4.8, 45
charly 0:79c6d0071c4c 44 { 0x1e, 0x03, 0xd0, 0x00, 0x9d, 0x49, 0x00, 0x45, 0x40, 0x0a, 0x20, 0x80, 0x60, 0x4e, 0xa5, 0x2c, 0x23, 0x48 }, // 9.6, 45
charly 0:79c6d0071c4c 45 { 0x2b, 0x03, 0x34, 0x02, 0x75, 0x25, 0x07, 0xff, 0x40, 0x0a, 0x1b, 0x80, 0x60, 0x9d, 0x49, 0x2c, 0x23, 0x0f }, // 19.2, 9.6
charly 0:79c6d0071c4c 46 { 0x02, 0x03, 0x68, 0x01, 0x3a, 0x93, 0x04, 0xd5, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x09, 0xd5, 0x0c, 0x23, 0x1f }, // 38.4, 19.6
charly 0:79c6d0071c4c 47 { 0x06, 0x03, 0x45, 0x01, 0xd7, 0xdc, 0x07, 0x6e, 0x40, 0x0a, 0x2d, 0x80, 0x60, 0x0e, 0xbf, 0x0c, 0x23, 0x2e }, // 57.6. 28.8
charly 0:79c6d0071c4c 48 { 0x8a, 0x03, 0x60, 0x01, 0x55, 0x55, 0x02, 0xad, 0x40, 0x0a, 0x50, 0x80, 0x60, 0x20, 0x00, 0x0c, 0x23, 0xc8 }, // 125, 125
charly 0:79c6d0071c4c 49
charly 0:79c6d0071c4c 50 // OOK, No Manchester, Max Rb err <1%, Xtal Tol 20ppm
charly 0:79c6d0071c4c 51 { 0x51, 0x03, 0x68, 0x00, 0x3a, 0x93, 0x01, 0x3d, 0x2c, 0x11, 0x28, 0x80, 0x60, 0x09, 0xd5, 0x2c, 0x21, 0x08 }, // 1.2, 75
charly 0:79c6d0071c4c 52 { 0xc8, 0x03, 0x39, 0x20, 0x68, 0xdc, 0x00, 0x6b, 0x2a, 0x08, 0x2a, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x21, 0x08 }, // 2.4, 335
charly 0:79c6d0071c4c 53 { 0xc8, 0x03, 0x9c, 0x00, 0xd1, 0xb7, 0x00, 0xd4, 0x29, 0x04, 0x29, 0x80, 0x60, 0x27, 0x52, 0x2c, 0x21, 0x08 }, // 4.8, 335
charly 0:79c6d0071c4c 54 { 0xb8, 0x03, 0x9c, 0x00, 0xd1, 0xb7, 0x00, 0xd4, 0x28, 0x82, 0x29, 0x80, 0x60, 0x4e, 0xa5, 0x2c, 0x21, 0x08 }, // 9.6, 335
charly 0:79c6d0071c4c 55 { 0xa8, 0x03, 0x9c, 0x00, 0xd1, 0xb7, 0x00, 0xd4, 0x28, 0x41, 0x29, 0x80, 0x60, 0x9d, 0x49, 0x2c, 0x21, 0x08 }, // 19.2, 335
charly 0:79c6d0071c4c 56 { 0x98, 0x03, 0x9c, 0x00, 0xd1, 0xb7, 0x00, 0xd4, 0x28, 0x20, 0x29, 0x80, 0x60, 0x09, 0xd5, 0x0c, 0x21, 0x08 }, // 38.4, 335
charly 0:79c6d0071c4c 57 { 0x98, 0x03, 0x96, 0x00, 0xda, 0x74, 0x00, 0xdc, 0x28, 0x1f, 0x29, 0x80, 0x60, 0x0a, 0x3d, 0x0c, 0x21, 0x08 }, // 40, 335
charly 0:79c6d0071c4c 58
charly 0:79c6d0071c4c 59 };
charly 0:79c6d0071c4c 60
charly 0:79c6d0071c4c 61 RF22::RF22(PinName slaveSelectPin, PinName mosi, PinName miso, PinName sclk, PinName interrupt)
charly 0:79c6d0071c4c 62 : _slaveSelectPin(slaveSelectPin), _spi(mosi, miso, sclk), _interrupt(interrupt), led1(LED1), led2(LED2), led3(LED3), led4(LED4)
charly 0:79c6d0071c4c 63 {
charly 0:79c6d0071c4c 64
charly 0:79c6d0071c4c 65
charly 0:79c6d0071c4c 66 _idleMode = RF22_XTON; // Default idle state is READY mode
charly 0:79c6d0071c4c 67 _mode = RF22_MODE_IDLE; // We start up in idle mode
charly 0:79c6d0071c4c 68 _rxGood = 0;
charly 0:79c6d0071c4c 69 _rxBad = 0;
charly 0:79c6d0071c4c 70 _txGood = 0;
charly 0:79c6d0071c4c 71
charly 0:79c6d0071c4c 72
charly 0:79c6d0071c4c 73 }
charly 0:79c6d0071c4c 74
charly 0:79c6d0071c4c 75 boolean RF22::init()
charly 0:79c6d0071c4c 76 {
charly 0:79c6d0071c4c 77 // Wait for RF22 POR (up to 16msec)
charly 0:79c6d0071c4c 78 //delay(16);
charly 0:79c6d0071c4c 79 wait_ms(16);
charly 0:79c6d0071c4c 80
charly 0:79c6d0071c4c 81 // Initialise the slave select pin
charly 0:79c6d0071c4c 82 //pinMode(_slaveSelectPin, OUTPUT);
charly 0:79c6d0071c4c 83 //digitalWrite(_slaveSelectPin, HIGH);
charly 0:79c6d0071c4c 84 _slaveSelectPin = 1;
charly 0:79c6d0071c4c 85
charly 0:79c6d0071c4c 86 wait_ms(100);
charly 0:79c6d0071c4c 87
charly 0:79c6d0071c4c 88 // start the SPI library:
charly 0:79c6d0071c4c 89 // Note the RF22 wants mode 0, MSB first and default to 1 Mbps
charly 0:79c6d0071c4c 90 /*SPI.begin();
charly 0:79c6d0071c4c 91 SPI.setDataMode(SPI_MODE0);
charly 0:79c6d0071c4c 92 SPI.setBitOrder(MSBFIRST);
charly 0:79c6d0071c4c 93 SPI.setClockDivider(SPI_CLOCK_DIV16); // (16 Mhz / 16) = 1 MHz
charly 0:79c6d0071c4c 94 */
charly 0:79c6d0071c4c 95
charly 0:79c6d0071c4c 96 // Setup the spi for 8 bit data : 1RW-bit 7 adressbit and 8 databit
charly 0:79c6d0071c4c 97 // second edge capture, with a 10MHz clock rate
charly 0:79c6d0071c4c 98 _spi.format(8,0);
charly 0:79c6d0071c4c 99 _spi.frequency(10000000);
charly 0:79c6d0071c4c 100
charly 0:79c6d0071c4c 101 // Software reset the device
charly 0:79c6d0071c4c 102 reset();
charly 0:79c6d0071c4c 103
charly 0:79c6d0071c4c 104 // Get the device type and check it
charly 0:79c6d0071c4c 105 // This also tests whether we are really connected to a device
charly 0:79c6d0071c4c 106 _deviceType = spiRead(RF22_REG_00_DEVICE_TYPE);
charly 0:79c6d0071c4c 107 if ( _deviceType != RF22_DEVICE_TYPE_RX_TRX
charly 0:79c6d0071c4c 108 && _deviceType != RF22_DEVICE_TYPE_TX)
charly 0:79c6d0071c4c 109 return false;
charly 0:79c6d0071c4c 110
charly 0:79c6d0071c4c 111 // Set up interrupt handler
charly 0:79c6d0071c4c 112 // if (_interrupt == 0)
charly 0:79c6d0071c4c 113 // {
charly 0:79c6d0071c4c 114 //_RF22ForInterrupt[0] = this;
charly 0:79c6d0071c4c 115 //attachInterrupt(0, RF22::isr0, LOW);
charly 0:79c6d0071c4c 116 _interrupt.fall(this, &RF22::isr0);
charly 0:79c6d0071c4c 117 /* }
charly 0:79c6d0071c4c 118 else if (_interrupt == 1)
charly 0:79c6d0071c4c 119 {
charly 0:79c6d0071c4c 120 _RF22ForInterrupt[1] = this;
charly 0:79c6d0071c4c 121 attachInterrupt(1, RF22::isr1, LOW);
charly 0:79c6d0071c4c 122 }
charly 0:79c6d0071c4c 123 else
charly 0:79c6d0071c4c 124 return false;
charly 0:79c6d0071c4c 125 */
charly 0:79c6d0071c4c 126 clearTxBuf();
charly 0:79c6d0071c4c 127 clearRxBuf();
charly 0:79c6d0071c4c 128
charly 0:79c6d0071c4c 129 // Most of these are the POR default
charly 0:79c6d0071c4c 130 spiWrite(RF22_REG_7D_TX_FIFO_CONTROL2, RF22_TXFFAEM_THRESHOLD);
charly 0:79c6d0071c4c 131 spiWrite(RF22_REG_7E_RX_FIFO_CONTROL, RF22_RXFFAFULL_THRESHOLD);
charly 0:79c6d0071c4c 132 spiWrite(RF22_REG_30_DATA_ACCESS_CONTROL, RF22_ENPACRX | RF22_ENPACTX | RF22_ENCRC | RF22_CRC_CRC_16_IBM);
charly 0:79c6d0071c4c 133 // Configure the message headers
charly 0:79c6d0071c4c 134 // Here we set up the standard packet format for use by the RF22 library
charly 0:79c6d0071c4c 135 // 8 nibbles preamble
charly 0:79c6d0071c4c 136 // 2 SYNC words 2d, d4
charly 0:79c6d0071c4c 137 // Header length 4 (to, from, id, flags)
charly 0:79c6d0071c4c 138 // 1 octet of data length (0 to 255)
charly 0:79c6d0071c4c 139 // 0 to 255 octets data
charly 0:79c6d0071c4c 140 // 2 CRC octets as CRC16(IBM), computed on the header, length and data
charly 0:79c6d0071c4c 141 // On reception the to address is check for validity against RF22_REG_3F_CHECK_HEADER3
charly 0:79c6d0071c4c 142 // or the broadcast address of 0xff
charly 0:79c6d0071c4c 143 // If no changes are made after this, the transmitted
charly 0:79c6d0071c4c 144 // to address will be 0xff, the from address will be 0xff
charly 0:79c6d0071c4c 145 // and all such messages will be accepted. This permits the out-of the box
charly 0:79c6d0071c4c 146 // RF22 config to act as an unaddresed, unreliable datagram service
charly 0:79c6d0071c4c 147 spiWrite(RF22_REG_32_HEADER_CONTROL1, RF22_BCEN_HEADER3 | RF22_HDCH_HEADER3);
charly 0:79c6d0071c4c 148 spiWrite(RF22_REG_33_HEADER_CONTROL2, RF22_HDLEN_4 | RF22_SYNCLEN_2);
charly 0:79c6d0071c4c 149 setPreambleLength(8);
charly 0:79c6d0071c4c 150 uint8_t syncwords[] = { 0x2d, 0xd4 };
charly 0:79c6d0071c4c 151 setSyncWords(syncwords, sizeof(syncwords));
charly 0:79c6d0071c4c 152 setPromiscuous(false);
charly 0:79c6d0071c4c 153 // Check the TO header against RF22_DEFAULT_NODE_ADDRESS
charly 0:79c6d0071c4c 154 spiWrite(RF22_REG_3F_CHECK_HEADER3, RF22_DEFAULT_NODE_ADDRESS);
charly 0:79c6d0071c4c 155 // Set the default transmit header values
charly 0:79c6d0071c4c 156 setHeaderTo(RF22_DEFAULT_NODE_ADDRESS);
charly 0:79c6d0071c4c 157 setHeaderFrom(RF22_DEFAULT_NODE_ADDRESS);
charly 0:79c6d0071c4c 158 setHeaderId(0);
charly 0:79c6d0071c4c 159 setHeaderFlags(0);
charly 0:79c6d0071c4c 160
charly 0:79c6d0071c4c 161 // Ensure the antenna can be switched automatically according to transmit and receive
charly 0:79c6d0071c4c 162 // This assumes GPIO0(out) is connected to TX_ANT(in) to enable tx antenna during transmit
charly 0:79c6d0071c4c 163 // This assumes GPIO1(out) is connected to RX_ANT(in) to enable rx antenna during receive
charly 0:79c6d0071c4c 164 spiWrite (RF22_REG_0B_GPIO_CONFIGURATION0, 0x12) ; // TX state
charly 0:79c6d0071c4c 165 spiWrite (RF22_REG_0C_GPIO_CONFIGURATION1, 0x15) ; // RX state
charly 0:79c6d0071c4c 166
charly 0:79c6d0071c4c 167 // Enable interrupts
charly 0:79c6d0071c4c 168 spiWrite(RF22_REG_05_INTERRUPT_ENABLE1, RF22_ENTXFFAEM | RF22_ENRXFFAFULL | RF22_ENPKSENT | RF22_ENPKVALID | RF22_ENCRCERROR | RF22_ENFFERR);
charly 0:79c6d0071c4c 169 spiWrite(RF22_REG_06_INTERRUPT_ENABLE2, RF22_ENPREAVAL);
charly 0:79c6d0071c4c 170
charly 5:0386600f3408 171 // Set some defaults. An innocuous ISM frequency, and reasonable pull-in
charly 5:0386600f3408 172 setFrequency(434.0, 0.05);
charly 0:79c6d0071c4c 173 // setFrequency(900.0);
charly 0:79c6d0071c4c 174 // Some slow, reliable default speed and modulation
charly 0:79c6d0071c4c 175 setModemConfig(FSK_Rb2_4Fd36);
charly 0:79c6d0071c4c 176 // setModemConfig(FSK_Rb125Fd125);
charly 0:79c6d0071c4c 177 // Minimum power
charly 0:79c6d0071c4c 178 setTxPower(RF22_TXPOW_8DBM);
charly 0:79c6d0071c4c 179 // setTxPower(RF22_TXPOW_17DBM);
charly 0:79c6d0071c4c 180
charly 2:f6f42c2ba9f2 181 // Set the AFC for receiver to max. 0,1MHz
charly 2:f6f42c2ba9f2 182 // Other AFC-Registers have PowerOnValues which enable AFC
charly 2:f6f42c2ba9f2 183 // RF22_AFC_LIMIT 0x50 =0,1MHz
charly 5:0386600f3408 184 // spiWrite(RF22_REG_2A_AFC_LIMITER, RF22_AFC_LIMIT); // POR=0x00 = OFF
charly 2:f6f42c2ba9f2 185
charly 0:79c6d0071c4c 186 return true;
charly 0:79c6d0071c4c 187 }
charly 0:79c6d0071c4c 188
charly 0:79c6d0071c4c 189 // C++ level interrupt handler for this instance
charly 0:79c6d0071c4c 190 void RF22::handleInterrupt()
charly 0:79c6d0071c4c 191 {
charly 0:79c6d0071c4c 192 uint8_t _lastInterruptFlags[2];
charly 0:79c6d0071c4c 193
charly 0:79c6d0071c4c 194 led1 = !led1;
charly 0:79c6d0071c4c 195
charly 0:79c6d0071c4c 196 // Read the interrupt flags which clears the interrupt
charly 0:79c6d0071c4c 197 spiBurstRead(RF22_REG_03_INTERRUPT_STATUS1, _lastInterruptFlags, 2);
charly 0:79c6d0071c4c 198
charly 0:79c6d0071c4c 199 #if 0
charly 5:0386600f3408 200 // Caution: Serial printing in this interrupt routine can cause mysterious crashes
charly 5:0386600f3408 201 Serial.print("interrupt ");
charly 0:79c6d0071c4c 202 Serial.print(_lastInterruptFlags[0], HEX);
charly 0:79c6d0071c4c 203 Serial.print(" ");
charly 0:79c6d0071c4c 204 Serial.println(_lastInterruptFlags[1], HEX);
charly 0:79c6d0071c4c 205 if (_lastInterruptFlags[0] == 0 && _lastInterruptFlags[1] == 0)
charly 0:79c6d0071c4c 206 Serial.println("FUNNY: no interrupt!");
charly 0:79c6d0071c4c 207 #endif
charly 0:79c6d0071c4c 208
charly 5:0386600f3408 209 #if 0
charly 0:79c6d0071c4c 210 // TESTING: fake an RF22_IFFERROR
charly 0:79c6d0071c4c 211 static int counter = 0;
charly 0:79c6d0071c4c 212 if (_lastInterruptFlags[0] & RF22_IPKSENT && counter++ == 10)
charly 0:79c6d0071c4c 213 {
charly 0:79c6d0071c4c 214 _lastInterruptFlags[0] = RF22_IFFERROR;
charly 0:79c6d0071c4c 215 counter = 0;
charly 0:79c6d0071c4c 216 }
charly 5:0386600f3408 217 #endif
charly 0:79c6d0071c4c 218
charly 0:79c6d0071c4c 219 if (_lastInterruptFlags[0] & RF22_IFFERROR)
charly 0:79c6d0071c4c 220 {
charly 0:79c6d0071c4c 221 // Serial.println("IFFERROR");
charly 0:79c6d0071c4c 222 resetFifos(); // Clears the interrupt
charly 0:79c6d0071c4c 223 if (_mode == RF22_MODE_TX)
charly 0:79c6d0071c4c 224 restartTransmit();
charly 0:79c6d0071c4c 225 else if (_mode == RF22_MODE_RX)
charly 0:79c6d0071c4c 226 clearRxBuf();
charly 0:79c6d0071c4c 227 }
charly 0:79c6d0071c4c 228 // Caution, any delay here may cause a FF underflow or overflow
charly 0:79c6d0071c4c 229 if (_lastInterruptFlags[0] & RF22_ITXFFAEM)
charly 0:79c6d0071c4c 230 {
charly 0:79c6d0071c4c 231 // See if more data has to be loaded into the Tx FIFO
charly 0:79c6d0071c4c 232 sendNextFragment();
charly 5:0386600f3408 233 // Serial.println("ITXFFAEM");
charly 0:79c6d0071c4c 234 }
charly 0:79c6d0071c4c 235 if (_lastInterruptFlags[0] & RF22_IRXFFAFULL)
charly 0:79c6d0071c4c 236 {
charly 0:79c6d0071c4c 237 // Caution, any delay here may cause a FF overflow
charly 0:79c6d0071c4c 238 // Read some data from the Rx FIFO
charly 0:79c6d0071c4c 239 readNextFragment();
charly 0:79c6d0071c4c 240 // Serial.println("IRXFFAFULL");
charly 0:79c6d0071c4c 241 }
charly 0:79c6d0071c4c 242 if (_lastInterruptFlags[0] & RF22_IEXT)
charly 0:79c6d0071c4c 243 {
charly 0:79c6d0071c4c 244 // This is not enabled by the base code, but users may want to enable it
charly 0:79c6d0071c4c 245 handleExternalInterrupt();
charly 0:79c6d0071c4c 246 // Serial.println("IEXT");
charly 0:79c6d0071c4c 247 }
charly 0:79c6d0071c4c 248 if (_lastInterruptFlags[1] & RF22_IWUT)
charly 0:79c6d0071c4c 249 {
charly 0:79c6d0071c4c 250 // This is not enabled by the base code, but users may want to enable it
charly 0:79c6d0071c4c 251 handleWakeupTimerInterrupt();
charly 0:79c6d0071c4c 252 // Serial.println("IWUT");
charly 0:79c6d0071c4c 253 }
charly 0:79c6d0071c4c 254 if (_lastInterruptFlags[0] & RF22_IPKSENT)
charly 0:79c6d0071c4c 255 {
charly 5:0386600f3408 256 // Serial.println("IPKSENT");
charly 0:79c6d0071c4c 257 _txGood++;
charly 0:79c6d0071c4c 258 led4 = !led4;
charly 0:79c6d0071c4c 259 // Transmission does not automatically clear the tx buffer.
charly 0:79c6d0071c4c 260 // Could retransmit if we wanted
charly 0:79c6d0071c4c 261 // RF22 transitions automatically to Idle
charly 0:79c6d0071c4c 262 _mode = RF22_MODE_IDLE;
charly 0:79c6d0071c4c 263 }
charly 0:79c6d0071c4c 264 if (_lastInterruptFlags[0] & RF22_IPKVALID)
charly 0:79c6d0071c4c 265 {
charly 0:79c6d0071c4c 266 uint8_t len = spiRead(RF22_REG_4B_RECEIVED_PACKET_LENGTH);
charly 5:0386600f3408 267 // Serial.println("IPKVALID");
charly 5:0386600f3408 268 // Serial.println(len);
charly 5:0386600f3408 269 // Serial.println(_bufLen);
charly 5:0386600f3408 270
charly 0:79c6d0071c4c 271 // May have already read one or more fragments
charly 0:79c6d0071c4c 272 // Get any remaining unread octets, based on the expected length
charly 5:0386600f3408 273 // First make sure we dont overflow the buffer in the case of a stupid length
charly 5:0386600f3408 274 // or partial bad receives
charly 5:0386600f3408 275 if ( len > RF22_MAX_MESSAGE_LEN
charly 5:0386600f3408 276 || len < _bufLen)
charly 5:0386600f3408 277 {
charly 5:0386600f3408 278 _rxBad++;
charly 5:0386600f3408 279 _mode = RF22_MODE_IDLE;
charly 5:0386600f3408 280 clearRxBuf();
charly 5:0386600f3408 281 return; // Hmmm receiver buffer overflow.
charly 5:0386600f3408 282 }
charly 5:0386600f3408 283
charly 5:0386600f3408 284 spiBurstRead(RF22_REG_7F_FIFO_ACCESS, _buf + _bufLen, len - _bufLen);
charly 0:79c6d0071c4c 285 _rxGood++;
charly 5:0386600f3408 286 _bufLen = len;
charly 0:79c6d0071c4c 287 _mode = RF22_MODE_IDLE;
charly 0:79c6d0071c4c 288 _rxBufValid = true;
charly 5:0386600f3408 289
charly 5:0386600f3408 290 led3 = !led3;
charly 5:0386600f3408 291
charly 0:79c6d0071c4c 292 }
charly 0:79c6d0071c4c 293 if (_lastInterruptFlags[0] & RF22_ICRCERROR)
charly 0:79c6d0071c4c 294 {
charly 0:79c6d0071c4c 295 // Serial.println("ICRCERR");
charly 0:79c6d0071c4c 296 _rxBad++;
charly 0:79c6d0071c4c 297 led2 = !led2;
charly 0:79c6d0071c4c 298 clearRxBuf();
charly 0:79c6d0071c4c 299 resetRxFifo();
charly 0:79c6d0071c4c 300 _mode = RF22_MODE_IDLE;
charly 0:79c6d0071c4c 301 setModeRx(); // Keep trying
charly 0:79c6d0071c4c 302 }
charly 4:f0bf38bb0ff8 303 if (_lastInterruptFlags[1] & RF22_IPREAVAL)
charly 0:79c6d0071c4c 304 {
charly 5:0386600f3408 305 // Serial.println("IPREAVAL");
charly 0:79c6d0071c4c 306 _lastRssi = spiRead(RF22_REG_26_RSSI);
charly 0:79c6d0071c4c 307 clearRxBuf();
charly 0:79c6d0071c4c 308 }
charly 0:79c6d0071c4c 309 }
charly 0:79c6d0071c4c 310
charly 0:79c6d0071c4c 311 // These are low level functions that call the interrupt handler for the correct
charly 0:79c6d0071c4c 312 // instance of RF22.
charly 0:79c6d0071c4c 313 // 2 interrupts allows us to have 2 different devices
charly 0:79c6d0071c4c 314 void RF22::isr0()
charly 0:79c6d0071c4c 315 {
charly 0:79c6d0071c4c 316 //if (_RF22ForInterrupt[0])
charly 0:79c6d0071c4c 317 //_RF22ForInterrupt[0]->handleInterrupt();
charly 0:79c6d0071c4c 318 handleInterrupt();
charly 0:79c6d0071c4c 319 }
charly 0:79c6d0071c4c 320 /*
charly 0:79c6d0071c4c 321 void RF22::isr1()
charly 0:79c6d0071c4c 322 {
charly 0:79c6d0071c4c 323 if (_RF22ForInterrupt[1])
charly 0:79c6d0071c4c 324 _RF22ForInterrupt[1]->handleInterrupt();
charly 0:79c6d0071c4c 325 }
charly 0:79c6d0071c4c 326 */
charly 0:79c6d0071c4c 327 void RF22::reset()
charly 0:79c6d0071c4c 328 {
charly 0:79c6d0071c4c 329 spiWrite(RF22_REG_07_OPERATING_MODE1, RF22_SWRES);
charly 0:79c6d0071c4c 330 // Wait for it to settle
charly 0:79c6d0071c4c 331 //delay(1); // SWReset time is nominally 100usec
charly 0:79c6d0071c4c 332 wait_ms(1);
charly 0:79c6d0071c4c 333 }
charly 0:79c6d0071c4c 334
charly 0:79c6d0071c4c 335 uint8_t RF22::spiRead(uint8_t reg)
charly 0:79c6d0071c4c 336 {
charly 0:79c6d0071c4c 337 //digitalWrite(_slaveSelectPin, LOW);
charly 0:79c6d0071c4c 338 _slaveSelectPin=0;
charly 0:79c6d0071c4c 339 //_spi.write(reg & ~RF22_SPI_WRITE_MASK); // Send the address with the write mask off
charly 0:79c6d0071c4c 340 _spi.write(reg & ~RF22_SPI_WRITE_MASK); // Send the address with the write mask off
charly 0:79c6d0071c4c 341 uint8_t val = _spi.write(0); // The written value is ignored, reg value is read
charly 0:79c6d0071c4c 342 //digitalWrite(_slaveSelectPin, HIGH);
charly 0:79c6d0071c4c 343 _slaveSelectPin = 1;
charly 0:79c6d0071c4c 344 return val;
charly 0:79c6d0071c4c 345 }
charly 0:79c6d0071c4c 346
charly 0:79c6d0071c4c 347 void RF22::spiWrite(uint8_t reg, uint8_t val)
charly 0:79c6d0071c4c 348 {
charly 0:79c6d0071c4c 349 //digitalWrite(_slaveSelectPin, LOW);
charly 0:79c6d0071c4c 350 _slaveSelectPin = 0;
charly 0:79c6d0071c4c 351 _spi.write(reg | RF22_SPI_WRITE_MASK); // Send the address with the write mask on
charly 0:79c6d0071c4c 352 _spi.write(val); // New value follows
charly 0:79c6d0071c4c 353 //digitalWrite(_slaveSelectPin, HIGH);
charly 0:79c6d0071c4c 354 _slaveSelectPin = 1;
charly 0:79c6d0071c4c 355 }
charly 0:79c6d0071c4c 356
charly 0:79c6d0071c4c 357 void RF22::spiBurstRead(uint8_t reg, uint8_t* dest, uint8_t len)
charly 0:79c6d0071c4c 358 {
charly 0:79c6d0071c4c 359 //digitalWrite(_slaveSelectPin, LOW);
charly 0:79c6d0071c4c 360 _slaveSelectPin = 0;
charly 0:79c6d0071c4c 361 _spi.write(reg & ~RF22_SPI_WRITE_MASK); // Send the start address with the write mask off
charly 0:79c6d0071c4c 362 while (len--)
charly 0:79c6d0071c4c 363 *dest++ = _spi.write(0);
charly 0:79c6d0071c4c 364 //digitalWrite(_slaveSelectPin, HIGH);
charly 0:79c6d0071c4c 365 _slaveSelectPin = 1;
charly 0:79c6d0071c4c 366 }
charly 0:79c6d0071c4c 367
charly 5:0386600f3408 368 void RF22::spiBurstWrite(uint8_t reg, const uint8_t* src, uint8_t len)
charly 0:79c6d0071c4c 369 {
charly 0:79c6d0071c4c 370 //digitalWrite(_slaveSelectPin, LOW);
charly 0:79c6d0071c4c 371 _slaveSelectPin = 0;
charly 0:79c6d0071c4c 372 _spi.write(reg | RF22_SPI_WRITE_MASK); // Send the start address with the write mask on
charly 0:79c6d0071c4c 373 while (len--)
charly 0:79c6d0071c4c 374 _spi.write(*src++);
charly 0:79c6d0071c4c 375 //digitalWrite(_slaveSelectPin, HIGH);
charly 0:79c6d0071c4c 376 _slaveSelectPin = 1;
charly 0:79c6d0071c4c 377 }
charly 0:79c6d0071c4c 378
charly 0:79c6d0071c4c 379 uint8_t RF22::statusRead()
charly 0:79c6d0071c4c 380 {
charly 0:79c6d0071c4c 381 return spiRead(RF22_REG_02_DEVICE_STATUS);
charly 0:79c6d0071c4c 382 }
charly 0:79c6d0071c4c 383
charly 0:79c6d0071c4c 384 uint8_t RF22::adcRead(uint8_t adcsel,
charly 0:79c6d0071c4c 385 uint8_t adcref ,
charly 0:79c6d0071c4c 386 uint8_t adcgain,
charly 0:79c6d0071c4c 387 uint8_t adcoffs)
charly 0:79c6d0071c4c 388 {
charly 0:79c6d0071c4c 389 uint8_t configuration = adcsel | adcref | (adcgain & RF22_ADCGAIN);
charly 0:79c6d0071c4c 390 spiWrite(RF22_REG_0F_ADC_CONFIGURATION, configuration | RF22_ADCSTART);
charly 0:79c6d0071c4c 391 spiWrite(RF22_REG_10_ADC_SENSOR_AMP_OFFSET, adcoffs);
charly 0:79c6d0071c4c 392
charly 0:79c6d0071c4c 393 // Conversion time is nominally 305usec
charly 0:79c6d0071c4c 394 // Wait for the DONE bit
charly 0:79c6d0071c4c 395 while (!(spiRead(RF22_REG_0F_ADC_CONFIGURATION) & RF22_ADCDONE))
charly 0:79c6d0071c4c 396 ;
charly 0:79c6d0071c4c 397 // Return the value
charly 0:79c6d0071c4c 398 return spiRead(RF22_REG_11_ADC_VALUE);
charly 0:79c6d0071c4c 399 }
charly 0:79c6d0071c4c 400
charly 0:79c6d0071c4c 401 uint8_t RF22::temperatureRead(uint8_t tsrange, uint8_t tvoffs)
charly 0:79c6d0071c4c 402 {
charly 0:79c6d0071c4c 403 spiWrite(RF22_REG_12_TEMPERATURE_SENSOR_CALIBRATION, tsrange | RF22_ENTSOFFS);
charly 0:79c6d0071c4c 404 spiWrite(RF22_REG_13_TEMPERATURE_VALUE_OFFSET, tvoffs);
charly 0:79c6d0071c4c 405 return adcRead(RF22_ADCSEL_INTERNAL_TEMPERATURE_SENSOR | RF22_ADCREF_BANDGAP_VOLTAGE);
charly 0:79c6d0071c4c 406 }
charly 0:79c6d0071c4c 407
charly 0:79c6d0071c4c 408 uint16_t RF22::wutRead()
charly 0:79c6d0071c4c 409 {
charly 0:79c6d0071c4c 410 uint8_t buf[2];
charly 0:79c6d0071c4c 411 spiBurstRead(RF22_REG_17_WAKEUP_TIMER_VALUE1, buf, 2);
charly 0:79c6d0071c4c 412 return ((uint16_t)buf[0] << 8) | buf[1]; // Dont rely on byte order
charly 0:79c6d0071c4c 413 }
charly 0:79c6d0071c4c 414
charly 0:79c6d0071c4c 415 // RFM-22 doc appears to be wrong: WUT for wtm = 10000, r, = 0, d = 0 is about 1 sec
charly 0:79c6d0071c4c 416 void RF22::setWutPeriod(uint16_t wtm, uint8_t wtr, uint8_t wtd)
charly 0:79c6d0071c4c 417 {
charly 0:79c6d0071c4c 418 uint8_t period[3];
charly 0:79c6d0071c4c 419
charly 0:79c6d0071c4c 420 period[0] = ((wtr & 0xf) << 2) | (wtd & 0x3);
charly 0:79c6d0071c4c 421 period[1] = wtm >> 8;
charly 0:79c6d0071c4c 422 period[2] = wtm & 0xff;
charly 0:79c6d0071c4c 423 spiBurstWrite(RF22_REG_14_WAKEUP_TIMER_PERIOD1, period, sizeof(period));
charly 0:79c6d0071c4c 424 }
charly 0:79c6d0071c4c 425
charly 0:79c6d0071c4c 426 // Returns true if centre + (fhch * fhs) is within limits
charly 5:0386600f3408 427 // Caution, different versions of the RF22 support different max freq
charly 0:79c6d0071c4c 428 // so YMMV
charly 5:0386600f3408 429 boolean RF22::setFrequency(float centre, float afcPullInRange)
charly 0:79c6d0071c4c 430 {
charly 0:79c6d0071c4c 431 uint8_t fbsel = RF22_SBSEL;
charly 5:0386600f3408 432 uint8_t afclimiter;
charly 0:79c6d0071c4c 433 if (centre < 240.0 || centre > 960.0) // 930.0 for early silicon
charly 0:79c6d0071c4c 434 return false;
charly 0:79c6d0071c4c 435 if (centre >= 480.0)
charly 0:79c6d0071c4c 436 {
charly 5:0386600f3408 437 if (afcPullInRange < 0.0 || afcPullInRange > 0.318750)
charly 5:0386600f3408 438 return false;
charly 0:79c6d0071c4c 439 centre /= 2;
charly 0:79c6d0071c4c 440 fbsel |= RF22_HBSEL;
charly 5:0386600f3408 441 afclimiter = afcPullInRange * 1000000.0 / 1250.0;
charly 5:0386600f3408 442 }
charly 5:0386600f3408 443 else
charly 5:0386600f3408 444 {
charly 5:0386600f3408 445 if (afcPullInRange < 0.0 || afcPullInRange > 0.159375)
charly 5:0386600f3408 446 return false;
charly 5:0386600f3408 447 afclimiter = afcPullInRange * 1000000.0 / 625.0;
charly 0:79c6d0071c4c 448 }
charly 0:79c6d0071c4c 449 centre /= 10.0;
charly 0:79c6d0071c4c 450 float integerPart = floor(centre);
charly 0:79c6d0071c4c 451 float fractionalPart = centre - integerPart;
charly 0:79c6d0071c4c 452
charly 0:79c6d0071c4c 453 uint8_t fb = (uint8_t)integerPart - 24; // Range 0 to 23
charly 0:79c6d0071c4c 454 fbsel |= fb;
charly 0:79c6d0071c4c 455 uint16_t fc = fractionalPart * 64000;
charly 0:79c6d0071c4c 456 spiWrite(RF22_REG_73_FREQUENCY_OFFSET1, 0); // REVISIT
charly 0:79c6d0071c4c 457 spiWrite(RF22_REG_74_FREQUENCY_OFFSET2, 0);
charly 0:79c6d0071c4c 458 spiWrite(RF22_REG_75_FREQUENCY_BAND_SELECT, fbsel);
charly 0:79c6d0071c4c 459 spiWrite(RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1, fc >> 8);
charly 0:79c6d0071c4c 460 spiWrite(RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0, fc & 0xff);
charly 5:0386600f3408 461 spiWrite(RF22_REG_2A_AFC_LIMITER, afclimiter);
charly 0:79c6d0071c4c 462 return !(statusRead() & RF22_FREQERR);
charly 0:79c6d0071c4c 463 }
charly 0:79c6d0071c4c 464
charly 0:79c6d0071c4c 465 // Step size in 10kHz increments
charly 0:79c6d0071c4c 466 // Returns true if centre + (fhch * fhs) is within limits
charly 0:79c6d0071c4c 467 boolean RF22::setFHStepSize(uint8_t fhs)
charly 0:79c6d0071c4c 468 {
charly 0:79c6d0071c4c 469 spiWrite(RF22_REG_7A_FREQUENCY_HOPPING_STEP_SIZE, fhs);
charly 0:79c6d0071c4c 470 return !(statusRead() & RF22_FREQERR);
charly 0:79c6d0071c4c 471 }
charly 0:79c6d0071c4c 472
charly 0:79c6d0071c4c 473 // Adds fhch * fhs to centre frequency
charly 0:79c6d0071c4c 474 // Returns true if centre + (fhch * fhs) is within limits
charly 0:79c6d0071c4c 475 boolean RF22::setFHChannel(uint8_t fhch)
charly 0:79c6d0071c4c 476 {
charly 0:79c6d0071c4c 477 spiWrite(RF22_REG_79_FREQUENCY_HOPPING_CHANNEL_SELECT, fhch);
charly 0:79c6d0071c4c 478 return !(statusRead() & RF22_FREQERR);
charly 0:79c6d0071c4c 479 }
charly 0:79c6d0071c4c 480
charly 0:79c6d0071c4c 481 uint8_t RF22::rssiRead()
charly 0:79c6d0071c4c 482 {
charly 0:79c6d0071c4c 483 return spiRead(RF22_REG_26_RSSI);
charly 0:79c6d0071c4c 484 }
charly 0:79c6d0071c4c 485
charly 0:79c6d0071c4c 486 uint8_t RF22::ezmacStatusRead()
charly 0:79c6d0071c4c 487 {
charly 0:79c6d0071c4c 488 return spiRead(RF22_REG_31_EZMAC_STATUS);
charly 0:79c6d0071c4c 489 }
charly 0:79c6d0071c4c 490
charly 0:79c6d0071c4c 491 void RF22::setMode(uint8_t mode)
charly 0:79c6d0071c4c 492 {
charly 0:79c6d0071c4c 493 spiWrite(RF22_REG_07_OPERATING_MODE1, mode);
charly 0:79c6d0071c4c 494 }
charly 0:79c6d0071c4c 495
charly 0:79c6d0071c4c 496 void RF22::setModeIdle()
charly 0:79c6d0071c4c 497 {
charly 0:79c6d0071c4c 498 if (_mode != RF22_MODE_IDLE)
charly 0:79c6d0071c4c 499 {
charly 0:79c6d0071c4c 500 setMode(_idleMode);
charly 0:79c6d0071c4c 501 _mode = RF22_MODE_IDLE;
charly 0:79c6d0071c4c 502 }
charly 0:79c6d0071c4c 503 }
charly 0:79c6d0071c4c 504
charly 0:79c6d0071c4c 505 void RF22::setModeRx()
charly 0:79c6d0071c4c 506 {
charly 0:79c6d0071c4c 507 if (_mode != RF22_MODE_RX)
charly 0:79c6d0071c4c 508 {
charly 0:79c6d0071c4c 509 setMode(_idleMode | RF22_RXON);
charly 0:79c6d0071c4c 510 _mode = RF22_MODE_RX;
charly 0:79c6d0071c4c 511 }
charly 0:79c6d0071c4c 512 }
charly 0:79c6d0071c4c 513
charly 0:79c6d0071c4c 514 void RF22::setModeTx()
charly 0:79c6d0071c4c 515 {
charly 0:79c6d0071c4c 516 if (_mode != RF22_MODE_TX)
charly 0:79c6d0071c4c 517 {
charly 0:79c6d0071c4c 518 setMode(_idleMode | RF22_TXON);
charly 0:79c6d0071c4c 519 _mode = RF22_MODE_TX;
charly 5:0386600f3408 520 // Hmmm, if you dont clear the RX FIFO here, then it appears that going
charly 5:0386600f3408 521 // to transmit mode in the middle of a receive can corrupt the
charly 5:0386600f3408 522 // RX FIFO
charly 5:0386600f3408 523 resetRxFifo();
charly 5:0386600f3408 524 clearRxBuf();
charly 0:79c6d0071c4c 525 }
charly 5:0386600f3408 526 }
charly 5:0386600f3408 527
charly 5:0386600f3408 528 uint8_t RF22::mode()
charly 5:0386600f3408 529 {
charly 5:0386600f3408 530 return _mode;
charly 0:79c6d0071c4c 531 }
charly 0:79c6d0071c4c 532
charly 0:79c6d0071c4c 533 void RF22::setTxPower(uint8_t power)
charly 0:79c6d0071c4c 534 {
charly 0:79c6d0071c4c 535 spiWrite(RF22_REG_6D_TX_POWER, power);
charly 0:79c6d0071c4c 536 }
charly 0:79c6d0071c4c 537
charly 0:79c6d0071c4c 538 // Sets registers from a canned modem configuration structure
charly 5:0386600f3408 539 void RF22::setModemRegisters(const ModemConfig* config)
charly 0:79c6d0071c4c 540 {
charly 0:79c6d0071c4c 541 spiWrite(RF22_REG_1C_IF_FILTER_BANDWIDTH, config->reg_1c);
charly 0:79c6d0071c4c 542 spiWrite(RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE, config->reg_1f);
charly 0:79c6d0071c4c 543 spiBurstWrite(RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE, &config->reg_20, 6);
charly 0:79c6d0071c4c 544 spiBurstWrite(RF22_REG_2C_OOK_COUNTER_VALUE_1, &config->reg_2c, 3);
charly 0:79c6d0071c4c 545 spiWrite(RF22_REG_58_CHARGE_PUMP_CURRENT_TRIMMING, config->reg_58);
charly 0:79c6d0071c4c 546 spiWrite(RF22_REG_69_AGC_OVERRIDE1, config->reg_69);
charly 0:79c6d0071c4c 547 spiBurstWrite(RF22_REG_6E_TX_DATA_RATE1, &config->reg_6e, 5);
charly 0:79c6d0071c4c 548 }
charly 0:79c6d0071c4c 549
charly 0:79c6d0071c4c 550 // Set one of the canned FSK Modem configs
charly 0:79c6d0071c4c 551 // Returns true if its a valid choice
charly 0:79c6d0071c4c 552 boolean RF22::setModemConfig(ModemConfigChoice index)
charly 0:79c6d0071c4c 553 {
charly 0:79c6d0071c4c 554 if (index > (sizeof(MODEM_CONFIG_TABLE) / sizeof(ModemConfig)))
charly 0:79c6d0071c4c 555 return false;
charly 0:79c6d0071c4c 556
charly 0:79c6d0071c4c 557 RF22::ModemConfig cfg;
charly 0:79c6d0071c4c 558 memcpy(&cfg, &MODEM_CONFIG_TABLE[index], sizeof(RF22::ModemConfig));
charly 0:79c6d0071c4c 559 setModemRegisters(&cfg);
charly 0:79c6d0071c4c 560
charly 0:79c6d0071c4c 561 return true;
charly 0:79c6d0071c4c 562 }
charly 0:79c6d0071c4c 563
charly 0:79c6d0071c4c 564 // REVISIT: top bit is in Header Control 2 0x33
charly 0:79c6d0071c4c 565 void RF22::setPreambleLength(uint8_t nibbles)
charly 0:79c6d0071c4c 566 {
charly 0:79c6d0071c4c 567 spiWrite(RF22_REG_34_PREAMBLE_LENGTH, nibbles);
charly 0:79c6d0071c4c 568 }
charly 0:79c6d0071c4c 569
charly 0:79c6d0071c4c 570 // Caution doesnt set sync word len in Header Control 2 0x33
charly 5:0386600f3408 571 void RF22::setSyncWords(const uint8_t* syncWords, uint8_t len)
charly 0:79c6d0071c4c 572 {
charly 0:79c6d0071c4c 573 spiBurstWrite(RF22_REG_36_SYNC_WORD3, syncWords, len);
charly 0:79c6d0071c4c 574 }
charly 0:79c6d0071c4c 575
charly 0:79c6d0071c4c 576 void RF22::clearRxBuf()
charly 0:79c6d0071c4c 577 {
charly 0:79c6d0071c4c 578 _bufLen = 0;
charly 0:79c6d0071c4c 579 _rxBufValid = false;
charly 0:79c6d0071c4c 580 }
charly 0:79c6d0071c4c 581
charly 0:79c6d0071c4c 582 boolean RF22::available()
charly 0:79c6d0071c4c 583 {
charly 5:0386600f3408 584 if (!_rxBufValid)
charly 5:0386600f3408 585 setModeRx(); // Make sure we are receiving
charly 0:79c6d0071c4c 586 return _rxBufValid;
charly 0:79c6d0071c4c 587 }
charly 0:79c6d0071c4c 588
charly 0:79c6d0071c4c 589 // Blocks until a valid message is received
charly 0:79c6d0071c4c 590 void RF22::waitAvailable()
charly 0:79c6d0071c4c 591 {
charly 0:79c6d0071c4c 592 while (!available())
charly 0:79c6d0071c4c 593 ;
charly 0:79c6d0071c4c 594 }
charly 0:79c6d0071c4c 595
charly 0:79c6d0071c4c 596 // Blocks until a valid message is received or timeout expires
charly 0:79c6d0071c4c 597 // Return true if there is a message available
charly 0:79c6d0071c4c 598 bool RF22::waitAvailableTimeout(uint16_t timeout)
charly 0:79c6d0071c4c 599 {
charly 0:79c6d0071c4c 600 Timer t;
charly 0:79c6d0071c4c 601 t.start();
charly 0:79c6d0071c4c 602 unsigned long endtime = t.read_ms() + timeout;
charly 0:79c6d0071c4c 603 while (t.read_ms() < endtime)
charly 0:79c6d0071c4c 604 if (available())
charly 0:79c6d0071c4c 605 return true;
charly 0:79c6d0071c4c 606 return false;
charly 0:79c6d0071c4c 607 }
charly 0:79c6d0071c4c 608
charly 0:79c6d0071c4c 609 void RF22::waitPacketSent()
charly 0:79c6d0071c4c 610 {
charly 5:0386600f3408 611 while (_mode == RF22_MODE_TX)
charly 5:0386600f3408 612 ; // Wait for any previous transmit to finish
charly 5:0386600f3408 613 }
charly 5:0386600f3408 614
charly 5:0386600f3408 615 // Diagnostic help
charly 5:0386600f3408 616 void RF22::printBuffer(const char* prompt, const uint8_t* buf, uint8_t len)
charly 5:0386600f3408 617 {
charly 5:0386600f3408 618 #ifdef RF22_HAVE_SERIAL
charly 5:0386600f3408 619 uint8_t i;
charly 5:0386600f3408 620
charly 5:0386600f3408 621 Serial.println(prompt);
charly 5:0386600f3408 622 for (i = 0; i < len; i++)
charly 5:0386600f3408 623 {
charly 5:0386600f3408 624 if (i % 16 == 15)
charly 5:0386600f3408 625 Serial.println(buf[i], HEX);
charly 5:0386600f3408 626 else
charly 5:0386600f3408 627 {
charly 5:0386600f3408 628 Serial.print(buf[i], HEX);
charly 5:0386600f3408 629 Serial.print(' ');
charly 5:0386600f3408 630 }
charly 5:0386600f3408 631 }
charly 5:0386600f3408 632 Serial.println(' ');
charly 5:0386600f3408 633 #endif
charly 0:79c6d0071c4c 634 }
charly 0:79c6d0071c4c 635
charly 0:79c6d0071c4c 636 boolean RF22::recv(uint8_t* buf, uint8_t* len)
charly 0:79c6d0071c4c 637 {
charly 0:79c6d0071c4c 638 if (!available())
charly 0:79c6d0071c4c 639 return false;
charly 0:79c6d0071c4c 640 if (*len > _bufLen)
charly 0:79c6d0071c4c 641 *len = _bufLen;
charly 0:79c6d0071c4c 642 memcpy(buf, _buf, *len);
charly 0:79c6d0071c4c 643 clearRxBuf();
charly 5:0386600f3408 644 // printBuffer("recv:", buf, *len);
charly 5:0386600f3408 645 // }
charly 0:79c6d0071c4c 646 return true;
charly 0:79c6d0071c4c 647 }
charly 0:79c6d0071c4c 648
charly 0:79c6d0071c4c 649 void RF22::clearTxBuf()
charly 0:79c6d0071c4c 650 {
charly 0:79c6d0071c4c 651 _bufLen = 0;
charly 0:79c6d0071c4c 652 _txBufSentIndex = 0;
charly 0:79c6d0071c4c 653 _txPacketSent = false;
charly 0:79c6d0071c4c 654 }
charly 0:79c6d0071c4c 655
charly 0:79c6d0071c4c 656 void RF22::startTransmit()
charly 0:79c6d0071c4c 657 {
charly 0:79c6d0071c4c 658 sendNextFragment(); // Actually the first fragment
charly 0:79c6d0071c4c 659 spiWrite(RF22_REG_3E_PACKET_LENGTH, _bufLen); // Total length that will be sent
charly 0:79c6d0071c4c 660 setModeTx(); // Start the transmitter, turns off the receiver
charly 0:79c6d0071c4c 661 }
charly 0:79c6d0071c4c 662
charly 5:0386600f3408 663 // Restart the transmission of a packet that had a problem
charly 0:79c6d0071c4c 664 void RF22::restartTransmit()
charly 0:79c6d0071c4c 665 {
charly 0:79c6d0071c4c 666 _mode = RF22_MODE_IDLE;
charly 0:79c6d0071c4c 667 _txBufSentIndex = 0;
charly 0:79c6d0071c4c 668 // Serial.println("Restart");
charly 0:79c6d0071c4c 669 startTransmit();
charly 0:79c6d0071c4c 670 }
charly 0:79c6d0071c4c 671
charly 5:0386600f3408 672 boolean RF22::send(const uint8_t* data, uint8_t len)
charly 0:79c6d0071c4c 673 {
charly 5:0386600f3408 674 waitPacketSent();
charly 5:0386600f3408 675 // ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
charly 5:0386600f3408 676 {
charly 5:0386600f3408 677 if (!fillTxBuf(data, len))
charly 5:0386600f3408 678 return false;
charly 0:79c6d0071c4c 679 startTransmit();
charly 5:0386600f3408 680 }
charly 5:0386600f3408 681 // printBuffer("send:", data, len);
charly 0:79c6d0071c4c 682 return true;
charly 0:79c6d0071c4c 683 }
charly 0:79c6d0071c4c 684
charly 5:0386600f3408 685 boolean RF22::fillTxBuf(const uint8_t* data, uint8_t len)
charly 0:79c6d0071c4c 686 {
charly 0:79c6d0071c4c 687 clearTxBuf();
charly 5:0386600f3408 688 if (!len)
charly 5:0386600f3408 689 return false;
charly 0:79c6d0071c4c 690 return appendTxBuf(data, len);
charly 0:79c6d0071c4c 691 }
charly 0:79c6d0071c4c 692
charly 5:0386600f3408 693 boolean RF22::appendTxBuf(const uint8_t* data, uint8_t len)
charly 0:79c6d0071c4c 694 {
charly 0:79c6d0071c4c 695 if (((uint16_t)_bufLen + len) > RF22_MAX_MESSAGE_LEN)
charly 0:79c6d0071c4c 696 return false;
charly 0:79c6d0071c4c 697 memcpy(_buf + _bufLen, data, len);
charly 0:79c6d0071c4c 698 _bufLen += len;
charly 5:0386600f3408 699
charly 5:0386600f3408 700 // printBuffer("txbuf:", _buf, _bufLen);
charly 0:79c6d0071c4c 701 return true;
charly 0:79c6d0071c4c 702 }
charly 0:79c6d0071c4c 703
charly 0:79c6d0071c4c 704 // Assumption: there is currently <= RF22_TXFFAEM_THRESHOLD bytes in the Tx FIFO
charly 0:79c6d0071c4c 705 void RF22::sendNextFragment()
charly 0:79c6d0071c4c 706 {
charly 0:79c6d0071c4c 707 if (_txBufSentIndex < _bufLen)
charly 0:79c6d0071c4c 708 {
charly 5:0386600f3408 709 // Some left to send?
charly 0:79c6d0071c4c 710 uint8_t len = _bufLen - _txBufSentIndex;
charly 0:79c6d0071c4c 711 // But dont send too much
charly 0:79c6d0071c4c 712 if (len > (RF22_FIFO_SIZE - RF22_TXFFAEM_THRESHOLD - 1))
charly 0:79c6d0071c4c 713 len = (RF22_FIFO_SIZE - RF22_TXFFAEM_THRESHOLD - 1);
charly 0:79c6d0071c4c 714 spiBurstWrite(RF22_REG_7F_FIFO_ACCESS, _buf + _txBufSentIndex, len);
charly 0:79c6d0071c4c 715 _txBufSentIndex += len;
charly 0:79c6d0071c4c 716 }
charly 0:79c6d0071c4c 717 }
charly 0:79c6d0071c4c 718
charly 0:79c6d0071c4c 719 // Assumption: there are at least RF22_RXFFAFULL_THRESHOLD in the RX FIFO
charly 5:0386600f3408 720 // That means it should only be called after a RXFFAFULL interrupt
charly 0:79c6d0071c4c 721 void RF22::readNextFragment()
charly 0:79c6d0071c4c 722 {
charly 0:79c6d0071c4c 723 if (((uint16_t)_bufLen + RF22_RXFFAFULL_THRESHOLD) > RF22_MAX_MESSAGE_LEN)
charly 5:0386600f3408 724 return; // Hmmm receiver overflow. Should never occur
charly 5:0386600f3408 725
charly 0:79c6d0071c4c 726 // Read the RF22_RXFFAFULL_THRESHOLD octets that should be there
charly 0:79c6d0071c4c 727 spiBurstRead(RF22_REG_7F_FIFO_ACCESS, _buf + _bufLen, RF22_RXFFAFULL_THRESHOLD);
charly 0:79c6d0071c4c 728 _bufLen += RF22_RXFFAFULL_THRESHOLD;
charly 0:79c6d0071c4c 729 }
charly 0:79c6d0071c4c 730
charly 0:79c6d0071c4c 731 // Clear the FIFOs
charly 0:79c6d0071c4c 732 void RF22::resetFifos()
charly 0:79c6d0071c4c 733 {
charly 0:79c6d0071c4c 734 spiWrite(RF22_REG_08_OPERATING_MODE2, RF22_FFCLRRX | RF22_FFCLRTX);
charly 0:79c6d0071c4c 735 spiWrite(RF22_REG_08_OPERATING_MODE2, 0);
charly 0:79c6d0071c4c 736 }
charly 0:79c6d0071c4c 737
charly 0:79c6d0071c4c 738 // Clear the Rx FIFO
charly 0:79c6d0071c4c 739 void RF22::resetRxFifo()
charly 0:79c6d0071c4c 740 {
charly 0:79c6d0071c4c 741 spiWrite(RF22_REG_08_OPERATING_MODE2, RF22_FFCLRRX);
charly 0:79c6d0071c4c 742 spiWrite(RF22_REG_08_OPERATING_MODE2, 0);
charly 0:79c6d0071c4c 743 }
charly 0:79c6d0071c4c 744
charly 0:79c6d0071c4c 745 // CLear the TX FIFO
charly 0:79c6d0071c4c 746 void RF22::resetTxFifo()
charly 0:79c6d0071c4c 747 {
charly 0:79c6d0071c4c 748 spiWrite(RF22_REG_08_OPERATING_MODE2, RF22_FFCLRTX);
charly 0:79c6d0071c4c 749 spiWrite(RF22_REG_08_OPERATING_MODE2, 0);
charly 0:79c6d0071c4c 750 }
charly 0:79c6d0071c4c 751
charly 0:79c6d0071c4c 752 // Default implmentation does nothing. Override if you wish
charly 0:79c6d0071c4c 753 void RF22::handleExternalInterrupt()
charly 0:79c6d0071c4c 754 {
charly 0:79c6d0071c4c 755 }
charly 0:79c6d0071c4c 756
charly 0:79c6d0071c4c 757 // Default implmentation does nothing. Override if you wish
charly 0:79c6d0071c4c 758 void RF22::handleWakeupTimerInterrupt()
charly 0:79c6d0071c4c 759 {
charly 0:79c6d0071c4c 760 }
charly 0:79c6d0071c4c 761
charly 0:79c6d0071c4c 762 void RF22::setHeaderTo(uint8_t to)
charly 0:79c6d0071c4c 763 {
charly 0:79c6d0071c4c 764 spiWrite(RF22_REG_3A_TRANSMIT_HEADER3, to);
charly 0:79c6d0071c4c 765 }
charly 0:79c6d0071c4c 766
charly 0:79c6d0071c4c 767 void RF22::setHeaderFrom(uint8_t from)
charly 0:79c6d0071c4c 768 {
charly 0:79c6d0071c4c 769 spiWrite(RF22_REG_3B_TRANSMIT_HEADER2, from);
charly 0:79c6d0071c4c 770 }
charly 0:79c6d0071c4c 771
charly 0:79c6d0071c4c 772 void RF22::setHeaderId(uint8_t id)
charly 0:79c6d0071c4c 773 {
charly 0:79c6d0071c4c 774 spiWrite(RF22_REG_3C_TRANSMIT_HEADER1, id);
charly 0:79c6d0071c4c 775 }
charly 0:79c6d0071c4c 776
charly 0:79c6d0071c4c 777 void RF22::setHeaderFlags(uint8_t flags)
charly 0:79c6d0071c4c 778 {
charly 0:79c6d0071c4c 779 spiWrite(RF22_REG_3D_TRANSMIT_HEADER0, flags);
charly 0:79c6d0071c4c 780 }
charly 0:79c6d0071c4c 781
charly 0:79c6d0071c4c 782 uint8_t RF22::headerTo()
charly 0:79c6d0071c4c 783 {
charly 0:79c6d0071c4c 784 return spiRead(RF22_REG_47_RECEIVED_HEADER3);
charly 0:79c6d0071c4c 785 }
charly 0:79c6d0071c4c 786
charly 0:79c6d0071c4c 787 uint8_t RF22::headerFrom()
charly 0:79c6d0071c4c 788 {
charly 0:79c6d0071c4c 789 return spiRead(RF22_REG_48_RECEIVED_HEADER2);
charly 0:79c6d0071c4c 790 }
charly 0:79c6d0071c4c 791
charly 0:79c6d0071c4c 792 uint8_t RF22::headerId()
charly 0:79c6d0071c4c 793 {
charly 0:79c6d0071c4c 794 return spiRead(RF22_REG_49_RECEIVED_HEADER1);
charly 0:79c6d0071c4c 795 }
charly 0:79c6d0071c4c 796
charly 0:79c6d0071c4c 797 uint8_t RF22::headerFlags()
charly 0:79c6d0071c4c 798 {
charly 0:79c6d0071c4c 799 return spiRead(RF22_REG_4A_RECEIVED_HEADER0);
charly 0:79c6d0071c4c 800 }
charly 0:79c6d0071c4c 801
charly 0:79c6d0071c4c 802 uint8_t RF22::lastRssi()
charly 0:79c6d0071c4c 803 {
charly 0:79c6d0071c4c 804 return _lastRssi;
charly 0:79c6d0071c4c 805 }
charly 0:79c6d0071c4c 806
charly 0:79c6d0071c4c 807 void RF22::setPromiscuous(boolean promiscuous)
charly 0:79c6d0071c4c 808 {
charly 0:79c6d0071c4c 809 spiWrite(RF22_REG_43_HEADER_ENABLE3, promiscuous ? 0x00 : 0xff);
charly 0:79c6d0071c4c 810 }