my fork
Fork of mbed by
TARGET_NUCLEO_F401RE/stm32f4xx_hal_dac.h@77:869cf507173a, 2014-02-14 (annotated)
- Committer:
- emilmont
- Date:
- Fri Feb 14 14:36:43 2014 +0000
- Revision:
- 77:869cf507173a
- Child:
- 81:7d30d6019079
Release 77 of the mbed library
Main changes:
* Add target NUCLEO_F030R8
* Add target NUCLEO_F401RE
* Add target NUCLEO_F103RB
* Add target NUCLEO_L152RE
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 77:869cf507173a | 1 | /** |
emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
emilmont | 77:869cf507173a | 3 | * @file stm32f4xx_hal_dac.h |
emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
emilmont | 77:869cf507173a | 5 | * @version V1.0.0RC2 |
emilmont | 77:869cf507173a | 6 | * @date 04-February-2014 |
emilmont | 77:869cf507173a | 7 | * @brief Header file of DAC HAL module. |
emilmont | 77:869cf507173a | 8 | ****************************************************************************** |
emilmont | 77:869cf507173a | 9 | * @attention |
emilmont | 77:869cf507173a | 10 | * |
emilmont | 77:869cf507173a | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
emilmont | 77:869cf507173a | 12 | * |
emilmont | 77:869cf507173a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
emilmont | 77:869cf507173a | 14 | * are permitted provided that the following conditions are met: |
emilmont | 77:869cf507173a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
emilmont | 77:869cf507173a | 16 | * this list of conditions and the following disclaimer. |
emilmont | 77:869cf507173a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
emilmont | 77:869cf507173a | 18 | * this list of conditions and the following disclaimer in the documentation |
emilmont | 77:869cf507173a | 19 | * and/or other materials provided with the distribution. |
emilmont | 77:869cf507173a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
emilmont | 77:869cf507173a | 21 | * may be used to endorse or promote products derived from this software |
emilmont | 77:869cf507173a | 22 | * without specific prior written permission. |
emilmont | 77:869cf507173a | 23 | * |
emilmont | 77:869cf507173a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
emilmont | 77:869cf507173a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
emilmont | 77:869cf507173a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
emilmont | 77:869cf507173a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
emilmont | 77:869cf507173a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
emilmont | 77:869cf507173a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
emilmont | 77:869cf507173a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
emilmont | 77:869cf507173a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
emilmont | 77:869cf507173a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
emilmont | 77:869cf507173a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
emilmont | 77:869cf507173a | 34 | * |
emilmont | 77:869cf507173a | 35 | ****************************************************************************** |
emilmont | 77:869cf507173a | 36 | */ |
emilmont | 77:869cf507173a | 37 | |
emilmont | 77:869cf507173a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
emilmont | 77:869cf507173a | 39 | #ifndef __STM32F4xx_HAL_DAC_H |
emilmont | 77:869cf507173a | 40 | #define __STM32F4xx_HAL_DAC_H |
emilmont | 77:869cf507173a | 41 | |
emilmont | 77:869cf507173a | 42 | #ifdef __cplusplus |
emilmont | 77:869cf507173a | 43 | extern "C" { |
emilmont | 77:869cf507173a | 44 | #endif |
emilmont | 77:869cf507173a | 45 | |
emilmont | 77:869cf507173a | 46 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
emilmont | 77:869cf507173a | 47 | |
emilmont | 77:869cf507173a | 48 | /* Includes ------------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 49 | #include "stm32f4xx_hal_def.h" |
emilmont | 77:869cf507173a | 50 | |
emilmont | 77:869cf507173a | 51 | /** @addtogroup STM32F4xx_HAL_Driver |
emilmont | 77:869cf507173a | 52 | * @{ |
emilmont | 77:869cf507173a | 53 | */ |
emilmont | 77:869cf507173a | 54 | |
emilmont | 77:869cf507173a | 55 | /** @addtogroup DAC |
emilmont | 77:869cf507173a | 56 | * @{ |
emilmont | 77:869cf507173a | 57 | */ |
emilmont | 77:869cf507173a | 58 | |
emilmont | 77:869cf507173a | 59 | /* Exported types ------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 60 | |
emilmont | 77:869cf507173a | 61 | /** |
emilmont | 77:869cf507173a | 62 | * @brief HAL State structures definition |
emilmont | 77:869cf507173a | 63 | */ |
emilmont | 77:869cf507173a | 64 | typedef enum |
emilmont | 77:869cf507173a | 65 | { |
emilmont | 77:869cf507173a | 66 | HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */ |
emilmont | 77:869cf507173a | 67 | HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */ |
emilmont | 77:869cf507173a | 68 | HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */ |
emilmont | 77:869cf507173a | 69 | HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */ |
emilmont | 77:869cf507173a | 70 | HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */ |
emilmont | 77:869cf507173a | 71 | |
emilmont | 77:869cf507173a | 72 | }HAL_DAC_StateTypeDef; |
emilmont | 77:869cf507173a | 73 | |
emilmont | 77:869cf507173a | 74 | /** |
emilmont | 77:869cf507173a | 75 | * @brief DAC handle Structure definition |
emilmont | 77:869cf507173a | 76 | */ |
emilmont | 77:869cf507173a | 77 | typedef struct |
emilmont | 77:869cf507173a | 78 | { |
emilmont | 77:869cf507173a | 79 | DAC_TypeDef *Instance; /*!< Register base address */ |
emilmont | 77:869cf507173a | 80 | |
emilmont | 77:869cf507173a | 81 | __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ |
emilmont | 77:869cf507173a | 82 | |
emilmont | 77:869cf507173a | 83 | HAL_LockTypeDef Lock; /*!< DAC locking object */ |
emilmont | 77:869cf507173a | 84 | |
emilmont | 77:869cf507173a | 85 | DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ |
emilmont | 77:869cf507173a | 86 | |
emilmont | 77:869cf507173a | 87 | DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ |
emilmont | 77:869cf507173a | 88 | |
emilmont | 77:869cf507173a | 89 | __IO uint32_t ErrorCode; /*!< DAC Error code */ |
emilmont | 77:869cf507173a | 90 | |
emilmont | 77:869cf507173a | 91 | }DAC_HandleTypeDef; |
emilmont | 77:869cf507173a | 92 | |
emilmont | 77:869cf507173a | 93 | /** |
emilmont | 77:869cf507173a | 94 | * @brief DAC Configuration regular Channel structure definition |
emilmont | 77:869cf507173a | 95 | */ |
emilmont | 77:869cf507173a | 96 | typedef struct |
emilmont | 77:869cf507173a | 97 | { |
emilmont | 77:869cf507173a | 98 | uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. |
emilmont | 77:869cf507173a | 99 | This parameter can be a value of @ref DAC_trigger_selection */ |
emilmont | 77:869cf507173a | 100 | |
emilmont | 77:869cf507173a | 101 | uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. |
emilmont | 77:869cf507173a | 102 | This parameter can be a value of @ref DAC_output_buffer */ |
emilmont | 77:869cf507173a | 103 | |
emilmont | 77:869cf507173a | 104 | }DAC_ChannelConfTypeDef; |
emilmont | 77:869cf507173a | 105 | |
emilmont | 77:869cf507173a | 106 | /* Exported constants --------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 107 | |
emilmont | 77:869cf507173a | 108 | /** @defgroup DAC_Error_Code |
emilmont | 77:869cf507173a | 109 | * @{ |
emilmont | 77:869cf507173a | 110 | */ |
emilmont | 77:869cf507173a | 111 | #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */ |
emilmont | 77:869cf507173a | 112 | #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DAM underrun error */ |
emilmont | 77:869cf507173a | 113 | #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DAM underrun error */ |
emilmont | 77:869cf507173a | 114 | #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */ |
emilmont | 77:869cf507173a | 115 | /** |
emilmont | 77:869cf507173a | 116 | * @} |
emilmont | 77:869cf507173a | 117 | */ |
emilmont | 77:869cf507173a | 118 | |
emilmont | 77:869cf507173a | 119 | /** @defgroup DAC_trigger_selection |
emilmont | 77:869cf507173a | 120 | * @{ |
emilmont | 77:869cf507173a | 121 | */ |
emilmont | 77:869cf507173a | 122 | |
emilmont | 77:869cf507173a | 123 | #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register |
emilmont | 77:869cf507173a | 124 | has been loaded, and not by external trigger */ |
emilmont | 77:869cf507173a | 125 | #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ |
emilmont | 77:869cf507173a | 126 | #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ |
emilmont | 77:869cf507173a | 127 | #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ |
emilmont | 77:869cf507173a | 128 | #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ |
emilmont | 77:869cf507173a | 129 | #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ |
emilmont | 77:869cf507173a | 130 | #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ |
emilmont | 77:869cf507173a | 131 | |
emilmont | 77:869cf507173a | 132 | #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ |
emilmont | 77:869cf507173a | 133 | #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ |
emilmont | 77:869cf507173a | 134 | |
emilmont | 77:869cf507173a | 135 | #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
emilmont | 77:869cf507173a | 136 | ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ |
emilmont | 77:869cf507173a | 137 | ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \ |
emilmont | 77:869cf507173a | 138 | ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ |
emilmont | 77:869cf507173a | 139 | ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \ |
emilmont | 77:869cf507173a | 140 | ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ |
emilmont | 77:869cf507173a | 141 | ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \ |
emilmont | 77:869cf507173a | 142 | ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ |
emilmont | 77:869cf507173a | 143 | ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
emilmont | 77:869cf507173a | 144 | /** |
emilmont | 77:869cf507173a | 145 | * @} |
emilmont | 77:869cf507173a | 146 | */ |
emilmont | 77:869cf507173a | 147 | |
emilmont | 77:869cf507173a | 148 | /** @defgroup DAC_output_buffer |
emilmont | 77:869cf507173a | 149 | * @{ |
emilmont | 77:869cf507173a | 150 | */ |
emilmont | 77:869cf507173a | 151 | #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 152 | #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1) |
emilmont | 77:869cf507173a | 153 | |
emilmont | 77:869cf507173a | 154 | #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ |
emilmont | 77:869cf507173a | 155 | ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) |
emilmont | 77:869cf507173a | 156 | /** |
emilmont | 77:869cf507173a | 157 | * @} |
emilmont | 77:869cf507173a | 158 | */ |
emilmont | 77:869cf507173a | 159 | |
emilmont | 77:869cf507173a | 160 | /** @defgroup DAC_Channel_selection |
emilmont | 77:869cf507173a | 161 | * @{ |
emilmont | 77:869cf507173a | 162 | */ |
emilmont | 77:869cf507173a | 163 | #define DAC_CHANNEL_1 ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 164 | #define DAC_CHANNEL_2 ((uint32_t)0x00000010) |
emilmont | 77:869cf507173a | 165 | |
emilmont | 77:869cf507173a | 166 | #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ |
emilmont | 77:869cf507173a | 167 | ((CHANNEL) == DAC_CHANNEL_2)) |
emilmont | 77:869cf507173a | 168 | /** |
emilmont | 77:869cf507173a | 169 | * @} |
emilmont | 77:869cf507173a | 170 | */ |
emilmont | 77:869cf507173a | 171 | |
emilmont | 77:869cf507173a | 172 | /** @defgroup DAC_data_alignement |
emilmont | 77:869cf507173a | 173 | * @{ |
emilmont | 77:869cf507173a | 174 | */ |
emilmont | 77:869cf507173a | 175 | #define DAC_ALIGN_12B_R ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 176 | #define DAC_ALIGN_12B_L ((uint32_t)0x00000004) |
emilmont | 77:869cf507173a | 177 | #define DAC_ALIGN_8B_R ((uint32_t)0x00000008) |
emilmont | 77:869cf507173a | 178 | |
emilmont | 77:869cf507173a | 179 | #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ |
emilmont | 77:869cf507173a | 180 | ((ALIGN) == DAC_ALIGN_12B_L) || \ |
emilmont | 77:869cf507173a | 181 | ((ALIGN) == DAC_ALIGN_8B_R)) |
emilmont | 77:869cf507173a | 182 | /** |
emilmont | 77:869cf507173a | 183 | * @} |
emilmont | 77:869cf507173a | 184 | */ |
emilmont | 77:869cf507173a | 185 | |
emilmont | 77:869cf507173a | 186 | /** @defgroup DAC_data |
emilmont | 77:869cf507173a | 187 | * @{ |
emilmont | 77:869cf507173a | 188 | */ |
emilmont | 77:869cf507173a | 189 | #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) |
emilmont | 77:869cf507173a | 190 | /** |
emilmont | 77:869cf507173a | 191 | * @} |
emilmont | 77:869cf507173a | 192 | */ |
emilmont | 77:869cf507173a | 193 | |
emilmont | 77:869cf507173a | 194 | /** @defgroup DAC_flags_definition |
emilmont | 77:869cf507173a | 195 | * @{ |
emilmont | 77:869cf507173a | 196 | */ |
emilmont | 77:869cf507173a | 197 | #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
emilmont | 77:869cf507173a | 198 | #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
emilmont | 77:869cf507173a | 199 | |
emilmont | 77:869cf507173a | 200 | #define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR1) || \ |
emilmont | 77:869cf507173a | 201 | ((FLAG) == DAC_FLAG_DMAUDR2)) |
emilmont | 77:869cf507173a | 202 | /** |
emilmont | 77:869cf507173a | 203 | * @} |
emilmont | 77:869cf507173a | 204 | */ |
emilmont | 77:869cf507173a | 205 | |
emilmont | 77:869cf507173a | 206 | /** @defgroup DAC_IT_definition |
emilmont | 77:869cf507173a | 207 | * @{ |
emilmont | 77:869cf507173a | 208 | */ |
emilmont | 77:869cf507173a | 209 | #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
emilmont | 77:869cf507173a | 210 | #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
emilmont | 77:869cf507173a | 211 | |
emilmont | 77:869cf507173a | 212 | #define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR1) || \ |
emilmont | 77:869cf507173a | 213 | ((IT) == DAC_IT_DMAUDR2)) |
emilmont | 77:869cf507173a | 214 | |
emilmont | 77:869cf507173a | 215 | /** |
emilmont | 77:869cf507173a | 216 | * @} |
emilmont | 77:869cf507173a | 217 | */ |
emilmont | 77:869cf507173a | 218 | |
emilmont | 77:869cf507173a | 219 | /* Exported macro ------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 220 | /* Enable the DAC peripheral */ |
emilmont | 77:869cf507173a | 221 | #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ |
emilmont | 77:869cf507173a | 222 | ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) |
emilmont | 77:869cf507173a | 223 | |
emilmont | 77:869cf507173a | 224 | /* Disable the DAC peripheral */ |
emilmont | 77:869cf507173a | 225 | #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ |
emilmont | 77:869cf507173a | 226 | ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) |
emilmont | 77:869cf507173a | 227 | |
emilmont | 77:869cf507173a | 228 | /* Set DHR12R1 alignment */ |
emilmont | 77:869cf507173a | 229 | #define __HAL_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008) + (__ALIGNEMENT__)) |
emilmont | 77:869cf507173a | 230 | |
emilmont | 77:869cf507173a | 231 | /* Set DHR12R2 alignment */ |
emilmont | 77:869cf507173a | 232 | #define __HAL_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014) + (__ALIGNEMENT__)) |
emilmont | 77:869cf507173a | 233 | |
emilmont | 77:869cf507173a | 234 | /* Set DHR12RD alignment */ |
emilmont | 77:869cf507173a | 235 | #define __HAL_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020) + (__ALIGNEMENT__)) |
emilmont | 77:869cf507173a | 236 | |
emilmont | 77:869cf507173a | 237 | /* Enable the DAC interrupt */ |
emilmont | 77:869cf507173a | 238 | #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) |
emilmont | 77:869cf507173a | 239 | |
emilmont | 77:869cf507173a | 240 | /* Disable the DAC interrupt */ |
emilmont | 77:869cf507173a | 241 | #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) |
emilmont | 77:869cf507173a | 242 | |
emilmont | 77:869cf507173a | 243 | /* Get the selected DAC's flag status */ |
emilmont | 77:869cf507173a | 244 | #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
emilmont | 77:869cf507173a | 245 | |
emilmont | 77:869cf507173a | 246 | /* Clear the DAC's flag */ |
emilmont | 77:869cf507173a | 247 | #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) |= (__FLAG__)) |
emilmont | 77:869cf507173a | 248 | |
emilmont | 77:869cf507173a | 249 | /* Include DAC HAL Extension module */ |
emilmont | 77:869cf507173a | 250 | #include "stm32f4xx_hal_dac_ex.h" |
emilmont | 77:869cf507173a | 251 | |
emilmont | 77:869cf507173a | 252 | /* Exported functions --------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 253 | /* Initialization/de-initialization functions ***********************************/ |
emilmont | 77:869cf507173a | 254 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); |
emilmont | 77:869cf507173a | 255 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); |
emilmont | 77:869cf507173a | 256 | __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); |
emilmont | 77:869cf507173a | 257 | __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); |
emilmont | 77:869cf507173a | 258 | |
emilmont | 77:869cf507173a | 259 | /* I/O operation functions ******************************************************/ |
emilmont | 77:869cf507173a | 260 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); |
emilmont | 77:869cf507173a | 261 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); |
emilmont | 77:869cf507173a | 262 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); |
emilmont | 77:869cf507173a | 263 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); |
emilmont | 77:869cf507173a | 264 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); |
emilmont | 77:869cf507173a | 265 | |
emilmont | 77:869cf507173a | 266 | /* Peripheral Control functions *************************************************/ |
emilmont | 77:869cf507173a | 267 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); |
emilmont | 77:869cf507173a | 268 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); |
emilmont | 77:869cf507173a | 269 | |
emilmont | 77:869cf507173a | 270 | /* Peripheral State functions ***************************************************/ |
emilmont | 77:869cf507173a | 271 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); |
emilmont | 77:869cf507173a | 272 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); |
emilmont | 77:869cf507173a | 273 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); |
emilmont | 77:869cf507173a | 274 | |
emilmont | 77:869cf507173a | 275 | __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
emilmont | 77:869cf507173a | 276 | __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
emilmont | 77:869cf507173a | 277 | __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); |
emilmont | 77:869cf507173a | 278 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
emilmont | 77:869cf507173a | 279 | |
emilmont | 77:869cf507173a | 280 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
emilmont | 77:869cf507173a | 281 | |
emilmont | 77:869cf507173a | 282 | /** |
emilmont | 77:869cf507173a | 283 | * @} |
emilmont | 77:869cf507173a | 284 | */ |
emilmont | 77:869cf507173a | 285 | |
emilmont | 77:869cf507173a | 286 | /** |
emilmont | 77:869cf507173a | 287 | * @} |
emilmont | 77:869cf507173a | 288 | */ |
emilmont | 77:869cf507173a | 289 | |
emilmont | 77:869cf507173a | 290 | #ifdef __cplusplus |
emilmont | 77:869cf507173a | 291 | } |
emilmont | 77:869cf507173a | 292 | #endif |
emilmont | 77:869cf507173a | 293 | |
emilmont | 77:869cf507173a | 294 | #endif /*__STM32F4xx_HAL_DAC_H */ |
emilmont | 77:869cf507173a | 295 | |
emilmont | 77:869cf507173a | 296 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |