Filippo Casamassima / mbed

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Dependents:   Nucleo_blueNRG

Fork of mbed by mbed official

TARGET_NUCLEO_F401RE/stm32f4xx_hal_pwr_ex.h@81:7d30d6019079, 2014-03-19 (annotated)

Committer:
bogdanm
Date:
Wed Mar 19 18:28:32 2014 +0000
Revision:
81:7d30d6019079
Parent:
77:869cf507173a
Child:
85:024bf7f99721
Release 81 of the mbed library



Main changes:



- Updates and fixes for many targets

- LPC1768: serial interface code fixes

- nRF51822 targets now output a .hex file

- More exporters

- More flexible GPIO API

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_pwr_ex.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
bogdanm 81:7d30d6019079 5 * @version V1.0.0
bogdanm 81:7d30d6019079 6 * @date 18-February-2014
emilmont 77:869cf507173a 7 * @brief Header file of PWR HAL Extension module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_PWR_EX_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_PWR_EX_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 47 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 48
emilmont 77:869cf507173a 49 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 50 * @{
emilmont 77:869cf507173a 51 */
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup PWREx
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
emilmont 77:869cf507173a 57 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 60 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 61 /* ------------- PWR registers bit address in the alias region ---------------*/
emilmont 77:869cf507173a 62 /* --- CR Register ---*/
emilmont 77:869cf507173a 63
emilmont 77:869cf507173a 64 /* Alias word address of ODEN bit */
emilmont 77:869cf507173a 65 #define ODEN_BitNumber 0x10
emilmont 77:869cf507173a 66 #define CR_ODEN_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (ODEN_BitNumber * 4))
emilmont 77:869cf507173a 67
emilmont 77:869cf507173a 68 /* Alias word address of ODSWEN bit */
emilmont 77:869cf507173a 69 #define ODSWEN_BitNumber 0x11
emilmont 77:869cf507173a 70 #define CR_ODSWEN_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (ODSWEN_BitNumber * 4))
emilmont 77:869cf507173a 71
emilmont 77:869cf507173a 72
emilmont 77:869cf507173a 73 /** @defgroup PWREx_Over_Under_Drive_Flag
emilmont 77:869cf507173a 74 * @{
emilmont 77:869cf507173a 75 */
emilmont 77:869cf507173a 76 #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
emilmont 77:869cf507173a 77 #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
emilmont 77:869cf507173a 78 #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
emilmont 77:869cf507173a 79 /**
emilmont 77:869cf507173a 80 * @}
emilmont 77:869cf507173a 81 */
emilmont 77:869cf507173a 82
emilmont 77:869cf507173a 83 /**
emilmont 77:869cf507173a 84 * @}
emilmont 77:869cf507173a 85 */
emilmont 77:869cf507173a 86
emilmont 77:869cf507173a 87 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 88
emilmont 77:869cf507173a 89 /** @brief Macros to enable or disable the Over drive mode.
emilmont 77:869cf507173a 90 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
emilmont 77:869cf507173a 91 */
emilmont 77:869cf507173a 92 #define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
emilmont 77:869cf507173a 93 #define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
emilmont 77:869cf507173a 94
emilmont 77:869cf507173a 95 /** @brief Macros to enable or disable the Over drive switching.
emilmont 77:869cf507173a 96 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
emilmont 77:869cf507173a 97 */
emilmont 77:869cf507173a 98 #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
emilmont 77:869cf507173a 99 #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
emilmont 77:869cf507173a 100
emilmont 77:869cf507173a 101 /** @brief Macros to enable or disable the Under drive mode.
emilmont 77:869cf507173a 102 * @note This mode is enabled only with STOP low power mode.
emilmont 77:869cf507173a 103 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
emilmont 77:869cf507173a 104 * mode is only available when the main regulator or the low power regulator
emilmont 77:869cf507173a 105 * is in low voltage mode.
emilmont 77:869cf507173a 106 * @note If the Under-drive mode was enabled, it is automatically disabled after
emilmont 77:869cf507173a 107 * exiting Stop mode.
emilmont 77:869cf507173a 108 * When the voltage regulator operates in Under-drive mode, an additional
emilmont 77:869cf507173a 109 * startup delay is induced when waking up from Stop mode.
emilmont 77:869cf507173a 110 */
emilmont 77:869cf507173a 111 #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
emilmont 77:869cf507173a 112 #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
emilmont 77:869cf507173a 113
emilmont 77:869cf507173a 114 /** @brief Check PWR flag is set or not.
emilmont 77:869cf507173a 115 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
emilmont 77:869cf507173a 116 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 117 * This parameter can be one of the following values:
emilmont 77:869cf507173a 118 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
emilmont 77:869cf507173a 119 * is ready
emilmont 77:869cf507173a 120 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
emilmont 77:869cf507173a 121 * switching is ready
emilmont 77:869cf507173a 122 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
emilmont 77:869cf507173a 123 * is enabled in Stop mode
emilmont 77:869cf507173a 124 * @retval The new state of __FLAG__ (TRUE or FALSE).
emilmont 77:869cf507173a 125 */
emilmont 77:869cf507173a 126 #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
emilmont 77:869cf507173a 127
emilmont 77:869cf507173a 128 /** @brief Clear the Under-Drive Ready flag.
emilmont 77:869cf507173a 129 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
emilmont 77:869cf507173a 130 */
emilmont 77:869cf507173a 131 #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
emilmont 77:869cf507173a 132
emilmont 77:869cf507173a 133 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
emilmont 77:869cf507173a 134
emilmont 77:869cf507173a 135 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 136 void HAL_PWREx_EnableFlashPowerDown(void);
emilmont 77:869cf507173a 137 void HAL_PWREx_DisableFlashPowerDown(void);
emilmont 77:869cf507173a 138 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
emilmont 77:869cf507173a 139 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
emilmont 77:869cf507173a 140
emilmont 77:869cf507173a 141 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
emilmont 77:869cf507173a 142 HAL_StatusTypeDef HAL_PWREx_ActivateOverDrive(void);
emilmont 77:869cf507173a 143 HAL_StatusTypeDef HAL_PWREx_DeactivateOverDrive(void);
emilmont 77:869cf507173a 144 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
emilmont 77:869cf507173a 145
emilmont 77:869cf507173a 146 /**
emilmont 77:869cf507173a 147 * @}
emilmont 77:869cf507173a 148 */
emilmont 77:869cf507173a 149
emilmont 77:869cf507173a 150 /**
emilmont 77:869cf507173a 151 * @}
emilmont 77:869cf507173a 152 */
emilmont 77:869cf507173a 153
emilmont 77:869cf507173a 154 #ifdef __cplusplus
emilmont 77:869cf507173a 155 }
emilmont 77:869cf507173a 156 #endif
emilmont 77:869cf507173a 157
emilmont 77:869cf507173a 158
emilmont 77:869cf507173a 159 #endif /* __STM32F4xx_HAL_PWR_EX_H */
emilmont 77:869cf507173a 160
emilmont 77:869cf507173a 161 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/