my fork

Dependents:   Nucleo_blueNRG

Fork of mbed by mbed official

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Parent:
85:024bf7f99721
Child:
93:e188a91d3eaa
Release 92 of the mbed libray

Main changes:

- nRF51822: fixed pin assignment issues
- ST targets moving to the STM32Cube driver
- LPC1439: fixed serial interrupt issue
- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 85:024bf7f99721 1 /**
bogdanm 85:024bf7f99721 2 ******************************************************************************
bogdanm 85:024bf7f99721 3 * @file stm32f0xx_hal_tsc.h
bogdanm 85:024bf7f99721 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 03-Oct-2014
bogdanm 85:024bf7f99721 7 * @brief This file contains all the functions prototypes for the TSC firmware
bogdanm 85:024bf7f99721 8 * library.
bogdanm 85:024bf7f99721 9 ******************************************************************************
bogdanm 85:024bf7f99721 10 * @attention
bogdanm 85:024bf7f99721 11 *
bogdanm 85:024bf7f99721 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 85:024bf7f99721 13 *
bogdanm 85:024bf7f99721 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 85:024bf7f99721 15 * are permitted provided that the following conditions are met:
bogdanm 85:024bf7f99721 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 85:024bf7f99721 17 * this list of conditions and the following disclaimer.
bogdanm 85:024bf7f99721 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 85:024bf7f99721 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 85:024bf7f99721 20 * and/or other materials provided with the distribution.
bogdanm 85:024bf7f99721 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 85:024bf7f99721 22 * may be used to endorse or promote products derived from this software
bogdanm 85:024bf7f99721 23 * without specific prior written permission.
bogdanm 85:024bf7f99721 24 *
bogdanm 85:024bf7f99721 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 85:024bf7f99721 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 85:024bf7f99721 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 85:024bf7f99721 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 85:024bf7f99721 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 85:024bf7f99721 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 85:024bf7f99721 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 85:024bf7f99721 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 85:024bf7f99721 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 85:024bf7f99721 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 85:024bf7f99721 35 *
bogdanm 85:024bf7f99721 36 ******************************************************************************
bogdanm 85:024bf7f99721 37 */
bogdanm 85:024bf7f99721 38
bogdanm 85:024bf7f99721 39 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 85:024bf7f99721 40 #ifndef __STM32F0xx_TSC_H
bogdanm 85:024bf7f99721 41 #define __STM32F0xx_TSC_H
bogdanm 85:024bf7f99721 42
bogdanm 85:024bf7f99721 43 #ifdef __cplusplus
bogdanm 85:024bf7f99721 44 extern "C" {
bogdanm 85:024bf7f99721 45 #endif
bogdanm 85:024bf7f99721 46
bogdanm 92:4fc01daae5a5 47 #if defined(STM32F051x8) || defined(STM32F071xB) || defined(STM32F091xC) || \
bogdanm 85:024bf7f99721 48 defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || \
bogdanm 92:4fc01daae5a5 49 defined(STM32F058xx) || defined(STM32F078xx) || defined(STM32F098xx)
bogdanm 85:024bf7f99721 50
bogdanm 85:024bf7f99721 51 /* Includes ------------------------------------------------------------------*/
bogdanm 85:024bf7f99721 52 #include "stm32f0xx_hal_def.h"
bogdanm 85:024bf7f99721 53
bogdanm 85:024bf7f99721 54 /** @addtogroup STM32F0xx_HAL_Driver
bogdanm 85:024bf7f99721 55 * @{
bogdanm 85:024bf7f99721 56 */
bogdanm 85:024bf7f99721 57
bogdanm 85:024bf7f99721 58 /** @addtogroup TSC
bogdanm 85:024bf7f99721 59 * @{
bogdanm 85:024bf7f99721 60 */
bogdanm 85:024bf7f99721 61
bogdanm 85:024bf7f99721 62 /* Exported types ------------------------------------------------------------*/
bogdanm 85:024bf7f99721 63
bogdanm 92:4fc01daae5a5 64 /** @defgroup TSC_Exported_Types TSC Exported Types
bogdanm 92:4fc01daae5a5 65 * @{
bogdanm 92:4fc01daae5a5 66 */
bogdanm 85:024bf7f99721 67 /**
bogdanm 85:024bf7f99721 68 * @brief TSC state structure definition
bogdanm 85:024bf7f99721 69 */
bogdanm 85:024bf7f99721 70 typedef enum
bogdanm 85:024bf7f99721 71 {
bogdanm 85:024bf7f99721 72 HAL_TSC_STATE_RESET = 0x00, /*!< TSC registers have their reset value */
bogdanm 85:024bf7f99721 73 HAL_TSC_STATE_READY = 0x01, /*!< TSC registers are initialized or acquisition is completed with success */
bogdanm 85:024bf7f99721 74 HAL_TSC_STATE_BUSY = 0x02, /*!< TSC initialization or acquisition is on-going */
bogdanm 85:024bf7f99721 75 HAL_TSC_STATE_ERROR = 0x03 /*!< Acquisition is completed with max count error */
bogdanm 85:024bf7f99721 76 } HAL_TSC_StateTypeDef;
bogdanm 85:024bf7f99721 77
bogdanm 85:024bf7f99721 78 /**
bogdanm 85:024bf7f99721 79 * @brief TSC group status structure definition
bogdanm 85:024bf7f99721 80 */
bogdanm 85:024bf7f99721 81 typedef enum
bogdanm 85:024bf7f99721 82 {
bogdanm 85:024bf7f99721 83 TSC_GROUP_ONGOING = 0x00, /*!< Acquisition on group is on-going or not started */
bogdanm 85:024bf7f99721 84 TSC_GROUP_COMPLETED = 0x01 /*!< Acquisition on group is completed with success (no max count error) */
bogdanm 85:024bf7f99721 85 } TSC_GroupStatusTypeDef;
bogdanm 85:024bf7f99721 86
bogdanm 85:024bf7f99721 87 /**
bogdanm 85:024bf7f99721 88 * @brief TSC init structure definition
bogdanm 85:024bf7f99721 89 */
bogdanm 85:024bf7f99721 90 typedef struct
bogdanm 85:024bf7f99721 91 {
bogdanm 85:024bf7f99721 92 uint32_t CTPulseHighLength; /*!< Charge-transfer high pulse length */
bogdanm 85:024bf7f99721 93 uint32_t CTPulseLowLength; /*!< Charge-transfer low pulse length */
bogdanm 85:024bf7f99721 94 uint32_t SpreadSpectrum; /*!< Spread spectrum activation */
bogdanm 85:024bf7f99721 95 uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation */
bogdanm 85:024bf7f99721 96 uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler */
bogdanm 85:024bf7f99721 97 uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler */
bogdanm 85:024bf7f99721 98 uint32_t MaxCountValue; /*!< Max count value */
bogdanm 85:024bf7f99721 99 uint32_t IODefaultMode; /*!< IO default mode */
bogdanm 85:024bf7f99721 100 uint32_t SynchroPinPolarity; /*!< Synchro pin polarity */
bogdanm 85:024bf7f99721 101 uint32_t AcquisitionMode; /*!< Acquisition mode */
bogdanm 85:024bf7f99721 102 uint32_t MaxCountInterrupt; /*!< Max count interrupt activation */
bogdanm 85:024bf7f99721 103 uint32_t ChannelIOs; /*!< Channel IOs mask */
bogdanm 85:024bf7f99721 104 uint32_t ShieldIOs; /*!< Shield IOs mask */
bogdanm 85:024bf7f99721 105 uint32_t SamplingIOs; /*!< Sampling IOs mask */
bogdanm 85:024bf7f99721 106 } TSC_InitTypeDef;
bogdanm 85:024bf7f99721 107
bogdanm 85:024bf7f99721 108 /**
bogdanm 85:024bf7f99721 109 * @brief TSC IOs configuration structure definition
bogdanm 85:024bf7f99721 110 */
bogdanm 85:024bf7f99721 111 typedef struct
bogdanm 85:024bf7f99721 112 {
bogdanm 85:024bf7f99721 113 uint32_t ChannelIOs; /*!< Channel IOs mask */
bogdanm 85:024bf7f99721 114 uint32_t ShieldIOs; /*!< Shield IOs mask */
bogdanm 85:024bf7f99721 115 uint32_t SamplingIOs; /*!< Sampling IOs mask */
bogdanm 85:024bf7f99721 116 } TSC_IOConfigTypeDef;
bogdanm 85:024bf7f99721 117
bogdanm 85:024bf7f99721 118 /**
bogdanm 85:024bf7f99721 119 * @brief TSC handle Structure definition
bogdanm 85:024bf7f99721 120 */
bogdanm 85:024bf7f99721 121 typedef struct
bogdanm 85:024bf7f99721 122 {
bogdanm 85:024bf7f99721 123 TSC_TypeDef *Instance; /*!< Register base address */
bogdanm 85:024bf7f99721 124 TSC_InitTypeDef Init; /*!< Initialization parameters */
bogdanm 85:024bf7f99721 125 __IO HAL_TSC_StateTypeDef State; /*!< Peripheral state */
bogdanm 85:024bf7f99721 126 HAL_LockTypeDef Lock; /*!< Lock feature */
bogdanm 85:024bf7f99721 127 } TSC_HandleTypeDef;
bogdanm 85:024bf7f99721 128
bogdanm 92:4fc01daae5a5 129 /**
bogdanm 92:4fc01daae5a5 130 * @}
bogdanm 92:4fc01daae5a5 131 */
bogdanm 92:4fc01daae5a5 132
bogdanm 85:024bf7f99721 133 /* Exported constants --------------------------------------------------------*/
bogdanm 85:024bf7f99721 134
bogdanm 92:4fc01daae5a5 135 /** @defgroup TSC_Exported_Constants TSC Exported Constants
bogdanm 85:024bf7f99721 136 * @{
bogdanm 85:024bf7f99721 137 */
bogdanm 85:024bf7f99721 138
bogdanm 92:4fc01daae5a5 139 /** @defgroup TSC_CTPH_Cycles TSC Charge Transfer Pulse High
bogdanm 92:4fc01daae5a5 140 * @{
bogdanm 92:4fc01daae5a5 141 */
bogdanm 85:024bf7f99721 142 #define TSC_CTPH_1CYCLE ((uint32_t)((uint32_t) 0 << 28))
bogdanm 85:024bf7f99721 143 #define TSC_CTPH_2CYCLES ((uint32_t)((uint32_t) 1 << 28))
bogdanm 85:024bf7f99721 144 #define TSC_CTPH_3CYCLES ((uint32_t)((uint32_t) 2 << 28))
bogdanm 85:024bf7f99721 145 #define TSC_CTPH_4CYCLES ((uint32_t)((uint32_t) 3 << 28))
bogdanm 85:024bf7f99721 146 #define TSC_CTPH_5CYCLES ((uint32_t)((uint32_t) 4 << 28))
bogdanm 85:024bf7f99721 147 #define TSC_CTPH_6CYCLES ((uint32_t)((uint32_t) 5 << 28))
bogdanm 85:024bf7f99721 148 #define TSC_CTPH_7CYCLES ((uint32_t)((uint32_t) 6 << 28))
bogdanm 85:024bf7f99721 149 #define TSC_CTPH_8CYCLES ((uint32_t)((uint32_t) 7 << 28))
bogdanm 85:024bf7f99721 150 #define TSC_CTPH_9CYCLES ((uint32_t)((uint32_t) 8 << 28))
bogdanm 85:024bf7f99721 151 #define TSC_CTPH_10CYCLES ((uint32_t)((uint32_t) 9 << 28))
bogdanm 85:024bf7f99721 152 #define TSC_CTPH_11CYCLES ((uint32_t)((uint32_t)10 << 28))
bogdanm 85:024bf7f99721 153 #define TSC_CTPH_12CYCLES ((uint32_t)((uint32_t)11 << 28))
bogdanm 85:024bf7f99721 154 #define TSC_CTPH_13CYCLES ((uint32_t)((uint32_t)12 << 28))
bogdanm 85:024bf7f99721 155 #define TSC_CTPH_14CYCLES ((uint32_t)((uint32_t)13 << 28))
bogdanm 85:024bf7f99721 156 #define TSC_CTPH_15CYCLES ((uint32_t)((uint32_t)14 << 28))
bogdanm 85:024bf7f99721 157 #define TSC_CTPH_16CYCLES ((uint32_t)((uint32_t)15 << 28))
bogdanm 85:024bf7f99721 158 #define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \
bogdanm 85:024bf7f99721 159 ((VAL) == TSC_CTPH_2CYCLES) || \
bogdanm 85:024bf7f99721 160 ((VAL) == TSC_CTPH_3CYCLES) || \
bogdanm 85:024bf7f99721 161 ((VAL) == TSC_CTPH_4CYCLES) || \
bogdanm 85:024bf7f99721 162 ((VAL) == TSC_CTPH_5CYCLES) || \
bogdanm 85:024bf7f99721 163 ((VAL) == TSC_CTPH_6CYCLES) || \
bogdanm 85:024bf7f99721 164 ((VAL) == TSC_CTPH_7CYCLES) || \
bogdanm 85:024bf7f99721 165 ((VAL) == TSC_CTPH_8CYCLES) || \
bogdanm 85:024bf7f99721 166 ((VAL) == TSC_CTPH_9CYCLES) || \
bogdanm 85:024bf7f99721 167 ((VAL) == TSC_CTPH_10CYCLES) || \
bogdanm 85:024bf7f99721 168 ((VAL) == TSC_CTPH_11CYCLES) || \
bogdanm 85:024bf7f99721 169 ((VAL) == TSC_CTPH_12CYCLES) || \
bogdanm 85:024bf7f99721 170 ((VAL) == TSC_CTPH_13CYCLES) || \
bogdanm 85:024bf7f99721 171 ((VAL) == TSC_CTPH_14CYCLES) || \
bogdanm 85:024bf7f99721 172 ((VAL) == TSC_CTPH_15CYCLES) || \
bogdanm 85:024bf7f99721 173 ((VAL) == TSC_CTPH_16CYCLES))
bogdanm 92:4fc01daae5a5 174 /**
bogdanm 92:4fc01daae5a5 175 * @}
bogdanm 92:4fc01daae5a5 176 */
bogdanm 85:024bf7f99721 177
bogdanm 92:4fc01daae5a5 178 /** @defgroup TSC_CTPL_Cycles TSC Charge Transfer Pulse Low
bogdanm 92:4fc01daae5a5 179 * @{
bogdanm 92:4fc01daae5a5 180 */
bogdanm 85:024bf7f99721 181 #define TSC_CTPL_1CYCLE ((uint32_t)((uint32_t) 0 << 24))
bogdanm 85:024bf7f99721 182 #define TSC_CTPL_2CYCLES ((uint32_t)((uint32_t) 1 << 24))
bogdanm 85:024bf7f99721 183 #define TSC_CTPL_3CYCLES ((uint32_t)((uint32_t) 2 << 24))
bogdanm 85:024bf7f99721 184 #define TSC_CTPL_4CYCLES ((uint32_t)((uint32_t) 3 << 24))
bogdanm 85:024bf7f99721 185 #define TSC_CTPL_5CYCLES ((uint32_t)((uint32_t) 4 << 24))
bogdanm 85:024bf7f99721 186 #define TSC_CTPL_6CYCLES ((uint32_t)((uint32_t) 5 << 24))
bogdanm 85:024bf7f99721 187 #define TSC_CTPL_7CYCLES ((uint32_t)((uint32_t) 6 << 24))
bogdanm 85:024bf7f99721 188 #define TSC_CTPL_8CYCLES ((uint32_t)((uint32_t) 7 << 24))
bogdanm 85:024bf7f99721 189 #define TSC_CTPL_9CYCLES ((uint32_t)((uint32_t) 8 << 24))
bogdanm 85:024bf7f99721 190 #define TSC_CTPL_10CYCLES ((uint32_t)((uint32_t) 9 << 24))
bogdanm 85:024bf7f99721 191 #define TSC_CTPL_11CYCLES ((uint32_t)((uint32_t)10 << 24))
bogdanm 85:024bf7f99721 192 #define TSC_CTPL_12CYCLES ((uint32_t)((uint32_t)11 << 24))
bogdanm 85:024bf7f99721 193 #define TSC_CTPL_13CYCLES ((uint32_t)((uint32_t)12 << 24))
bogdanm 85:024bf7f99721 194 #define TSC_CTPL_14CYCLES ((uint32_t)((uint32_t)13 << 24))
bogdanm 85:024bf7f99721 195 #define TSC_CTPL_15CYCLES ((uint32_t)((uint32_t)14 << 24))
bogdanm 85:024bf7f99721 196 #define TSC_CTPL_16CYCLES ((uint32_t)((uint32_t)15 << 24))
bogdanm 85:024bf7f99721 197 #define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \
bogdanm 85:024bf7f99721 198 ((VAL) == TSC_CTPL_2CYCLES) || \
bogdanm 85:024bf7f99721 199 ((VAL) == TSC_CTPL_3CYCLES) || \
bogdanm 85:024bf7f99721 200 ((VAL) == TSC_CTPL_4CYCLES) || \
bogdanm 85:024bf7f99721 201 ((VAL) == TSC_CTPL_5CYCLES) || \
bogdanm 85:024bf7f99721 202 ((VAL) == TSC_CTPL_6CYCLES) || \
bogdanm 85:024bf7f99721 203 ((VAL) == TSC_CTPL_7CYCLES) || \
bogdanm 85:024bf7f99721 204 ((VAL) == TSC_CTPL_8CYCLES) || \
bogdanm 85:024bf7f99721 205 ((VAL) == TSC_CTPL_9CYCLES) || \
bogdanm 85:024bf7f99721 206 ((VAL) == TSC_CTPL_10CYCLES) || \
bogdanm 85:024bf7f99721 207 ((VAL) == TSC_CTPL_11CYCLES) || \
bogdanm 85:024bf7f99721 208 ((VAL) == TSC_CTPL_12CYCLES) || \
bogdanm 85:024bf7f99721 209 ((VAL) == TSC_CTPL_13CYCLES) || \
bogdanm 85:024bf7f99721 210 ((VAL) == TSC_CTPL_14CYCLES) || \
bogdanm 85:024bf7f99721 211 ((VAL) == TSC_CTPL_15CYCLES) || \
bogdanm 85:024bf7f99721 212 ((VAL) == TSC_CTPL_16CYCLES))
bogdanm 92:4fc01daae5a5 213 /**
bogdanm 92:4fc01daae5a5 214 * @}
bogdanm 92:4fc01daae5a5 215 */
bogdanm 92:4fc01daae5a5 216
bogdanm 92:4fc01daae5a5 217 /** @defgroup TSC_SS_Prescaler_definition TSC Spread spectrum prescaler definition
bogdanm 92:4fc01daae5a5 218 * @{
bogdanm 92:4fc01daae5a5 219 */
bogdanm 85:024bf7f99721 220 #define TSC_SS_PRESC_DIV1 ((uint32_t)0)
bogdanm 85:024bf7f99721 221 #define TSC_SS_PRESC_DIV2 (TSC_CR_SSPSC)
bogdanm 85:024bf7f99721 222 #define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2))
bogdanm 85:024bf7f99721 223
bogdanm 92:4fc01daae5a5 224 /**
bogdanm 92:4fc01daae5a5 225 * @}
bogdanm 92:4fc01daae5a5 226 */
bogdanm 92:4fc01daae5a5 227
bogdanm 92:4fc01daae5a5 228 /** @defgroup TSC_PG_Prescaler_definition TSC Pulse Generator prescaler definition
bogdanm 92:4fc01daae5a5 229 * @{
bogdanm 92:4fc01daae5a5 230 */
bogdanm 85:024bf7f99721 231 #define TSC_PG_PRESC_DIV1 ((uint32_t)(0 << 12))
bogdanm 85:024bf7f99721 232 #define TSC_PG_PRESC_DIV2 ((uint32_t)(1 << 12))
bogdanm 85:024bf7f99721 233 #define TSC_PG_PRESC_DIV4 ((uint32_t)(2 << 12))
bogdanm 85:024bf7f99721 234 #define TSC_PG_PRESC_DIV8 ((uint32_t)(3 << 12))
bogdanm 85:024bf7f99721 235 #define TSC_PG_PRESC_DIV16 ((uint32_t)(4 << 12))
bogdanm 85:024bf7f99721 236 #define TSC_PG_PRESC_DIV32 ((uint32_t)(5 << 12))
bogdanm 85:024bf7f99721 237 #define TSC_PG_PRESC_DIV64 ((uint32_t)(6 << 12))
bogdanm 85:024bf7f99721 238 #define TSC_PG_PRESC_DIV128 ((uint32_t)(7 << 12))
bogdanm 85:024bf7f99721 239 #define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \
bogdanm 85:024bf7f99721 240 ((VAL) == TSC_PG_PRESC_DIV2) || \
bogdanm 85:024bf7f99721 241 ((VAL) == TSC_PG_PRESC_DIV4) || \
bogdanm 85:024bf7f99721 242 ((VAL) == TSC_PG_PRESC_DIV8) || \
bogdanm 85:024bf7f99721 243 ((VAL) == TSC_PG_PRESC_DIV16) || \
bogdanm 85:024bf7f99721 244 ((VAL) == TSC_PG_PRESC_DIV32) || \
bogdanm 85:024bf7f99721 245 ((VAL) == TSC_PG_PRESC_DIV64) || \
bogdanm 85:024bf7f99721 246 ((VAL) == TSC_PG_PRESC_DIV128))
bogdanm 92:4fc01daae5a5 247 /**
bogdanm 92:4fc01daae5a5 248 * @}
bogdanm 92:4fc01daae5a5 249 */
bogdanm 85:024bf7f99721 250
bogdanm 92:4fc01daae5a5 251 /** @defgroup TSC_MCV_definition TSC Max Count Value definition
bogdanm 92:4fc01daae5a5 252 * @{
bogdanm 92:4fc01daae5a5 253 */
bogdanm 85:024bf7f99721 254 #define TSC_MCV_255 ((uint32_t)(0 << 5))
bogdanm 85:024bf7f99721 255 #define TSC_MCV_511 ((uint32_t)(1 << 5))
bogdanm 85:024bf7f99721 256 #define TSC_MCV_1023 ((uint32_t)(2 << 5))
bogdanm 85:024bf7f99721 257 #define TSC_MCV_2047 ((uint32_t)(3 << 5))
bogdanm 85:024bf7f99721 258 #define TSC_MCV_4095 ((uint32_t)(4 << 5))
bogdanm 85:024bf7f99721 259 #define TSC_MCV_8191 ((uint32_t)(5 << 5))
bogdanm 85:024bf7f99721 260 #define TSC_MCV_16383 ((uint32_t)(6 << 5))
bogdanm 85:024bf7f99721 261 #define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \
bogdanm 85:024bf7f99721 262 ((VAL) == TSC_MCV_511) || \
bogdanm 85:024bf7f99721 263 ((VAL) == TSC_MCV_1023) || \
bogdanm 85:024bf7f99721 264 ((VAL) == TSC_MCV_2047) || \
bogdanm 85:024bf7f99721 265 ((VAL) == TSC_MCV_4095) || \
bogdanm 85:024bf7f99721 266 ((VAL) == TSC_MCV_8191) || \
bogdanm 85:024bf7f99721 267 ((VAL) == TSC_MCV_16383))
bogdanm 92:4fc01daae5a5 268 /**
bogdanm 92:4fc01daae5a5 269 * @}
bogdanm 92:4fc01daae5a5 270 */
bogdanm 85:024bf7f99721 271
bogdanm 92:4fc01daae5a5 272 /** @defgroup TSC_IO_default_mode_definition TSC I/O default mode definition
bogdanm 92:4fc01daae5a5 273 * @{
bogdanm 92:4fc01daae5a5 274 */
bogdanm 85:024bf7f99721 275 #define TSC_IODEF_OUT_PP_LOW ((uint32_t)0)
bogdanm 85:024bf7f99721 276 #define TSC_IODEF_IN_FLOAT (TSC_CR_IODEF)
bogdanm 85:024bf7f99721 277 #define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT))
bogdanm 92:4fc01daae5a5 278 /**
bogdanm 92:4fc01daae5a5 279 * @}
bogdanm 92:4fc01daae5a5 280 */
bogdanm 85:024bf7f99721 281
bogdanm 92:4fc01daae5a5 282 /** @defgroup TSC_Synchronization_pin_polarity TSC Synchronization pin polarity
bogdanm 92:4fc01daae5a5 283 * @{
bogdanm 92:4fc01daae5a5 284 */
bogdanm 85:024bf7f99721 285 #define TSC_SYNC_POL_FALL ((uint32_t)0)
bogdanm 85:024bf7f99721 286 #define TSC_SYNC_POL_RISE_HIGH (TSC_CR_SYNCPOL)
bogdanm 85:024bf7f99721 287 #define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POL_FALL) || ((VAL) == TSC_SYNC_POL_RISE_HIGH))
bogdanm 92:4fc01daae5a5 288 /**
bogdanm 92:4fc01daae5a5 289 * @}
bogdanm 92:4fc01daae5a5 290 */
bogdanm 92:4fc01daae5a5 291
bogdanm 92:4fc01daae5a5 292 /** @defgroup TSC_Acquisition_mode TSC Acquisition mode
bogdanm 92:4fc01daae5a5 293 * @{
bogdanm 92:4fc01daae5a5 294 */
bogdanm 85:024bf7f99721 295 #define TSC_ACQ_MODE_NORMAL ((uint32_t)0)
bogdanm 92:4fc01daae5a5 296 #define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM)
bogdanm 85:024bf7f99721 297 #define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO))
bogdanm 92:4fc01daae5a5 298 /**
bogdanm 92:4fc01daae5a5 299 * @}
bogdanm 92:4fc01daae5a5 300 */
bogdanm 92:4fc01daae5a5 301
bogdanm 92:4fc01daae5a5 302 /** @defgroup TSC_IO_mode_definition TSC I/O mode definition
bogdanm 92:4fc01daae5a5 303 * @{
bogdanm 92:4fc01daae5a5 304 */
bogdanm 85:024bf7f99721 305 #define TSC_IOMODE_UNUSED ((uint32_t)0)
bogdanm 85:024bf7f99721 306 #define TSC_IOMODE_CHANNEL ((uint32_t)1)
bogdanm 85:024bf7f99721 307 #define TSC_IOMODE_SHIELD ((uint32_t)2)
bogdanm 85:024bf7f99721 308 #define TSC_IOMODE_SAMPLING ((uint32_t)3)
bogdanm 85:024bf7f99721 309 #define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \
bogdanm 85:024bf7f99721 310 ((VAL) == TSC_IOMODE_CHANNEL) || \
bogdanm 85:024bf7f99721 311 ((VAL) == TSC_IOMODE_SHIELD) || \
bogdanm 85:024bf7f99721 312 ((VAL) == TSC_IOMODE_SAMPLING))
bogdanm 92:4fc01daae5a5 313 /**
bogdanm 92:4fc01daae5a5 314 * @}
bogdanm 92:4fc01daae5a5 315 */
bogdanm 85:024bf7f99721 316
bogdanm 92:4fc01daae5a5 317 /** @defgroup TSC_interrupts_definition TSC interrupts definition
bogdanm 85:024bf7f99721 318 * @{
bogdanm 85:024bf7f99721 319 */
bogdanm 85:024bf7f99721 320 #define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE)
bogdanm 85:024bf7f99721 321 #define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE)
bogdanm 85:024bf7f99721 322 #define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
bogdanm 85:024bf7f99721 323 /**
bogdanm 85:024bf7f99721 324 * @}
bogdanm 85:024bf7f99721 325 */
bogdanm 85:024bf7f99721 326
bogdanm 92:4fc01daae5a5 327 /** @defgroup TSC_flags_definition TSC Flags Definition
bogdanm 85:024bf7f99721 328 * @{
bogdanm 85:024bf7f99721 329 */
bogdanm 85:024bf7f99721 330 #define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF)
bogdanm 85:024bf7f99721 331 #define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF)
bogdanm 85:024bf7f99721 332 /**
bogdanm 85:024bf7f99721 333 * @}
bogdanm 85:024bf7f99721 334 */
bogdanm 85:024bf7f99721 335
bogdanm 92:4fc01daae5a5 336 /** @defgroup TSC_groups_definition TSC groups definition
bogdanm 92:4fc01daae5a5 337 * @{
bogdanm 92:4fc01daae5a5 338 */
bogdanm 85:024bf7f99721 339 #define TSC_NB_OF_GROUPS (8)
bogdanm 85:024bf7f99721 340
bogdanm 85:024bf7f99721 341 #define TSC_GROUP1 ((uint32_t)0x00000001)
bogdanm 85:024bf7f99721 342 #define TSC_GROUP2 ((uint32_t)0x00000002)
bogdanm 85:024bf7f99721 343 #define TSC_GROUP3 ((uint32_t)0x00000004)
bogdanm 85:024bf7f99721 344 #define TSC_GROUP4 ((uint32_t)0x00000008)
bogdanm 85:024bf7f99721 345 #define TSC_GROUP5 ((uint32_t)0x00000010)
bogdanm 85:024bf7f99721 346 #define TSC_GROUP6 ((uint32_t)0x00000020)
bogdanm 85:024bf7f99721 347 #define TSC_GROUP7 ((uint32_t)0x00000040)
bogdanm 85:024bf7f99721 348 #define TSC_GROUP8 ((uint32_t)0x00000080)
bogdanm 85:024bf7f99721 349 #define TSC_ALL_GROUPS ((uint32_t)0x000000FF)
bogdanm 85:024bf7f99721 350
bogdanm 85:024bf7f99721 351 #define TSC_GROUP1_IDX ((uint32_t)0)
bogdanm 85:024bf7f99721 352 #define TSC_GROUP2_IDX ((uint32_t)1)
bogdanm 85:024bf7f99721 353 #define TSC_GROUP3_IDX ((uint32_t)2)
bogdanm 85:024bf7f99721 354 #define TSC_GROUP4_IDX ((uint32_t)3)
bogdanm 85:024bf7f99721 355 #define TSC_GROUP5_IDX ((uint32_t)4)
bogdanm 85:024bf7f99721 356 #define TSC_GROUP6_IDX ((uint32_t)5)
bogdanm 85:024bf7f99721 357 #define TSC_GROUP7_IDX ((uint32_t)6)
bogdanm 85:024bf7f99721 358 #define TSC_GROUP8_IDX ((uint32_t)7)
bogdanm 85:024bf7f99721 359 #define IS_GROUP_INDEX(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < TSC_NB_OF_GROUPS)))
bogdanm 85:024bf7f99721 360
bogdanm 85:024bf7f99721 361 #define TSC_GROUP1_IO1 ((uint32_t)0x00000001)
bogdanm 85:024bf7f99721 362 #define TSC_GROUP1_IO2 ((uint32_t)0x00000002)
bogdanm 85:024bf7f99721 363 #define TSC_GROUP1_IO3 ((uint32_t)0x00000004)
bogdanm 85:024bf7f99721 364 #define TSC_GROUP1_IO4 ((uint32_t)0x00000008)
bogdanm 85:024bf7f99721 365 #define TSC_GROUP1_ALL_IOS ((uint32_t)0x0000000F)
bogdanm 85:024bf7f99721 366
bogdanm 85:024bf7f99721 367 #define TSC_GROUP2_IO1 ((uint32_t)0x00000010)
bogdanm 85:024bf7f99721 368 #define TSC_GROUP2_IO2 ((uint32_t)0x00000020)
bogdanm 85:024bf7f99721 369 #define TSC_GROUP2_IO3 ((uint32_t)0x00000040)
bogdanm 85:024bf7f99721 370 #define TSC_GROUP2_IO4 ((uint32_t)0x00000080)
bogdanm 85:024bf7f99721 371 #define TSC_GROUP2_ALL_IOS ((uint32_t)0x000000F0)
bogdanm 85:024bf7f99721 372
bogdanm 85:024bf7f99721 373 #define TSC_GROUP3_IO1 ((uint32_t)0x00000100)
bogdanm 85:024bf7f99721 374 #define TSC_GROUP3_IO2 ((uint32_t)0x00000200)
bogdanm 85:024bf7f99721 375 #define TSC_GROUP3_IO3 ((uint32_t)0x00000400)
bogdanm 85:024bf7f99721 376 #define TSC_GROUP3_IO4 ((uint32_t)0x00000800)
bogdanm 85:024bf7f99721 377 #define TSC_GROUP3_ALL_IOS ((uint32_t)0x00000F00)
bogdanm 85:024bf7f99721 378
bogdanm 85:024bf7f99721 379 #define TSC_GROUP4_IO1 ((uint32_t)0x00001000)
bogdanm 85:024bf7f99721 380 #define TSC_GROUP4_IO2 ((uint32_t)0x00002000)
bogdanm 85:024bf7f99721 381 #define TSC_GROUP4_IO3 ((uint32_t)0x00004000)
bogdanm 85:024bf7f99721 382 #define TSC_GROUP4_IO4 ((uint32_t)0x00008000)
bogdanm 85:024bf7f99721 383 #define TSC_GROUP4_ALL_IOS ((uint32_t)0x0000F000)
bogdanm 85:024bf7f99721 384
bogdanm 85:024bf7f99721 385 #define TSC_GROUP5_IO1 ((uint32_t)0x00010000)
bogdanm 85:024bf7f99721 386 #define TSC_GROUP5_IO2 ((uint32_t)0x00020000)
bogdanm 85:024bf7f99721 387 #define TSC_GROUP5_IO3 ((uint32_t)0x00040000)
bogdanm 85:024bf7f99721 388 #define TSC_GROUP5_IO4 ((uint32_t)0x00080000)
bogdanm 85:024bf7f99721 389 #define TSC_GROUP5_ALL_IOS ((uint32_t)0x000F0000)
bogdanm 85:024bf7f99721 390
bogdanm 85:024bf7f99721 391 #define TSC_GROUP6_IO1 ((uint32_t)0x00100000)
bogdanm 85:024bf7f99721 392 #define TSC_GROUP6_IO2 ((uint32_t)0x00200000)
bogdanm 85:024bf7f99721 393 #define TSC_GROUP6_IO3 ((uint32_t)0x00400000)
bogdanm 85:024bf7f99721 394 #define TSC_GROUP6_IO4 ((uint32_t)0x00800000)
bogdanm 85:024bf7f99721 395 #define TSC_GROUP6_ALL_IOS ((uint32_t)0x00F00000)
bogdanm 85:024bf7f99721 396
bogdanm 85:024bf7f99721 397 #define TSC_GROUP7_IO1 ((uint32_t)0x01000000)
bogdanm 85:024bf7f99721 398 #define TSC_GROUP7_IO2 ((uint32_t)0x02000000)
bogdanm 85:024bf7f99721 399 #define TSC_GROUP7_IO3 ((uint32_t)0x04000000)
bogdanm 85:024bf7f99721 400 #define TSC_GROUP7_IO4 ((uint32_t)0x08000000)
bogdanm 85:024bf7f99721 401 #define TSC_GROUP7_ALL_IOS ((uint32_t)0x0F000000)
bogdanm 85:024bf7f99721 402
bogdanm 85:024bf7f99721 403 #define TSC_GROUP8_IO1 ((uint32_t)0x10000000)
bogdanm 85:024bf7f99721 404 #define TSC_GROUP8_IO2 ((uint32_t)0x20000000)
bogdanm 85:024bf7f99721 405 #define TSC_GROUP8_IO3 ((uint32_t)0x40000000)
bogdanm 85:024bf7f99721 406 #define TSC_GROUP8_IO4 ((uint32_t)0x80000000)
bogdanm 85:024bf7f99721 407 #define TSC_GROUP8_ALL_IOS ((uint32_t)0xF0000000)
bogdanm 85:024bf7f99721 408
bogdanm 85:024bf7f99721 409 #define TSC_ALL_GROUPS_ALL_IOS ((uint32_t)0xFFFFFFFF)
bogdanm 92:4fc01daae5a5 410 /**
bogdanm 92:4fc01daae5a5 411 * @}
bogdanm 92:4fc01daae5a5 412 */
bogdanm 92:4fc01daae5a5 413
bogdanm 85:024bf7f99721 414 /**
bogdanm 85:024bf7f99721 415 * @}
bogdanm 85:024bf7f99721 416 */
bogdanm 85:024bf7f99721 417
bogdanm 92:4fc01daae5a5 418 /* Private macros -----------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 419 /** @defgroup TSC_Private_Macros TSC Private Macros
bogdanm 92:4fc01daae5a5 420 * @{
bogdanm 92:4fc01daae5a5 421 */
bogdanm 92:4fc01daae5a5 422 /** @defgroup TSC_Spread_Spectrum TSC Spread Spectrum
bogdanm 92:4fc01daae5a5 423 * @{
bogdanm 92:4fc01daae5a5 424 */
bogdanm 92:4fc01daae5a5 425 #define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
bogdanm 92:4fc01daae5a5 426
bogdanm 92:4fc01daae5a5 427 #define IS_TSC_SSD(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < 128)))
bogdanm 92:4fc01daae5a5 428 /**
bogdanm 92:4fc01daae5a5 429 * @}
bogdanm 92:4fc01daae5a5 430 */
bogdanm 92:4fc01daae5a5 431
bogdanm 92:4fc01daae5a5 432 /**
bogdanm 92:4fc01daae5a5 433 * @}
bogdanm 92:4fc01daae5a5 434 */
bogdanm 92:4fc01daae5a5 435
bogdanm 85:024bf7f99721 436 /* Exported macros -----------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 437 /** @defgroup TSC_Exported_Macros TSC Exported Macros
bogdanm 92:4fc01daae5a5 438 * @{
bogdanm 92:4fc01daae5a5 439 */
bogdanm 85:024bf7f99721 440
bogdanm 85:024bf7f99721 441 /** @brief Reset TSC handle state
bogdanm 85:024bf7f99721 442 * @param __HANDLE__: TSC handle.
bogdanm 85:024bf7f99721 443 * @retval None
bogdanm 85:024bf7f99721 444 */
bogdanm 85:024bf7f99721 445 #define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET)
bogdanm 85:024bf7f99721 446
bogdanm 85:024bf7f99721 447 /**
bogdanm 85:024bf7f99721 448 * @brief Enable the TSC peripheral.
bogdanm 85:024bf7f99721 449 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 450 * @retval None
bogdanm 85:024bf7f99721 451 */
bogdanm 85:024bf7f99721 452 #define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE)
bogdanm 85:024bf7f99721 453
bogdanm 85:024bf7f99721 454 /**
bogdanm 85:024bf7f99721 455 * @brief Disable the TSC peripheral.
bogdanm 85:024bf7f99721 456 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 457 * @retval None
bogdanm 85:024bf7f99721 458 */
bogdanm 85:024bf7f99721 459 #define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE))
bogdanm 85:024bf7f99721 460
bogdanm 85:024bf7f99721 461 /**
bogdanm 85:024bf7f99721 462 * @brief Start acquisition
bogdanm 85:024bf7f99721 463 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 464 * @retval None
bogdanm 85:024bf7f99721 465 */
bogdanm 85:024bf7f99721 466 #define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START)
bogdanm 85:024bf7f99721 467
bogdanm 85:024bf7f99721 468 /**
bogdanm 85:024bf7f99721 469 * @brief Stop acquisition
bogdanm 85:024bf7f99721 470 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 471 * @retval None
bogdanm 85:024bf7f99721 472 */
bogdanm 85:024bf7f99721 473 #define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START))
bogdanm 85:024bf7f99721 474
bogdanm 85:024bf7f99721 475 /**
bogdanm 85:024bf7f99721 476 * @brief Set IO default mode to output push-pull low
bogdanm 85:024bf7f99721 477 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 478 * @retval None
bogdanm 85:024bf7f99721 479 */
bogdanm 85:024bf7f99721 480 #define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF))
bogdanm 85:024bf7f99721 481
bogdanm 85:024bf7f99721 482 /**
bogdanm 85:024bf7f99721 483 * @brief Set IO default mode to input floating
bogdanm 85:024bf7f99721 484 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 485 * @retval None
bogdanm 85:024bf7f99721 486 */
bogdanm 85:024bf7f99721 487 #define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF)
bogdanm 85:024bf7f99721 488
bogdanm 85:024bf7f99721 489 /**
bogdanm 85:024bf7f99721 490 * @brief Set synchronization polarity to falling edge
bogdanm 85:024bf7f99721 491 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 492 * @retval None
bogdanm 85:024bf7f99721 493 */
bogdanm 85:024bf7f99721 494 #define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL))
bogdanm 85:024bf7f99721 495
bogdanm 85:024bf7f99721 496 /**
bogdanm 85:024bf7f99721 497 * @brief Set synchronization polarity to rising edge and high level
bogdanm 85:024bf7f99721 498 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 499 * @retval None
bogdanm 85:024bf7f99721 500 */
bogdanm 85:024bf7f99721 501 #define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL)
bogdanm 85:024bf7f99721 502
bogdanm 85:024bf7f99721 503 /**
bogdanm 85:024bf7f99721 504 * @brief Enable TSC interrupt.
bogdanm 85:024bf7f99721 505 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 506 * @param __INTERRUPT__: TSC interrupt
bogdanm 85:024bf7f99721 507 * @retval None
bogdanm 85:024bf7f99721 508 */
bogdanm 85:024bf7f99721 509 #define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
bogdanm 85:024bf7f99721 510
bogdanm 85:024bf7f99721 511 /**
bogdanm 85:024bf7f99721 512 * @brief Disable TSC interrupt.
bogdanm 85:024bf7f99721 513 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 514 * @param __INTERRUPT__: TSC interrupt
bogdanm 85:024bf7f99721 515 * @retval None
bogdanm 85:024bf7f99721 516 */
bogdanm 85:024bf7f99721 517 #define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__)))
bogdanm 85:024bf7f99721 518
bogdanm 85:024bf7f99721 519 /** @brief Check if the specified TSC interrupt source is enabled or disabled.
bogdanm 85:024bf7f99721 520 * @param __HANDLE__: TSC Handle
bogdanm 85:024bf7f99721 521 * @param __INTERRUPT__: TSC interrupt
bogdanm 85:024bf7f99721 522 * @retval SET or RESET
bogdanm 85:024bf7f99721 523 */
bogdanm 85:024bf7f99721 524 #define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 85:024bf7f99721 525
bogdanm 85:024bf7f99721 526 /**
bogdanm 85:024bf7f99721 527 * @brief Get the selected TSC's flag status.
bogdanm 85:024bf7f99721 528 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 529 * @param __FLAG__: TSC flag
bogdanm 85:024bf7f99721 530 * @retval SET or RESET
bogdanm 85:024bf7f99721 531 */
bogdanm 85:024bf7f99721 532 #define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
bogdanm 85:024bf7f99721 533
bogdanm 85:024bf7f99721 534 /**
bogdanm 85:024bf7f99721 535 * @brief Clear the TSC's pending flag.
bogdanm 85:024bf7f99721 536 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 537 * @param __FLAG__: TSC flag
bogdanm 85:024bf7f99721 538 * @retval None
bogdanm 85:024bf7f99721 539 */
bogdanm 92:4fc01daae5a5 540 #define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
bogdanm 85:024bf7f99721 541
bogdanm 85:024bf7f99721 542 /**
bogdanm 85:024bf7f99721 543 * @brief Enable schmitt trigger hysteresis on a group of IOs
bogdanm 85:024bf7f99721 544 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 545 * @param __GX_IOY_MASK__: IOs mask
bogdanm 85:024bf7f99721 546 * @retval None
bogdanm 85:024bf7f99721 547 */
bogdanm 85:024bf7f99721 548 #define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__))
bogdanm 85:024bf7f99721 549
bogdanm 85:024bf7f99721 550 /**
bogdanm 85:024bf7f99721 551 * @brief Disable schmitt trigger hysteresis on a group of IOs
bogdanm 85:024bf7f99721 552 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 553 * @param __GX_IOY_MASK__: IOs mask
bogdanm 85:024bf7f99721 554 * @retval None
bogdanm 85:024bf7f99721 555 */
bogdanm 85:024bf7f99721 556 #define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__)))
bogdanm 85:024bf7f99721 557
bogdanm 85:024bf7f99721 558 /**
bogdanm 85:024bf7f99721 559 * @brief Open analog switch on a group of IOs
bogdanm 85:024bf7f99721 560 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 561 * @param __GX_IOY_MASK__: IOs mask
bogdanm 85:024bf7f99721 562 * @retval None
bogdanm 85:024bf7f99721 563 */
bogdanm 85:024bf7f99721 564 #define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__)))
bogdanm 85:024bf7f99721 565
bogdanm 85:024bf7f99721 566 /**
bogdanm 85:024bf7f99721 567 * @brief Close analog switch on a group of IOs
bogdanm 85:024bf7f99721 568 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 569 * @param __GX_IOY_MASK__: IOs mask
bogdanm 85:024bf7f99721 570 * @retval None
bogdanm 85:024bf7f99721 571 */
bogdanm 85:024bf7f99721 572 #define __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__))
bogdanm 85:024bf7f99721 573
bogdanm 85:024bf7f99721 574 /**
bogdanm 85:024bf7f99721 575 * @brief Enable a group of IOs in channel mode
bogdanm 85:024bf7f99721 576 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 577 * @param __GX_IOY_MASK__: IOs mask
bogdanm 85:024bf7f99721 578 * @retval None
bogdanm 85:024bf7f99721 579 */
bogdanm 85:024bf7f99721 580 #define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__))
bogdanm 85:024bf7f99721 581
bogdanm 85:024bf7f99721 582 /**
bogdanm 85:024bf7f99721 583 * @brief Disable a group of channel IOs
bogdanm 85:024bf7f99721 584 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 585 * @param __GX_IOY_MASK__: IOs mask
bogdanm 85:024bf7f99721 586 * @retval None
bogdanm 85:024bf7f99721 587 */
bogdanm 85:024bf7f99721 588 #define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__)))
bogdanm 85:024bf7f99721 589
bogdanm 85:024bf7f99721 590 /**
bogdanm 85:024bf7f99721 591 * @brief Enable a group of IOs in sampling mode
bogdanm 85:024bf7f99721 592 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 593 * @param __GX_IOY_MASK__: IOs mask
bogdanm 85:024bf7f99721 594 * @retval None
bogdanm 85:024bf7f99721 595 */
bogdanm 85:024bf7f99721 596 #define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__))
bogdanm 85:024bf7f99721 597
bogdanm 85:024bf7f99721 598 /**
bogdanm 85:024bf7f99721 599 * @brief Disable a group of sampling IOs
bogdanm 85:024bf7f99721 600 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 601 * @param __GX_IOY_MASK__: IOs mask
bogdanm 85:024bf7f99721 602 * @retval None
bogdanm 85:024bf7f99721 603 */
bogdanm 85:024bf7f99721 604 #define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__)))
bogdanm 85:024bf7f99721 605
bogdanm 85:024bf7f99721 606 /**
bogdanm 85:024bf7f99721 607 * @brief Enable acquisition groups
bogdanm 85:024bf7f99721 608 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 609 * @param __GX_MASK__: Groups mask
bogdanm 85:024bf7f99721 610 * @retval None
bogdanm 85:024bf7f99721 611 */
bogdanm 85:024bf7f99721 612 #define __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__))
bogdanm 85:024bf7f99721 613
bogdanm 85:024bf7f99721 614 /**
bogdanm 85:024bf7f99721 615 * @brief Disable acquisition groups
bogdanm 85:024bf7f99721 616 * @param __HANDLE__: TSC handle
bogdanm 85:024bf7f99721 617 * @param __GX_MASK__: Groups mask
bogdanm 85:024bf7f99721 618 * @retval None
bogdanm 85:024bf7f99721 619 */
bogdanm 85:024bf7f99721 620 #define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__)))
bogdanm 85:024bf7f99721 621
bogdanm 85:024bf7f99721 622 /** @brief Gets acquisition group status
bogdanm 85:024bf7f99721 623 * @param __HANDLE__: TSC Handle
bogdanm 85:024bf7f99721 624 * @param __GX_INDEX__: Group index
bogdanm 85:024bf7f99721 625 * @retval SET or RESET
bogdanm 85:024bf7f99721 626 */
bogdanm 85:024bf7f99721 627 #define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \
bogdanm 85:024bf7f99721 628 ((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) == (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING)
bogdanm 85:024bf7f99721 629
bogdanm 92:4fc01daae5a5 630 /**
bogdanm 92:4fc01daae5a5 631 * @}
bogdanm 92:4fc01daae5a5 632 */
bogdanm 92:4fc01daae5a5 633
bogdanm 85:024bf7f99721 634 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 635 /** @addtogroup TSC_Exported_Functions TSC Exported Functions
bogdanm 92:4fc01daae5a5 636 * @{
bogdanm 92:4fc01daae5a5 637 */
bogdanm 85:024bf7f99721 638
bogdanm 92:4fc01daae5a5 639 /** @addtogroup TSC_Exported_Functions_Group1 Initialization/de-initialization functions
bogdanm 92:4fc01daae5a5 640 * @brief Initialization and Configuration functions
bogdanm 92:4fc01daae5a5 641 * @{
bogdanm 92:4fc01daae5a5 642 */
bogdanm 85:024bf7f99721 643 /* Initialization and de-initialization functions *****************************/
bogdanm 85:024bf7f99721 644 HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc);
bogdanm 85:024bf7f99721 645 HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc);
bogdanm 85:024bf7f99721 646 void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc);
bogdanm 85:024bf7f99721 647 void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc);
bogdanm 92:4fc01daae5a5 648 /**
bogdanm 92:4fc01daae5a5 649 * @}
bogdanm 92:4fc01daae5a5 650 */
bogdanm 85:024bf7f99721 651
bogdanm 92:4fc01daae5a5 652 /** @addtogroup TSC_Exported_Functions_Group2 IO operation functions
bogdanm 92:4fc01daae5a5 653 * @brief IO operation functions * @{
bogdanm 92:4fc01daae5a5 654 */
bogdanm 85:024bf7f99721 655 /* IO operation functions *****************************************************/
bogdanm 85:024bf7f99721 656 HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc);
bogdanm 85:024bf7f99721 657 HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc);
bogdanm 85:024bf7f99721 658 HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc);
bogdanm 85:024bf7f99721 659 HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc);
bogdanm 85:024bf7f99721 660 TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index);
bogdanm 85:024bf7f99721 661 uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index);
bogdanm 92:4fc01daae5a5 662 /**
bogdanm 92:4fc01daae5a5 663 * @}
bogdanm 92:4fc01daae5a5 664 */
bogdanm 85:024bf7f99721 665
bogdanm 92:4fc01daae5a5 666 /** @addtogroup TSC_Exported_Functions_Group3 Peripheral Control functions
bogdanm 92:4fc01daae5a5 667 * @brief Peripheral Control functions
bogdanm 92:4fc01daae5a5 668 * @{
bogdanm 92:4fc01daae5a5 669 */
bogdanm 85:024bf7f99721 670 /* Peripheral Control functions ***********************************************/
bogdanm 85:024bf7f99721 671 HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config);
bogdanm 85:024bf7f99721 672 HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice);
bogdanm 92:4fc01daae5a5 673 /**
bogdanm 92:4fc01daae5a5 674 * @}
bogdanm 92:4fc01daae5a5 675 */
bogdanm 85:024bf7f99721 676
bogdanm 92:4fc01daae5a5 677 /** @addtogroup TSC_Exported_Functions_Group4 State functions
bogdanm 92:4fc01daae5a5 678 * @brief State functions
bogdanm 92:4fc01daae5a5 679 * @{
bogdanm 92:4fc01daae5a5 680 */
bogdanm 85:024bf7f99721 681 /* Peripheral State and Error functions ***************************************/
bogdanm 85:024bf7f99721 682 HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc);
bogdanm 85:024bf7f99721 683 HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc);
bogdanm 85:024bf7f99721 684 void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc);
bogdanm 92:4fc01daae5a5 685 /**
bogdanm 92:4fc01daae5a5 686 * @}
bogdanm 92:4fc01daae5a5 687 */
bogdanm 92:4fc01daae5a5 688
bogdanm 92:4fc01daae5a5 689 /** @addtogroup TSC_Exported_Functions_Group5 Callback functions
bogdanm 92:4fc01daae5a5 690 * @brief Callback functions
bogdanm 92:4fc01daae5a5 691 * @{
bogdanm 92:4fc01daae5a5 692 */
bogdanm 85:024bf7f99721 693 /* Callback functions *********************************************************/
bogdanm 85:024bf7f99721 694 void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc);
bogdanm 85:024bf7f99721 695 void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc);
bogdanm 92:4fc01daae5a5 696 /**
bogdanm 92:4fc01daae5a5 697 * @}
bogdanm 92:4fc01daae5a5 698 */
bogdanm 85:024bf7f99721 699
bogdanm 92:4fc01daae5a5 700 /**
bogdanm 92:4fc01daae5a5 701 * @}
bogdanm 92:4fc01daae5a5 702 */
bogdanm 85:024bf7f99721 703
bogdanm 85:024bf7f99721 704 /**
bogdanm 85:024bf7f99721 705 * @}
bogdanm 85:024bf7f99721 706 */
bogdanm 85:024bf7f99721 707
bogdanm 85:024bf7f99721 708 /**
bogdanm 85:024bf7f99721 709 * @}
bogdanm 85:024bf7f99721 710 */
bogdanm 85:024bf7f99721 711
bogdanm 92:4fc01daae5a5 712 #endif /* defined(STM32F051x8) || defined(STM32F071xB) || defined(STM32F091xC) || */
bogdanm 92:4fc01daae5a5 713 /* defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || */
bogdanm 92:4fc01daae5a5 714 /* defined(STM32F058xx) || defined(STM32F078xx) || defined(STM32F098xx) */
bogdanm 92:4fc01daae5a5 715
bogdanm 92:4fc01daae5a5 716
bogdanm 85:024bf7f99721 717 #ifdef __cplusplus
bogdanm 85:024bf7f99721 718 }
bogdanm 85:024bf7f99721 719 #endif
bogdanm 85:024bf7f99721 720
bogdanm 85:024bf7f99721 721 #endif /*__STM32F0xx_TSC_H */
bogdanm 85:024bf7f99721 722
bogdanm 85:024bf7f99721 723 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 92:4fc01daae5a5 724