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TARGET_NUCLEO_F072RB/stm32f0xx_hal_pwr_ex.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Parent:
85:024bf7f99721
Child:
93:e188a91d3eaa
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 85:024bf7f99721 1 /**
bogdanm 85:024bf7f99721 2 ******************************************************************************
bogdanm 85:024bf7f99721 3 * @file stm32f0xx_hal_pwr_ex.h
bogdanm 85:024bf7f99721 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 03-Oct-2014
bogdanm 85:024bf7f99721 7 * @brief Header file of PWR HAL Extension module.
bogdanm 85:024bf7f99721 8 ******************************************************************************
bogdanm 85:024bf7f99721 9 * @attention
bogdanm 85:024bf7f99721 10 *
bogdanm 85:024bf7f99721 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 85:024bf7f99721 12 *
bogdanm 85:024bf7f99721 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 85:024bf7f99721 14 * are permitted provided that the following conditions are met:
bogdanm 85:024bf7f99721 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 85:024bf7f99721 16 * this list of conditions and the following disclaimer.
bogdanm 85:024bf7f99721 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 85:024bf7f99721 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 85:024bf7f99721 19 * and/or other materials provided with the distribution.
bogdanm 85:024bf7f99721 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 85:024bf7f99721 21 * may be used to endorse or promote products derived from this software
bogdanm 85:024bf7f99721 22 * without specific prior written permission.
bogdanm 85:024bf7f99721 23 *
bogdanm 85:024bf7f99721 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 85:024bf7f99721 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 85:024bf7f99721 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 85:024bf7f99721 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 85:024bf7f99721 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 85:024bf7f99721 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 85:024bf7f99721 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 85:024bf7f99721 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 85:024bf7f99721 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 85:024bf7f99721 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 85:024bf7f99721 34 *
bogdanm 85:024bf7f99721 35 ******************************************************************************
bogdanm 85:024bf7f99721 36 */
bogdanm 85:024bf7f99721 37
bogdanm 85:024bf7f99721 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 85:024bf7f99721 39 #ifndef __STM32F0xx_HAL_PWR_EX_H
bogdanm 85:024bf7f99721 40 #define __STM32F0xx_HAL_PWR_EX_H
bogdanm 85:024bf7f99721 41
bogdanm 85:024bf7f99721 42 #ifdef __cplusplus
bogdanm 85:024bf7f99721 43 extern "C" {
bogdanm 85:024bf7f99721 44 #endif
bogdanm 85:024bf7f99721 45
bogdanm 85:024bf7f99721 46 /* Includes ------------------------------------------------------------------*/
bogdanm 85:024bf7f99721 47 #include "stm32f0xx_hal_def.h"
bogdanm 85:024bf7f99721 48
bogdanm 85:024bf7f99721 49 /** @addtogroup STM32F0xx_HAL_Driver
bogdanm 85:024bf7f99721 50 * @{
bogdanm 85:024bf7f99721 51 */
bogdanm 85:024bf7f99721 52
bogdanm 85:024bf7f99721 53 /** @addtogroup PWREx
bogdanm 85:024bf7f99721 54 * @{
bogdanm 85:024bf7f99721 55 */
bogdanm 85:024bf7f99721 56
bogdanm 85:024bf7f99721 57 /* Exported types ------------------------------------------------------------*/
bogdanm 85:024bf7f99721 58
bogdanm 92:4fc01daae5a5 59 /** @defgroup PWREx_Exported_Types PWREx Exported Types
bogdanm 92:4fc01daae5a5 60 * @{
bogdanm 92:4fc01daae5a5 61 */
bogdanm 92:4fc01daae5a5 62
bogdanm 85:024bf7f99721 63 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 64 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 65 defined (STM32F091xC)
bogdanm 85:024bf7f99721 66
bogdanm 85:024bf7f99721 67 /**
bogdanm 85:024bf7f99721 68 * @brief PWR PVD configuration structure definition
bogdanm 85:024bf7f99721 69 */
bogdanm 85:024bf7f99721 70 typedef struct
bogdanm 85:024bf7f99721 71 {
bogdanm 85:024bf7f99721 72 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level
bogdanm 85:024bf7f99721 73 This parameter can be a value of @ref PWREx_PVD_detection_level */
bogdanm 85:024bf7f99721 74
bogdanm 85:024bf7f99721 75 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
bogdanm 85:024bf7f99721 76 This parameter can be a value of @ref PWREx_PVD_Mode */
bogdanm 85:024bf7f99721 77 }PWR_PVDTypeDef;
bogdanm 85:024bf7f99721 78
bogdanm 85:024bf7f99721 79 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 80 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 81 /* defined (STM32F091xC) */
bogdanm 92:4fc01daae5a5 82 /**
bogdanm 92:4fc01daae5a5 83 * @}
bogdanm 92:4fc01daae5a5 84 */
bogdanm 92:4fc01daae5a5 85 /* Exported constants --------------------------------------------------------*/
bogdanm 85:024bf7f99721 86
bogdanm 92:4fc01daae5a5 87 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
bogdanm 85:024bf7f99721 88 * @{
bogdanm 85:024bf7f99721 89 */
bogdanm 85:024bf7f99721 90
bogdanm 92:4fc01daae5a5 91
bogdanm 92:4fc01daae5a5 92 /** @defgroup PWREx_WakeUp_Pins PWREx Wakeup Pins
bogdanm 85:024bf7f99721 93 * @{
bogdanm 85:024bf7f99721 94 */
bogdanm 92:4fc01daae5a5 95 #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 96 defined (STM32F091xC) || defined (STM32F098xx)
bogdanm 92:4fc01daae5a5 97 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
bogdanm 92:4fc01daae5a5 98 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
bogdanm 92:4fc01daae5a5 99 #define PWR_WAKEUP_PIN3 ((uint32_t)0x02)
bogdanm 92:4fc01daae5a5 100 #define PWR_WAKEUP_PIN4 ((uint32_t)0x03)
bogdanm 92:4fc01daae5a5 101 #define PWR_WAKEUP_PIN5 ((uint32_t)0x04)
bogdanm 92:4fc01daae5a5 102 #define PWR_WAKEUP_PIN6 ((uint32_t)0x05)
bogdanm 92:4fc01daae5a5 103 #define PWR_WAKEUP_PIN7 ((uint32_t)0x06)
bogdanm 92:4fc01daae5a5 104 #define PWR_WAKEUP_PIN8 ((uint32_t)0x07)
bogdanm 85:024bf7f99721 105
bogdanm 85:024bf7f99721 106 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
bogdanm 85:024bf7f99721 107 ((PIN) == PWR_WAKEUP_PIN2) || \
bogdanm 85:024bf7f99721 108 ((PIN) == PWR_WAKEUP_PIN3) || \
bogdanm 85:024bf7f99721 109 ((PIN) == PWR_WAKEUP_PIN4) || \
bogdanm 85:024bf7f99721 110 ((PIN) == PWR_WAKEUP_PIN5) || \
bogdanm 85:024bf7f99721 111 ((PIN) == PWR_WAKEUP_PIN6) || \
bogdanm 85:024bf7f99721 112 ((PIN) == PWR_WAKEUP_PIN7) || \
bogdanm 85:024bf7f99721 113 ((PIN) == PWR_WAKEUP_PIN8))
bogdanm 85:024bf7f99721 114 #else
bogdanm 92:4fc01daae5a5 115 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
bogdanm 92:4fc01daae5a5 116 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
bogdanm 85:024bf7f99721 117
bogdanm 85:024bf7f99721 118 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
bogdanm 85:024bf7f99721 119 ((PIN) == PWR_WAKEUP_PIN2))
bogdanm 92:4fc01daae5a5 120 #endif /* defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || */
bogdanm 92:4fc01daae5a5 121 /* defined (STM32F091xC) || defined (STM32F098xx) */
bogdanm 92:4fc01daae5a5 122 /**
bogdanm 92:4fc01daae5a5 123 * @}
bogdanm 92:4fc01daae5a5 124 */
bogdanm 92:4fc01daae5a5 125
bogdanm 92:4fc01daae5a5 126 /** @defgroup PWREx_EXTI_Line PWREx EXTI Line
bogdanm 92:4fc01daae5a5 127 * @{
bogdanm 92:4fc01daae5a5 128 */
bogdanm 92:4fc01daae5a5 129 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 130 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 131 defined (STM32F091xC)
bogdanm 92:4fc01daae5a5 132
bogdanm 92:4fc01daae5a5 133 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
bogdanm 92:4fc01daae5a5 134
bogdanm 92:4fc01daae5a5 135 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 136 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 137 /* defined (STM32F091xC) */
bogdanm 92:4fc01daae5a5 138
bogdanm 92:4fc01daae5a5 139 #if defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 140 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 141 defined (STM32F091xC) || defined (STM32F098xx)
bogdanm 92:4fc01daae5a5 142
bogdanm 92:4fc01daae5a5 143 #define PWR_EXTI_LINE_VDDIO2 ((uint32_t)0x80000000) /*!< External interrupt line 31 Connected to the Vddio2 Monitor EXTI Line */
bogdanm 92:4fc01daae5a5 144
bogdanm 92:4fc01daae5a5 145 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 146 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 147 defined (STM32F091xC) || defined (STM32F098xx) */
bogdanm 85:024bf7f99721 148 /**
bogdanm 85:024bf7f99721 149 * @}
bogdanm 85:024bf7f99721 150 */
bogdanm 85:024bf7f99721 151
bogdanm 85:024bf7f99721 152 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 153 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 154 defined (STM32F091xC)
bogdanm 92:4fc01daae5a5 155 /** @defgroup PWREx_PVD_detection_level PWREx PVD detection level
bogdanm 85:024bf7f99721 156 * @{
bogdanm 85:024bf7f99721 157 */
bogdanm 92:4fc01daae5a5 158 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
bogdanm 92:4fc01daae5a5 159 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
bogdanm 92:4fc01daae5a5 160 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
bogdanm 92:4fc01daae5a5 161 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
bogdanm 92:4fc01daae5a5 162 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
bogdanm 92:4fc01daae5a5 163 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
bogdanm 92:4fc01daae5a5 164 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
bogdanm 92:4fc01daae5a5 165 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
bogdanm 85:024bf7f99721 166 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
bogdanm 85:024bf7f99721 167 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
bogdanm 85:024bf7f99721 168 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
bogdanm 85:024bf7f99721 169 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
bogdanm 85:024bf7f99721 170 /**
bogdanm 85:024bf7f99721 171 * @}
bogdanm 85:024bf7f99721 172 */
bogdanm 85:024bf7f99721 173
bogdanm 92:4fc01daae5a5 174 /** @defgroup PWREx_PVD_Mode PWREx PVD Mode
bogdanm 85:024bf7f99721 175 * @{
bogdanm 85:024bf7f99721 176 */
bogdanm 92:4fc01daae5a5 177 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
bogdanm 92:4fc01daae5a5 178 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
bogdanm 92:4fc01daae5a5 179 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
bogdanm 92:4fc01daae5a5 180 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
bogdanm 92:4fc01daae5a5 181 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
bogdanm 92:4fc01daae5a5 182 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
bogdanm 92:4fc01daae5a5 183 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
bogdanm 92:4fc01daae5a5 184
bogdanm 92:4fc01daae5a5 185 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
bogdanm 92:4fc01daae5a5 186 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
bogdanm 92:4fc01daae5a5 187 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
bogdanm 92:4fc01daae5a5 188 ((MODE) == PWR_PVD_MODE_NORMAL))
bogdanm 85:024bf7f99721 189 /**
bogdanm 85:024bf7f99721 190 * @}
bogdanm 85:024bf7f99721 191 */
bogdanm 85:024bf7f99721 192 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 193 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 194 /* defined (STM32F091xC) */
bogdanm 85:024bf7f99721 195
bogdanm 92:4fc01daae5a5 196 /** @defgroup PWREx_Flag PWREx Flag
bogdanm 85:024bf7f99721 197 * @{
bogdanm 85:024bf7f99721 198 */
bogdanm 85:024bf7f99721 199 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 200 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 201 defined (STM32F091xC)
bogdanm 85:024bf7f99721 202
bogdanm 92:4fc01daae5a5 203 #define PWR_FLAG_WU PWR_CSR_WUF
bogdanm 92:4fc01daae5a5 204 #define PWR_FLAG_SB PWR_CSR_SBF
bogdanm 92:4fc01daae5a5 205 #define PWR_FLAG_PVDO PWR_CSR_PVDO
bogdanm 92:4fc01daae5a5 206 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
bogdanm 85:024bf7f99721 207 #else
bogdanm 92:4fc01daae5a5 208 #define PWR_FLAG_WU PWR_CSR_WUF
bogdanm 92:4fc01daae5a5 209 #define PWR_FLAG_SB PWR_CSR_SBF
bogdanm 85:024bf7f99721 210
bogdanm 85:024bf7f99721 211 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 212 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 213 /* defined (STM32F091xC) */
bogdanm 85:024bf7f99721 214 /**
bogdanm 85:024bf7f99721 215 * @}
bogdanm 85:024bf7f99721 216 */
bogdanm 85:024bf7f99721 217
bogdanm 85:024bf7f99721 218 /**
bogdanm 85:024bf7f99721 219 * @}
bogdanm 85:024bf7f99721 220 */
bogdanm 85:024bf7f99721 221
bogdanm 85:024bf7f99721 222 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 223 /** @defgroup PWREx_Exported_Macros PWREx Exported Macros
bogdanm 85:024bf7f99721 224 * @{
bogdanm 85:024bf7f99721 225 */
bogdanm 85:024bf7f99721 226 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 227 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 228 defined (STM32F091xC)
bogdanm 92:4fc01daae5a5 229 /**
bogdanm 92:4fc01daae5a5 230 * @brief Enable interrupt on PVD Exti Line 16.
bogdanm 92:4fc01daae5a5 231 * @retval None.
bogdanm 92:4fc01daae5a5 232 */
bogdanm 92:4fc01daae5a5 233 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 234
bogdanm 85:024bf7f99721 235 /**
bogdanm 92:4fc01daae5a5 236 * @brief Disable interrupt on PVD Exti Line 16.
bogdanm 92:4fc01daae5a5 237 * @retval None.
bogdanm 92:4fc01daae5a5 238 */
bogdanm 92:4fc01daae5a5 239 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 240
bogdanm 92:4fc01daae5a5 241 /**
bogdanm 92:4fc01daae5a5 242 * @brief Enable event on PVD Exti Line 16.
bogdanm 92:4fc01daae5a5 243 * @retval None.
bogdanm 92:4fc01daae5a5 244 */
bogdanm 92:4fc01daae5a5 245 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 246
bogdanm 92:4fc01daae5a5 247 /**
bogdanm 92:4fc01daae5a5 248 * @brief Disable event on PVD Exti Line 16.
bogdanm 85:024bf7f99721 249 * @retval None.
bogdanm 85:024bf7f99721 250 */
bogdanm 92:4fc01daae5a5 251 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 252
bogdanm 92:4fc01daae5a5 253 /**
bogdanm 92:4fc01daae5a5 254 * @brief PVD EXTI line configuration: clear falling edge and rising edge trigger.
bogdanm 92:4fc01daae5a5 255 * @retval None.
bogdanm 92:4fc01daae5a5 256 */
bogdanm 92:4fc01daae5a5 257 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_PVD); \
bogdanm 92:4fc01daae5a5 258 EXTI->RTSR &= ~(PWR_EXTI_LINE_PVD)
bogdanm 92:4fc01daae5a5 259
bogdanm 92:4fc01daae5a5 260 /**
bogdanm 92:4fc01daae5a5 261 * @brief PVD EXTI line configuration: set falling edge trigger.
bogdanm 92:4fc01daae5a5 262 * @retval None.
bogdanm 92:4fc01daae5a5 263 */
bogdanm 92:4fc01daae5a5 264 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_PVD)
bogdanm 85:024bf7f99721 265
bogdanm 85:024bf7f99721 266 /**
bogdanm 92:4fc01daae5a5 267 * @brief PVD EXTI line configuration: set rising edge trigger.
bogdanm 85:024bf7f99721 268 * @retval None.
bogdanm 85:024bf7f99721 269 */
bogdanm 92:4fc01daae5a5 270 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->RTSR |= (PWR_EXTI_LINE_PVD)
bogdanm 92:4fc01daae5a5 271
bogdanm 92:4fc01daae5a5 272 /**
bogdanm 92:4fc01daae5a5 273 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
bogdanm 92:4fc01daae5a5 274 * @retval EXTI PVD Line Status.
bogdanm 92:4fc01daae5a5 275 */
bogdanm 92:4fc01daae5a5 276 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 277
bogdanm 92:4fc01daae5a5 278 /**
bogdanm 92:4fc01daae5a5 279 * @brief Clear the PVD EXTI flag.
bogdanm 92:4fc01daae5a5 280 * @retval None.
bogdanm 92:4fc01daae5a5 281 */
bogdanm 92:4fc01daae5a5 282 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
bogdanm 85:024bf7f99721 283
bogdanm 85:024bf7f99721 284 /**
bogdanm 85:024bf7f99721 285 * @brief Generate a Software interrupt on selected EXTI line.
bogdanm 92:4fc01daae5a5 286 * @retval None.
bogdanm 85:024bf7f99721 287 */
bogdanm 92:4fc01daae5a5 288 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
bogdanm 92:4fc01daae5a5 289
bogdanm 92:4fc01daae5a5 290 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 291 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 292 /* defined (STM32F091xC) */
bogdanm 92:4fc01daae5a5 293
bogdanm 92:4fc01daae5a5 294
bogdanm 92:4fc01daae5a5 295 #if defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 296 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 297 defined (STM32F091xC) || defined (STM32F098xx)
bogdanm 92:4fc01daae5a5 298 /**
bogdanm 92:4fc01daae5a5 299 * @brief Enable interrupt on Vddio2 Monitor Exti Line 31.
bogdanm 92:4fc01daae5a5 300 * @retval None.
bogdanm 92:4fc01daae5a5 301 */
bogdanm 92:4fc01daae5a5 302 #define __HAL_PWR_VDDIO2_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_VDDIO2))
bogdanm 92:4fc01daae5a5 303
bogdanm 92:4fc01daae5a5 304 /**
bogdanm 92:4fc01daae5a5 305 * @brief Disable interrupt on Vddio2 Monitor Exti Line 31.
bogdanm 92:4fc01daae5a5 306 * @retval None.
bogdanm 92:4fc01daae5a5 307 */
bogdanm 92:4fc01daae5a5 308 #define __HAL_PWR_VDDIO2_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_VDDIO2))
bogdanm 85:024bf7f99721 309
bogdanm 85:024bf7f99721 310 /**
bogdanm 92:4fc01daae5a5 311 * @brief Vddio2 Monitor EXTI line configuration: clear falling edge and rising edge trigger.
bogdanm 92:4fc01daae5a5 312 * @retval None.
bogdanm 85:024bf7f99721 313 */
bogdanm 92:4fc01daae5a5 314 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2); \
bogdanm 92:4fc01daae5a5 315 EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2)
bogdanm 92:4fc01daae5a5 316
bogdanm 92:4fc01daae5a5 317 /**
bogdanm 92:4fc01daae5a5 318 * @brief Vddio2 Monitor EXTI line configuration: set falling edge trigger.
bogdanm 92:4fc01daae5a5 319 * @retval None.
bogdanm 92:4fc01daae5a5 320 */
bogdanm 92:4fc01daae5a5 321 #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_VDDIO2)
bogdanm 85:024bf7f99721 322
bogdanm 85:024bf7f99721 323 /**
bogdanm 92:4fc01daae5a5 324 * @brief Check whether the specified VDDIO2 monitor EXTI interrupt flag is set or not.
bogdanm 92:4fc01daae5a5 325 * @retval EXTI VDDIO2 Monitor Line Status.
bogdanm 92:4fc01daae5a5 326 */
bogdanm 92:4fc01daae5a5 327 #define __HAL_PWR_VDDIO2_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_VDDIO2))
bogdanm 92:4fc01daae5a5 328
bogdanm 92:4fc01daae5a5 329 /**
bogdanm 92:4fc01daae5a5 330 * @brief Clear the VDDIO2 Monitor EXTI flag.
bogdanm 85:024bf7f99721 331 * @retval None.
bogdanm 85:024bf7f99721 332 */
bogdanm 92:4fc01daae5a5 333 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_VDDIO2))
bogdanm 85:024bf7f99721 334
bogdanm 92:4fc01daae5a5 335 /**
bogdanm 92:4fc01daae5a5 336 * @brief Generate a Software interrupt on selected EXTI line.
bogdanm 92:4fc01daae5a5 337 * @retval None.
bogdanm 92:4fc01daae5a5 338 */
bogdanm 92:4fc01daae5a5 339 #define __HAL_PWR_VDDIO2_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_VDDIO2))
bogdanm 92:4fc01daae5a5 340
bogdanm 92:4fc01daae5a5 341
bogdanm 92:4fc01daae5a5 342 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 343 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 344 defined (STM32F091xC) || defined (STM32F098xx) */
bogdanm 92:4fc01daae5a5 345
bogdanm 85:024bf7f99721 346 /**
bogdanm 85:024bf7f99721 347 * @}
bogdanm 85:024bf7f99721 348 */
bogdanm 85:024bf7f99721 349
bogdanm 92:4fc01daae5a5 350 /* Exported functions --------------------------------------------------------*/
bogdanm 85:024bf7f99721 351
bogdanm 92:4fc01daae5a5 352 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
bogdanm 92:4fc01daae5a5 353 * @{
bogdanm 92:4fc01daae5a5 354 */
bogdanm 85:024bf7f99721 355
bogdanm 92:4fc01daae5a5 356 /** @addtogroup PWREx_Exported_Functions_Group1
bogdanm 92:4fc01daae5a5 357 * @{
bogdanm 92:4fc01daae5a5 358 */
bogdanm 92:4fc01daae5a5 359 /* I/O operation functions ***************************************************/
bogdanm 85:024bf7f99721 360 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 361 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 362 defined (STM32F091xC)
bogdanm 85:024bf7f99721 363 void HAL_PWR_PVD_IRQHandler(void);
bogdanm 85:024bf7f99721 364 void HAL_PWR_PVDCallback(void);
bogdanm 92:4fc01daae5a5 365 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 366 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 367 /* defined (STM32F091xC) */
bogdanm 92:4fc01daae5a5 368
bogdanm 92:4fc01daae5a5 369 #if defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 370 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 371 defined (STM32F091xC) || defined (STM32F098xx)
bogdanm 92:4fc01daae5a5 372 void HAL_PWR_Vddio2Monitor_IRQHandler(void);
bogdanm 92:4fc01daae5a5 373 void HAL_PWR_Vddio2MonitorCallback(void);
bogdanm 92:4fc01daae5a5 374 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 375 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 376 defined (STM32F091xC) || defined (STM32F098xx) */
bogdanm 85:024bf7f99721 377
bogdanm 85:024bf7f99721 378 /* Peripheral Control functions **********************************************/
bogdanm 92:4fc01daae5a5 379 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
bogdanm 92:4fc01daae5a5 380 defined (STM32F071xB) || defined (STM32F072xB) || \
bogdanm 92:4fc01daae5a5 381 defined (STM32F091xC)
bogdanm 85:024bf7f99721 382 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
bogdanm 85:024bf7f99721 383 void HAL_PWR_EnablePVD(void);
bogdanm 85:024bf7f99721 384 void HAL_PWR_DisablePVD(void);
bogdanm 92:4fc01daae5a5 385 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
bogdanm 92:4fc01daae5a5 386 /* defined (STM32F071xB) || defined (STM32F072xB) || */
bogdanm 92:4fc01daae5a5 387 /* defined (STM32F091xC) */
bogdanm 92:4fc01daae5a5 388
bogdanm 92:4fc01daae5a5 389 #if defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 390 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 391 defined (STM32F091xC) || defined (STM32F098xx)
bogdanm 92:4fc01daae5a5 392 void HAL_PWR_EnableVddio2Monitor(void);
bogdanm 92:4fc01daae5a5 393 void HAL_PWR_DisableVddio2Monitor(void);
bogdanm 92:4fc01daae5a5 394 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 92:4fc01daae5a5 395 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
bogdanm 92:4fc01daae5a5 396 defined (STM32F091xC) || defined (STM32F098xx) */
bogdanm 85:024bf7f99721 397
bogdanm 92:4fc01daae5a5 398 /**
bogdanm 92:4fc01daae5a5 399 * @}
bogdanm 92:4fc01daae5a5 400 */
bogdanm 92:4fc01daae5a5 401
bogdanm 92:4fc01daae5a5 402 /**
bogdanm 92:4fc01daae5a5 403 * @}
bogdanm 92:4fc01daae5a5 404 */
bogdanm 85:024bf7f99721 405
bogdanm 85:024bf7f99721 406 /**
bogdanm 85:024bf7f99721 407 * @}
bogdanm 85:024bf7f99721 408 */
bogdanm 85:024bf7f99721 409
bogdanm 85:024bf7f99721 410 /**
bogdanm 85:024bf7f99721 411 * @}
bogdanm 85:024bf7f99721 412 */
bogdanm 85:024bf7f99721 413
bogdanm 85:024bf7f99721 414 #ifdef __cplusplus
bogdanm 85:024bf7f99721 415 }
bogdanm 85:024bf7f99721 416 #endif
bogdanm 85:024bf7f99721 417
bogdanm 85:024bf7f99721 418 #endif /* __STM32F0xx_HAL_PWR_EX_H */
bogdanm 85:024bf7f99721 419
bogdanm 85:024bf7f99721 420 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 92:4fc01daae5a5 421