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TARGET_NUCLEO_F401RE/stm32f4xx_hal_hcd.h@97:4298809c7c9e, 2015-04-08 (annotated)

Committer:
filartrix
Date:
Wed Apr 08 14:12:53 2015 +0000
Revision:
97:4298809c7c9e
Parent:
90:cb3d968589d8 
First reale BlueNRG module for nucleo 401 board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_hcd.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 19-June-2014
emilmont 77:869cf507173a 7 * @brief Header file of HCD HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_HCD_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_HCD_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 47 #include "stm32f4xx_ll_usb.h"
emilmont 77:869cf507173a 48
emilmont 77:869cf507173a 49 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 50 * @{
emilmont 77:869cf507173a 51 */
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup HCD
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
emilmont 77:869cf507173a 57 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /**
emilmont 77:869cf507173a 60 * @brief HCD Status structures structure definition
emilmont 77:869cf507173a 61 */
emilmont 77:869cf507173a 62 typedef enum
emilmont 77:869cf507173a 63 {
Kojto 90:cb3d968589d8 64 HAL_HCD_STATE_RESET = 0x00,
Kojto 90:cb3d968589d8 65 HAL_HCD_STATE_READY = 0x01,
Kojto 90:cb3d968589d8 66 HAL_HCD_STATE_ERROR = 0x02,
Kojto 90:cb3d968589d8 67 HAL_HCD_STATE_BUSY = 0x03,
Kojto 90:cb3d968589d8 68 HAL_HCD_STATE_TIMEOUT = 0x04
emilmont 77:869cf507173a 69 } HCD_StateTypeDef;
emilmont 77:869cf507173a 70
emilmont 77:869cf507173a 71 typedef USB_OTG_GlobalTypeDef HCD_TypeDef;
emilmont 77:869cf507173a 72 typedef USB_OTG_CfgTypeDef HCD_InitTypeDef;
emilmont 77:869cf507173a 73 typedef USB_OTG_HCTypeDef HCD_HCTypeDef ;
emilmont 77:869cf507173a 74 typedef USB_OTG_URBStateTypeDef HCD_URBStateTypeDef ;
emilmont 77:869cf507173a 75 typedef USB_OTG_HCStateTypeDef HCD_HCStateTypeDef ;
emilmont 77:869cf507173a 76
emilmont 77:869cf507173a 77 /**
emilmont 77:869cf507173a 78 * @brief HCD Handle Structure definition
emilmont 77:869cf507173a 79 */
emilmont 77:869cf507173a 80 typedef struct
emilmont 77:869cf507173a 81 {
emilmont 77:869cf507173a 82 HCD_TypeDef *Instance; /*!< Register base address */
emilmont 77:869cf507173a 83 HCD_InitTypeDef Init; /*!< HCD required parameters */
emilmont 77:869cf507173a 84 HCD_HCTypeDef hc[15]; /*!< Host channels parameters */
emilmont 77:869cf507173a 85 HAL_LockTypeDef Lock; /*!< HCD peripheral status */
emilmont 77:869cf507173a 86 __IO HCD_StateTypeDef State; /*!< HCD communication state */
emilmont 77:869cf507173a 87 void *pData; /*!< Pointer Stack Handler */
emilmont 77:869cf507173a 88
emilmont 77:869cf507173a 89 } HCD_HandleTypeDef;
emilmont 77:869cf507173a 90
emilmont 77:869cf507173a 91 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 92 /** @defgroup HCD_Exported_Constants
emilmont 77:869cf507173a 93 * @{
emilmont 77:869cf507173a 94 */
emilmont 77:869cf507173a 95
emilmont 77:869cf507173a 96 /** @defgroup HCD_Instance_definition
emilmont 77:869cf507173a 97 * @{
emilmont 77:869cf507173a 98 */
emilmont 77:869cf507173a 99
emilmont 77:869cf507173a 100 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
emilmont 77:869cf507173a 101 #define IS_HCD_ALL_INSTANCE(INSTANCE) (((INSTANCE) == USB_OTG_FS) || \
emilmont 77:869cf507173a 102 ((INSTANCE) == USB_OTG_HS))
Kojto 90:cb3d968589d8 103 #elif defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
emilmont 77:869cf507173a 104 #define IS_HCD_ALL_INSTANCE(INSTANCE) (((INSTANCE) == USB_OTG_FS))
emilmont 77:869cf507173a 105 #endif
emilmont 77:869cf507173a 106
emilmont 77:869cf507173a 107 /**
emilmont 77:869cf507173a 108 * @}
emilmont 77:869cf507173a 109 */
emilmont 77:869cf507173a 110
emilmont 77:869cf507173a 111 /** @defgroup HCD_Speed
emilmont 77:869cf507173a 112 * @{
emilmont 77:869cf507173a 113 */
emilmont 77:869cf507173a 114 #define HCD_SPEED_HIGH 0
emilmont 77:869cf507173a 115 #define HCD_SPEED_LOW 2
bogdanm 81:7d30d6019079 116 #define HCD_SPEED_FULL 3
bogdanm 81:7d30d6019079 117
emilmont 77:869cf507173a 118 /**
emilmont 77:869cf507173a 119 * @}
emilmont 77:869cf507173a 120 */
emilmont 77:869cf507173a 121
emilmont 77:869cf507173a 122 /** @defgroup HCD_PHY_Module
emilmont 77:869cf507173a 123 * @{
emilmont 77:869cf507173a 124 */
emilmont 77:869cf507173a 125 #define HCD_PHY_ULPI 1
emilmont 77:869cf507173a 126 #define HCD_PHY_EMBEDDED 2
emilmont 77:869cf507173a 127 /**
emilmont 77:869cf507173a 128 * @}
emilmont 77:869cf507173a 129 */
emilmont 77:869cf507173a 130 /**
emilmont 77:869cf507173a 131 * @}
emilmont 77:869cf507173a 132 */
emilmont 77:869cf507173a 133
emilmont 77:869cf507173a 134 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 135
emilmont 77:869cf507173a 136 /** @defgroup HCD_Interrupt_Clock
emilmont 77:869cf507173a 137 * @brief macros to handle interrupts and specific clock configurations
emilmont 77:869cf507173a 138 * @{
emilmont 77:869cf507173a 139 */
emilmont 77:869cf507173a 140 #define __HAL_HCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
emilmont 77:869cf507173a 141 #define __HAL_HCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
emilmont 77:869cf507173a 142
Kojto 90:cb3d968589d8 143
Kojto 90:cb3d968589d8 144 #define __HAL_HCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
Kojto 90:cb3d968589d8 145 #define __HAL_HCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
Kojto 90:cb3d968589d8 146 #define __HAL_HCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0)
emilmont 77:869cf507173a 147
emilmont 77:869cf507173a 148
emilmont 77:869cf507173a 149 #define __HAL_HCD_CLEAR_HC_INT(chnum, __INTERRUPT__) (USBx_HC(chnum)->HCINT = (__INTERRUPT__))
emilmont 77:869cf507173a 150 #define __HAL_HCD_MASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_CHHM)
emilmont 77:869cf507173a 151 #define __HAL_HCD_UNMASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_CHHM)
emilmont 77:869cf507173a 152 #define __HAL_HCD_MASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_ACKM)
emilmont 77:869cf507173a 153 #define __HAL_HCD_UNMASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_ACKM)
emilmont 77:869cf507173a 154
emilmont 77:869cf507173a 155 /**
emilmont 77:869cf507173a 156 * @}
emilmont 77:869cf507173a 157 */
emilmont 77:869cf507173a 158
emilmont 77:869cf507173a 159 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 160
emilmont 77:869cf507173a 161 /* Initialization/de-initialization functions **********************************/
emilmont 77:869cf507173a 162 HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
emilmont 77:869cf507173a 163 HAL_StatusTypeDef HAL_HCD_DeInit (HCD_HandleTypeDef *hhcd);
emilmont 77:869cf507173a 164 HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
emilmont 77:869cf507173a 165 uint8_t ch_num,
emilmont 77:869cf507173a 166 uint8_t epnum,
emilmont 77:869cf507173a 167 uint8_t dev_address,
emilmont 77:869cf507173a 168 uint8_t speed,
emilmont 77:869cf507173a 169 uint8_t ep_type,
emilmont 77:869cf507173a 170 uint16_t mps);
emilmont 77:869cf507173a 171
emilmont 77:869cf507173a 172 HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd,
emilmont 77:869cf507173a 173 uint8_t ch_num);
emilmont 77:869cf507173a 174
bogdanm 81:7d30d6019079 175 void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
bogdanm 81:7d30d6019079 176 void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
emilmont 77:869cf507173a 177
emilmont 77:869cf507173a 178 /* I/O operation functions *****************************************************/
emilmont 77:869cf507173a 179 HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
emilmont 77:869cf507173a 180 uint8_t pipe,
emilmont 77:869cf507173a 181 uint8_t direction ,
emilmont 77:869cf507173a 182 uint8_t ep_type,
emilmont 77:869cf507173a 183 uint8_t token,
emilmont 77:869cf507173a 184 uint8_t* pbuff,
emilmont 77:869cf507173a 185 uint16_t length,
emilmont 77:869cf507173a 186 uint8_t do_ping);
emilmont 77:869cf507173a 187
emilmont 77:869cf507173a 188 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 189 void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
bogdanm 81:7d30d6019079 190 void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
bogdanm 81:7d30d6019079 191 void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
bogdanm 81:7d30d6019079 192 void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
bogdanm 81:7d30d6019079 193 void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,
emilmont 77:869cf507173a 194 uint8_t chnum,
emilmont 77:869cf507173a 195 HCD_URBStateTypeDef urb_state);
emilmont 77:869cf507173a 196
emilmont 77:869cf507173a 197 /* Peripheral Control functions ************************************************/
emilmont 77:869cf507173a 198 HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
emilmont 77:869cf507173a 199 HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd);
emilmont 77:869cf507173a 200 HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
emilmont 77:869cf507173a 201
emilmont 77:869cf507173a 202 /* Peripheral State functions **************************************************/
emilmont 77:869cf507173a 203 HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd);
emilmont 77:869cf507173a 204 HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
emilmont 77:869cf507173a 205 uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
emilmont 77:869cf507173a 206 HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
emilmont 77:869cf507173a 207 uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd);
emilmont 77:869cf507173a 208 uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
emilmont 77:869cf507173a 209
emilmont 77:869cf507173a 210 /**
emilmont 77:869cf507173a 211 * @}
emilmont 77:869cf507173a 212 */
emilmont 77:869cf507173a 213
emilmont 77:869cf507173a 214 /**
emilmont 77:869cf507173a 215 * @}
emilmont 77:869cf507173a 216 */
emilmont 77:869cf507173a 217
emilmont 77:869cf507173a 218 #ifdef __cplusplus
emilmont 77:869cf507173a 219 }
emilmont 77:869cf507173a 220 #endif
emilmont 77:869cf507173a 221
emilmont 77:869cf507173a 222 #endif /* __STM32F4xx_HAL_HCD_H */
emilmont 77:869cf507173a 223
emilmont 77:869cf507173a 224 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/