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TARGET_KL43Z/system_MKL43Z4.h@90:cb3d968589d8, 2014-10-28 (annotated)

Committer:
Kojto
Date:
Tue Oct 28 16:40:41 2014 +0000
Revision:
90:cb3d968589d8
Release 90 of the mbed library



Changes:



- Freescale KSDK update (v1.0)

- K22 - new target addition

- KL43Z - new target addition

- Nucleo F091RC - new target addition

- Nucleo L152RE - STM32Cube driver

- Nordic - Softdevice v7.1.0

- Nvic files - BSD License

- LPC824 - various HAL fixes

- Nucleo F411RE - CMSIS - IAR files

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 90:cb3d968589d8 1 /*
Kojto 90:cb3d968589d8 2 ** ###################################################################
Kojto 90:cb3d968589d8 3 ** Processors: MKL43Z256VLH4
Kojto 90:cb3d968589d8 4 ** MKL43Z128VLH4
Kojto 90:cb3d968589d8 5 ** MKL43Z64VLH4
Kojto 90:cb3d968589d8 6 ** MKL43Z256VMP4
Kojto 90:cb3d968589d8 7 ** MKL43Z128VMP4
Kojto 90:cb3d968589d8 8 ** MKL43Z64VMP4
Kojto 90:cb3d968589d8 9 **
Kojto 90:cb3d968589d8 10 ** Compilers: Keil ARM C/C++ Compiler
Kojto 90:cb3d968589d8 11 ** Freescale C/C++ for Embedded ARM
Kojto 90:cb3d968589d8 12 ** GNU C Compiler
Kojto 90:cb3d968589d8 13 ** GNU C Compiler - CodeSourcery Sourcery G++
Kojto 90:cb3d968589d8 14 ** IAR ANSI C/C++ Compiler for ARM
Kojto 90:cb3d968589d8 15 **
Kojto 90:cb3d968589d8 16 ** Reference manual: KL43P64M48SF6RM, Rev.3, Aug 2014
Kojto 90:cb3d968589d8 17 ** Version: rev. 1.4, 2014-09-01
Kojto 90:cb3d968589d8 18 ** Build: b140904
Kojto 90:cb3d968589d8 19 **
Kojto 90:cb3d968589d8 20 ** Abstract:
Kojto 90:cb3d968589d8 21 ** Provides a system configuration function and a global variable that
Kojto 90:cb3d968589d8 22 ** contains the system frequency. It configures the device and initializes
Kojto 90:cb3d968589d8 23 ** the oscillator (PLL) that is part of the microcontroller device.
Kojto 90:cb3d968589d8 24 **
Kojto 90:cb3d968589d8 25 ** Copyright (c) 2014 Freescale Semiconductor, Inc.
Kojto 90:cb3d968589d8 26 ** All rights reserved.
Kojto 90:cb3d968589d8 27 **
Kojto 90:cb3d968589d8 28 ** Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 29 ** are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 30 **
Kojto 90:cb3d968589d8 31 ** o Redistributions of source code must retain the above copyright notice, this list
Kojto 90:cb3d968589d8 32 ** of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 33 **
Kojto 90:cb3d968589d8 34 ** o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 90:cb3d968589d8 35 ** list of conditions and the following disclaimer in the documentation and/or
Kojto 90:cb3d968589d8 36 ** other materials provided with the distribution.
Kojto 90:cb3d968589d8 37 **
Kojto 90:cb3d968589d8 38 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 90:cb3d968589d8 39 ** contributors may be used to endorse or promote products derived from this
Kojto 90:cb3d968589d8 40 ** software without specific prior written permission.
Kojto 90:cb3d968589d8 41 **
Kojto 90:cb3d968589d8 42 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 90:cb3d968589d8 43 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 90:cb3d968589d8 44 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 45 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 90:cb3d968589d8 46 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 90:cb3d968589d8 47 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 90:cb3d968589d8 48 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 90:cb3d968589d8 49 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 90:cb3d968589d8 50 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 90:cb3d968589d8 51 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 52 **
Kojto 90:cb3d968589d8 53 ** http: www.freescale.com
Kojto 90:cb3d968589d8 54 ** mail: support@freescale.com
Kojto 90:cb3d968589d8 55 **
Kojto 90:cb3d968589d8 56 ** Revisions:
Kojto 90:cb3d968589d8 57 ** - rev. 1.0 (2014-03-27)
Kojto 90:cb3d968589d8 58 ** Initial version.
Kojto 90:cb3d968589d8 59 ** - rev. 1.1 (2014-05-26)
Kojto 90:cb3d968589d8 60 ** I2S registers TCR2/RCR2 and others were changed.
Kojto 90:cb3d968589d8 61 ** FLEXIO register FLEXIO_VERID has now bitfields: FEATURE, MINOR, MAJOR.
Kojto 90:cb3d968589d8 62 ** Names of the bitfields of the FLEXIO_SHIFTBUF have been changed to the appropriate register name e.g.: FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS.
Kojto 90:cb3d968589d8 63 ** Peripheral_BASES macros has been changed to Peripheral_BASE_PTRS, e.g.: ADC_BASES to ADC_BASE_PTRS.
Kojto 90:cb3d968589d8 64 ** Clock configuration for high range external oscillator has been added.
Kojto 90:cb3d968589d8 65 ** RFSYS module access has been added.
Kojto 90:cb3d968589d8 66 ** - rev. 1.2 (2014-07-10)
Kojto 90:cb3d968589d8 67 ** GPIO - Renamed modules PTA,PTB,PTC,PTD,PTE to GPIOA,GPIOB,GPIOC,GPIOD,GPIOE.
Kojto 90:cb3d968589d8 68 ** UART0 - UART0 module renamed to UART2.
Kojto 90:cb3d968589d8 69 ** I2S - removed MDR register.
Kojto 90:cb3d968589d8 70 ** - rev. 1.3 (2014-08-21)
Kojto 90:cb3d968589d8 71 ** UART2 - Removed ED register.
Kojto 90:cb3d968589d8 72 ** UART2 - Removed MODEM register.
Kojto 90:cb3d968589d8 73 ** UART2 - Removed IR register.
Kojto 90:cb3d968589d8 74 ** UART2 - Removed PFIFO register.
Kojto 90:cb3d968589d8 75 ** UART2 - Removed CFIFO register.
Kojto 90:cb3d968589d8 76 ** UART2 - Removed SFIFO register.
Kojto 90:cb3d968589d8 77 ** UART2 - Removed TWFIFO register.
Kojto 90:cb3d968589d8 78 ** UART2 - Removed TCFIFO register.
Kojto 90:cb3d968589d8 79 ** UART2 - Removed RWFIFO register.
Kojto 90:cb3d968589d8 80 ** UART2 - Removed RCFIFO register.
Kojto 90:cb3d968589d8 81 ** USB - Removed bitfield REG_EN in CLK_RECOVER_IRC_EN register.
Kojto 90:cb3d968589d8 82 ** SIM - Changed bitfield value MCGIRCLK to LIRC_CLK of bitfield CLKOUTSEL in SOPT2 register.
Kojto 90:cb3d968589d8 83 ** SIM - Removed bitfield DIEID in SDID register.
Kojto 90:cb3d968589d8 84 ** - rev. 1.4 (2014-09-01)
Kojto 90:cb3d968589d8 85 ** USB - USB0_CTL0 was renamed to USB0_OTGCTL register.
Kojto 90:cb3d968589d8 86 ** USB - USB0_CTL1 was renamed to USB0_CTL register.
Kojto 90:cb3d968589d8 87 **
Kojto 90:cb3d968589d8 88 ** ###################################################################
Kojto 90:cb3d968589d8 89 */
Kojto 90:cb3d968589d8 90
Kojto 90:cb3d968589d8 91 /*!
Kojto 90:cb3d968589d8 92 * @file MKL43Z4
Kojto 90:cb3d968589d8 93 * @version 1.4
Kojto 90:cb3d968589d8 94 * @date 2014-09-01
Kojto 90:cb3d968589d8 95 * @brief Device specific configuration file for MKL43Z4 (header file)
Kojto 90:cb3d968589d8 96 *
Kojto 90:cb3d968589d8 97 * Provides a system configuration function and a global variable that contains
Kojto 90:cb3d968589d8 98 * the system frequency. It configures the device and initializes the oscillator
Kojto 90:cb3d968589d8 99 * (PLL) that is part of the microcontroller device.
Kojto 90:cb3d968589d8 100 */
Kojto 90:cb3d968589d8 101
Kojto 90:cb3d968589d8 102 #ifndef SYSTEM_MKL43Z4_H_
Kojto 90:cb3d968589d8 103 #define SYSTEM_MKL43Z4_H_ /**< Symbol preventing repeated inclusion */
Kojto 90:cb3d968589d8 104
Kojto 90:cb3d968589d8 105 #ifdef __cplusplus
Kojto 90:cb3d968589d8 106 extern "C" {
Kojto 90:cb3d968589d8 107 #endif
Kojto 90:cb3d968589d8 108
Kojto 90:cb3d968589d8 109 #include <stdint.h>
Kojto 90:cb3d968589d8 110
Kojto 90:cb3d968589d8 111
Kojto 90:cb3d968589d8 112 #ifndef DISABLE_WDOG
Kojto 90:cb3d968589d8 113 #define DISABLE_WDOG 1
Kojto 90:cb3d968589d8 114 #endif
Kojto 90:cb3d968589d8 115
Kojto 90:cb3d968589d8 116 #define ACK_ISOLATION 1
Kojto 90:cb3d968589d8 117
Kojto 90:cb3d968589d8 118 #ifndef CLOCK_SETUP
Kojto 90:cb3d968589d8 119 #define CLOCK_SETUP 1
Kojto 90:cb3d968589d8 120 #endif
Kojto 90:cb3d968589d8 121
Kojto 90:cb3d968589d8 122 /* MCG_Lite mode constants */
Kojto 90:cb3d968589d8 123
Kojto 90:cb3d968589d8 124 #define MCG_MODE_LIRC_8M 0U
Kojto 90:cb3d968589d8 125 #define MCG_MODE_HIRC 1U
Kojto 90:cb3d968589d8 126 #define MCG_MODE_LIRC_2M 2U
Kojto 90:cb3d968589d8 127 #define MCG_MODE_EXT 3U
Kojto 90:cb3d968589d8 128
Kojto 90:cb3d968589d8 129 /* Predefined clock setups
Kojto 90:cb3d968589d8 130 0 ... Multipurpose Clock Generator Lite (MCG_Lite) in Low-frequency Internal Reference Clock 8 MHz (LIRC 8 MHz) mode
Kojto 90:cb3d968589d8 131 Default part configuration.
Kojto 90:cb3d968589d8 132 Core clock/Bus clock derived from the internal clock source 8 MHz
Kojto 90:cb3d968589d8 133 Core clock = 4MHz, BusClock = 2MHz, USB FS clock derived from external clock USB_CLKIN (applicable only for derivatived with USB)
Kojto 90:cb3d968589d8 134 1 ... Multipurpose Clock Generator Lite (MCG_Lite) in High-frequency Internal Reference Clock (HIRC) mode
Kojto 90:cb3d968589d8 135 Maximum achievable clock frequency configuration using internal clock.
Kojto 90:cb3d968589d8 136 Core clock/Bus clock derived from the internal clock source 48MHz
Kojto 90:cb3d968589d8 137 Core clock = 48MHz, BusClock = 24MHz, USB FS clock derived from external clock USB_CLKIN (applicable only for derivatived with USB)
Kojto 90:cb3d968589d8 138 2 ... Multipurpose Clock Generator Lite (MCG_Lite) in External Oscillator (EXT) mode
Kojto 90:cb3d968589d8 139 Core clock/Bus clock derived directly from the external crystal 32.768kHz
Kojto 90:cb3d968589d8 140 The clock settings is ready for Very Low Power Run mode.
Kojto 90:cb3d968589d8 141 Core clock = 32.768kHz, BusClock = 32.768kHz, USB FS clock derived from external clock USB_CLKIN (applicable only for derivatived with USB)
Kojto 90:cb3d968589d8 142 3 ... Multipurpose Clock Generator Lite (MCG_Lite) in Low-frequency Internal Reference Clock 2 MHz (LIRC 2 MHz) mode
Kojto 90:cb3d968589d8 143 Core clock/Bus clock derived from the internal clock source 2 MHz
Kojto 90:cb3d968589d8 144 The clock settings is ready for Very Low Power Run mode.
Kojto 90:cb3d968589d8 145 Core clock = 2MHz, BusClock = 1MHz, USB FS clock derived from external clock USB_CLKIN (applicable only for derivatived with USB)
Kojto 90:cb3d968589d8 146 4 ... Multipurpose Clock Generator Lite (MCG_Lite) in High-frequency Internal Reference Clock (HIRC) mode
Kojto 90:cb3d968589d8 147 USB clock setup - for USB to receive internal 48MHz clock derived from HIRC.
Kojto 90:cb3d968589d8 148 Core clock/Bus clock derived from the internal clock source 48MHz
Kojto 90:cb3d968589d8 149 Core clock = 48MHz, BusClock = 24MHz, USB FS clock derived from HIRC (MCGPCLK)
Kojto 90:cb3d968589d8 150 5 ... Multipurpose Clock Generator Lite (MCG_Lite) in External Oscillator (EXT) mode
Kojto 90:cb3d968589d8 151 Core clock/Bus clock derived directly from the external crystal 8 MHz
Kojto 90:cb3d968589d8 152 Core clock = 8MHz, BusClock = 4MHz, USB FS clock derived from external clock USB_CLKIN (applicable only for derivatived with USB)
Kojto 90:cb3d968589d8 153 */
Kojto 90:cb3d968589d8 154
Kojto 90:cb3d968589d8 155 /* Define clock source values */
Kojto 90:cb3d968589d8 156
Kojto 90:cb3d968589d8 157 #define CPU_XTAL_CLK_HZ 32768u /* Value of the external crystal or oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 158 #define CPU_INT_FAST_CLK_HZ 48000000u /* Value of the fast internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 159 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 160
Kojto 90:cb3d968589d8 161 /* Low power mode enable */
Kojto 90:cb3d968589d8 162 /* SMC_PMPROT: AVLP=1,AVLLS=1 */
Kojto 90:cb3d968589d8 163 #define SMC_PMPROT_VALUE 0x22u /* SMC_PMPROT */
Kojto 90:cb3d968589d8 164
Kojto 90:cb3d968589d8 165 #if (CLOCK_SETUP == 0)
Kojto 90:cb3d968589d8 166 #define DEFAULT_SYSTEM_CLOCK 4000000u /* Default System clock value */
Kojto 90:cb3d968589d8 167 #define CPU_INT_SLOW_CLK_HZ 8000000u /* Value of the slow internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 168 #define MCG_MODE MCG_MODE_LIRC_8M /* Clock generator mode */
Kojto 90:cb3d968589d8 169 /* MCG_C1: CLKS=1,IRCLKEN=1,IREFSTEN=0 */
Kojto 90:cb3d968589d8 170 #define MCG_C1_VALUE 0x42u /* MCG_C1 */
Kojto 90:cb3d968589d8 171 /* MCG_C2: RANGE0=0,HGO0=0,EREFS0=0,IRCS=1 */
Kojto 90:cb3d968589d8 172 #define MCG_C2_VALUE 0x01u /* MCG_C2 */
Kojto 90:cb3d968589d8 173 /* MCG_SC: FCRDIV=0 */
Kojto 90:cb3d968589d8 174 #define MCG_SC_VALUE 0x00u /* MCG_SC */
Kojto 90:cb3d968589d8 175 /* MCG_MC: HIRCEN=0 LIRC_DIV2=0 */
Kojto 90:cb3d968589d8 176 #define MCG_MC_VALUE 0x00u /* MCG_MC */
Kojto 90:cb3d968589d8 177 /* OSC0_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 178 #define OSC0_CR_VALUE 0x00u /* OSC0_CR */
Kojto 90:cb3d968589d8 179 /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 180 #define SMC_PMCTRL_VALUE 0x00u /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 181 /* SIM_CLKDIV1: OUTDIV1=1,OUTDIV4=1 */
Kojto 90:cb3d968589d8 182 #define SYSTEM_SIM_CLKDIV1_VALUE 0x10010000u /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 183 /* SIM_SOPT1: OSC32KSEL=0,OSC32KOUT=0 */
Kojto 90:cb3d968589d8 184 #define SYSTEM_SIM_SOPT1_VALUE 0x00000000u /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 185 /* SIM_SOPT2: LPUART1SRC=0,LPUART0SRC=0,TPMSRC=3,FLEXIOSRC=0,USBSRC=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 186 #define SYSTEM_SIM_SOPT2_VALUE 0x03000000u /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 187 #elif (CLOCK_SETUP == 1)
Kojto 90:cb3d968589d8 188 #define DEFAULT_SYSTEM_CLOCK 48000000u /* Default System clock value */
Kojto 90:cb3d968589d8 189 #define CPU_INT_SLOW_CLK_HZ 8000000u /* Value of the slow internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 190 #define MCG_MODE MCG_MODE_HIRC /* Clock generator mode */
Kojto 90:cb3d968589d8 191 /* MCG_C1: CLKS=0,IRCLKEN=0,IREFSTEN=0 */
Kojto 90:cb3d968589d8 192 #define MCG_C1_VALUE 0x00u /* MCG_C1 */
Kojto 90:cb3d968589d8 193 /* MCG_C2: RANGE0=0,HGO0=0,EREFS0=0,IRCS=1 */
Kojto 90:cb3d968589d8 194 #define MCG_C2_VALUE 0x01u /* MCG_C2 */
Kojto 90:cb3d968589d8 195 /* MCG_SC: FCRDIV=0 */
Kojto 90:cb3d968589d8 196 #define MCG_SC_VALUE 0x00u /* MCG_SC */
Kojto 90:cb3d968589d8 197 /* MCG_MC: HIRCEN=1 LIRC_DIV2=0 */
Kojto 90:cb3d968589d8 198 #define MCG_MC_VALUE 0x80u /* MCG_MC */
Kojto 90:cb3d968589d8 199 /* OSC0_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 200 #define OSC0_CR_VALUE 0x00u /* OSC0_CR */
Kojto 90:cb3d968589d8 201 /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 202 #define SMC_PMCTRL_VALUE 0x00u /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 203 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV4=1 */
Kojto 90:cb3d968589d8 204 #define SYSTEM_SIM_CLKDIV1_VALUE 0x10000u /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 205 /* SIM_SOPT1: OSC32KSEL=0,OSC32KOUT=0 */
Kojto 90:cb3d968589d8 206 #define SYSTEM_SIM_SOPT1_VALUE 0x00000000u /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 207 /* SIM_SOPT2: LPUART1SRC=0,LPUART0SRC=0,TPMSRC=3,FLEXIOSRC=0,USBSRC=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 208 #define SYSTEM_SIM_SOPT2_VALUE 0x03000000U /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 209 #elif (CLOCK_SETUP == 2)
Kojto 90:cb3d968589d8 210 #define DEFAULT_SYSTEM_CLOCK 32768u /* Default System clock value */
Kojto 90:cb3d968589d8 211 #define CPU_INT_SLOW_CLK_HZ 8000000u /* Value of the slow internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 212 #define MCG_MODE MCG_MODE_EXT /* Clock generator mode */
Kojto 90:cb3d968589d8 213 /* MCG_C1: CLKS=2,IRCLKEN=1,IREFSTEN=0 */
Kojto 90:cb3d968589d8 214 #define MCG_C1_VALUE 0x82u /* MCG_C1 */
Kojto 90:cb3d968589d8 215 /* MCG_C2: RANGE0=0,HGO0=0,EREFS0=1,IRCS=1 */
Kojto 90:cb3d968589d8 216 #define MCG_C2_VALUE 0x05u /* MCG_C2 */
Kojto 90:cb3d968589d8 217 /* MCG_SC: FCRDIV=0 */
Kojto 90:cb3d968589d8 218 #define MCG_SC_VALUE 0x00u /* MCG_SC */
Kojto 90:cb3d968589d8 219 /* MCG_MC: HIRCEN=0 LIRC_DIV2=0 */
Kojto 90:cb3d968589d8 220 #define MCG_MC_VALUE 0x00u /* MCG_MC */
Kojto 90:cb3d968589d8 221 /* OSC0_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 222 #define OSC0_CR_VALUE 0x80u /* OSC0_CR */
Kojto 90:cb3d968589d8 223 /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 224 #define SMC_PMCTRL_VALUE 0x00u /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 225 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV4=0 */
Kojto 90:cb3d968589d8 226 #define SYSTEM_SIM_CLKDIV1_VALUE 0x00u /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 227 /* SIM_SOPT1: OSC32KSEL=0,OSC32KOUT=0 */
Kojto 90:cb3d968589d8 228 #define SYSTEM_SIM_SOPT1_VALUE 0x00000000u /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 229 /* SIM_SOPT2: LPUART1SRC=0,LPUART0SRC=0,TPMSRC=2,FLEXIOSRC=0,USBSRC=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 230 #define SYSTEM_SIM_SOPT2_VALUE 0x02000000u /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 231 #elif (CLOCK_SETUP == 3)
Kojto 90:cb3d968589d8 232 #define DEFAULT_SYSTEM_CLOCK 2000000u /* Default System clock value */
Kojto 90:cb3d968589d8 233 #define CPU_INT_SLOW_CLK_HZ 2000000u /* Value of the slow internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 234 #define MCG_MODE MCG_MODE_LIRC_2M /* Clock generator mode */
Kojto 90:cb3d968589d8 235 /* MCG_C1: CLKS=1,IRCLKEN=1,IREFSTEN=0 */
Kojto 90:cb3d968589d8 236 #define MCG_C1_VALUE 0x42u /* MCG_C1 */
Kojto 90:cb3d968589d8 237 /* MCG_C2: RANGE0=0,HGO0=0,EREFS0=0,IRCS=0 */
Kojto 90:cb3d968589d8 238 #define MCG_C2_VALUE 0x00u /* MCG_C2 */
Kojto 90:cb3d968589d8 239 /* MCG_SC: FCRDIV=0 */
Kojto 90:cb3d968589d8 240 #define MCG_SC_VALUE 0x00u /* MCG_SC */
Kojto 90:cb3d968589d8 241 /* MCG_MC: HIRCEN=0 LIRC_DIV2=0 */
Kojto 90:cb3d968589d8 242 #define MCG_MC_VALUE 0x00u /* MCG_MC */
Kojto 90:cb3d968589d8 243 /* OSC0_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 244 #define OSC0_CR_VALUE 0x00u /* OSC0_CR */
Kojto 90:cb3d968589d8 245 /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 246 #define SMC_PMCTRL_VALUE 0x00u /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 247 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV4=1 */
Kojto 90:cb3d968589d8 248 #define SYSTEM_SIM_CLKDIV1_VALUE 0x10000u /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 249 /* SIM_SOPT1: OSC32KSEL=0,OSC32KOUT=0 */
Kojto 90:cb3d968589d8 250 #define SYSTEM_SIM_SOPT1_VALUE 0x00000000u /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 251 /* SIM_SOPT2: LPUART1SRC=0,LPUART0SRC=0,TPMSRC=3,FLEXIOSRC=0,USBSRC=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 252 #define SYSTEM_SIM_SOPT2_VALUE 0x03000000u /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 253 #elif (CLOCK_SETUP == 4)
Kojto 90:cb3d968589d8 254 #define DEFAULT_SYSTEM_CLOCK 2000000u /* Default System clock value */
Kojto 90:cb3d968589d8 255 #define CPU_INT_SLOW_CLK_HZ 8000000u /* Value of the slow internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 256 #define MCG_MODE MCG_MODE_LIRC_2M /* Clock generator mode */
Kojto 90:cb3d968589d8 257 /* MCG_C1: CLKS=0,IRCLKEN=1,IREFSTEN=0 */
Kojto 90:cb3d968589d8 258 #define MCG_C1_VALUE 0x02u /* MCG_C1 */
Kojto 90:cb3d968589d8 259 /* MCG_C2: RANGE0=0,HGO0=0,EREFS0=0,IRCS=1 */
Kojto 90:cb3d968589d8 260 #define MCG_C2_VALUE 0x01u /* MCG_C2 */
Kojto 90:cb3d968589d8 261 /* MCG_SC: FCRDIV=0 */
Kojto 90:cb3d968589d8 262 #define MCG_SC_VALUE 0x00u /* MCG_SC */
Kojto 90:cb3d968589d8 263 /* MCG_MC: HIRCEN=1 LIRC_DIV2=0 */
Kojto 90:cb3d968589d8 264 #define MCG_MC_VALUE 0x80u /* MCG_MC */
Kojto 90:cb3d968589d8 265 /* OSC0_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 266 #define OSC0_CR_VALUE 0x00u /* OSC0_CR */
Kojto 90:cb3d968589d8 267 /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 268 #define SMC_PMCTRL_VALUE 0x00u /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 269 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV4=1 */
Kojto 90:cb3d968589d8 270 #define SYSTEM_SIM_CLKDIV1_VALUE 0x10000u /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 271 /* SIM_SOPT1: OSC32KSEL=0,OSC32KOUT=0 */
Kojto 90:cb3d968589d8 272 #define SYSTEM_SIM_SOPT1_VALUE 0x00000000u /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 273 /* SIM_SOPT2: LPUART1SRC=0,LPUART0SRC=0,TPMSRC=3,FLEXIOSRC=0,USBSRC=1,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 274 #define SYSTEM_SIM_SOPT2_VALUE 0x03040000u /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 275 #elif (CLOCK_SETUP == 5)
Kojto 90:cb3d968589d8 276 #define DEFAULT_SYSTEM_CLOCK 2000000u /* Default System clock value */
Kojto 90:cb3d968589d8 277 #define CPU_INT_SLOW_CLK_HZ 2000000u /* Value of the slow internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 278 #define MCG_MODE MCG_MODE_LIRC_2M /* Clock generator mode */
Kojto 90:cb3d968589d8 279 /* MCG_C1: CLKS=2,IRCLKEN=0,IREFSTEN=0 */
Kojto 90:cb3d968589d8 280 #define MCG_C1_VALUE 0x80u /* MCG_C1 */
Kojto 90:cb3d968589d8 281 /* MCG_C2: RANGE0=1,HGO0=0,EREFS0=1,IRCS=1 */
Kojto 90:cb3d968589d8 282 #define MCG_C2_VALUE 0x15u /* MCG_C2 */
Kojto 90:cb3d968589d8 283 /* MCG_SC: FCRDIV=0 */
Kojto 90:cb3d968589d8 284 #define MCG_SC_VALUE 0x00u /* MCG_SC */
Kojto 90:cb3d968589d8 285 /* MCG_MC: HIRCEN=0 LIRC_DIV2=0 */
Kojto 90:cb3d968589d8 286 #define MCG_MC_VALUE 0x00u /* MCG_MC */
Kojto 90:cb3d968589d8 287 /* OSC0_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 288 #define OSC0_CR_VALUE 0x80u /* OSC0_CR */
Kojto 90:cb3d968589d8 289 /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 290 #define SMC_PMCTRL_VALUE 0x00u /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 291 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV4=1 */
Kojto 90:cb3d968589d8 292 #define SYSTEM_SIM_CLKDIV1_VALUE 0x10000u /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 293 /* SIM_SOPT1: OSC32KSEL=0,OSC32KOUT=0 */
Kojto 90:cb3d968589d8 294 #define SYSTEM_SIM_SOPT1_VALUE 0x00000000u /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 295 /* SIM_SOPT2: LPUART1SRC=0,LPUART0SRC=0,TPMSRC=3,FLEXIOSRC=0,USBSRC=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 296 #define SYSTEM_SIM_SOPT2_VALUE 0x03000000u /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 297 #else
Kojto 90:cb3d968589d8 298 #error The selected clock setup is not supported.
Kojto 90:cb3d968589d8 299 #endif /* (CLOCK_SETUP == 5) */
Kojto 90:cb3d968589d8 300
Kojto 90:cb3d968589d8 301
Kojto 90:cb3d968589d8 302 /**
Kojto 90:cb3d968589d8 303 * @brief System clock frequency (core clock)
Kojto 90:cb3d968589d8 304 *
Kojto 90:cb3d968589d8 305 * The system clock frequency supplied to the SysTick timer and the processor
Kojto 90:cb3d968589d8 306 * core clock. This variable can be used by the user application to setup the
Kojto 90:cb3d968589d8 307 * SysTick timer or configure other parameters. It may also be used by debugger to
Kojto 90:cb3d968589d8 308 * query the frequency of the debug timer or configure the trace clock speed
Kojto 90:cb3d968589d8 309 * SystemCoreClock is initialized with a correct predefined value.
Kojto 90:cb3d968589d8 310 */
Kojto 90:cb3d968589d8 311 extern uint32_t SystemCoreClock;
Kojto 90:cb3d968589d8 312
Kojto 90:cb3d968589d8 313 /**
Kojto 90:cb3d968589d8 314 * @brief Setup the microcontroller system.
Kojto 90:cb3d968589d8 315 *
Kojto 90:cb3d968589d8 316 * Typically this function configures the oscillator (PLL) that is part of the
Kojto 90:cb3d968589d8 317 * microcontroller device. For systems with variable clock speed it also updates
Kojto 90:cb3d968589d8 318 * the variable SystemCoreClock. SystemInit is called from startup_device file.
Kojto 90:cb3d968589d8 319 */
Kojto 90:cb3d968589d8 320 void SystemInit (void);
Kojto 90:cb3d968589d8 321
Kojto 90:cb3d968589d8 322 /**
Kojto 90:cb3d968589d8 323 * @brief Updates the SystemCoreClock variable.
Kojto 90:cb3d968589d8 324 *
Kojto 90:cb3d968589d8 325 * It must be called whenever the core clock is changed during program
Kojto 90:cb3d968589d8 326 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
Kojto 90:cb3d968589d8 327 * the current core clock.
Kojto 90:cb3d968589d8 328 */
Kojto 90:cb3d968589d8 329 void SystemCoreClockUpdate (void);
Kojto 90:cb3d968589d8 330
Kojto 90:cb3d968589d8 331 #ifdef __cplusplus
Kojto 90:cb3d968589d8 332 }
Kojto 90:cb3d968589d8 333 #endif
Kojto 90:cb3d968589d8 334
Kojto 90:cb3d968589d8 335 #endif /* #if !defined(SYSTEM_MKL43Z4_H_) */