Filippo Casamassima / mbed

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TARGET_LPC2368/PeripheralNames.h@71:8fabd470bb6e, 2013-12-03 (annotated)

Committer:
bogdanm
Date:
Tue Dec 03 13:02:41 2013 +0200
Revision:
71:8fabd470bb6e
Parent:
66:9c8f0e3462fb 
Release 71 of the mbed library



Main changes:



- fix scatter file for LPC4088

- sleep/deepsleep support for KL25ZZ and LPC81x

- improved baudrate calculation for LPC targets

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 66:9c8f0e3462fb 1 /* mbed Microcontroller Library
bogdanm 66:9c8f0e3462fb 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 66:9c8f0e3462fb 3 *
bogdanm 66:9c8f0e3462fb 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 66:9c8f0e3462fb 5 * you may not use this file except in compliance with the License.
bogdanm 66:9c8f0e3462fb 6 * You may obtain a copy of the License at
bogdanm 66:9c8f0e3462fb 7 *
bogdanm 66:9c8f0e3462fb 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 66:9c8f0e3462fb 9 *
bogdanm 66:9c8f0e3462fb 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 66:9c8f0e3462fb 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 66:9c8f0e3462fb 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 66:9c8f0e3462fb 13 * See the License for the specific language governing permissions and
bogdanm 66:9c8f0e3462fb 14 * limitations under the License.
bogdanm 66:9c8f0e3462fb 15 */
bogdanm 66:9c8f0e3462fb 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 66:9c8f0e3462fb 17 #define MBED_PERIPHERALNAMES_H
bogdanm 66:9c8f0e3462fb 18
bogdanm 66:9c8f0e3462fb 19 #include "cmsis.h"
bogdanm 66:9c8f0e3462fb 20
bogdanm 66:9c8f0e3462fb 21 #ifdef __cplusplus
bogdanm 66:9c8f0e3462fb 22 extern "C" {
bogdanm 66:9c8f0e3462fb 23 #endif
bogdanm 66:9c8f0e3462fb 24
bogdanm 66:9c8f0e3462fb 25 typedef enum {
bogdanm 66:9c8f0e3462fb 26 UART_0 = (int)LPC_UART0_BASE,
bogdanm 66:9c8f0e3462fb 27 UART_1 = (int)LPC_UART1_BASE,
bogdanm 66:9c8f0e3462fb 28 UART_2 = (int)LPC_UART2_BASE,
bogdanm 66:9c8f0e3462fb 29 UART_3 = (int)LPC_UART3_BASE
bogdanm 66:9c8f0e3462fb 30 } UARTName;
bogdanm 66:9c8f0e3462fb 31
bogdanm 66:9c8f0e3462fb 32 typedef enum {
bogdanm 66:9c8f0e3462fb 33 ADC0_0 = 0,
bogdanm 66:9c8f0e3462fb 34 ADC0_1,
bogdanm 66:9c8f0e3462fb 35 ADC0_2,
bogdanm 66:9c8f0e3462fb 36 ADC0_3,
bogdanm 66:9c8f0e3462fb 37 ADC0_4,
bogdanm 66:9c8f0e3462fb 38 ADC0_5,
bogdanm 66:9c8f0e3462fb 39 ADC0_6,
bogdanm 66:9c8f0e3462fb 40 ADC0_7
bogdanm 66:9c8f0e3462fb 41 } ADCName;
bogdanm 66:9c8f0e3462fb 42
bogdanm 66:9c8f0e3462fb 43 typedef enum {
bogdanm 66:9c8f0e3462fb 44 DAC_0 = 0
bogdanm 66:9c8f0e3462fb 45 } DACName;
bogdanm 66:9c8f0e3462fb 46
bogdanm 66:9c8f0e3462fb 47 typedef enum {
bogdanm 66:9c8f0e3462fb 48 SPI_0 = (int)LPC_SSP0_BASE,
bogdanm 66:9c8f0e3462fb 49 SPI_1 = (int)LPC_SSP1_BASE
bogdanm 66:9c8f0e3462fb 50 } SPIName;
bogdanm 66:9c8f0e3462fb 51
bogdanm 66:9c8f0e3462fb 52 typedef enum {
bogdanm 66:9c8f0e3462fb 53 I2C_0 = (int)LPC_I2C0_BASE,
bogdanm 66:9c8f0e3462fb 54 I2C_1 = (int)LPC_I2C1_BASE,
bogdanm 66:9c8f0e3462fb 55 I2C_2 = (int)LPC_I2C2_BASE
bogdanm 66:9c8f0e3462fb 56 } I2CName;
bogdanm 66:9c8f0e3462fb 57
bogdanm 66:9c8f0e3462fb 58 typedef enum {
bogdanm 66:9c8f0e3462fb 59 PWM_1 = 1,
bogdanm 66:9c8f0e3462fb 60 PWM_2,
bogdanm 66:9c8f0e3462fb 61 PWM_3,
bogdanm 66:9c8f0e3462fb 62 PWM_4,
bogdanm 66:9c8f0e3462fb 63 PWM_5,
bogdanm 66:9c8f0e3462fb 64 PWM_6
bogdanm 66:9c8f0e3462fb 65 } PWMName;
bogdanm 66:9c8f0e3462fb 66
bogdanm 66:9c8f0e3462fb 67 typedef enum {
bogdanm 66:9c8f0e3462fb 68 CAN_1 = (int)LPC_CAN1_BASE,
bogdanm 66:9c8f0e3462fb 69 CAN_2 = (int)LPC_CAN2_BASE
bogdanm 66:9c8f0e3462fb 70 } CANName;
bogdanm 66:9c8f0e3462fb 71
bogdanm 66:9c8f0e3462fb 72 #define STDIO_UART_TX USBTX
bogdanm 66:9c8f0e3462fb 73 #define STDIO_UART_RX USBRX
bogdanm 66:9c8f0e3462fb 74 #define STDIO_UART UART_0
bogdanm 66:9c8f0e3462fb 75
bogdanm 71:8fabd470bb6e 76 // Default peripherals
bogdanm 71:8fabd470bb6e 77 #define MBED_SPI0 p5, p6, p7, p8
bogdanm 71:8fabd470bb6e 78 #define MBED_SPI1 p11, p12, p13, p14
bogdanm 71:8fabd470bb6e 79
bogdanm 71:8fabd470bb6e 80 #define MBED_UART0 p9, p10
bogdanm 71:8fabd470bb6e 81 #define MBED_UART1 p13, p14
bogdanm 71:8fabd470bb6e 82 #define MBED_UART2 p28, p27
bogdanm 71:8fabd470bb6e 83 #define MBED_UARTUSB USBTX, USBRX
bogdanm 71:8fabd470bb6e 84
bogdanm 71:8fabd470bb6e 85 #define MBED_I2C0 p28, p27
bogdanm 71:8fabd470bb6e 86 #define MBED_I2C1 p9, p10
bogdanm 71:8fabd470bb6e 87
bogdanm 71:8fabd470bb6e 88 #define MBED_CAN0 p30, p29
bogdanm 71:8fabd470bb6e 89
bogdanm 71:8fabd470bb6e 90 #define MBED_ANALOGOUT0 p18
bogdanm 71:8fabd470bb6e 91
bogdanm 71:8fabd470bb6e 92 #define MBED_ANALOGIN0 p15
bogdanm 71:8fabd470bb6e 93 #define MBED_ANALOGIN1 p16
bogdanm 71:8fabd470bb6e 94 #define MBED_ANALOGIN2 p17
bogdanm 71:8fabd470bb6e 95 #define MBED_ANALOGIN3 p18
bogdanm 71:8fabd470bb6e 96 #define MBED_ANALOGIN4 p19
bogdanm 71:8fabd470bb6e 97 #define MBED_ANALOGIN5 p20
bogdanm 71:8fabd470bb6e 98
bogdanm 71:8fabd470bb6e 99 #define MBED_PWMOUT0 p26
bogdanm 71:8fabd470bb6e 100 #define MBED_PWMOUT1 p25
bogdanm 71:8fabd470bb6e 101 #define MBED_PWMOUT2 p24
bogdanm 71:8fabd470bb6e 102 #define MBED_PWMOUT3 p23
bogdanm 71:8fabd470bb6e 103 #define MBED_PWMOUT4 p22
bogdanm 71:8fabd470bb6e 104 #define MBED_PWMOUT5 p21
bogdanm 71:8fabd470bb6e 105
bogdanm 66:9c8f0e3462fb 106 #ifdef __cplusplus
bogdanm 66:9c8f0e3462fb 107 }
bogdanm 66:9c8f0e3462fb 108 #endif
bogdanm 66:9c8f0e3462fb 109
bogdanm 66:9c8f0e3462fb 110 #endif