my fork

Dependents:   Nucleo_blueNRG

Fork of mbed by mbed official

Committer:
emilmont
Date:
Fri Feb 14 14:36:43 2014 +0000
Revision:
77:869cf507173a
Child:
81:7d30d6019079
Release 77 of the mbed library

Main changes:
* Add target NUCLEO_F030R8
* Add target NUCLEO_F401RE
* Add target NUCLEO_F103RB
* Add target NUCLEO_L152RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_uart.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.0.0RC2
emilmont 77:869cf507173a 6 * @date 04-February-2014
emilmont 77:869cf507173a 7 * @brief Header file of UART HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_UART_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_UART_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 47 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 48
emilmont 77:869cf507173a 49 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 50 * @{
emilmont 77:869cf507173a 51 */
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup UART
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
emilmont 77:869cf507173a 57 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /**
emilmont 77:869cf507173a 60 * @brief UART Init Structure definition
emilmont 77:869cf507173a 61 */
emilmont 77:869cf507173a 62 typedef struct
emilmont 77:869cf507173a 63 {
emilmont 77:869cf507173a 64 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
emilmont 77:869cf507173a 65 The baud rate is computed using the following formula:
emilmont 77:869cf507173a 66 - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
emilmont 77:869cf507173a 67 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
emilmont 77:869cf507173a 68 Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
emilmont 77:869cf507173a 69
emilmont 77:869cf507173a 70 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
emilmont 77:869cf507173a 71 This parameter can be a value of @ref UART_Word_Length */
emilmont 77:869cf507173a 72
emilmont 77:869cf507173a 73 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
emilmont 77:869cf507173a 74 This parameter can be a value of @ref UART_Stop_Bits */
emilmont 77:869cf507173a 75
emilmont 77:869cf507173a 76 uint32_t Parity; /*!< Specifies the parity mode.
emilmont 77:869cf507173a 77 This parameter can be a value of @ref UART_Parity
emilmont 77:869cf507173a 78 @note When parity is enabled, the computed parity is inserted
emilmont 77:869cf507173a 79 at the MSB position of the transmitted data (9th bit when
emilmont 77:869cf507173a 80 the word length is set to 9 data bits; 8th bit when the
emilmont 77:869cf507173a 81 word length is set to 8 data bits). */
emilmont 77:869cf507173a 82
emilmont 77:869cf507173a 83 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
emilmont 77:869cf507173a 84 This parameter can be a value of @ref UART_Mode */
emilmont 77:869cf507173a 85
emilmont 77:869cf507173a 86 uint32_t HwFlowCtl; /*!< Specifies wether the hardware flow control mode is enabled
emilmont 77:869cf507173a 87 or disabled.
emilmont 77:869cf507173a 88 This parameter can be a value of @ref UART_Hardware_Flow_Control */
emilmont 77:869cf507173a 89
emilmont 77:869cf507173a 90 uint32_t OverSampling; /*!< Specifies wether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
emilmont 77:869cf507173a 91 This parameter can be a value of @ref UART_Over_Sampling */
emilmont 77:869cf507173a 92 }UART_InitTypeDef;
emilmont 77:869cf507173a 93
emilmont 77:869cf507173a 94 /**
emilmont 77:869cf507173a 95 * @brief HAL UART State structures definition
emilmont 77:869cf507173a 96 */
emilmont 77:869cf507173a 97 typedef enum
emilmont 77:869cf507173a 98 {
emilmont 77:869cf507173a 99 HAL_UART_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
emilmont 77:869cf507173a 100 HAL_UART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
emilmont 77:869cf507173a 101 HAL_UART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
emilmont 77:869cf507173a 102 HAL_UART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
emilmont 77:869cf507173a 103 HAL_UART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
emilmont 77:869cf507173a 104 HAL_UART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
emilmont 77:869cf507173a 105 HAL_UART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
emilmont 77:869cf507173a 106 HAL_UART_STATE_ERROR = 0x04 /*!< Error */
emilmont 77:869cf507173a 107 }HAL_UART_StateTypeDef;
emilmont 77:869cf507173a 108
emilmont 77:869cf507173a 109 /**
emilmont 77:869cf507173a 110 * @brief HAL UART Error Code structure definition
emilmont 77:869cf507173a 111 */
emilmont 77:869cf507173a 112 typedef enum
emilmont 77:869cf507173a 113 {
emilmont 77:869cf507173a 114 HAL_UART_ERROR_NONE = 0x00, /*!< No error */
emilmont 77:869cf507173a 115 HAL_UART_ERROR_PE = 0x01, /*!< Parity error */
emilmont 77:869cf507173a 116 HAL_UART_ERROR_NE = 0x02, /*!< Noise error */
emilmont 77:869cf507173a 117 HAL_UART_ERROR_FE = 0x04, /*!< frame error */
emilmont 77:869cf507173a 118 HAL_UART_ERROR_ORE = 0x08, /*!< Overrun error */
emilmont 77:869cf507173a 119 HAL_UART_ERROR_DMA = 0x10 /*!< DMA transfer error */
emilmont 77:869cf507173a 120 }HAL_UART_ErrorTypeDef;
emilmont 77:869cf507173a 121
emilmont 77:869cf507173a 122 /**
emilmont 77:869cf507173a 123 * @brief UART handle Structure definition
emilmont 77:869cf507173a 124 */
emilmont 77:869cf507173a 125 typedef struct
emilmont 77:869cf507173a 126 {
emilmont 77:869cf507173a 127 USART_TypeDef *Instance; /* UART registers base address */
emilmont 77:869cf507173a 128
emilmont 77:869cf507173a 129 UART_InitTypeDef Init; /* UART communication parameters */
emilmont 77:869cf507173a 130
emilmont 77:869cf507173a 131 uint8_t *pTxBuffPtr; /* Pointer to UART Tx transfer Buffer */
emilmont 77:869cf507173a 132
emilmont 77:869cf507173a 133 uint16_t TxXferSize; /* UART Tx Transfer size */
emilmont 77:869cf507173a 134
emilmont 77:869cf507173a 135 uint16_t TxXferCount; /* UART Tx Transfer Counter */
emilmont 77:869cf507173a 136
emilmont 77:869cf507173a 137 uint8_t *pRxBuffPtr; /* Pointer to UART Rx transfer Buffer */
emilmont 77:869cf507173a 138
emilmont 77:869cf507173a 139 uint16_t RxXferSize; /* UART Rx Transfer size */
emilmont 77:869cf507173a 140
emilmont 77:869cf507173a 141 uint16_t RxXferCount; /* UART Rx Transfer Counter */
emilmont 77:869cf507173a 142
emilmont 77:869cf507173a 143 DMA_HandleTypeDef *hdmatx; /* UART Tx DMA Handle parameters */
emilmont 77:869cf507173a 144
emilmont 77:869cf507173a 145 DMA_HandleTypeDef *hdmarx; /* UART Rx DMA Handle parameters */
emilmont 77:869cf507173a 146
emilmont 77:869cf507173a 147 HAL_LockTypeDef Lock; /* Locking object */
emilmont 77:869cf507173a 148
emilmont 77:869cf507173a 149 __IO HAL_UART_StateTypeDef State; /* UART communication state */
emilmont 77:869cf507173a 150
emilmont 77:869cf507173a 151 __IO HAL_UART_ErrorTypeDef ErrorCode; /* UART Error code */
emilmont 77:869cf507173a 152
emilmont 77:869cf507173a 153 }UART_HandleTypeDef;
emilmont 77:869cf507173a 154
emilmont 77:869cf507173a 155 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 156 /** @defgroup UART_Exported_Constants
emilmont 77:869cf507173a 157 * @{
emilmont 77:869cf507173a 158 */
emilmont 77:869cf507173a 159
emilmont 77:869cf507173a 160 /** @defgroup UART_Word_Length
emilmont 77:869cf507173a 161 * @{
emilmont 77:869cf507173a 162 */
emilmont 77:869cf507173a 163 #define UART_WORDLENGTH_8B ((uint32_t)0x00000000)
emilmont 77:869cf507173a 164 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
emilmont 77:869cf507173a 165 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
emilmont 77:869cf507173a 166 ((LENGTH) == UART_WORDLENGTH_9B))
emilmont 77:869cf507173a 167 /**
emilmont 77:869cf507173a 168 * @}
emilmont 77:869cf507173a 169 */
emilmont 77:869cf507173a 170
emilmont 77:869cf507173a 171 /** @defgroup UART_Stop_Bits
emilmont 77:869cf507173a 172 * @{
emilmont 77:869cf507173a 173 */
emilmont 77:869cf507173a 174 #define UART_STOPBITS_1 ((uint32_t)0x00000000)
emilmont 77:869cf507173a 175 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
emilmont 77:869cf507173a 176 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
emilmont 77:869cf507173a 177 ((STOPBITS) == UART_STOPBITS_2))
emilmont 77:869cf507173a 178 /**
emilmont 77:869cf507173a 179 * @}
emilmont 77:869cf507173a 180 */
emilmont 77:869cf507173a 181
emilmont 77:869cf507173a 182 /** @defgroup UART_Parity
emilmont 77:869cf507173a 183 * @{
emilmont 77:869cf507173a 184 */
emilmont 77:869cf507173a 185 #define UART_PARITY_NONE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 186 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
emilmont 77:869cf507173a 187 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
emilmont 77:869cf507173a 188 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
emilmont 77:869cf507173a 189 ((PARITY) == UART_PARITY_EVEN) || \
emilmont 77:869cf507173a 190 ((PARITY) == UART_PARITY_ODD))
emilmont 77:869cf507173a 191 /**
emilmont 77:869cf507173a 192 * @}
emilmont 77:869cf507173a 193 */
emilmont 77:869cf507173a 194
emilmont 77:869cf507173a 195 /** @defgroup UART_Hardware_Flow_Control
emilmont 77:869cf507173a 196 * @{
emilmont 77:869cf507173a 197 */
emilmont 77:869cf507173a 198 #define UART_HWCONTROL_NONE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 199 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
emilmont 77:869cf507173a 200 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
emilmont 77:869cf507173a 201 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
emilmont 77:869cf507173a 202 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
emilmont 77:869cf507173a 203 (((CONTROL) == UART_HWCONTROL_NONE) || \
emilmont 77:869cf507173a 204 ((CONTROL) == UART_HWCONTROL_RTS) || \
emilmont 77:869cf507173a 205 ((CONTROL) == UART_HWCONTROL_CTS) || \
emilmont 77:869cf507173a 206 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
emilmont 77:869cf507173a 207 /**
emilmont 77:869cf507173a 208 * @}
emilmont 77:869cf507173a 209 */
emilmont 77:869cf507173a 210
emilmont 77:869cf507173a 211 /** @defgroup UART_Mode
emilmont 77:869cf507173a 212 * @{
emilmont 77:869cf507173a 213 */
emilmont 77:869cf507173a 214 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
emilmont 77:869cf507173a 215 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
emilmont 77:869cf507173a 216 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
emilmont 77:869cf507173a 217 #define IS_UART_MODE(MODE) ((((MODE) & (uint32_t)0x0000FFF3) == 0x00) && ((MODE) != (uint32_t)0x000000))
emilmont 77:869cf507173a 218 /**
emilmont 77:869cf507173a 219 * @}
emilmont 77:869cf507173a 220 */
emilmont 77:869cf507173a 221
emilmont 77:869cf507173a 222 /** @defgroup UART_State
emilmont 77:869cf507173a 223 * @{
emilmont 77:869cf507173a 224 */
emilmont 77:869cf507173a 225 #define UART_STATE_DISABLE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 226 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
emilmont 77:869cf507173a 227 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
emilmont 77:869cf507173a 228 ((STATE) == UART_STATE_ENABLE))
emilmont 77:869cf507173a 229 /**
emilmont 77:869cf507173a 230 * @}
emilmont 77:869cf507173a 231 */
emilmont 77:869cf507173a 232
emilmont 77:869cf507173a 233 /** @defgroup UART_Over_Sampling
emilmont 77:869cf507173a 234 * @{
emilmont 77:869cf507173a 235 */
emilmont 77:869cf507173a 236 #define UART_OVERSAMPLING_16 ((uint32_t)0x00000000)
emilmont 77:869cf507173a 237 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
emilmont 77:869cf507173a 238 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
emilmont 77:869cf507173a 239 ((SAMPLING) == UART_OVERSAMPLING_8))
emilmont 77:869cf507173a 240 /**
emilmont 77:869cf507173a 241 * @}
emilmont 77:869cf507173a 242 */
emilmont 77:869cf507173a 243
emilmont 77:869cf507173a 244 /** @defgroup UART_LIN_Break_Detection_Length
emilmont 77:869cf507173a 245 * @{
emilmont 77:869cf507173a 246 */
emilmont 77:869cf507173a 247 #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000)
emilmont 77:869cf507173a 248 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)0x00000020)
emilmont 77:869cf507173a 249 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
emilmont 77:869cf507173a 250 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
emilmont 77:869cf507173a 251 /**
emilmont 77:869cf507173a 252 * @}
emilmont 77:869cf507173a 253 */
emilmont 77:869cf507173a 254
emilmont 77:869cf507173a 255 /** @defgroup UART_WakeUp_functions
emilmont 77:869cf507173a 256 * @{
emilmont 77:869cf507173a 257 */
emilmont 77:869cf507173a 258 #define UART_WAKEUPMETHODE_IDLELINE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 259 #define UART_WAKEUPMETHODE_ADDRESSMARK ((uint32_t)0x00000800)
emilmont 77:869cf507173a 260 #define IS_UART_WAKEUPMETHODE(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHODE_IDLELINE) || \
emilmont 77:869cf507173a 261 ((WAKEUP) == UART_WAKEUPMETHODE_ADDRESSMARK))
emilmont 77:869cf507173a 262 /**
emilmont 77:869cf507173a 263 * @}
emilmont 77:869cf507173a 264 */
emilmont 77:869cf507173a 265
emilmont 77:869cf507173a 266 /** @defgroup UART_Flags
emilmont 77:869cf507173a 267 * Elements values convention: 0xXXXX
emilmont 77:869cf507173a 268 * - 0xXXXX : Flag mask in the SR register
emilmont 77:869cf507173a 269 * @{
emilmont 77:869cf507173a 270 */
emilmont 77:869cf507173a 271 #define UART_FLAG_CTS ((uint32_t)0x00000200)
emilmont 77:869cf507173a 272 #define UART_FLAG_LBD ((uint32_t)0x00000100)
emilmont 77:869cf507173a 273 #define UART_FLAG_TXE ((uint32_t)0x00000080)
emilmont 77:869cf507173a 274 #define UART_FLAG_TC ((uint32_t)0x00000040)
emilmont 77:869cf507173a 275 #define UART_FLAG_RXNE ((uint32_t)0x00000020)
emilmont 77:869cf507173a 276 #define UART_FLAG_IDLE ((uint32_t)0x00000010)
emilmont 77:869cf507173a 277 #define UART_FLAG_ORE ((uint32_t)0x00000008)
emilmont 77:869cf507173a 278 #define UART_FLAG_NE ((uint32_t)0x00000004)
emilmont 77:869cf507173a 279 #define UART_FLAG_FE ((uint32_t)0x00000002)
emilmont 77:869cf507173a 280 #define UART_FLAG_PE ((uint32_t)0x00000001)
emilmont 77:869cf507173a 281 /**
emilmont 77:869cf507173a 282 * @}
emilmont 77:869cf507173a 283 */
emilmont 77:869cf507173a 284
emilmont 77:869cf507173a 285 /** @defgroup UART_Interrupt_definition
emilmont 77:869cf507173a 286 * Elements values convention: 0xY000XXXX
emilmont 77:869cf507173a 287 * - XXXX : Interrupt mask in the XX register
emilmont 77:869cf507173a 288 * - Y : Interrupt source register (2bits)
emilmont 77:869cf507173a 289 * - 01: CR1 register
emilmont 77:869cf507173a 290 * - 10: CR2 register
emilmont 77:869cf507173a 291 * - 11: CR3 register
emilmont 77:869cf507173a 292 *
emilmont 77:869cf507173a 293 * @{
emilmont 77:869cf507173a 294 */
emilmont 77:869cf507173a 295 #define UART_IT_PE ((uint32_t)0x10000100)
emilmont 77:869cf507173a 296 #define UART_IT_TXE ((uint32_t)0x10000080)
emilmont 77:869cf507173a 297 #define UART_IT_TC ((uint32_t)0x10000040)
emilmont 77:869cf507173a 298 #define UART_IT_RXNE ((uint32_t)0x10000020)
emilmont 77:869cf507173a 299 #define UART_IT_IDLE ((uint32_t)0x10000010)
emilmont 77:869cf507173a 300
emilmont 77:869cf507173a 301 #define UART_IT_LBD ((uint32_t)0x20000040)
emilmont 77:869cf507173a 302 #define UART_IT_CTS ((uint32_t)0x30000400)
emilmont 77:869cf507173a 303
emilmont 77:869cf507173a 304 #define UART_IT_ERR ((uint32_t)0x30000001)
emilmont 77:869cf507173a 305
emilmont 77:869cf507173a 306 /**
emilmont 77:869cf507173a 307 * @}
emilmont 77:869cf507173a 308 */
emilmont 77:869cf507173a 309
emilmont 77:869cf507173a 310 /**
emilmont 77:869cf507173a 311 * @}
emilmont 77:869cf507173a 312 */
emilmont 77:869cf507173a 313
emilmont 77:869cf507173a 314 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 315
emilmont 77:869cf507173a 316 /** @brief Checks whether the specified UART flag is set or not.
emilmont 77:869cf507173a 317 * @param __HANDLE__: specifies the UART Handle.
emilmont 77:869cf507173a 318 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
emilmont 77:869cf507173a 319 * UART peripheral.
emilmont 77:869cf507173a 320 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 321 * This parameter can be one of the following values:
emilmont 77:869cf507173a 322 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
emilmont 77:869cf507173a 323 * @arg UART_FLAG_LBD: LIN Break detection flag
emilmont 77:869cf507173a 324 * @arg UART_FLAG_TXE: Transmit data register empty flag
emilmont 77:869cf507173a 325 * @arg UART_FLAG_TC: Transmission Complete flag
emilmont 77:869cf507173a 326 * @arg UART_FLAG_RXNE: Receive data register not empty flag
emilmont 77:869cf507173a 327 * @arg UART_FLAG_IDLE: Idle Line detection flag
emilmont 77:869cf507173a 328 * @arg UART_FLAG_ORE: OverRun Error flag
emilmont 77:869cf507173a 329 * @arg UART_FLAG_NE: Noise Error flag
emilmont 77:869cf507173a 330 * @arg UART_FLAG_FE: Framing Error flag
emilmont 77:869cf507173a 331 * @arg UART_FLAG_PE: Parity Error flag
emilmont 77:869cf507173a 332 * @retval The new state of __FLAG__ (TRUE or FALSE).
emilmont 77:869cf507173a 333 */
emilmont 77:869cf507173a 334
emilmont 77:869cf507173a 335 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
emilmont 77:869cf507173a 336
emilmont 77:869cf507173a 337 /** @brief Clears the specified UART pending flag.
emilmont 77:869cf507173a 338 * @param __HANDLE__: specifies the UART Handle.
emilmont 77:869cf507173a 339 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
emilmont 77:869cf507173a 340 * UART peripheral.
emilmont 77:869cf507173a 341 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 342 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 343 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
emilmont 77:869cf507173a 344 * @arg UART_FLAG_LBD: LIN Break detection flag.
emilmont 77:869cf507173a 345 * @arg UART_FLAG_TC: Transmission Complete flag.
emilmont 77:869cf507173a 346 * @arg UART_FLAG_RXNE: Receive data register not empty flag.
emilmont 77:869cf507173a 347 *
emilmont 77:869cf507173a 348 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
emilmont 77:869cf507173a 349 * error) and IDLE (Idle line detected) flags are cleared by software
emilmont 77:869cf507173a 350 * sequence: a read operation to USART_SR register followed by a read
emilmont 77:869cf507173a 351 * operation to USART_DR register.
emilmont 77:869cf507173a 352 * @note RXNE flag can be also cleared by a read to the USART_DR register.
emilmont 77:869cf507173a 353 * @note TC flag can be also cleared by software sequence: a read operation to
emilmont 77:869cf507173a 354 * USART_SR register followed by a write operation to USART_DR register.
emilmont 77:869cf507173a 355 * @note TXE flag is cleared only by a write to the USART_DR register.
emilmont 77:869cf507173a 356 *
emilmont 77:869cf507173a 357 * @retval None
emilmont 77:869cf507173a 358 */
emilmont 77:869cf507173a 359 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__))
emilmont 77:869cf507173a 360
emilmont 77:869cf507173a 361 /** @brief Enables or disables the specified UART interrupt.
emilmont 77:869cf507173a 362 * @param __HANDLE__: specifies the UART Handle.
emilmont 77:869cf507173a 363 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
emilmont 77:869cf507173a 364 * UART peripheral.
emilmont 77:869cf507173a 365 * @param __INTERRUPT__: specifies the UART interrupt source to check.
emilmont 77:869cf507173a 366 * This parameter can be one of the following values:
emilmont 77:869cf507173a 367 * @arg UART_IT_CTS: CTS change interrupt
emilmont 77:869cf507173a 368 * @arg UART_IT_LBD: LIN Break detection interrupt
emilmont 77:869cf507173a 369 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
emilmont 77:869cf507173a 370 * @arg UART_IT_TC: Transmission complete interrupt
emilmont 77:869cf507173a 371 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
emilmont 77:869cf507173a 372 * @arg UART_IT_IDLE: Idle line detection interrupt
emilmont 77:869cf507173a 373 * @arg UART_IT_PE: Parity Error interrupt
emilmont 77:869cf507173a 374 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
emilmont 77:869cf507173a 375 * @param NewState: new state of the specified UART interrupt.
emilmont 77:869cf507173a 376 * This parameter can be: ENABLE or DISABLE.
emilmont 77:869cf507173a 377 * @retval None
emilmont 77:869cf507173a 378 */
emilmont 77:869cf507173a 379 #define UART_IT_MASK ((uint32_t)0x0000FFFF)
emilmont 77:869cf507173a 380 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
emilmont 77:869cf507173a 381 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
emilmont 77:869cf507173a 382 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
emilmont 77:869cf507173a 383 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
emilmont 77:869cf507173a 384 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
emilmont 77:869cf507173a 385 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
emilmont 77:869cf507173a 386
emilmont 77:869cf507173a 387 /** @brief Checks whether the specified UART interrupt has occurred or not.
emilmont 77:869cf507173a 388 * @param __HANDLE__: specifies the UART Handle.
emilmont 77:869cf507173a 389 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
emilmont 77:869cf507173a 390 * UART peripheral.
emilmont 77:869cf507173a 391 * @param __IT__: specifies the UART interrupt source to check.
emilmont 77:869cf507173a 392 * This parameter can be one of the following values:
emilmont 77:869cf507173a 393 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
emilmont 77:869cf507173a 394 * @arg UART_IT_LBD: LIN Break detection interrupt
emilmont 77:869cf507173a 395 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
emilmont 77:869cf507173a 396 * @arg UART_IT_TC: Transmission complete interrupt
emilmont 77:869cf507173a 397 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
emilmont 77:869cf507173a 398 * @arg UART_IT_IDLE: Idle line detection interrupt
emilmont 77:869cf507173a 399 * @arg USART_IT_ERR: Error interrupt
emilmont 77:869cf507173a 400 * @retval The new state of __IT__ (TRUE or FALSE).
emilmont 77:869cf507173a 401 */
emilmont 77:869cf507173a 402 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == 1)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == 2)? \
emilmont 77:869cf507173a 403 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
emilmont 77:869cf507173a 404
emilmont 77:869cf507173a 405 /** @brief macros to enables or disables the UART's one bit sampling method
emilmont 77:869cf507173a 406 * @param __HANDLE__: specifies the UART Handle.
emilmont 77:869cf507173a 407 * @retval None
emilmont 77:869cf507173a 408 */
emilmont 77:869cf507173a 409 #define __HAL_UART_ONEBIT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
emilmont 77:869cf507173a 410 #define __HAL_UART_ONEBIT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
emilmont 77:869cf507173a 411
emilmont 77:869cf507173a 412 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
emilmont 77:869cf507173a 413 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
emilmont 77:869cf507173a 414
emilmont 77:869cf507173a 415 #define __DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_)))
emilmont 77:869cf507173a 416 #define __DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (__DIV_SAMPLING16((_PCLK_), (_BAUD_))/100)
emilmont 77:869cf507173a 417 #define __DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((__DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (__DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
emilmont 77:869cf507173a 418 #define __UART_BRR_SAMPLING16(_PCLK_, _BAUD_) ((__DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0F))
emilmont 77:869cf507173a 419
emilmont 77:869cf507173a 420 #define __DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25)/(2*(_BAUD_)))
emilmont 77:869cf507173a 421 #define __DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (__DIV_SAMPLING8((_PCLK_), (_BAUD_))/100)
emilmont 77:869cf507173a 422 #define __DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((__DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (__DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
emilmont 77:869cf507173a 423 #define __UART_BRR_SAMPLING8(_PCLK_, _BAUD_) ((__DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x0F))
emilmont 77:869cf507173a 424
emilmont 77:869cf507173a 425 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001)
emilmont 77:869cf507173a 426 #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
emilmont 77:869cf507173a 427
emilmont 77:869cf507173a 428 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 429 /* Initialization/de-initialization functions **********************************/
emilmont 77:869cf507173a 430 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 431 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 432 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
emilmont 77:869cf507173a 433 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethode);
emilmont 77:869cf507173a 434 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 435 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 436 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 437
emilmont 77:869cf507173a 438 /* IO operation functions *******************************************************/
emilmont 77:869cf507173a 439 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
emilmont 77:869cf507173a 440 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
emilmont 77:869cf507173a 441 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
emilmont 77:869cf507173a 442 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
emilmont 77:869cf507173a 443 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
emilmont 77:869cf507173a 444 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
emilmont 77:869cf507173a 445 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 446 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 447 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 448 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 449 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 450 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 451 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 452 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 453 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 454
emilmont 77:869cf507173a 455 /* Peripheral Control functions ************************************************/
emilmont 77:869cf507173a 456 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 457 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 458 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 459 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 460 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 461
emilmont 77:869cf507173a 462 /* Peripheral State functions **************************************************/
emilmont 77:869cf507173a 463 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 464 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
emilmont 77:869cf507173a 465
emilmont 77:869cf507173a 466 /**
emilmont 77:869cf507173a 467 * @}
emilmont 77:869cf507173a 468 */
emilmont 77:869cf507173a 469
emilmont 77:869cf507173a 470 /**
emilmont 77:869cf507173a 471 * @}
emilmont 77:869cf507173a 472 */
emilmont 77:869cf507173a 473
emilmont 77:869cf507173a 474 #ifdef __cplusplus
emilmont 77:869cf507173a 475 }
emilmont 77:869cf507173a 476 #endif
emilmont 77:869cf507173a 477
emilmont 77:869cf507173a 478 #endif /* __STM32F4xx_HAL_UART_H */
emilmont 77:869cf507173a 479
emilmont 77:869cf507173a 480 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/