my fork

Dependents:   Nucleo_blueNRG

Fork of mbed by mbed official

Committer:
bogdanm
Date:
Wed Mar 19 18:28:32 2014 +0000
Revision:
81:7d30d6019079
Parent:
77:869cf507173a
Child:
85:024bf7f99721
Release 81 of the mbed library

Main changes:

- Updates and fixes for many targets
- LPC1768: serial interface code fixes
- nRF51822 targets now output a .hex file
- More exporters
- More flexible GPIO API

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_sai.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
bogdanm 81:7d30d6019079 5 * @version V1.0.0
bogdanm 81:7d30d6019079 6 * @date 18-February-2014
emilmont 77:869cf507173a 7 * @brief Header file of SAI HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_SAI_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_SAI_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
emilmont 77:869cf507173a 47
emilmont 77:869cf507173a 48 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 49 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 50
emilmont 77:869cf507173a 51 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 52 * @{
emilmont 77:869cf507173a 53 */
emilmont 77:869cf507173a 54
emilmont 77:869cf507173a 55 /** @addtogroup SAI
emilmont 77:869cf507173a 56 * @{
emilmont 77:869cf507173a 57 */
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 60
emilmont 77:869cf507173a 61 /**
emilmont 77:869cf507173a 62 * @brief SAI Init Structure definition
emilmont 77:869cf507173a 63 */
emilmont 77:869cf507173a 64 typedef struct
emilmont 77:869cf507173a 65 {
emilmont 77:869cf507173a 66 uint32_t Protocol; /*!< Specifies the SAI Block protocol.
emilmont 77:869cf507173a 67 This parameter can be a value of @ref SAI_Block_Protocol */
emilmont 77:869cf507173a 68
emilmont 77:869cf507173a 69 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode.
emilmont 77:869cf507173a 70 This parameter can be a value of @ref SAI_Block_Mode */
emilmont 77:869cf507173a 71
emilmont 77:869cf507173a 72 uint32_t DataSize; /*!< Specifies the SAI Block data size.
emilmont 77:869cf507173a 73 This parameter can be a value of @ref SAI_Block_Data_Size */
emilmont 77:869cf507173a 74
emilmont 77:869cf507173a 75 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
emilmont 77:869cf507173a 76 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */
emilmont 77:869cf507173a 77
emilmont 77:869cf507173a 78 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity.
emilmont 77:869cf507173a 79 This parameter can be a value of @ref SAI_Block_Clock_Strobing */
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 uint32_t Synchro; /*!< Specifies SAI Block synchronization
emilmont 77:869cf507173a 82 This parameter can be a value of @ref SAI_Block_Synchronization */
emilmont 77:869cf507173a 83
emilmont 77:869cf507173a 84 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven.
emilmont 77:869cf507173a 85 This parameter can be a value of @ref SAI_Block_Output_Drive
emilmont 77:869cf507173a 86 @note this value has to be set before enabling the audio block
emilmont 77:869cf507173a 87 but after the audio block configuration. */
emilmont 77:869cf507173a 88
emilmont 77:869cf507173a 89 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not.
emilmont 77:869cf507173a 90 This parameter can be a value of @ref SAI_Block_NoDivider
emilmont 77:869cf507173a 91 @note: If bit NODIV in the SAI_xCR1 register is cleared, the frame length
emilmont 77:869cf507173a 92 should be aligned to a number equal to a power of 2, from 8 to 256.
emilmont 77:869cf507173a 93 If bit NODIV in the SAI_xCR1 register is set, the frame length can
emilmont 77:869cf507173a 94 take any of the values without constraint since the input clock of
emilmont 77:869cf507173a 95 the audio block should be equal to the bit clock.
emilmont 77:869cf507173a 96 There is no MCLK_x clock which can be output. */
emilmont 77:869cf507173a 97
emilmont 77:869cf507173a 98 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold.
emilmont 77:869cf507173a 99 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */
emilmont 77:869cf507173a 100
emilmont 77:869cf507173a 101 uint32_t ClockSource; /*!< Specifies the SAI Block x Clock source.
emilmont 77:869cf507173a 102 This parameter can be a value of @ref SAI_Clock_Source
emilmont 77:869cf507173a 103 @note: If ClockSource is equal to SAI_CLKSource_Ext, the PLLI2S
emilmont 77:869cf507173a 104 and PLLSAI divisions factors will be ignored. */
emilmont 77:869cf507173a 105
emilmont 77:869cf507173a 106 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling.
emilmont 77:869cf507173a 107 This parameter can be a value of @ref SAI_Audio_Frequency */
emilmont 77:869cf507173a 108
emilmont 77:869cf507173a 109 }SAI_InitTypeDef;
emilmont 77:869cf507173a 110
emilmont 77:869cf507173a 111 /**
emilmont 77:869cf507173a 112 * @brief SAI Block Frame Init structure definition
emilmont 77:869cf507173a 113 */
emilmont 77:869cf507173a 114
emilmont 77:869cf507173a 115 typedef struct
emilmont 77:869cf507173a 116 {
emilmont 77:869cf507173a 117
emilmont 77:869cf507173a 118 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame.
emilmont 77:869cf507173a 119 This parameter must be a number between Min_Data = 8 and Max_Data = 256.
emilmont 77:869cf507173a 120 @note: If master clock MCLK_x pin is declared as an output, the frame length
emilmont 77:869cf507173a 121 should be aligned to a number equal to power of 2 in order to keep
emilmont 77:869cf507173a 122 in an audio frame, an integer number of MCLK pulses by bit Clock. */
emilmont 77:869cf507173a 123
emilmont 77:869cf507173a 124 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length.
emilmont 77:869cf507173a 125 This Parameter specifies the length in number of bit clock (SCK + 1)
emilmont 77:869cf507173a 126 of the active level of FS signal in audio frame.
emilmont 77:869cf507173a 127 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */
emilmont 77:869cf507173a 128
emilmont 77:869cf507173a 129 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition.
emilmont 77:869cf507173a 130 This parameter can be a value of @ref SAI_Block_FS_Definition */
emilmont 77:869cf507173a 131
emilmont 77:869cf507173a 132 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity.
emilmont 77:869cf507173a 133 This parameter can be a value of @ref SAI_Block_FS_Polarity */
emilmont 77:869cf507173a 134
emilmont 77:869cf507173a 135 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset.
emilmont 77:869cf507173a 136 This parameter can be a value of @ref SAI_Block_FS_Offset */
emilmont 77:869cf507173a 137
emilmont 77:869cf507173a 138 }SAI_FrameInitTypeDef;
emilmont 77:869cf507173a 139
emilmont 77:869cf507173a 140 /**
emilmont 77:869cf507173a 141 * @brief SAI Block Slot Init Structure definition
emilmont 77:869cf507173a 142 */
emilmont 77:869cf507173a 143
emilmont 77:869cf507173a 144 typedef struct
emilmont 77:869cf507173a 145 {
emilmont 77:869cf507173a 146 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot.
emilmont 77:869cf507173a 147 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */
emilmont 77:869cf507173a 148
emilmont 77:869cf507173a 149 uint32_t SlotSize; /*!< Specifies the Slot Size.
emilmont 77:869cf507173a 150 This parameter can be a value of @ref SAI_Block_Slot_Size */
emilmont 77:869cf507173a 151
emilmont 77:869cf507173a 152 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame.
emilmont 77:869cf507173a 153 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */
emilmont 77:869cf507173a 154
emilmont 77:869cf507173a 155 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated.
emilmont 77:869cf507173a 156 This parameter can be a value of @ref SAI_Block_Slot_Active */
emilmont 77:869cf507173a 157 }SAI_SlotInitTypeDef;
emilmont 77:869cf507173a 158
emilmont 77:869cf507173a 159 /**
emilmont 77:869cf507173a 160 * @brief HAL State structures definition
emilmont 77:869cf507173a 161 */
emilmont 77:869cf507173a 162 typedef enum
emilmont 77:869cf507173a 163 {
emilmont 77:869cf507173a 164 HAL_SAI_STATE_RESET = 0x00, /*!< SAI not yet initialized or disabled */
emilmont 77:869cf507173a 165 HAL_SAI_STATE_READY = 0x01, /*!< SAI initialized and ready for use */
emilmont 77:869cf507173a 166 HAL_SAI_STATE_BUSY = 0x02, /*!< SAI internal process is ongoing */
emilmont 77:869cf507173a 167 HAL_SAI_STATE_BUSY_TX = 0x12, /*!< Data transmission process is ongoing */
emilmont 77:869cf507173a 168 HAL_SAI_STATE_BUSY_RX = 0x22, /*!< Data reception process is ongoing */
emilmont 77:869cf507173a 169 HAL_SAI_STATE_TIMEOUT = 0x03, /*!< SAI timeout state */
emilmont 77:869cf507173a 170 HAL_SAI_STATE_ERROR = 0x04 /*!< SAI error state */
emilmont 77:869cf507173a 171
emilmont 77:869cf507173a 172 }HAL_SAI_StateTypeDef;
emilmont 77:869cf507173a 173
emilmont 77:869cf507173a 174 /**
emilmont 77:869cf507173a 175 * @brief SAI handle Structure definition
emilmont 77:869cf507173a 176 */
emilmont 77:869cf507173a 177 typedef struct
emilmont 77:869cf507173a 178 {
emilmont 77:869cf507173a 179 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */
emilmont 77:869cf507173a 180
emilmont 77:869cf507173a 181 SAI_InitTypeDef Init; /*!< SAI communication parameters */
emilmont 77:869cf507173a 182
emilmont 77:869cf507173a 183 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */
emilmont 77:869cf507173a 184
emilmont 77:869cf507173a 185 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */
emilmont 77:869cf507173a 186
emilmont 77:869cf507173a 187 uint16_t *pTxBuffPtr; /*!< Pointer to SAI Tx transfer Buffer */
emilmont 77:869cf507173a 188
emilmont 77:869cf507173a 189 uint16_t TxXferSize; /*!< SAI Tx transfer size */
emilmont 77:869cf507173a 190
emilmont 77:869cf507173a 191 uint16_t TxXferCount; /*!< SAI Tx transfer counter */
emilmont 77:869cf507173a 192
emilmont 77:869cf507173a 193 uint16_t *pRxBuffPtr; /*!< Pointer to SAI Rx transfer buffer */
emilmont 77:869cf507173a 194
emilmont 77:869cf507173a 195 uint16_t RxXferSize; /*!< SAI Rx transfer size */
emilmont 77:869cf507173a 196
emilmont 77:869cf507173a 197 uint16_t RxXferCount; /*!< SAI Rx transfer counter */
emilmont 77:869cf507173a 198
emilmont 77:869cf507173a 199 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */
emilmont 77:869cf507173a 200
emilmont 77:869cf507173a 201 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */
emilmont 77:869cf507173a 202
emilmont 77:869cf507173a 203 HAL_LockTypeDef Lock; /*!< SAI locking object */
emilmont 77:869cf507173a 204
emilmont 77:869cf507173a 205 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */
emilmont 77:869cf507173a 206
emilmont 77:869cf507173a 207 __IO uint32_t ErrorCode; /*!< SAI Error code */
emilmont 77:869cf507173a 208
emilmont 77:869cf507173a 209 }SAI_HandleTypeDef;
emilmont 77:869cf507173a 210
emilmont 77:869cf507173a 211 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 212
emilmont 77:869cf507173a 213 /** @defgroup SAI_Exported_Constants
emilmont 77:869cf507173a 214 * @{
emilmont 77:869cf507173a 215 */
emilmont 77:869cf507173a 216 /** @defgroup SAI Error Code
emilmont 77:869cf507173a 217 * @{
emilmont 77:869cf507173a 218 */
emilmont 77:869cf507173a 219 #define HAL_SAI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
emilmont 77:869cf507173a 220 #define HAL_SAI_ERROR_OVR ((uint32_t)0x00000001) /*!< Overrun Error */
emilmont 77:869cf507173a 221 #define HAL_SAI_ERROR_UDR ((uint32_t)0x00000002) /*!< Underrun error */
emilmont 77:869cf507173a 222 #define HAL_SAI_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
emilmont 77:869cf507173a 223 /**
emilmont 77:869cf507173a 224 * @}
emilmont 77:869cf507173a 225 */
emilmont 77:869cf507173a 226
emilmont 77:869cf507173a 227 /** @defgroup SAI_Clock_Source
emilmont 77:869cf507173a 228 * @{
emilmont 77:869cf507173a 229 */
emilmont 77:869cf507173a 230 #define SAI_CLKSOURCE_PLLSAI ((uint32_t)RCC_SAIACLKSOURCE_PLLSAI)
emilmont 77:869cf507173a 231 #define SAI_CLKSOURCE_PLLI2S ((uint32_t)RCC_SAIACLKSOURCE_PLLI2S)
emilmont 77:869cf507173a 232 #define SAI_CLKSOURCE_EXT ((uint32_t)RCC_SAIACLKSOURCE_EXT)
emilmont 77:869cf507173a 233
emilmont 77:869cf507173a 234 #define IS_SAI_CLK_SOURCE(SOURCE) (((SOURCE) == SAI_CLKSOURCE_PLLSAI) ||\
emilmont 77:869cf507173a 235 ((SOURCE) == SAI_CLKSOURCE_PLLI2S) ||\
emilmont 77:869cf507173a 236 ((SOURCE) == SAI_CLKSOURCE_EXT))
emilmont 77:869cf507173a 237 /**
emilmont 77:869cf507173a 238 * @}
emilmont 77:869cf507173a 239 */
emilmont 77:869cf507173a 240
emilmont 77:869cf507173a 241 /** @defgroup SAI_Audio_Frequency
emilmont 77:869cf507173a 242 * @{
emilmont 77:869cf507173a 243 */
emilmont 77:869cf507173a 244 #define SAI_AUDIO_FREQUENCY_192K ((uint32_t)192000)
emilmont 77:869cf507173a 245 #define SAI_AUDIO_FREQUENCY_96K ((uint32_t)96000)
emilmont 77:869cf507173a 246 #define SAI_AUDIO_FREQUENCY_48K ((uint32_t)48000)
emilmont 77:869cf507173a 247 #define SAI_AUDIO_FREQUENCY_44K ((uint32_t)44100)
emilmont 77:869cf507173a 248 #define SAI_AUDIO_FREQUENCY_32K ((uint32_t)32000)
emilmont 77:869cf507173a 249 #define SAI_AUDIO_FREQUENCY_22K ((uint32_t)22050)
emilmont 77:869cf507173a 250 #define SAI_AUDIO_FREQUENCY_16K ((uint32_t)16000)
emilmont 77:869cf507173a 251 #define SAI_AUDIO_FREQUENCY_11K ((uint32_t)11025)
emilmont 77:869cf507173a 252 #define SAI_AUDIO_FREQUENCY_8K ((uint32_t)8000)
emilmont 77:869cf507173a 253
emilmont 77:869cf507173a 254 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \
emilmont 77:869cf507173a 255 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \
emilmont 77:869cf507173a 256 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \
emilmont 77:869cf507173a 257 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \
emilmont 77:869cf507173a 258 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K))
emilmont 77:869cf507173a 259 /**
emilmont 77:869cf507173a 260 * @}
emilmont 77:869cf507173a 261 */
emilmont 77:869cf507173a 262
emilmont 77:869cf507173a 263 /** @defgroup SAI_Block_Mode
emilmont 77:869cf507173a 264 * @{
emilmont 77:869cf507173a 265 */
emilmont 77:869cf507173a 266 #define SAI_MODEMASTER_TX ((uint32_t)0x00000000)
emilmont 77:869cf507173a 267 #define SAI_MODEMASTER_RX ((uint32_t)0x00000001)
emilmont 77:869cf507173a 268 #define SAI_MODESLAVE_TX ((uint32_t)0x00000002)
emilmont 77:869cf507173a 269 #define SAI_MODESLAVE_RX ((uint32_t)0x00000003)
emilmont 77:869cf507173a 270 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \
emilmont 77:869cf507173a 271 ((MODE) == SAI_MODEMASTER_RX) || \
emilmont 77:869cf507173a 272 ((MODE) == SAI_MODESLAVE_TX) || \
emilmont 77:869cf507173a 273 ((MODE) == SAI_MODESLAVE_RX))
emilmont 77:869cf507173a 274 /**
emilmont 77:869cf507173a 275 * @}
emilmont 77:869cf507173a 276 */
emilmont 77:869cf507173a 277
emilmont 77:869cf507173a 278 /** @defgroup SAI_Block_Protocol
emilmont 77:869cf507173a 279 * @{
emilmont 77:869cf507173a 280 */
emilmont 77:869cf507173a 281
emilmont 77:869cf507173a 282 #define SAI_FREE_PROTOCOL ((uint32_t)0x00000000)
emilmont 77:869cf507173a 283 #define SAI_AC97_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_1)
emilmont 77:869cf507173a 284
emilmont 77:869cf507173a 285 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \
emilmont 77:869cf507173a 286 ((PROTOCOL) == SAI_AC97_PROTOCOL))
emilmont 77:869cf507173a 287 /**
emilmont 77:869cf507173a 288 * @}
emilmont 77:869cf507173a 289 */
emilmont 77:869cf507173a 290
emilmont 77:869cf507173a 291 /** @defgroup SAI_Block_Data_Size
emilmont 77:869cf507173a 292 * @{
emilmont 77:869cf507173a 293 */
emilmont 77:869cf507173a 294 #define SAI_DATASIZE_8 ((uint32_t)0x00000040)
emilmont 77:869cf507173a 295 #define SAI_DATASIZE_10 ((uint32_t)0x00000060)
emilmont 77:869cf507173a 296 #define SAI_DATASIZE_16 ((uint32_t)0x00000080)
emilmont 77:869cf507173a 297 #define SAI_DATASIZE_20 ((uint32_t)0x000000A0)
emilmont 77:869cf507173a 298 #define SAI_DATASIZE_24 ((uint32_t)0x000000C0)
emilmont 77:869cf507173a 299 #define SAI_DATASIZE_32 ((uint32_t)0x000000E0)
emilmont 77:869cf507173a 300
emilmont 77:869cf507173a 301 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \
emilmont 77:869cf507173a 302 ((DATASIZE) == SAI_DATASIZE_10) || \
emilmont 77:869cf507173a 303 ((DATASIZE) == SAI_DATASIZE_16) || \
emilmont 77:869cf507173a 304 ((DATASIZE) == SAI_DATASIZE_20) || \
emilmont 77:869cf507173a 305 ((DATASIZE) == SAI_DATASIZE_24) || \
emilmont 77:869cf507173a 306 ((DATASIZE) == SAI_DATASIZE_32))
emilmont 77:869cf507173a 307 /**
emilmont 77:869cf507173a 308 * @}
emilmont 77:869cf507173a 309 */
emilmont 77:869cf507173a 310
emilmont 77:869cf507173a 311 /** @defgroup SAI_Block_MSB_LSB_transmission
emilmont 77:869cf507173a 312 * @{
emilmont 77:869cf507173a 313 */
emilmont 77:869cf507173a 314
emilmont 77:869cf507173a 315 #define SAI_FIRSTBIT_MSB ((uint32_t)0x00000000)
emilmont 77:869cf507173a 316 #define SAI_FIRSTBIT_LSB ((uint32_t)SAI_xCR1_LSBFIRST)
emilmont 77:869cf507173a 317
emilmont 77:869cf507173a 318 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \
emilmont 77:869cf507173a 319 ((BIT) == SAI_FIRSTBIT_LSB))
emilmont 77:869cf507173a 320 /**
emilmont 77:869cf507173a 321 * @}
emilmont 77:869cf507173a 322 */
emilmont 77:869cf507173a 323
emilmont 77:869cf507173a 324 /** @defgroup SAI_Block_Clock_Strobing
emilmont 77:869cf507173a 325 * @{
emilmont 77:869cf507173a 326 */
emilmont 77:869cf507173a 327 #define SAI_CLOCKSTROBING_FALLINGEDGE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 328 #define SAI_CLOCKSTROBING_RISINGEDGE ((uint32_t)SAI_xCR1_CKSTR)
emilmont 77:869cf507173a 329
emilmont 77:869cf507173a 330 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \
emilmont 77:869cf507173a 331 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE))
emilmont 77:869cf507173a 332 /**
emilmont 77:869cf507173a 333 * @}
emilmont 77:869cf507173a 334 */
emilmont 77:869cf507173a 335
emilmont 77:869cf507173a 336 /** @defgroup SAI_Block_Synchronization
emilmont 77:869cf507173a 337 * @{
emilmont 77:869cf507173a 338 */
emilmont 77:869cf507173a 339 #define SAI_ASYNCHRONOUS ((uint32_t)0x00000000)
emilmont 77:869cf507173a 340 #define SAI_SYNCHRONOUS ((uint32_t)SAI_xCR1_SYNCEN_0)
emilmont 77:869cf507173a 341
emilmont 77:869cf507173a 342 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \
emilmont 77:869cf507173a 343 ((SYNCHRO) == SAI_SYNCHRONOUS))
emilmont 77:869cf507173a 344 /**
emilmont 77:869cf507173a 345 * @}
emilmont 77:869cf507173a 346 */
emilmont 77:869cf507173a 347
emilmont 77:869cf507173a 348 /** @defgroup SAI_Block_Output_Drive
emilmont 77:869cf507173a 349 * @{
emilmont 77:869cf507173a 350 */
emilmont 77:869cf507173a 351 #define SAI_OUTPUTDRIVE_DISABLED ((uint32_t)0x00000000)
emilmont 77:869cf507173a 352 #define SAI_OUTPUTDRIVE_ENABLED ((uint32_t)SAI_xCR1_OUTDRIV)
emilmont 77:869cf507173a 353
emilmont 77:869cf507173a 354 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLED) || \
emilmont 77:869cf507173a 355 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLED))
emilmont 77:869cf507173a 356 /**
emilmont 77:869cf507173a 357 * @}
emilmont 77:869cf507173a 358 */
emilmont 77:869cf507173a 359
emilmont 77:869cf507173a 360 /** @defgroup SAI_Block_NoDivider
emilmont 77:869cf507173a 361 * @{
emilmont 77:869cf507173a 362 */
emilmont 77:869cf507173a 363 #define SAI_MASTERDIVIDER_ENABLED ((uint32_t)0x00000000)
emilmont 77:869cf507173a 364 #define SAI_MASTERDIVIDER_DISABLED ((uint32_t)SAI_xCR1_NODIV)
emilmont 77:869cf507173a 365
emilmont 77:869cf507173a 366 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLED) || \
emilmont 77:869cf507173a 367 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLED))
emilmont 77:869cf507173a 368 /**
emilmont 77:869cf507173a 369 * @}
emilmont 77:869cf507173a 370 */
emilmont 77:869cf507173a 371
emilmont 77:869cf507173a 372 /** @defgroup SAI_Block_Master_Divider
emilmont 77:869cf507173a 373 * @{
emilmont 77:869cf507173a 374 */
emilmont 77:869cf507173a 375 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15)
emilmont 77:869cf507173a 376 /**
emilmont 77:869cf507173a 377 * @}
emilmont 77:869cf507173a 378 */
emilmont 77:869cf507173a 379
emilmont 77:869cf507173a 380 /** @defgroup SAI_Block_Frame_Length
emilmont 77:869cf507173a 381 * @{
emilmont 77:869cf507173a 382 */
emilmont 77:869cf507173a 383 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8 <= (LENGTH)) && ((LENGTH) <= 256))
emilmont 77:869cf507173a 384 /**
emilmont 77:869cf507173a 385 * @}
emilmont 77:869cf507173a 386 */
emilmont 77:869cf507173a 387
emilmont 77:869cf507173a 388 /** @defgroup SAI_Block_Active_FrameLength
emilmont 77:869cf507173a 389 * @{
emilmont 77:869cf507173a 390 */
emilmont 77:869cf507173a 391 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1 <= (LENGTH)) && ((LENGTH) <= 128))
emilmont 77:869cf507173a 392 /**
emilmont 77:869cf507173a 393 * @}
emilmont 77:869cf507173a 394 */
emilmont 77:869cf507173a 395
emilmont 77:869cf507173a 396 /** @defgroup SAI_Block_FS_Definition
emilmont 77:869cf507173a 397 * @{
emilmont 77:869cf507173a 398 */
emilmont 77:869cf507173a 399 #define SAI_FS_STARTFRAME ((uint32_t)0x00000000)
emilmont 77:869cf507173a 400 #define SAI_FS_CHANNEL_IDENTIFICATION ((uint32_t)SAI_xFRCR_FSDEF)
emilmont 77:869cf507173a 401
emilmont 77:869cf507173a 402 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \
emilmont 77:869cf507173a 403 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION))
emilmont 77:869cf507173a 404 /**
emilmont 77:869cf507173a 405 * @}
emilmont 77:869cf507173a 406 */
emilmont 77:869cf507173a 407
emilmont 77:869cf507173a 408 /** @defgroup SAI_Block_FS_Polarity
emilmont 77:869cf507173a 409 * @{
emilmont 77:869cf507173a 410 */
emilmont 77:869cf507173a 411 #define SAI_FS_ACTIVE_LOW ((uint32_t)0x00000000)
emilmont 77:869cf507173a 412 #define SAI_FS_ACTIVE_HIGH ((uint32_t)SAI_xFRCR_FSPO)
emilmont 77:869cf507173a 413
emilmont 77:869cf507173a 414 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \
emilmont 77:869cf507173a 415 ((POLARITY) == SAI_FS_ACTIVE_HIGH))
emilmont 77:869cf507173a 416 /**
emilmont 77:869cf507173a 417 * @}
emilmont 77:869cf507173a 418 */
emilmont 77:869cf507173a 419
emilmont 77:869cf507173a 420 /** @defgroup SAI_Block_FS_Offset
emilmont 77:869cf507173a 421 * @{
emilmont 77:869cf507173a 422 */
emilmont 77:869cf507173a 423 #define SAI_FS_FIRSTBIT ((uint32_t)0x00000000)
emilmont 77:869cf507173a 424 #define SAI_FS_BEFOREFIRSTBIT ((uint32_t)SAI_xFRCR_FSOFF)
emilmont 77:869cf507173a 425
emilmont 77:869cf507173a 426 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \
emilmont 77:869cf507173a 427 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT))
emilmont 77:869cf507173a 428 /**
emilmont 77:869cf507173a 429 * @}
emilmont 77:869cf507173a 430 */
emilmont 77:869cf507173a 431
emilmont 77:869cf507173a 432 /** @defgroup SAI_Block_Slot_FirstBit_Offset
emilmont 77:869cf507173a 433 * @{
emilmont 77:869cf507173a 434 */
emilmont 77:869cf507173a 435 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24)
emilmont 77:869cf507173a 436 /**
emilmont 77:869cf507173a 437 * @}
emilmont 77:869cf507173a 438 */
emilmont 77:869cf507173a 439
emilmont 77:869cf507173a 440 /** @defgroup SAI_Block_Slot_Size
emilmont 77:869cf507173a 441 * @{
emilmont 77:869cf507173a 442 */
emilmont 77:869cf507173a 443 #define SAI_SLOTSIZE_DATASIZE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 444 #define SAI_SLOTSIZE_16B ((uint32_t)SAI_xSLOTR_SLOTSZ_0)
emilmont 77:869cf507173a 445 #define SAI_SLOTSIZE_32B ((uint32_t)SAI_xSLOTR_SLOTSZ_1)
emilmont 77:869cf507173a 446
emilmont 77:869cf507173a 447 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \
emilmont 77:869cf507173a 448 ((SIZE) == SAI_SLOTSIZE_16B) || \
emilmont 77:869cf507173a 449 ((SIZE) == SAI_SLOTSIZE_32B))
emilmont 77:869cf507173a 450 /**
emilmont 77:869cf507173a 451 * @}
emilmont 77:869cf507173a 452 */
emilmont 77:869cf507173a 453
emilmont 77:869cf507173a 454 /** @defgroup SAI_Block_Slot_Number
emilmont 77:869cf507173a 455 * @{
emilmont 77:869cf507173a 456 */
emilmont 77:869cf507173a 457 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1 <= (NUMBER)) && ((NUMBER) <= 16))
emilmont 77:869cf507173a 458 /**
emilmont 77:869cf507173a 459 * @}
emilmont 77:869cf507173a 460 */
emilmont 77:869cf507173a 461
emilmont 77:869cf507173a 462 /** @defgroup SAI_Block_Slot_Active
emilmont 77:869cf507173a 463 * @{
emilmont 77:869cf507173a 464 */
emilmont 77:869cf507173a 465 #define SAI_SLOT_NOTACTIVE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 466 #define SAI_SLOTACTIVE_0 ((uint32_t)0x00010000)
emilmont 77:869cf507173a 467 #define SAI_SLOTACTIVE_1 ((uint32_t)0x00020000)
emilmont 77:869cf507173a 468 #define SAI_SLOTACTIVE_2 ((uint32_t)0x00040000)
emilmont 77:869cf507173a 469 #define SAI_SLOTACTIVE_3 ((uint32_t)0x00080000)
emilmont 77:869cf507173a 470 #define SAI_SLOTACTIVE_4 ((uint32_t)0x00100000)
emilmont 77:869cf507173a 471 #define SAI_SLOTACTIVE_5 ((uint32_t)0x00200000)
emilmont 77:869cf507173a 472 #define SAI_SLOTACTIVE_6 ((uint32_t)0x00400000)
emilmont 77:869cf507173a 473 #define SAI_SLOTACTIVE_7 ((uint32_t)0x00800000)
emilmont 77:869cf507173a 474 #define SAI_SLOTACTIVE_8 ((uint32_t)0x01000000)
emilmont 77:869cf507173a 475 #define SAI_SLOTACTIVE_9 ((uint32_t)0x02000000)
emilmont 77:869cf507173a 476 #define SAI_SLOTACTIVE_10 ((uint32_t)0x04000000)
emilmont 77:869cf507173a 477 #define SAI_SLOTACTIVE_11 ((uint32_t)0x08000000)
emilmont 77:869cf507173a 478 #define SAI_SLOTACTIVE_12 ((uint32_t)0x10000000)
emilmont 77:869cf507173a 479 #define SAI_SLOTACTIVE_13 ((uint32_t)0x20000000)
emilmont 77:869cf507173a 480 #define SAI_SLOTACTIVE_14 ((uint32_t)0x40000000)
emilmont 77:869cf507173a 481 #define SAI_SLOTACTIVE_15 ((uint32_t)0x80000000)
emilmont 77:869cf507173a 482 #define SAI_SLOTACTIVE_ALL ((uint32_t)0xFFFF0000)
emilmont 77:869cf507173a 483
emilmont 77:869cf507173a 484 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) != 0)
emilmont 77:869cf507173a 485
emilmont 77:869cf507173a 486 /**
emilmont 77:869cf507173a 487 * @}
emilmont 77:869cf507173a 488 */
emilmont 77:869cf507173a 489
emilmont 77:869cf507173a 490 /** @defgroup SAI_Mono_Stereo_Mode
emilmont 77:869cf507173a 491 * @{
emilmont 77:869cf507173a 492 */
emilmont 77:869cf507173a 493 #define SAI_MONOMODE ((uint32_t)SAI_xCR1_MONO)
emilmont 77:869cf507173a 494 #define SAI_STREOMODE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 495
emilmont 77:869cf507173a 496 #define IS_SAI_BLOCK_MONO_STREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\
emilmont 77:869cf507173a 497 ((MODE) == SAI_STREOMODE))
emilmont 77:869cf507173a 498 /**
emilmont 77:869cf507173a 499 * @}
emilmont 77:869cf507173a 500 */
emilmont 77:869cf507173a 501
emilmont 77:869cf507173a 502 /** @defgroup SAI_TRIState_Management
emilmont 77:869cf507173a 503 * @{
emilmont 77:869cf507173a 504 */
emilmont 77:869cf507173a 505 #define SAI_OUTPUT_NOTRELEASED ((uint32_t)0x00000000)
emilmont 77:869cf507173a 506 #define SAI_OUTPUT_RELEASED ((uint32_t)SAI_xCR2_TRIS)
emilmont 77:869cf507173a 507
emilmont 77:869cf507173a 508 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\
emilmont 77:869cf507173a 509 ((STATE) == SAI_OUTPUT_RELEASED))
emilmont 77:869cf507173a 510 /**
emilmont 77:869cf507173a 511 * @}
emilmont 77:869cf507173a 512 */
emilmont 77:869cf507173a 513
emilmont 77:869cf507173a 514 /** @defgroup SAI_Block_Fifo_Threshold
emilmont 77:869cf507173a 515 * @{
emilmont 77:869cf507173a 516 */
emilmont 77:869cf507173a 517 #define SAI_FIFOTHRESHOLD_EMPTY ((uint32_t)0x00000000)
emilmont 77:869cf507173a 518 #define SAI_FIFOTHRESHOLD_1QF ((uint32_t)0x00000001)
emilmont 77:869cf507173a 519 #define SAI_FIFOTHRESHOLD_HF ((uint32_t)0x00000002)
emilmont 77:869cf507173a 520 #define SAI_FIFOTHRESHOLD_3QF ((uint32_t)0x00000003)
emilmont 77:869cf507173a 521 #define SAI_FIFOTHRESHOLD_FULL ((uint32_t)0x00000004)
emilmont 77:869cf507173a 522
emilmont 77:869cf507173a 523 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \
emilmont 77:869cf507173a 524 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \
emilmont 77:869cf507173a 525 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \
emilmont 77:869cf507173a 526 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \
emilmont 77:869cf507173a 527 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL))
emilmont 77:869cf507173a 528 /**
emilmont 77:869cf507173a 529 * @}
emilmont 77:869cf507173a 530 */
emilmont 77:869cf507173a 531
emilmont 77:869cf507173a 532 /** @defgroup SAI_Block_Companding_Mode
emilmont 77:869cf507173a 533 * @{
emilmont 77:869cf507173a 534 */
emilmont 77:869cf507173a 535 #define SAI_NOCOMPANDING ((uint32_t)0x00000000)
emilmont 77:869cf507173a 536 #define SAI_ULAW_1CPL_COMPANDING ((uint32_t)0x00008000)
emilmont 77:869cf507173a 537 #define SAI_ALAW_1CPL_COMPANDING ((uint32_t)0x0000C000)
emilmont 77:869cf507173a 538 #define SAI_ULAW_2CPL_COMPANDING ((uint32_t)0x0000A000)
emilmont 77:869cf507173a 539 #define SAI_ALAW_2CPL_COMPANDING ((uint32_t)0x0000E000)
emilmont 77:869cf507173a 540
emilmont 77:869cf507173a 541 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \
emilmont 77:869cf507173a 542 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \
emilmont 77:869cf507173a 543 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \
emilmont 77:869cf507173a 544 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \
emilmont 77:869cf507173a 545 ((MODE) == SAI_ALAW_2CPL_COMPANDING))
emilmont 77:869cf507173a 546 /**
emilmont 77:869cf507173a 547 * @}
emilmont 77:869cf507173a 548 */
emilmont 77:869cf507173a 549
emilmont 77:869cf507173a 550 /** @defgroup SAI_Block_Mute_Value
emilmont 77:869cf507173a 551 * @{
emilmont 77:869cf507173a 552 */
emilmont 77:869cf507173a 553 #define SAI_ZERO_VALUE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 554 #define SAI_LAST_SENT_VALUE ((uint32_t)SAI_xCR2_MUTEVAL)
emilmont 77:869cf507173a 555
emilmont 77:869cf507173a 556 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \
emilmont 77:869cf507173a 557 ((VALUE) == SAI_LAST_SENT_VALUE))
emilmont 77:869cf507173a 558 /**
emilmont 77:869cf507173a 559 * @}
emilmont 77:869cf507173a 560 */
emilmont 77:869cf507173a 561
emilmont 77:869cf507173a 562 /** @defgroup SAI_Block_Mute_Frame_Counter
emilmont 77:869cf507173a 563 * @{
emilmont 77:869cf507173a 564 */
emilmont 77:869cf507173a 565 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63)
emilmont 77:869cf507173a 566 /**
emilmont 77:869cf507173a 567 * @}
emilmont 77:869cf507173a 568 */
emilmont 77:869cf507173a 569
emilmont 77:869cf507173a 570 /** @defgroup SAI_Block_Interrupts_Definition
emilmont 77:869cf507173a 571 * @{
emilmont 77:869cf507173a 572 */
emilmont 77:869cf507173a 573 #define SAI_IT_OVRUDR ((uint32_t)SAI_xIMR_OVRUDRIE)
emilmont 77:869cf507173a 574 #define SAI_IT_MUTEDET ((uint32_t)SAI_xIMR_MUTEDETIE)
emilmont 77:869cf507173a 575 #define SAI_IT_WCKCFG ((uint32_t)SAI_xIMR_WCKCFGIE)
emilmont 77:869cf507173a 576 #define SAI_IT_FREQ ((uint32_t)SAI_xIMR_FREQIE)
emilmont 77:869cf507173a 577 #define SAI_IT_CNRDY ((uint32_t)SAI_xIMR_CNRDYIE)
emilmont 77:869cf507173a 578 #define SAI_IT_AFSDET ((uint32_t)SAI_xIMR_AFSDETIE)
emilmont 77:869cf507173a 579 #define SAI_IT_LFSDET ((uint32_t)SAI_xIMR_LFSDETIE)
emilmont 77:869cf507173a 580
emilmont 77:869cf507173a 581 #define IS_SAI_BLOCK_CONFIG_IT(IT) (((IT) == SAI_IT_OVRUDR) || \
emilmont 77:869cf507173a 582 ((IT) == SAI_IT_MUTEDET) || \
emilmont 77:869cf507173a 583 ((IT) == SAI_IT_WCKCFG) || \
emilmont 77:869cf507173a 584 ((IT) == SAI_IT_FREQ) || \
emilmont 77:869cf507173a 585 ((IT) == SAI_IT_CNRDY) || \
emilmont 77:869cf507173a 586 ((IT) == SAI_IT_AFSDET) || \
emilmont 77:869cf507173a 587 ((IT) == SAI_IT_LFSDET))
emilmont 77:869cf507173a 588 /**
emilmont 77:869cf507173a 589 * @}
emilmont 77:869cf507173a 590 */
emilmont 77:869cf507173a 591
emilmont 77:869cf507173a 592 /** @defgroup SAI_Block_Flags_Definition
emilmont 77:869cf507173a 593 * @{
emilmont 77:869cf507173a 594 */
emilmont 77:869cf507173a 595 #define SAI_FLAG_OVRUDR ((uint32_t)SAI_xSR_OVRUDR)
emilmont 77:869cf507173a 596 #define SAI_FLAG_MUTEDET ((uint32_t)SAI_xSR_MUTEDET)
emilmont 77:869cf507173a 597 #define SAI_FLAG_WCKCFG ((uint32_t)SAI_xSR_WCKCFG)
emilmont 77:869cf507173a 598 #define SAI_FLAG_FREQ ((uint32_t)SAI_xSR_FREQ)
emilmont 77:869cf507173a 599 #define SAI_FLAG_CNRDY ((uint32_t)SAI_xSR_CNRDY)
emilmont 77:869cf507173a 600 #define SAI_FLAG_AFSDET ((uint32_t)SAI_xSR_AFSDET)
emilmont 77:869cf507173a 601 #define SAI_FLAG_LFSDET ((uint32_t)SAI_xSR_LFSDET)
emilmont 77:869cf507173a 602
emilmont 77:869cf507173a 603 #define IS_SAI_BLOCK_GET_FLAG(FLAG) (((FLAG) == SAI_FLAG_OVRUDR) || \
emilmont 77:869cf507173a 604 ((FLAG) == SAI_FLAG_MUTEDET) || \
emilmont 77:869cf507173a 605 ((FLAG) == SAI_FLAG_WCKCFG) || \
emilmont 77:869cf507173a 606 ((FLAG) == SAI_FLAG_FREQ) || \
emilmont 77:869cf507173a 607 ((FLAG) == SAI_FLAG_CNRDY) || \
emilmont 77:869cf507173a 608 ((FLAG) == SAI_FLAG_AFSDET) || \
emilmont 77:869cf507173a 609 ((FLAG) == SAI_FLAG_LFSDET))
emilmont 77:869cf507173a 610
emilmont 77:869cf507173a 611 #define IS_SAI_BLOCK_CLEAR_FLAG(FLAG) (((FLAG) == SAI_FLAG_OVRUDR) || \
emilmont 77:869cf507173a 612 ((FLAG) == SAI_FLAG_MUTEDET) || \
emilmont 77:869cf507173a 613 ((FLAG) == SAI_FLAG_WCKCFG) || \
emilmont 77:869cf507173a 614 ((FLAG) == SAI_FLAG_FREQ) || \
emilmont 77:869cf507173a 615 ((FLAG) == SAI_FLAG_CNRDY) || \
emilmont 77:869cf507173a 616 ((FLAG) == SAI_FLAG_AFSDET) || \
emilmont 77:869cf507173a 617 ((FLAG) == SAI_FLAG_LFSDET))
emilmont 77:869cf507173a 618 /**
emilmont 77:869cf507173a 619 * @}
emilmont 77:869cf507173a 620 */
emilmont 77:869cf507173a 621
emilmont 77:869cf507173a 622 /** @defgroup SAI_Block_Fifo_Status_Level
emilmont 77:869cf507173a 623 * @{
emilmont 77:869cf507173a 624 */
emilmont 77:869cf507173a 625 #define SAI_FIFOStatus_Empty ((uint32_t)0x00000000)
emilmont 77:869cf507173a 626 #define SAI_FIFOStatus_Less1QuarterFull ((uint32_t)0x00010000)
emilmont 77:869cf507173a 627 #define SAI_FIFOStatus_1QuarterFull ((uint32_t)0x00020000)
emilmont 77:869cf507173a 628 #define SAI_FIFOStatus_HalfFull ((uint32_t)0x00030000)
emilmont 77:869cf507173a 629 #define SAI_FIFOStatus_3QuartersFull ((uint32_t)0x00040000)
emilmont 77:869cf507173a 630 #define SAI_FIFOStatus_Full ((uint32_t)0x00050000)
emilmont 77:869cf507173a 631
emilmont 77:869cf507173a 632 #define IS_SAI_BLOCK_FIFO_STATUS(STATUS) (((STATUS) == SAI_FIFOStatus_Less1QuarterFull ) || \
emilmont 77:869cf507173a 633 ((STATUS) == SAI_FIFOStatus_HalfFull) || \
emilmont 77:869cf507173a 634 ((STATUS) == SAI_FIFOStatus_1QuarterFull) || \
emilmont 77:869cf507173a 635 ((STATUS) == SAI_FIFOStatus_3QuartersFull) || \
emilmont 77:869cf507173a 636 ((STATUS) == SAI_FIFOStatus_Full) || \
emilmont 77:869cf507173a 637 ((STATUS) == SAI_FIFOStatus_Empty))
emilmont 77:869cf507173a 638 /**
emilmont 77:869cf507173a 639 * @}
emilmont 77:869cf507173a 640 */
emilmont 77:869cf507173a 641
emilmont 77:869cf507173a 642
emilmont 77:869cf507173a 643 /**
emilmont 77:869cf507173a 644 * @}
emilmont 77:869cf507173a 645 */
emilmont 77:869cf507173a 646
emilmont 77:869cf507173a 647 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 648
emilmont 77:869cf507173a 649 /** @brief Enable or disable the specified SAI interrupts.
emilmont 77:869cf507173a 650 * @param __HANDLE__: specifies the SAI Handle.
emilmont 77:869cf507173a 651 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
emilmont 77:869cf507173a 652 * This parameter can be one of the following values:
emilmont 77:869cf507173a 653 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable
emilmont 77:869cf507173a 654 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable
emilmont 77:869cf507173a 655 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable
emilmont 77:869cf507173a 656 * @arg SAI_IT_FREQ: FIFO request interrupt enable
emilmont 77:869cf507173a 657 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable
emilmont 77:869cf507173a 658 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable
emilmont 77:869cf507173a 659 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enabl
emilmont 77:869cf507173a 660 * @retval None
emilmont 77:869cf507173a 661 */
emilmont 77:869cf507173a 662
emilmont 77:869cf507173a 663 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
emilmont 77:869cf507173a 664 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__)))
emilmont 77:869cf507173a 665
emilmont 77:869cf507173a 666 /** @brief Check if the specified SAI interrupt source is enabled or disabled.
emilmont 77:869cf507173a 667 * @param __HANDLE__: specifies the SAI Handle.
emilmont 77:869cf507173a 668 * This parameter can be SAI where x: 1, 2, or 3 to select the SAI peripheral.
emilmont 77:869cf507173a 669 * @param __INTERRUPT__: specifies the SAI interrupt source to check.
emilmont 77:869cf507173a 670 * This parameter can be one of the following values:
emilmont 77:869cf507173a 671 * @arg SAI_IT_TXE: Tx buffer empty interrupt enable.
emilmont 77:869cf507173a 672 * @arg SAI_IT_RXNE: Rx buffer not empty interrupt enable.
emilmont 77:869cf507173a 673 * @arg SAI_IT_ERR: Error interrupt enable.
emilmont 77:869cf507173a 674 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
emilmont 77:869cf507173a 675 */
emilmont 77:869cf507173a 676 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
emilmont 77:869cf507173a 677
emilmont 77:869cf507173a 678 /** @brief Check whether the specified SAI flag is set or not.
emilmont 77:869cf507173a 679 * @param __HANDLE__: specifies the SAI Handle.
emilmont 77:869cf507173a 680 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 681 * This parameter can be one of the following values:
emilmont 77:869cf507173a 682 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag.
emilmont 77:869cf507173a 683 * @arg SAI_FLAG_MUTEDET: Mute detection flag.
emilmont 77:869cf507173a 684 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag.
emilmont 77:869cf507173a 685 * @arg SAI_FLAG_FREQ: FIFO request flag.
emilmont 77:869cf507173a 686 * @arg SAI_FLAG_CNRDY: Codec not ready flag.
emilmont 77:869cf507173a 687 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag.
emilmont 77:869cf507173a 688 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag.
emilmont 77:869cf507173a 689 * @retval The new state of __FLAG__ (TRUE or FALSE).
emilmont 77:869cf507173a 690 */
emilmont 77:869cf507173a 691 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
emilmont 77:869cf507173a 692
emilmont 77:869cf507173a 693 /** @brief Clears the specified SAI pending flag.
emilmont 77:869cf507173a 694 * @param __HANDLE__: specifies the SAI Handle.
emilmont 77:869cf507173a 695 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 696 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 697 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun
emilmont 77:869cf507173a 698 * @arg SAI_FLAG_MUTEDET: Clear Mute detection
emilmont 77:869cf507173a 699 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration
emilmont 77:869cf507173a 700 * @arg SAI_FLAG_FREQ: Clear FIFO request
emilmont 77:869cf507173a 701 * @arg SAI_FLAG_CNRDY: Clear Codec not ready
emilmont 77:869cf507173a 702 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection
emilmont 77:869cf507173a 703 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection
emilmont 77:869cf507173a 704 *
emilmont 77:869cf507173a 705 * @retval None
emilmont 77:869cf507173a 706 */
emilmont 77:869cf507173a 707 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR |= (__FLAG__))
emilmont 77:869cf507173a 708
emilmont 77:869cf507173a 709 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN)
emilmont 77:869cf507173a 710 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN)
emilmont 77:869cf507173a 711
emilmont 77:869cf507173a 712 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 713
emilmont 77:869cf507173a 714 /* Initialization/de-initialization functions **********************************/
emilmont 77:869cf507173a 715 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai);
emilmont 77:869cf507173a 716 HAL_StatusTypeDef HAL_SAI_DeInit (SAI_HandleTypeDef *hsai);
emilmont 77:869cf507173a 717 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai);
emilmont 77:869cf507173a 718 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai);
emilmont 77:869cf507173a 719
emilmont 77:869cf507173a 720 /* I/O operation functions *****************************************************/
emilmont 77:869cf507173a 721 /* Blocking mode: Polling */
emilmont 77:869cf507173a 722 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size, uint32_t Timeout);
emilmont 77:869cf507173a 723 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size, uint32_t Timeout);
emilmont 77:869cf507173a 724
emilmont 77:869cf507173a 725 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 726 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size);
emilmont 77:869cf507173a 727 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size);
emilmont 77:869cf507173a 728
emilmont 77:869cf507173a 729 /* Non-Blocking mode: DMA */
emilmont 77:869cf507173a 730 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size);
emilmont 77:869cf507173a 731 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint16_t *pData, uint16_t Size);
emilmont 77:869cf507173a 732 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai);
emilmont 77:869cf507173a 733 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai);
emilmont 77:869cf507173a 734 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai);
emilmont 77:869cf507173a 735
emilmont 77:869cf507173a 736 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
emilmont 77:869cf507173a 737 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai);
bogdanm 81:7d30d6019079 738 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai);
bogdanm 81:7d30d6019079 739 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai);
bogdanm 81:7d30d6019079 740 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai);
bogdanm 81:7d30d6019079 741 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai);
bogdanm 81:7d30d6019079 742 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai);
emilmont 77:869cf507173a 743
emilmont 77:869cf507173a 744 /* Peripheral State functions **************************************************/
emilmont 77:869cf507173a 745 HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai);
emilmont 77:869cf507173a 746 uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai);
emilmont 77:869cf507173a 747
emilmont 77:869cf507173a 748 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
emilmont 77:869cf507173a 749 /**
emilmont 77:869cf507173a 750 * @}
emilmont 77:869cf507173a 751 */
emilmont 77:869cf507173a 752
emilmont 77:869cf507173a 753 /**
emilmont 77:869cf507173a 754 * @}
emilmont 77:869cf507173a 755 */
emilmont 77:869cf507173a 756
emilmont 77:869cf507173a 757 #ifdef __cplusplus
emilmont 77:869cf507173a 758 }
emilmont 77:869cf507173a 759 #endif
emilmont 77:869cf507173a 760
emilmont 77:869cf507173a 761 #endif /* __STM32F4xx_HAL_SAI_H */
emilmont 77:869cf507173a 762
emilmont 77:869cf507173a 763 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/