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TARGET_HRM1017/core_cmInstr.h@87:6213f644d804, 2014-07-25 (annotated)

Committer:
bogdanm
Date:
Fri Jul 25 09:46:51 2014 +0100
Revision:
87:6213f644d804
Release 87 of the mbed library



Main changes:



- error.h renamed to mbed_error.h to avoid name clashes

- upgraded to V7 of the nRF51822 soft-device 110

- New targets: HRM107

- Improved test infrastructure

- Bug fixes on various targets

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 87:6213f644d804 1 /**************************************************************************//**
bogdanm 87:6213f644d804 2 * @file core_cmInstr.h
bogdanm 87:6213f644d804 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
bogdanm 87:6213f644d804 4 * @version V3.20
bogdanm 87:6213f644d804 5 * @date 05. March 2013
bogdanm 87:6213f644d804 6 *
bogdanm 87:6213f644d804 7 * @note
bogdanm 87:6213f644d804 8 *
bogdanm 87:6213f644d804 9 ******************************************************************************/
bogdanm 87:6213f644d804 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 87:6213f644d804 11
bogdanm 87:6213f644d804 12 All rights reserved.
bogdanm 87:6213f644d804 13 Redistribution and use in source and binary forms, with or without
bogdanm 87:6213f644d804 14 modification, are permitted provided that the following conditions are met:
bogdanm 87:6213f644d804 15 - Redistributions of source code must retain the above copyright
bogdanm 87:6213f644d804 16 notice, this list of conditions and the following disclaimer.
bogdanm 87:6213f644d804 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 87:6213f644d804 18 notice, this list of conditions and the following disclaimer in the
bogdanm 87:6213f644d804 19 documentation and/or other materials provided with the distribution.
bogdanm 87:6213f644d804 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 87:6213f644d804 21 to endorse or promote products derived from this software without
bogdanm 87:6213f644d804 22 specific prior written permission.
bogdanm 87:6213f644d804 23 *
bogdanm 87:6213f644d804 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 87:6213f644d804 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 87:6213f644d804 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 87:6213f644d804 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 87:6213f644d804 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 87:6213f644d804 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 87:6213f644d804 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 87:6213f644d804 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 87:6213f644d804 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 87:6213f644d804 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 87:6213f644d804 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 87:6213f644d804 35 ---------------------------------------------------------------------------*/
bogdanm 87:6213f644d804 36
bogdanm 87:6213f644d804 37
bogdanm 87:6213f644d804 38 #ifndef __CORE_CMINSTR_H
bogdanm 87:6213f644d804 39 #define __CORE_CMINSTR_H
bogdanm 87:6213f644d804 40
bogdanm 87:6213f644d804 41
bogdanm 87:6213f644d804 42 /* ########################## Core Instruction Access ######################### */
bogdanm 87:6213f644d804 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
bogdanm 87:6213f644d804 44 Access to dedicated instructions
bogdanm 87:6213f644d804 45 @{
bogdanm 87:6213f644d804 46 */
bogdanm 87:6213f644d804 47
bogdanm 87:6213f644d804 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 87:6213f644d804 49 /* ARM armcc specific functions */
bogdanm 87:6213f644d804 50
bogdanm 87:6213f644d804 51 #if (__ARMCC_VERSION < 400677)
bogdanm 87:6213f644d804 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 87:6213f644d804 53 #endif
bogdanm 87:6213f644d804 54
bogdanm 87:6213f644d804 55
bogdanm 87:6213f644d804 56 /** \brief No Operation
bogdanm 87:6213f644d804 57
bogdanm 87:6213f644d804 58 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 87:6213f644d804 59 */
bogdanm 87:6213f644d804 60 #define __NOP __nop
bogdanm 87:6213f644d804 61
bogdanm 87:6213f644d804 62
bogdanm 87:6213f644d804 63 /** \brief Wait For Interrupt
bogdanm 87:6213f644d804 64
bogdanm 87:6213f644d804 65 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 87:6213f644d804 66 until one of a number of events occurs.
bogdanm 87:6213f644d804 67 */
bogdanm 87:6213f644d804 68 #define __WFI __wfi
bogdanm 87:6213f644d804 69
bogdanm 87:6213f644d804 70
bogdanm 87:6213f644d804 71 /** \brief Wait For Event
bogdanm 87:6213f644d804 72
bogdanm 87:6213f644d804 73 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 87:6213f644d804 74 a low-power state until one of a number of events occurs.
bogdanm 87:6213f644d804 75 */
bogdanm 87:6213f644d804 76 #define __WFE __wfe
bogdanm 87:6213f644d804 77
bogdanm 87:6213f644d804 78
bogdanm 87:6213f644d804 79 /** \brief Send Event
bogdanm 87:6213f644d804 80
bogdanm 87:6213f644d804 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 87:6213f644d804 82 */
bogdanm 87:6213f644d804 83 #define __SEV __sev
bogdanm 87:6213f644d804 84
bogdanm 87:6213f644d804 85
bogdanm 87:6213f644d804 86 /** \brief Instruction Synchronization Barrier
bogdanm 87:6213f644d804 87
bogdanm 87:6213f644d804 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 87:6213f644d804 89 so that all instructions following the ISB are fetched from cache or
bogdanm 87:6213f644d804 90 memory, after the instruction has been completed.
bogdanm 87:6213f644d804 91 */
bogdanm 87:6213f644d804 92 #define __ISB() __isb(0xF)
bogdanm 87:6213f644d804 93
bogdanm 87:6213f644d804 94
bogdanm 87:6213f644d804 95 /** \brief Data Synchronization Barrier
bogdanm 87:6213f644d804 96
bogdanm 87:6213f644d804 97 This function acts as a special kind of Data Memory Barrier.
bogdanm 87:6213f644d804 98 It completes when all explicit memory accesses before this instruction complete.
bogdanm 87:6213f644d804 99 */
bogdanm 87:6213f644d804 100 #define __DSB() __dsb(0xF)
bogdanm 87:6213f644d804 101
bogdanm 87:6213f644d804 102
bogdanm 87:6213f644d804 103 /** \brief Data Memory Barrier
bogdanm 87:6213f644d804 104
bogdanm 87:6213f644d804 105 This function ensures the apparent order of the explicit memory operations before
bogdanm 87:6213f644d804 106 and after the instruction, without ensuring their completion.
bogdanm 87:6213f644d804 107 */
bogdanm 87:6213f644d804 108 #define __DMB() __dmb(0xF)
bogdanm 87:6213f644d804 109
bogdanm 87:6213f644d804 110
bogdanm 87:6213f644d804 111 /** \brief Reverse byte order (32 bit)
bogdanm 87:6213f644d804 112
bogdanm 87:6213f644d804 113 This function reverses the byte order in integer value.
bogdanm 87:6213f644d804 114
bogdanm 87:6213f644d804 115 \param [in] value Value to reverse
bogdanm 87:6213f644d804 116 \return Reversed value
bogdanm 87:6213f644d804 117 */
bogdanm 87:6213f644d804 118 #define __REV __rev
bogdanm 87:6213f644d804 119
bogdanm 87:6213f644d804 120
bogdanm 87:6213f644d804 121 /** \brief Reverse byte order (16 bit)
bogdanm 87:6213f644d804 122
bogdanm 87:6213f644d804 123 This function reverses the byte order in two unsigned short values.
bogdanm 87:6213f644d804 124
bogdanm 87:6213f644d804 125 \param [in] value Value to reverse
bogdanm 87:6213f644d804 126 \return Reversed value
bogdanm 87:6213f644d804 127 */
bogdanm 87:6213f644d804 128 #ifndef __NO_EMBEDDED_ASM
bogdanm 87:6213f644d804 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
bogdanm 87:6213f644d804 130 {
bogdanm 87:6213f644d804 131 rev16 r0, r0
bogdanm 87:6213f644d804 132 bx lr
bogdanm 87:6213f644d804 133 }
bogdanm 87:6213f644d804 134 #endif
bogdanm 87:6213f644d804 135
bogdanm 87:6213f644d804 136 /** \brief Reverse byte order in signed short value
bogdanm 87:6213f644d804 137
bogdanm 87:6213f644d804 138 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 87:6213f644d804 139
bogdanm 87:6213f644d804 140 \param [in] value Value to reverse
bogdanm 87:6213f644d804 141 \return Reversed value
bogdanm 87:6213f644d804 142 */
bogdanm 87:6213f644d804 143 #ifndef __NO_EMBEDDED_ASM
bogdanm 87:6213f644d804 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
bogdanm 87:6213f644d804 145 {
bogdanm 87:6213f644d804 146 revsh r0, r0
bogdanm 87:6213f644d804 147 bx lr
bogdanm 87:6213f644d804 148 }
bogdanm 87:6213f644d804 149 #endif
bogdanm 87:6213f644d804 150
bogdanm 87:6213f644d804 151
bogdanm 87:6213f644d804 152 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 87:6213f644d804 153
bogdanm 87:6213f644d804 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 87:6213f644d804 155
bogdanm 87:6213f644d804 156 \param [in] value Value to rotate
bogdanm 87:6213f644d804 157 \param [in] value Number of Bits to rotate
bogdanm 87:6213f644d804 158 \return Rotated value
bogdanm 87:6213f644d804 159 */
bogdanm 87:6213f644d804 160 #define __ROR __ror
bogdanm 87:6213f644d804 161
bogdanm 87:6213f644d804 162
bogdanm 87:6213f644d804 163 /** \brief Breakpoint
bogdanm 87:6213f644d804 164
bogdanm 87:6213f644d804 165 This function causes the processor to enter Debug state.
bogdanm 87:6213f644d804 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 87:6213f644d804 167
bogdanm 87:6213f644d804 168 \param [in] value is ignored by the processor.
bogdanm 87:6213f644d804 169 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 87:6213f644d804 170 */
bogdanm 87:6213f644d804 171 #define __BKPT(value) __breakpoint(value)
bogdanm 87:6213f644d804 172
bogdanm 87:6213f644d804 173
bogdanm 87:6213f644d804 174 #if (__CORTEX_M >= 0x03)
bogdanm 87:6213f644d804 175
bogdanm 87:6213f644d804 176 /** \brief Reverse bit order of value
bogdanm 87:6213f644d804 177
bogdanm 87:6213f644d804 178 This function reverses the bit order of the given value.
bogdanm 87:6213f644d804 179
bogdanm 87:6213f644d804 180 \param [in] value Value to reverse
bogdanm 87:6213f644d804 181 \return Reversed value
bogdanm 87:6213f644d804 182 */
bogdanm 87:6213f644d804 183 #define __RBIT __rbit
bogdanm 87:6213f644d804 184
bogdanm 87:6213f644d804 185
bogdanm 87:6213f644d804 186 /** \brief LDR Exclusive (8 bit)
bogdanm 87:6213f644d804 187
bogdanm 87:6213f644d804 188 This function performs a exclusive LDR command for 8 bit value.
bogdanm 87:6213f644d804 189
bogdanm 87:6213f644d804 190 \param [in] ptr Pointer to data
bogdanm 87:6213f644d804 191 \return value of type uint8_t at (*ptr)
bogdanm 87:6213f644d804 192 */
bogdanm 87:6213f644d804 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
bogdanm 87:6213f644d804 194
bogdanm 87:6213f644d804 195
bogdanm 87:6213f644d804 196 /** \brief LDR Exclusive (16 bit)
bogdanm 87:6213f644d804 197
bogdanm 87:6213f644d804 198 This function performs a exclusive LDR command for 16 bit values.
bogdanm 87:6213f644d804 199
bogdanm 87:6213f644d804 200 \param [in] ptr Pointer to data
bogdanm 87:6213f644d804 201 \return value of type uint16_t at (*ptr)
bogdanm 87:6213f644d804 202 */
bogdanm 87:6213f644d804 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
bogdanm 87:6213f644d804 204
bogdanm 87:6213f644d804 205
bogdanm 87:6213f644d804 206 /** \brief LDR Exclusive (32 bit)
bogdanm 87:6213f644d804 207
bogdanm 87:6213f644d804 208 This function performs a exclusive LDR command for 32 bit values.
bogdanm 87:6213f644d804 209
bogdanm 87:6213f644d804 210 \param [in] ptr Pointer to data
bogdanm 87:6213f644d804 211 \return value of type uint32_t at (*ptr)
bogdanm 87:6213f644d804 212 */
bogdanm 87:6213f644d804 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
bogdanm 87:6213f644d804 214
bogdanm 87:6213f644d804 215
bogdanm 87:6213f644d804 216 /** \brief STR Exclusive (8 bit)
bogdanm 87:6213f644d804 217
bogdanm 87:6213f644d804 218 This function performs a exclusive STR command for 8 bit values.
bogdanm 87:6213f644d804 219
bogdanm 87:6213f644d804 220 \param [in] value Value to store
bogdanm 87:6213f644d804 221 \param [in] ptr Pointer to location
bogdanm 87:6213f644d804 222 \return 0 Function succeeded
bogdanm 87:6213f644d804 223 \return 1 Function failed
bogdanm 87:6213f644d804 224 */
bogdanm 87:6213f644d804 225 #define __STREXB(value, ptr) __strex(value, ptr)
bogdanm 87:6213f644d804 226
bogdanm 87:6213f644d804 227
bogdanm 87:6213f644d804 228 /** \brief STR Exclusive (16 bit)
bogdanm 87:6213f644d804 229
bogdanm 87:6213f644d804 230 This function performs a exclusive STR command for 16 bit values.
bogdanm 87:6213f644d804 231
bogdanm 87:6213f644d804 232 \param [in] value Value to store
bogdanm 87:6213f644d804 233 \param [in] ptr Pointer to location
bogdanm 87:6213f644d804 234 \return 0 Function succeeded
bogdanm 87:6213f644d804 235 \return 1 Function failed
bogdanm 87:6213f644d804 236 */
bogdanm 87:6213f644d804 237 #define __STREXH(value, ptr) __strex(value, ptr)
bogdanm 87:6213f644d804 238
bogdanm 87:6213f644d804 239
bogdanm 87:6213f644d804 240 /** \brief STR Exclusive (32 bit)
bogdanm 87:6213f644d804 241
bogdanm 87:6213f644d804 242 This function performs a exclusive STR command for 32 bit values.
bogdanm 87:6213f644d804 243
bogdanm 87:6213f644d804 244 \param [in] value Value to store
bogdanm 87:6213f644d804 245 \param [in] ptr Pointer to location
bogdanm 87:6213f644d804 246 \return 0 Function succeeded
bogdanm 87:6213f644d804 247 \return 1 Function failed
bogdanm 87:6213f644d804 248 */
bogdanm 87:6213f644d804 249 #define __STREXW(value, ptr) __strex(value, ptr)
bogdanm 87:6213f644d804 250
bogdanm 87:6213f644d804 251
bogdanm 87:6213f644d804 252 /** \brief Remove the exclusive lock
bogdanm 87:6213f644d804 253
bogdanm 87:6213f644d804 254 This function removes the exclusive lock which is created by LDREX.
bogdanm 87:6213f644d804 255
bogdanm 87:6213f644d804 256 */
bogdanm 87:6213f644d804 257 #define __CLREX __clrex
bogdanm 87:6213f644d804 258
bogdanm 87:6213f644d804 259
bogdanm 87:6213f644d804 260 /** \brief Signed Saturate
bogdanm 87:6213f644d804 261
bogdanm 87:6213f644d804 262 This function saturates a signed value.
bogdanm 87:6213f644d804 263
bogdanm 87:6213f644d804 264 \param [in] value Value to be saturated
bogdanm 87:6213f644d804 265 \param [in] sat Bit position to saturate to (1..32)
bogdanm 87:6213f644d804 266 \return Saturated value
bogdanm 87:6213f644d804 267 */
bogdanm 87:6213f644d804 268 #define __SSAT __ssat
bogdanm 87:6213f644d804 269
bogdanm 87:6213f644d804 270
bogdanm 87:6213f644d804 271 /** \brief Unsigned Saturate
bogdanm 87:6213f644d804 272
bogdanm 87:6213f644d804 273 This function saturates an unsigned value.
bogdanm 87:6213f644d804 274
bogdanm 87:6213f644d804 275 \param [in] value Value to be saturated
bogdanm 87:6213f644d804 276 \param [in] sat Bit position to saturate to (0..31)
bogdanm 87:6213f644d804 277 \return Saturated value
bogdanm 87:6213f644d804 278 */
bogdanm 87:6213f644d804 279 #define __USAT __usat
bogdanm 87:6213f644d804 280
bogdanm 87:6213f644d804 281
bogdanm 87:6213f644d804 282 /** \brief Count leading zeros
bogdanm 87:6213f644d804 283
bogdanm 87:6213f644d804 284 This function counts the number of leading zeros of a data value.
bogdanm 87:6213f644d804 285
bogdanm 87:6213f644d804 286 \param [in] value Value to count the leading zeros
bogdanm 87:6213f644d804 287 \return number of leading zeros in value
bogdanm 87:6213f644d804 288 */
bogdanm 87:6213f644d804 289 #define __CLZ __clz
bogdanm 87:6213f644d804 290
bogdanm 87:6213f644d804 291 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 87:6213f644d804 292
bogdanm 87:6213f644d804 293
bogdanm 87:6213f644d804 294
bogdanm 87:6213f644d804 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 87:6213f644d804 296 /* IAR iccarm specific functions */
bogdanm 87:6213f644d804 297
bogdanm 87:6213f644d804 298 #include <cmsis_iar.h>
bogdanm 87:6213f644d804 299
bogdanm 87:6213f644d804 300
bogdanm 87:6213f644d804 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 87:6213f644d804 302 /* TI CCS specific functions */
bogdanm 87:6213f644d804 303
bogdanm 87:6213f644d804 304 #include <cmsis_ccs.h>
bogdanm 87:6213f644d804 305
bogdanm 87:6213f644d804 306
bogdanm 87:6213f644d804 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 87:6213f644d804 308 /* GNU gcc specific functions */
bogdanm 87:6213f644d804 309
bogdanm 87:6213f644d804 310 /* Define macros for porting to both thumb1 and thumb2.
bogdanm 87:6213f644d804 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
bogdanm 87:6213f644d804 312 * Otherwise, use general registers, specified by constrant "r" */
bogdanm 87:6213f644d804 313 #if defined (__thumb__) && !defined (__thumb2__)
bogdanm 87:6213f644d804 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
bogdanm 87:6213f644d804 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
bogdanm 87:6213f644d804 316 #else
bogdanm 87:6213f644d804 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
bogdanm 87:6213f644d804 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
bogdanm 87:6213f644d804 319 #endif
bogdanm 87:6213f644d804 320
bogdanm 87:6213f644d804 321 /** \brief No Operation
bogdanm 87:6213f644d804 322
bogdanm 87:6213f644d804 323 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 87:6213f644d804 324 */
bogdanm 87:6213f644d804 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
bogdanm 87:6213f644d804 326 {
bogdanm 87:6213f644d804 327 __ASM volatile ("nop");
bogdanm 87:6213f644d804 328 }
bogdanm 87:6213f644d804 329
bogdanm 87:6213f644d804 330
bogdanm 87:6213f644d804 331 /** \brief Wait For Interrupt
bogdanm 87:6213f644d804 332
bogdanm 87:6213f644d804 333 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 87:6213f644d804 334 until one of a number of events occurs.
bogdanm 87:6213f644d804 335 */
bogdanm 87:6213f644d804 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
bogdanm 87:6213f644d804 337 {
bogdanm 87:6213f644d804 338 __ASM volatile ("wfi");
bogdanm 87:6213f644d804 339 }
bogdanm 87:6213f644d804 340
bogdanm 87:6213f644d804 341
bogdanm 87:6213f644d804 342 /** \brief Wait For Event
bogdanm 87:6213f644d804 343
bogdanm 87:6213f644d804 344 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 87:6213f644d804 345 a low-power state until one of a number of events occurs.
bogdanm 87:6213f644d804 346 */
bogdanm 87:6213f644d804 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
bogdanm 87:6213f644d804 348 {
bogdanm 87:6213f644d804 349 __ASM volatile ("wfe");
bogdanm 87:6213f644d804 350 }
bogdanm 87:6213f644d804 351
bogdanm 87:6213f644d804 352
bogdanm 87:6213f644d804 353 /** \brief Send Event
bogdanm 87:6213f644d804 354
bogdanm 87:6213f644d804 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 87:6213f644d804 356 */
bogdanm 87:6213f644d804 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
bogdanm 87:6213f644d804 358 {
bogdanm 87:6213f644d804 359 __ASM volatile ("sev");
bogdanm 87:6213f644d804 360 }
bogdanm 87:6213f644d804 361
bogdanm 87:6213f644d804 362
bogdanm 87:6213f644d804 363 /** \brief Instruction Synchronization Barrier
bogdanm 87:6213f644d804 364
bogdanm 87:6213f644d804 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 87:6213f644d804 366 so that all instructions following the ISB are fetched from cache or
bogdanm 87:6213f644d804 367 memory, after the instruction has been completed.
bogdanm 87:6213f644d804 368 */
bogdanm 87:6213f644d804 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
bogdanm 87:6213f644d804 370 {
bogdanm 87:6213f644d804 371 __ASM volatile ("isb");
bogdanm 87:6213f644d804 372 }
bogdanm 87:6213f644d804 373
bogdanm 87:6213f644d804 374
bogdanm 87:6213f644d804 375 /** \brief Data Synchronization Barrier
bogdanm 87:6213f644d804 376
bogdanm 87:6213f644d804 377 This function acts as a special kind of Data Memory Barrier.
bogdanm 87:6213f644d804 378 It completes when all explicit memory accesses before this instruction complete.
bogdanm 87:6213f644d804 379 */
bogdanm 87:6213f644d804 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
bogdanm 87:6213f644d804 381 {
bogdanm 87:6213f644d804 382 __ASM volatile ("dsb");
bogdanm 87:6213f644d804 383 }
bogdanm 87:6213f644d804 384
bogdanm 87:6213f644d804 385
bogdanm 87:6213f644d804 386 /** \brief Data Memory Barrier
bogdanm 87:6213f644d804 387
bogdanm 87:6213f644d804 388 This function ensures the apparent order of the explicit memory operations before
bogdanm 87:6213f644d804 389 and after the instruction, without ensuring their completion.
bogdanm 87:6213f644d804 390 */
bogdanm 87:6213f644d804 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
bogdanm 87:6213f644d804 392 {
bogdanm 87:6213f644d804 393 __ASM volatile ("dmb");
bogdanm 87:6213f644d804 394 }
bogdanm 87:6213f644d804 395
bogdanm 87:6213f644d804 396
bogdanm 87:6213f644d804 397 /** \brief Reverse byte order (32 bit)
bogdanm 87:6213f644d804 398
bogdanm 87:6213f644d804 399 This function reverses the byte order in integer value.
bogdanm 87:6213f644d804 400
bogdanm 87:6213f644d804 401 \param [in] value Value to reverse
bogdanm 87:6213f644d804 402 \return Reversed value
bogdanm 87:6213f644d804 403 */
bogdanm 87:6213f644d804 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
bogdanm 87:6213f644d804 405 {
bogdanm 87:6213f644d804 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
bogdanm 87:6213f644d804 407 return __builtin_bswap32(value);
bogdanm 87:6213f644d804 408 #else
bogdanm 87:6213f644d804 409 uint32_t result;
bogdanm 87:6213f644d804 410
bogdanm 87:6213f644d804 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 87:6213f644d804 412 return(result);
bogdanm 87:6213f644d804 413 #endif
bogdanm 87:6213f644d804 414 }
bogdanm 87:6213f644d804 415
bogdanm 87:6213f644d804 416
bogdanm 87:6213f644d804 417 /** \brief Reverse byte order (16 bit)
bogdanm 87:6213f644d804 418
bogdanm 87:6213f644d804 419 This function reverses the byte order in two unsigned short values.
bogdanm 87:6213f644d804 420
bogdanm 87:6213f644d804 421 \param [in] value Value to reverse
bogdanm 87:6213f644d804 422 \return Reversed value
bogdanm 87:6213f644d804 423 */
bogdanm 87:6213f644d804 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
bogdanm 87:6213f644d804 425 {
bogdanm 87:6213f644d804 426 uint32_t result;
bogdanm 87:6213f644d804 427
bogdanm 87:6213f644d804 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 87:6213f644d804 429 return(result);
bogdanm 87:6213f644d804 430 }
bogdanm 87:6213f644d804 431
bogdanm 87:6213f644d804 432
bogdanm 87:6213f644d804 433 /** \brief Reverse byte order in signed short value
bogdanm 87:6213f644d804 434
bogdanm 87:6213f644d804 435 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 87:6213f644d804 436
bogdanm 87:6213f644d804 437 \param [in] value Value to reverse
bogdanm 87:6213f644d804 438 \return Reversed value
bogdanm 87:6213f644d804 439 */
bogdanm 87:6213f644d804 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
bogdanm 87:6213f644d804 441 {
bogdanm 87:6213f644d804 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 87:6213f644d804 443 return (short)__builtin_bswap16(value);
bogdanm 87:6213f644d804 444 #else
bogdanm 87:6213f644d804 445 uint32_t result;
bogdanm 87:6213f644d804 446
bogdanm 87:6213f644d804 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 87:6213f644d804 448 return(result);
bogdanm 87:6213f644d804 449 #endif
bogdanm 87:6213f644d804 450 }
bogdanm 87:6213f644d804 451
bogdanm 87:6213f644d804 452
bogdanm 87:6213f644d804 453 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 87:6213f644d804 454
bogdanm 87:6213f644d804 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 87:6213f644d804 456
bogdanm 87:6213f644d804 457 \param [in] value Value to rotate
bogdanm 87:6213f644d804 458 \param [in] value Number of Bits to rotate
bogdanm 87:6213f644d804 459 \return Rotated value
bogdanm 87:6213f644d804 460 */
bogdanm 87:6213f644d804 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
bogdanm 87:6213f644d804 462 {
bogdanm 87:6213f644d804 463 return (op1 >> op2) | (op1 << (32 - op2));
bogdanm 87:6213f644d804 464 }
bogdanm 87:6213f644d804 465
bogdanm 87:6213f644d804 466
bogdanm 87:6213f644d804 467 /** \brief Breakpoint
bogdanm 87:6213f644d804 468
bogdanm 87:6213f644d804 469 This function causes the processor to enter Debug state.
bogdanm 87:6213f644d804 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 87:6213f644d804 471
bogdanm 87:6213f644d804 472 \param [in] value is ignored by the processor.
bogdanm 87:6213f644d804 473 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 87:6213f644d804 474 */
bogdanm 87:6213f644d804 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
bogdanm 87:6213f644d804 476
bogdanm 87:6213f644d804 477
bogdanm 87:6213f644d804 478 #if (__CORTEX_M >= 0x03)
bogdanm 87:6213f644d804 479
bogdanm 87:6213f644d804 480 /** \brief Reverse bit order of value
bogdanm 87:6213f644d804 481
bogdanm 87:6213f644d804 482 This function reverses the bit order of the given value.
bogdanm 87:6213f644d804 483
bogdanm 87:6213f644d804 484 \param [in] value Value to reverse
bogdanm 87:6213f644d804 485 \return Reversed value
bogdanm 87:6213f644d804 486 */
bogdanm 87:6213f644d804 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
bogdanm 87:6213f644d804 488 {
bogdanm 87:6213f644d804 489 uint32_t result;
bogdanm 87:6213f644d804 490
bogdanm 87:6213f644d804 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
bogdanm 87:6213f644d804 492 return(result);
bogdanm 87:6213f644d804 493 }
bogdanm 87:6213f644d804 494
bogdanm 87:6213f644d804 495
bogdanm 87:6213f644d804 496 /** \brief LDR Exclusive (8 bit)
bogdanm 87:6213f644d804 497
bogdanm 87:6213f644d804 498 This function performs a exclusive LDR command for 8 bit value.
bogdanm 87:6213f644d804 499
bogdanm 87:6213f644d804 500 \param [in] ptr Pointer to data
bogdanm 87:6213f644d804 501 \return value of type uint8_t at (*ptr)
bogdanm 87:6213f644d804 502 */
bogdanm 87:6213f644d804 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
bogdanm 87:6213f644d804 504 {
bogdanm 87:6213f644d804 505 uint32_t result;
bogdanm 87:6213f644d804 506
bogdanm 87:6213f644d804 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 87:6213f644d804 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 87:6213f644d804 509 #else
bogdanm 87:6213f644d804 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 87:6213f644d804 511 accepted by assembler. So has to use following less efficient pattern.
bogdanm 87:6213f644d804 512 */
bogdanm 87:6213f644d804 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 87:6213f644d804 514 #endif
bogdanm 87:6213f644d804 515 return(result);
bogdanm 87:6213f644d804 516 }
bogdanm 87:6213f644d804 517
bogdanm 87:6213f644d804 518
bogdanm 87:6213f644d804 519 /** \brief LDR Exclusive (16 bit)
bogdanm 87:6213f644d804 520
bogdanm 87:6213f644d804 521 This function performs a exclusive LDR command for 16 bit values.
bogdanm 87:6213f644d804 522
bogdanm 87:6213f644d804 523 \param [in] ptr Pointer to data
bogdanm 87:6213f644d804 524 \return value of type uint16_t at (*ptr)
bogdanm 87:6213f644d804 525 */
bogdanm 87:6213f644d804 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
bogdanm 87:6213f644d804 527 {
bogdanm 87:6213f644d804 528 uint32_t result;
bogdanm 87:6213f644d804 529
bogdanm 87:6213f644d804 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 87:6213f644d804 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 87:6213f644d804 532 #else
bogdanm 87:6213f644d804 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 87:6213f644d804 534 accepted by assembler. So has to use following less efficient pattern.
bogdanm 87:6213f644d804 535 */
bogdanm 87:6213f644d804 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 87:6213f644d804 537 #endif
bogdanm 87:6213f644d804 538 return(result);
bogdanm 87:6213f644d804 539 }
bogdanm 87:6213f644d804 540
bogdanm 87:6213f644d804 541
bogdanm 87:6213f644d804 542 /** \brief LDR Exclusive (32 bit)
bogdanm 87:6213f644d804 543
bogdanm 87:6213f644d804 544 This function performs a exclusive LDR command for 32 bit values.
bogdanm 87:6213f644d804 545
bogdanm 87:6213f644d804 546 \param [in] ptr Pointer to data
bogdanm 87:6213f644d804 547 \return value of type uint32_t at (*ptr)
bogdanm 87:6213f644d804 548 */
bogdanm 87:6213f644d804 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
bogdanm 87:6213f644d804 550 {
bogdanm 87:6213f644d804 551 uint32_t result;
bogdanm 87:6213f644d804 552
bogdanm 87:6213f644d804 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 87:6213f644d804 554 return(result);
bogdanm 87:6213f644d804 555 }
bogdanm 87:6213f644d804 556
bogdanm 87:6213f644d804 557
bogdanm 87:6213f644d804 558 /** \brief STR Exclusive (8 bit)
bogdanm 87:6213f644d804 559
bogdanm 87:6213f644d804 560 This function performs a exclusive STR command for 8 bit values.
bogdanm 87:6213f644d804 561
bogdanm 87:6213f644d804 562 \param [in] value Value to store
bogdanm 87:6213f644d804 563 \param [in] ptr Pointer to location
bogdanm 87:6213f644d804 564 \return 0 Function succeeded
bogdanm 87:6213f644d804 565 \return 1 Function failed
bogdanm 87:6213f644d804 566 */
bogdanm 87:6213f644d804 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
bogdanm 87:6213f644d804 568 {
bogdanm 87:6213f644d804 569 uint32_t result;
bogdanm 87:6213f644d804 570
bogdanm 87:6213f644d804 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 87:6213f644d804 572 return(result);
bogdanm 87:6213f644d804 573 }
bogdanm 87:6213f644d804 574
bogdanm 87:6213f644d804 575
bogdanm 87:6213f644d804 576 /** \brief STR Exclusive (16 bit)
bogdanm 87:6213f644d804 577
bogdanm 87:6213f644d804 578 This function performs a exclusive STR command for 16 bit values.
bogdanm 87:6213f644d804 579
bogdanm 87:6213f644d804 580 \param [in] value Value to store
bogdanm 87:6213f644d804 581 \param [in] ptr Pointer to location
bogdanm 87:6213f644d804 582 \return 0 Function succeeded
bogdanm 87:6213f644d804 583 \return 1 Function failed
bogdanm 87:6213f644d804 584 */
bogdanm 87:6213f644d804 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
bogdanm 87:6213f644d804 586 {
bogdanm 87:6213f644d804 587 uint32_t result;
bogdanm 87:6213f644d804 588
bogdanm 87:6213f644d804 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 87:6213f644d804 590 return(result);
bogdanm 87:6213f644d804 591 }
bogdanm 87:6213f644d804 592
bogdanm 87:6213f644d804 593
bogdanm 87:6213f644d804 594 /** \brief STR Exclusive (32 bit)
bogdanm 87:6213f644d804 595
bogdanm 87:6213f644d804 596 This function performs a exclusive STR command for 32 bit values.
bogdanm 87:6213f644d804 597
bogdanm 87:6213f644d804 598 \param [in] value Value to store
bogdanm 87:6213f644d804 599 \param [in] ptr Pointer to location
bogdanm 87:6213f644d804 600 \return 0 Function succeeded
bogdanm 87:6213f644d804 601 \return 1 Function failed
bogdanm 87:6213f644d804 602 */
bogdanm 87:6213f644d804 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
bogdanm 87:6213f644d804 604 {
bogdanm 87:6213f644d804 605 uint32_t result;
bogdanm 87:6213f644d804 606
bogdanm 87:6213f644d804 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 87:6213f644d804 608 return(result);
bogdanm 87:6213f644d804 609 }
bogdanm 87:6213f644d804 610
bogdanm 87:6213f644d804 611
bogdanm 87:6213f644d804 612 /** \brief Remove the exclusive lock
bogdanm 87:6213f644d804 613
bogdanm 87:6213f644d804 614 This function removes the exclusive lock which is created by LDREX.
bogdanm 87:6213f644d804 615
bogdanm 87:6213f644d804 616 */
bogdanm 87:6213f644d804 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
bogdanm 87:6213f644d804 618 {
bogdanm 87:6213f644d804 619 __ASM volatile ("clrex" ::: "memory");
bogdanm 87:6213f644d804 620 }
bogdanm 87:6213f644d804 621
bogdanm 87:6213f644d804 622
bogdanm 87:6213f644d804 623 /** \brief Signed Saturate
bogdanm 87:6213f644d804 624
bogdanm 87:6213f644d804 625 This function saturates a signed value.
bogdanm 87:6213f644d804 626
bogdanm 87:6213f644d804 627 \param [in] value Value to be saturated
bogdanm 87:6213f644d804 628 \param [in] sat Bit position to saturate to (1..32)
bogdanm 87:6213f644d804 629 \return Saturated value
bogdanm 87:6213f644d804 630 */
bogdanm 87:6213f644d804 631 #define __SSAT(ARG1,ARG2) \
bogdanm 87:6213f644d804 632 ({ \
bogdanm 87:6213f644d804 633 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 87:6213f644d804 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 87:6213f644d804 635 __RES; \
bogdanm 87:6213f644d804 636 })
bogdanm 87:6213f644d804 637
bogdanm 87:6213f644d804 638
bogdanm 87:6213f644d804 639 /** \brief Unsigned Saturate
bogdanm 87:6213f644d804 640
bogdanm 87:6213f644d804 641 This function saturates an unsigned value.
bogdanm 87:6213f644d804 642
bogdanm 87:6213f644d804 643 \param [in] value Value to be saturated
bogdanm 87:6213f644d804 644 \param [in] sat Bit position to saturate to (0..31)
bogdanm 87:6213f644d804 645 \return Saturated value
bogdanm 87:6213f644d804 646 */
bogdanm 87:6213f644d804 647 #define __USAT(ARG1,ARG2) \
bogdanm 87:6213f644d804 648 ({ \
bogdanm 87:6213f644d804 649 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 87:6213f644d804 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 87:6213f644d804 651 __RES; \
bogdanm 87:6213f644d804 652 })
bogdanm 87:6213f644d804 653
bogdanm 87:6213f644d804 654
bogdanm 87:6213f644d804 655 /** \brief Count leading zeros
bogdanm 87:6213f644d804 656
bogdanm 87:6213f644d804 657 This function counts the number of leading zeros of a data value.
bogdanm 87:6213f644d804 658
bogdanm 87:6213f644d804 659 \param [in] value Value to count the leading zeros
bogdanm 87:6213f644d804 660 \return number of leading zeros in value
bogdanm 87:6213f644d804 661 */
bogdanm 87:6213f644d804 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
bogdanm 87:6213f644d804 663 {
bogdanm 87:6213f644d804 664 uint32_t result;
bogdanm 87:6213f644d804 665
bogdanm 87:6213f644d804 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
bogdanm 87:6213f644d804 667 return(result);
bogdanm 87:6213f644d804 668 }
bogdanm 87:6213f644d804 669
bogdanm 87:6213f644d804 670 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 87:6213f644d804 671
bogdanm 87:6213f644d804 672
bogdanm 87:6213f644d804 673
bogdanm 87:6213f644d804 674
bogdanm 87:6213f644d804 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 87:6213f644d804 676 /* TASKING carm specific functions */
bogdanm 87:6213f644d804 677
bogdanm 87:6213f644d804 678 /*
bogdanm 87:6213f644d804 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 87:6213f644d804 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 87:6213f644d804 681 * Including the CMSIS ones.
bogdanm 87:6213f644d804 682 */
bogdanm 87:6213f644d804 683
bogdanm 87:6213f644d804 684 #endif
bogdanm 87:6213f644d804 685
bogdanm 87:6213f644d804 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
bogdanm 87:6213f644d804 687
bogdanm 87:6213f644d804 688 #endif /* __CORE_CMINSTR_H */