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TARGET_NUCLEO_L053R8/stm32l0xx_hal_usart.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Parent:
84:0b3ab51c8877
Child:
96:487b796308b0
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /**
bogdanm 84:0b3ab51c8877 2 ******************************************************************************
bogdanm 84:0b3ab51c8877 3 * @file stm32l0xx_hal_usart.h
bogdanm 84:0b3ab51c8877 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 18-June-2014
bogdanm 84:0b3ab51c8877 7 * @brief Header file of USART HAL module.
bogdanm 84:0b3ab51c8877 8 ******************************************************************************
bogdanm 84:0b3ab51c8877 9 * @attention
bogdanm 84:0b3ab51c8877 10 *
bogdanm 84:0b3ab51c8877 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 84:0b3ab51c8877 12 *
bogdanm 84:0b3ab51c8877 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 84:0b3ab51c8877 14 * are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 84:0b3ab51c8877 16 * this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 84:0b3ab51c8877 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 84:0b3ab51c8877 19 * and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 84:0b3ab51c8877 21 * may be used to endorse or promote products derived from this software
bogdanm 84:0b3ab51c8877 22 * without specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 84:0b3ab51c8877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 84:0b3ab51c8877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 84:0b3ab51c8877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 84:0b3ab51c8877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 84:0b3ab51c8877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 84:0b3ab51c8877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 84:0b3ab51c8877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 34 *
bogdanm 84:0b3ab51c8877 35 * Unless required by applicable law or agreed to in writing, software
bogdanm 84:0b3ab51c8877 36 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 84:0b3ab51c8877 37 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 84:0b3ab51c8877 38 * See the License for the specific language governing permissions and
bogdanm 84:0b3ab51c8877 39 * limitations under the License.
bogdanm 84:0b3ab51c8877 40 *
bogdanm 84:0b3ab51c8877 41 ******************************************************************************
bogdanm 84:0b3ab51c8877 42 */
bogdanm 84:0b3ab51c8877 43
bogdanm 84:0b3ab51c8877 44 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 84:0b3ab51c8877 45 #ifndef __STM32L0xx_HAL_USART_H
bogdanm 84:0b3ab51c8877 46 #define __STM32L0xx_HAL_USART_H
bogdanm 84:0b3ab51c8877 47
bogdanm 84:0b3ab51c8877 48 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 49 extern "C" {
bogdanm 84:0b3ab51c8877 50 #endif
bogdanm 84:0b3ab51c8877 51
bogdanm 84:0b3ab51c8877 52 /* Includes ------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 53 #include "stm32l0xx_hal_def.h"
bogdanm 84:0b3ab51c8877 54
bogdanm 84:0b3ab51c8877 55 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 84:0b3ab51c8877 56 * @{
bogdanm 84:0b3ab51c8877 57 */
bogdanm 84:0b3ab51c8877 58
bogdanm 84:0b3ab51c8877 59 /** @addtogroup USART
bogdanm 84:0b3ab51c8877 60 * @{
bogdanm 84:0b3ab51c8877 61 */
bogdanm 84:0b3ab51c8877 62
bogdanm 84:0b3ab51c8877 63 /* Exported types ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 64 /**
bogdanm 84:0b3ab51c8877 65 * @brief USART Init Structure definition
bogdanm 84:0b3ab51c8877 66 */
bogdanm 84:0b3ab51c8877 67 typedef struct
bogdanm 84:0b3ab51c8877 68 {
bogdanm 84:0b3ab51c8877 69 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
bogdanm 84:0b3ab51c8877 70 The baud rate is computed using the following formula:
bogdanm 84:0b3ab51c8877 71 Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))) */
bogdanm 84:0b3ab51c8877 72
bogdanm 84:0b3ab51c8877 73 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm 92:4fc01daae5a5 74 This parameter can be a value of @ref USARTEx_Word_Length */
bogdanm 84:0b3ab51c8877 75
bogdanm 84:0b3ab51c8877 76 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
bogdanm 84:0b3ab51c8877 77 This parameter can be a value of @ref USART_Stop_Bits */
bogdanm 84:0b3ab51c8877 78
bogdanm 84:0b3ab51c8877 79 uint32_t Parity; /*!< Specifies the parity mode.
bogdanm 84:0b3ab51c8877 80 This parameter can be a value of @ref USART_Parity
bogdanm 84:0b3ab51c8877 81 @note When parity is enabled, the computed parity is inserted
bogdanm 84:0b3ab51c8877 82 at the MSB position of the transmitted data (9th bit when
bogdanm 84:0b3ab51c8877 83 the word length is set to 9 data bits; 8th bit when the
bogdanm 84:0b3ab51c8877 84 word length is set to 8 data bits). */
bogdanm 84:0b3ab51c8877 85
bogdanm 84:0b3ab51c8877 86 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
bogdanm 84:0b3ab51c8877 87 This parameter can be a value of @ref USART_Mode */
bogdanm 84:0b3ab51c8877 88
bogdanm 84:0b3ab51c8877 89 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
bogdanm 84:0b3ab51c8877 90 This parameter can be a value of @ref USART_Clock_Polarity */
bogdanm 84:0b3ab51c8877 91
bogdanm 84:0b3ab51c8877 92 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
bogdanm 84:0b3ab51c8877 93 This parameter can be a value of @ref USART_Clock_Phase */
bogdanm 84:0b3ab51c8877 94
bogdanm 84:0b3ab51c8877 95 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
bogdanm 84:0b3ab51c8877 96 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
bogdanm 84:0b3ab51c8877 97 This parameter can be a value of @ref USART_Last_Bit */
bogdanm 84:0b3ab51c8877 98 }USART_InitTypeDef;
bogdanm 84:0b3ab51c8877 99
bogdanm 84:0b3ab51c8877 100 /**
bogdanm 84:0b3ab51c8877 101 * @brief HAL State structures definition
bogdanm 84:0b3ab51c8877 102 */
bogdanm 84:0b3ab51c8877 103 typedef enum
bogdanm 84:0b3ab51c8877 104 {
bogdanm 84:0b3ab51c8877 105 HAL_USART_STATE_RESET = 0x00, /*!< Peripheral Reset state */
bogdanm 84:0b3ab51c8877 106 HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 84:0b3ab51c8877 107 HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 84:0b3ab51c8877 108 HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 84:0b3ab51c8877 109 HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 84:0b3ab51c8877 110 HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */
bogdanm 84:0b3ab51c8877 111 HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 84:0b3ab51c8877 112 HAL_USART_STATE_ERROR = 0x04 /*!< Error */
bogdanm 84:0b3ab51c8877 113 }HAL_USART_StateTypeDef;
bogdanm 84:0b3ab51c8877 114
bogdanm 84:0b3ab51c8877 115 /**
bogdanm 84:0b3ab51c8877 116 * @brief HAL USART Error Code structure definition
bogdanm 84:0b3ab51c8877 117 */
bogdanm 84:0b3ab51c8877 118 typedef enum
bogdanm 84:0b3ab51c8877 119 {
bogdanm 84:0b3ab51c8877 120 HAL_USART_ERROR_NONE = 0x00, /*!< No error */
bogdanm 84:0b3ab51c8877 121 HAL_USART_ERROR_PE = 0x01, /*!< Parity error */
bogdanm 84:0b3ab51c8877 122 HAL_USART_ERROR_NE = 0x02, /*!< Noise error */
bogdanm 84:0b3ab51c8877 123 HAL_USART_ERROR_FE = 0x04, /*!< frame error */
bogdanm 84:0b3ab51c8877 124 HAL_USART_ERROR_ORE = 0x08, /*!< Overrun error */
bogdanm 84:0b3ab51c8877 125 HAL_USART_ERROR_DMA = 0x10 /*!< DMA transfer error */
bogdanm 84:0b3ab51c8877 126 }HAL_USART_ErrorTypeDef;
bogdanm 84:0b3ab51c8877 127
bogdanm 84:0b3ab51c8877 128 /**
bogdanm 84:0b3ab51c8877 129 * @brief USART clock sources definitions
bogdanm 84:0b3ab51c8877 130 */
bogdanm 84:0b3ab51c8877 131 typedef enum
bogdanm 84:0b3ab51c8877 132 {
bogdanm 84:0b3ab51c8877 133 USART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */
bogdanm 84:0b3ab51c8877 134 USART_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */
bogdanm 84:0b3ab51c8877 135 USART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */
bogdanm 84:0b3ab51c8877 136 USART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */
bogdanm 84:0b3ab51c8877 137 USART_CLOCKSOURCE_LSE = 0x08 /*!< LSE clock source */
bogdanm 84:0b3ab51c8877 138 }USART_ClockSourceTypeDef;
bogdanm 84:0b3ab51c8877 139
bogdanm 84:0b3ab51c8877 140
bogdanm 84:0b3ab51c8877 141 /**
bogdanm 84:0b3ab51c8877 142 * @brief HAL USART Error Code structure definition
bogdanm 84:0b3ab51c8877 143 */
bogdanm 84:0b3ab51c8877 144
bogdanm 84:0b3ab51c8877 145 /**
bogdanm 84:0b3ab51c8877 146 * @brief USART handle Structure definition
bogdanm 84:0b3ab51c8877 147 */
bogdanm 84:0b3ab51c8877 148 typedef struct
bogdanm 84:0b3ab51c8877 149 {
bogdanm 84:0b3ab51c8877 150 USART_TypeDef *Instance; /*!< USART registers base address */
bogdanm 84:0b3ab51c8877 151
bogdanm 84:0b3ab51c8877 152 USART_InitTypeDef Init; /*!< Usart communication parameters */
bogdanm 84:0b3ab51c8877 153
bogdanm 84:0b3ab51c8877 154 uint8_t *pTxBuffPtr; /*!< Pointer to Usart Tx transfer Buffer */
bogdanm 84:0b3ab51c8877 155
bogdanm 84:0b3ab51c8877 156 uint16_t TxXferSize; /*!< Usart Tx Transfer size */
bogdanm 84:0b3ab51c8877 157
bogdanm 84:0b3ab51c8877 158 __IO uint16_t TxXferCount; /*!< Usart Tx Transfer Counter */
bogdanm 84:0b3ab51c8877 159
bogdanm 84:0b3ab51c8877 160 uint8_t *pRxBuffPtr; /*!< Pointer to Usart Rx transfer Buffer */
bogdanm 84:0b3ab51c8877 161
bogdanm 84:0b3ab51c8877 162 uint16_t RxXferSize; /*!< Usart Rx Transfer size */
bogdanm 84:0b3ab51c8877 163
bogdanm 84:0b3ab51c8877 164 __IO uint16_t RxXferCount; /*!< Usart Rx Transfer Counter */
bogdanm 84:0b3ab51c8877 165
bogdanm 84:0b3ab51c8877 166 uint16_t Mask; /* USART Rx RDR register mask */
bogdanm 84:0b3ab51c8877 167
bogdanm 84:0b3ab51c8877 168 DMA_HandleTypeDef *hdmatx; /*!< Usart Tx DMA Handle parameters */
bogdanm 84:0b3ab51c8877 169
bogdanm 84:0b3ab51c8877 170 DMA_HandleTypeDef *hdmarx; /*!< Usart Rx DMA Handle parameters */
bogdanm 84:0b3ab51c8877 171
bogdanm 84:0b3ab51c8877 172 HAL_LockTypeDef Lock; /*!< Locking object */
bogdanm 84:0b3ab51c8877 173
bogdanm 84:0b3ab51c8877 174 __IO HAL_USART_StateTypeDef State; /*!< Usart communication state */
bogdanm 84:0b3ab51c8877 175
bogdanm 84:0b3ab51c8877 176 __IO HAL_USART_ErrorTypeDef ErrorCode; /*!< USART Error code */
bogdanm 84:0b3ab51c8877 177
bogdanm 84:0b3ab51c8877 178 }USART_HandleTypeDef;
bogdanm 84:0b3ab51c8877 179
bogdanm 84:0b3ab51c8877 180
bogdanm 84:0b3ab51c8877 181 /* Exported constants --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 182 /** @defgroup USART_Exported_Constants
bogdanm 84:0b3ab51c8877 183 * @{
bogdanm 84:0b3ab51c8877 184 */
bogdanm 84:0b3ab51c8877 185
bogdanm 92:4fc01daae5a5 186 /** @defgroup USART_Stop_Bits
bogdanm 84:0b3ab51c8877 187 * @{
bogdanm 84:0b3ab51c8877 188 */
bogdanm 84:0b3ab51c8877 189 #define USART_STOPBITS_1 ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 190 #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0)
bogdanm 84:0b3ab51c8877 191 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
bogdanm 84:0b3ab51c8877 192 #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
bogdanm 84:0b3ab51c8877 193 #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \
bogdanm 84:0b3ab51c8877 194 ((STOPBITS) == USART_STOPBITS_0_5) || \
bogdanm 84:0b3ab51c8877 195 ((STOPBITS) == USART_STOPBITS_1_5) || \
bogdanm 84:0b3ab51c8877 196 ((STOPBITS) == USART_STOPBITS_2))
bogdanm 84:0b3ab51c8877 197 /**
bogdanm 84:0b3ab51c8877 198 * @}
bogdanm 84:0b3ab51c8877 199 */
bogdanm 84:0b3ab51c8877 200
bogdanm 92:4fc01daae5a5 201 /** @defgroup USART_Parity
bogdanm 84:0b3ab51c8877 202 * @{
bogdanm 84:0b3ab51c8877 203 */
bogdanm 84:0b3ab51c8877 204 #define USART_PARITY_NONE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 205 #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
bogdanm 84:0b3ab51c8877 206 #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
bogdanm 84:0b3ab51c8877 207 #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \
bogdanm 84:0b3ab51c8877 208 ((PARITY) == USART_PARITY_EVEN) || \
bogdanm 84:0b3ab51c8877 209 ((PARITY) == USART_PARITY_ODD))
bogdanm 84:0b3ab51c8877 210 /**
bogdanm 84:0b3ab51c8877 211 * @}
bogdanm 84:0b3ab51c8877 212 */
bogdanm 84:0b3ab51c8877 213
bogdanm 92:4fc01daae5a5 214 /** @defgroup USART_Mode
bogdanm 84:0b3ab51c8877 215 * @{
bogdanm 84:0b3ab51c8877 216 */
bogdanm 84:0b3ab51c8877 217 #define USART_MODE_RX ((uint32_t)USART_CR1_RE)
bogdanm 84:0b3ab51c8877 218 #define USART_MODE_TX ((uint32_t)USART_CR1_TE)
bogdanm 84:0b3ab51c8877 219 #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
bogdanm 84:0b3ab51c8877 220 #define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFFFFFF3) == 0x00) && ((MODE) != (uint32_t)0x00))
bogdanm 84:0b3ab51c8877 221 /**
bogdanm 84:0b3ab51c8877 222 * @}
bogdanm 84:0b3ab51c8877 223 */
bogdanm 84:0b3ab51c8877 224
bogdanm 92:4fc01daae5a5 225 /** @defgroup USART_Clock
bogdanm 84:0b3ab51c8877 226 * @{
bogdanm 84:0b3ab51c8877 227 */
bogdanm 84:0b3ab51c8877 228 #define USART_CLOCK_DISABLED ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 229 #define USART_CLOCK_ENABLED ((uint32_t)USART_CR2_CLKEN)
bogdanm 84:0b3ab51c8877 230 #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLED) || \
bogdanm 84:0b3ab51c8877 231 ((CLOCK) == USART_CLOCK_ENABLED))
bogdanm 84:0b3ab51c8877 232 /**
bogdanm 84:0b3ab51c8877 233 * @}
bogdanm 84:0b3ab51c8877 234 */
bogdanm 84:0b3ab51c8877 235
bogdanm 92:4fc01daae5a5 236 /** @defgroup USART_Clock_Polarity
bogdanm 84:0b3ab51c8877 237 * @{
bogdanm 84:0b3ab51c8877 238 */
bogdanm 84:0b3ab51c8877 239 #define USART_POLARITY_LOW ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 240 #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL)
bogdanm 84:0b3ab51c8877 241 #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH))
bogdanm 84:0b3ab51c8877 242 /**
bogdanm 84:0b3ab51c8877 243 * @}
bogdanm 84:0b3ab51c8877 244 */
bogdanm 84:0b3ab51c8877 245
bogdanm 84:0b3ab51c8877 246 /** @defgroup USART_Clock_Phase
bogdanm 84:0b3ab51c8877 247 * @{
bogdanm 84:0b3ab51c8877 248 */
bogdanm 84:0b3ab51c8877 249 #define USART_PHASE_1EDGE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 250 #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA)
bogdanm 84:0b3ab51c8877 251 #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE))
bogdanm 84:0b3ab51c8877 252 /**
bogdanm 84:0b3ab51c8877 253 * @}
bogdanm 84:0b3ab51c8877 254 */
bogdanm 84:0b3ab51c8877 255
bogdanm 84:0b3ab51c8877 256 /** @defgroup USART_Last_Bit
bogdanm 84:0b3ab51c8877 257 * @{
bogdanm 84:0b3ab51c8877 258 */
bogdanm 84:0b3ab51c8877 259 #define USART_LASTBIT_DISABLE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 260 #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL)
bogdanm 84:0b3ab51c8877 261 #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \
bogdanm 84:0b3ab51c8877 262 ((LASTBIT) == USART_LASTBIT_ENABLE))
bogdanm 84:0b3ab51c8877 263 /**
bogdanm 84:0b3ab51c8877 264 * @}
bogdanm 84:0b3ab51c8877 265 */
bogdanm 84:0b3ab51c8877 266
bogdanm 84:0b3ab51c8877 267
bogdanm 92:4fc01daae5a5 268 /** @defgroup USART_Flags
bogdanm 84:0b3ab51c8877 269 * Elements values convention: 0xXXXX
bogdanm 84:0b3ab51c8877 270 * - 0xXXXX : Flag mask in the ISR register
bogdanm 84:0b3ab51c8877 271 * @{
bogdanm 84:0b3ab51c8877 272 */
bogdanm 84:0b3ab51c8877 273 #define USART_FLAG_REACK ((uint32_t)0x00400000)
bogdanm 84:0b3ab51c8877 274 #define USART_FLAG_TEACK ((uint32_t)0x00200000)
bogdanm 84:0b3ab51c8877 275 #define USART_FLAG_BUSY ((uint32_t)0x00010000)
bogdanm 84:0b3ab51c8877 276 #define USART_FLAG_CTS ((uint32_t)0x00000400)
bogdanm 84:0b3ab51c8877 277 #define USART_FLAG_CTSIF ((uint32_t)0x00000200)
bogdanm 84:0b3ab51c8877 278 #define USART_FLAG_LBDF ((uint32_t)0x00000100)
bogdanm 84:0b3ab51c8877 279 #define USART_FLAG_TXE ((uint32_t)0x00000080)
bogdanm 84:0b3ab51c8877 280 #define USART_FLAG_TC ((uint32_t)0x00000040)
bogdanm 84:0b3ab51c8877 281 #define USART_FLAG_RXNE ((uint32_t)0x00000020)
bogdanm 84:0b3ab51c8877 282 #define USART_FLAG_IDLE ((uint32_t)0x00000010)
bogdanm 84:0b3ab51c8877 283 #define USART_FLAG_ORE ((uint32_t)0x00000008)
bogdanm 84:0b3ab51c8877 284 #define USART_FLAG_NE ((uint32_t)0x00000004)
bogdanm 84:0b3ab51c8877 285 #define USART_FLAG_FE ((uint32_t)0x00000002)
bogdanm 84:0b3ab51c8877 286 #define USART_FLAG_PE ((uint32_t)0x00000001)
bogdanm 84:0b3ab51c8877 287 /**
bogdanm 84:0b3ab51c8877 288 * @}
bogdanm 84:0b3ab51c8877 289 */
bogdanm 84:0b3ab51c8877 290
bogdanm 92:4fc01daae5a5 291 /** @defgroup USART_Interrupt_definition
bogdanm 84:0b3ab51c8877 292 * Elements values convention: 0000ZZZZ0XXYYYYYb
bogdanm 84:0b3ab51c8877 293 * - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm 84:0b3ab51c8877 294 * - XX : Interrupt source register (2bits)
bogdanm 84:0b3ab51c8877 295 * - 01: CR1 register
bogdanm 84:0b3ab51c8877 296 * - 10: CR2 register
bogdanm 84:0b3ab51c8877 297 * - 11: CR3 register
bogdanm 84:0b3ab51c8877 298 * - ZZZZ : Flag position in the ISR register(4bits)
bogdanm 84:0b3ab51c8877 299 * @{
bogdanm 84:0b3ab51c8877 300 */
bogdanm 84:0b3ab51c8877 301
bogdanm 84:0b3ab51c8877 302 #define USART_IT_PE ((uint16_t)0x0028)
bogdanm 84:0b3ab51c8877 303 #define USART_IT_TXE ((uint16_t)0x0727)
bogdanm 84:0b3ab51c8877 304 #define USART_IT_TC ((uint16_t)0x0626)
bogdanm 84:0b3ab51c8877 305 #define USART_IT_RXNE ((uint16_t)0x0525)
bogdanm 84:0b3ab51c8877 306 #define USART_IT_IDLE ((uint16_t)0x0424)
bogdanm 84:0b3ab51c8877 307 #define USART_IT_ERR ((uint16_t)0x0060)
bogdanm 84:0b3ab51c8877 308
bogdanm 84:0b3ab51c8877 309 #define USART_IT_ORE ((uint16_t)0x0300)
bogdanm 84:0b3ab51c8877 310 #define USART_IT_NE ((uint16_t)0x0200)
bogdanm 84:0b3ab51c8877 311 #define USART_IT_FE ((uint16_t)0x0100)
bogdanm 84:0b3ab51c8877 312 /**
bogdanm 84:0b3ab51c8877 313 * @}
bogdanm 84:0b3ab51c8877 314 */
bogdanm 84:0b3ab51c8877 315
bogdanm 92:4fc01daae5a5 316 /** @defgroup USART_IT_CLEAR_Flags
bogdanm 84:0b3ab51c8877 317 * @{
bogdanm 84:0b3ab51c8877 318 */
bogdanm 84:0b3ab51c8877 319 #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
bogdanm 84:0b3ab51c8877 320 #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
bogdanm 84:0b3ab51c8877 321 #define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
bogdanm 84:0b3ab51c8877 322 #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
bogdanm 84:0b3ab51c8877 323 #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
bogdanm 84:0b3ab51c8877 324 #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
bogdanm 84:0b3ab51c8877 325 #define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
bogdanm 84:0b3ab51c8877 326 /**
bogdanm 84:0b3ab51c8877 327 * @}
bogdanm 84:0b3ab51c8877 328 */
bogdanm 84:0b3ab51c8877 329
bogdanm 92:4fc01daae5a5 330 /** @defgroup USART_Request_Parameters
bogdanm 84:0b3ab51c8877 331 * @{
bogdanm 84:0b3ab51c8877 332 */
bogdanm 84:0b3ab51c8877 333 #define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
bogdanm 84:0b3ab51c8877 334 #define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
bogdanm 84:0b3ab51c8877 335 #define IS_USART_REQUEST_PARAMETER(PARAM) (((PARAM) == USART_RXDATA_FLUSH_REQUEST) || \
bogdanm 84:0b3ab51c8877 336 ((PARAM) == USART_TXDATA_FLUSH_REQUEST))
bogdanm 84:0b3ab51c8877 337 /**
bogdanm 84:0b3ab51c8877 338 * @}
bogdanm 84:0b3ab51c8877 339 */
bogdanm 84:0b3ab51c8877 340
bogdanm 92:4fc01daae5a5 341 /** @defgroup USART_Interruption_Mask
bogdanm 84:0b3ab51c8877 342 * @{
bogdanm 84:0b3ab51c8877 343 */
bogdanm 84:0b3ab51c8877 344 #define USART_IT_MASK ((uint16_t)0x001F)
bogdanm 84:0b3ab51c8877 345 /**
bogdanm 84:0b3ab51c8877 346 * @}
bogdanm 84:0b3ab51c8877 347 */
bogdanm 84:0b3ab51c8877 348
bogdanm 84:0b3ab51c8877 349 /**
bogdanm 84:0b3ab51c8877 350 * @}
bogdanm 84:0b3ab51c8877 351 */
bogdanm 84:0b3ab51c8877 352
bogdanm 84:0b3ab51c8877 353
bogdanm 84:0b3ab51c8877 354 /* Exported macro ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 355
bogdanm 84:0b3ab51c8877 356 /** @defgroup USART_Exported_Macros
bogdanm 84:0b3ab51c8877 357 * @{
bogdanm 84:0b3ab51c8877 358 */
bogdanm 84:0b3ab51c8877 359 /** @brief Reset USART handle state
bogdanm 84:0b3ab51c8877 360 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 361 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 362 * @retval None
bogdanm 84:0b3ab51c8877 363 */
bogdanm 84:0b3ab51c8877 364 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
bogdanm 84:0b3ab51c8877 365
bogdanm 84:0b3ab51c8877 366 /** @brief Checks whether the specified USART flag is set or not.
bogdanm 84:0b3ab51c8877 367 * @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 368 * @param __FLAG__: specifies the flag to check.
bogdanm 84:0b3ab51c8877 369 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 370 * @arg USART_FLAG_REACK: Receive enable ackowledge flag
bogdanm 84:0b3ab51c8877 371 * @arg USART_FLAG_TEACK: Transmit enable ackowledge flag
bogdanm 84:0b3ab51c8877 372 * @arg USART_FLAG_BUSY: Busy flag
bogdanm 84:0b3ab51c8877 373 * @arg USART_FLAG_CTS: CTS Change flag
bogdanm 84:0b3ab51c8877 374 * @arg USART_FLAG_TXE: Transmit data register empty flag
bogdanm 84:0b3ab51c8877 375 * @arg USART_FLAG_TC: Transmission Complete flag
bogdanm 84:0b3ab51c8877 376 * @arg USART_FLAG_RXNE: Receive data register not empty flag
bogdanm 84:0b3ab51c8877 377 * @arg USART_FLAG_IDLE: Idle Line detection flag
bogdanm 84:0b3ab51c8877 378 * @arg USART_FLAG_ORE: OverRun Error flag
bogdanm 84:0b3ab51c8877 379 * @arg USART_FLAG_NE: Noise Error flag
bogdanm 84:0b3ab51c8877 380 * @arg USART_FLAG_FE: Framing Error flag
bogdanm 84:0b3ab51c8877 381 * @arg USART_FLAG_PE: Parity Error flag
bogdanm 84:0b3ab51c8877 382 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 383 */
bogdanm 84:0b3ab51c8877 384 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
bogdanm 84:0b3ab51c8877 385
bogdanm 84:0b3ab51c8877 386
bogdanm 84:0b3ab51c8877 387 /** @brief Enables the specified USART interrupt.
bogdanm 84:0b3ab51c8877 388 * @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 389 * @param __INTERRUPT__: specifies the USART interrupt source to enable.
bogdanm 84:0b3ab51c8877 390 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 391 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 392 * @arg USART_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 393 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 394 * @arg USART_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 395 * @arg USART_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 396 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm 84:0b3ab51c8877 397 * @retval None
bogdanm 84:0b3ab51c8877 398 */
bogdanm 84:0b3ab51c8877 399 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__)(((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 |= (1 << ((__INTERRUPT__) & USART_IT_MASK))): \
bogdanm 84:0b3ab51c8877 400 ((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 |= (1 << ((__INTERRUPT__) & USART_IT_MASK))): \
bogdanm 84:0b3ab51c8877 401 ((__HANDLE__)->Instance->CR3 |= (1 << ((__INTERRUPT__) & USART_IT_MASK))))
bogdanm 84:0b3ab51c8877 402
bogdanm 84:0b3ab51c8877 403 /** @brief Disables the specified USART interrupt.
bogdanm 84:0b3ab51c8877 404 * @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 405 * @param __INTERRUPT__: specifies the USART interrupt source to disable.
bogdanm 84:0b3ab51c8877 406 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 407 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 408 * @arg USART_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 409 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 410 * @arg USART_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 411 * @arg USART_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 412 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm 84:0b3ab51c8877 413 * @retval None
bogdanm 84:0b3ab51c8877 414 */
bogdanm 84:0b3ab51c8877 415 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & USART_IT_MASK))): \
bogdanm 84:0b3ab51c8877 416 ((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & USART_IT_MASK))): \
bogdanm 84:0b3ab51c8877 417 ((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & USART_IT_MASK))))
bogdanm 84:0b3ab51c8877 418
bogdanm 84:0b3ab51c8877 419 /** @brief Checks whether the specified USART interrupt has occurred or not.
bogdanm 84:0b3ab51c8877 420 * @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 421 * @param __IT__: specifies the USART interrupt source to check.
bogdanm 84:0b3ab51c8877 422 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 423 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 424 * @arg USART_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 425 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 426 * @arg USART_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 427 * @arg USART_IT_ORE: OverRun Error interrupt
bogdanm 84:0b3ab51c8877 428 * @arg USART_IT_NE: Noise Error interrupt
bogdanm 84:0b3ab51c8877 429 * @arg USART_IT_FE: Framing Error interrupt
bogdanm 84:0b3ab51c8877 430 * @arg USART_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 431 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 432 */
bogdanm 84:0b3ab51c8877 433 #define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
bogdanm 84:0b3ab51c8877 434
bogdanm 84:0b3ab51c8877 435 /** @brief Checks whether the specified USART interrupt source is enabled.
bogdanm 84:0b3ab51c8877 436 * @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 437 * @param __IT__: specifies the USART interrupt source to check.
bogdanm 84:0b3ab51c8877 438 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 439 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 440 * @arg USART_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 441 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 442 * @arg USART_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 443 * @arg USART_IT_ORE: OverRun Error interrupt
bogdanm 84:0b3ab51c8877 444 * @arg USART_IT_NE: Noise Error interrupt
bogdanm 84:0b3ab51c8877 445 * @arg USART_IT_FE: Framing Error interrupt
bogdanm 84:0b3ab51c8877 446 * @arg USART_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 447 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 448 */
bogdanm 84:0b3ab51c8877 449 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \
bogdanm 84:0b3ab51c8877 450 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << \
bogdanm 84:0b3ab51c8877 451 (((uint16_t)(__IT__)) & USART_IT_MASK)))
bogdanm 84:0b3ab51c8877 452
bogdanm 84:0b3ab51c8877 453
bogdanm 84:0b3ab51c8877 454 /** @brief Clears the specified USART ISR flag, in setting the proper ICR register flag.
bogdanm 84:0b3ab51c8877 455 * @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 456 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
bogdanm 84:0b3ab51c8877 457 * to clear the corresponding interrupt
bogdanm 84:0b3ab51c8877 458 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 459 * @arg USART_CLEAR_PEF: Parity Error Clear Flag
bogdanm 84:0b3ab51c8877 460 * @arg USART_CLEAR_FEF: Framing Error Clear Flag
bogdanm 84:0b3ab51c8877 461 * @arg USART_CLEAR_NEF: Noise detected Clear Flag
bogdanm 84:0b3ab51c8877 462 * @arg USART_CLEAR_OREF: OverRun Error Clear Flag
bogdanm 84:0b3ab51c8877 463 * @arg USART_CLEAR_IDLEF: IDLE line detected Clear Flag
bogdanm 84:0b3ab51c8877 464 * @arg USART_CLEAR_TCF: Transmission Complete Clear Flag
bogdanm 84:0b3ab51c8877 465 * @arg USART_CLEAR_CTSF: CTS Interrupt Clear Flag
bogdanm 84:0b3ab51c8877 466 * @retval None
bogdanm 84:0b3ab51c8877 467 */
bogdanm 92:4fc01daae5a5 468 #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
bogdanm 84:0b3ab51c8877 469
bogdanm 84:0b3ab51c8877 470 /** @brief Set a specific USART request flag.
bogdanm 84:0b3ab51c8877 471 * @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 472 * @param __REQ__: specifies the request flag to set
bogdanm 84:0b3ab51c8877 473 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 474 * @arg USART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
bogdanm 84:0b3ab51c8877 475 * @arg USART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
bogdanm 84:0b3ab51c8877 476 *
bogdanm 84:0b3ab51c8877 477 * @retval None
bogdanm 84:0b3ab51c8877 478 */
bogdanm 84:0b3ab51c8877 479 #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
bogdanm 84:0b3ab51c8877 480
bogdanm 84:0b3ab51c8877 481 /** @brief Enable USART
bogdanm 84:0b3ab51c8877 482 * @param __HANDLE__: specifies the USART Handle.
bogdanm 84:0b3ab51c8877 483 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 484 * @retval None
bogdanm 84:0b3ab51c8877 485 */
bogdanm 84:0b3ab51c8877 486 #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
bogdanm 84:0b3ab51c8877 487
bogdanm 84:0b3ab51c8877 488 /** @brief Disable USART
bogdanm 84:0b3ab51c8877 489 * @param __HANDLE__: specifies the USART Handle.
bogdanm 84:0b3ab51c8877 490 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 491 * @retval None
bogdanm 84:0b3ab51c8877 492 */
bogdanm 84:0b3ab51c8877 493 #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
bogdanm 84:0b3ab51c8877 494
bogdanm 84:0b3ab51c8877 495
bogdanm 84:0b3ab51c8877 496 /** @brief Check USART Baud rate
bogdanm 84:0b3ab51c8877 497 * @param BAUDRATE: Baudrate specified by the user
bogdanm 84:0b3ab51c8877 498 * The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz)
bogdanm 84:0b3ab51c8877 499 * divided by the smallest oversampling used on the USART (i.e. 8)
bogdanm 84:0b3ab51c8877 500 * @retval Test result (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 501 */
bogdanm 84:0b3ab51c8877 502 #define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 4000001)
bogdanm 84:0b3ab51c8877 503
bogdanm 84:0b3ab51c8877 504 /**
bogdanm 84:0b3ab51c8877 505 * @}
bogdanm 84:0b3ab51c8877 506 */
bogdanm 84:0b3ab51c8877 507
bogdanm 84:0b3ab51c8877 508 /* Include UART HAL Extension module */
bogdanm 84:0b3ab51c8877 509 #include "stm32l0xx_hal_usart_ex.h"
bogdanm 84:0b3ab51c8877 510 /* Exported functions --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 511
bogdanm 84:0b3ab51c8877 512 /* Initialization/de-initialization functions ********************************/
bogdanm 84:0b3ab51c8877 513 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 514 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 515 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 516 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 517 void HAL_USART_SetConfig(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 518 /* IO operation functions *****************************************************/
bogdanm 84:0b3ab51c8877 519 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
bogdanm 84:0b3ab51c8877 520 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
bogdanm 84:0b3ab51c8877 521 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
bogdanm 84:0b3ab51c8877 522 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
bogdanm 84:0b3ab51c8877 523 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
bogdanm 84:0b3ab51c8877 524 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 84:0b3ab51c8877 525 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
bogdanm 84:0b3ab51c8877 526 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
bogdanm 84:0b3ab51c8877 527 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 84:0b3ab51c8877 528 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 529 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 530 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 531 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 532 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 533 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 534 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 535 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 536 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 537 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 538
bogdanm 84:0b3ab51c8877 539 /* Peripheral State functions ************************************************/
bogdanm 84:0b3ab51c8877 540 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 541 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
bogdanm 84:0b3ab51c8877 542
bogdanm 84:0b3ab51c8877 543 /**
bogdanm 84:0b3ab51c8877 544 * @}
bogdanm 84:0b3ab51c8877 545 */
bogdanm 84:0b3ab51c8877 546
bogdanm 84:0b3ab51c8877 547 /**
bogdanm 84:0b3ab51c8877 548 * @}
bogdanm 84:0b3ab51c8877 549 */
bogdanm 84:0b3ab51c8877 550
bogdanm 84:0b3ab51c8877 551 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 552 }
bogdanm 84:0b3ab51c8877 553 #endif
bogdanm 84:0b3ab51c8877 554
bogdanm 84:0b3ab51c8877 555 #endif /* __STM32L0xx_HAL_USART_H */
bogdanm 84:0b3ab51c8877 556
bogdanm 84:0b3ab51c8877 557 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/