Filippo Casamassima
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TARGET_NUCLEO_L053R8/stm32l0xx_hal_tsc.h@92:4fc01daae5a5, 2014-11-27 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Nov 27 13:33:22 2014 +0000
- Revision:
- 92:4fc01daae5a5
- Parent:
- 84:0b3ab51c8877
- Child:
- 96:487b796308b0
Release 92 of the mbed libray
Main changes:
- nRF51822: fixed pin assignment issues
- ST targets moving to the STM32Cube driver
- LPC1439: fixed serial interrupt issue
- first Cortex-A platform supported in mbed (RZ_A1H)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 84:0b3ab51c8877 | 1 | /** |
| bogdanm | 84:0b3ab51c8877 | 2 | ****************************************************************************** |
| bogdanm | 84:0b3ab51c8877 | 3 | * @file stm32l0xx_hal_tsc.h |
| bogdanm | 84:0b3ab51c8877 | 4 | * @author MCD Application Team |
| bogdanm | 92:4fc01daae5a5 | 5 | * @version V1.1.0 |
| bogdanm | 92:4fc01daae5a5 | 6 | * @date 18-June-2014 |
| bogdanm | 84:0b3ab51c8877 | 7 | * @brief This file contains all the functions prototypes for the TSC firmware |
| bogdanm | 84:0b3ab51c8877 | 8 | * library. |
| bogdanm | 84:0b3ab51c8877 | 9 | ****************************************************************************** |
| bogdanm | 84:0b3ab51c8877 | 10 | * @attention |
| bogdanm | 84:0b3ab51c8877 | 11 | * |
| bogdanm | 84:0b3ab51c8877 | 12 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 84:0b3ab51c8877 | 13 | * |
| bogdanm | 84:0b3ab51c8877 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 84:0b3ab51c8877 | 15 | * are permitted provided that the following conditions are met: |
| bogdanm | 84:0b3ab51c8877 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 84:0b3ab51c8877 | 17 | * this list of conditions and the following disclaimer. |
| bogdanm | 84:0b3ab51c8877 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 84:0b3ab51c8877 | 19 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 84:0b3ab51c8877 | 20 | * and/or other materials provided with the distribution. |
| bogdanm | 84:0b3ab51c8877 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 84:0b3ab51c8877 | 22 | * may be used to endorse or promote products derived from this software |
| bogdanm | 84:0b3ab51c8877 | 23 | * without specific prior written permission. |
| bogdanm | 84:0b3ab51c8877 | 24 | * |
| bogdanm | 84:0b3ab51c8877 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 84:0b3ab51c8877 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 84:0b3ab51c8877 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 84:0b3ab51c8877 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 84:0b3ab51c8877 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 84:0b3ab51c8877 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 84:0b3ab51c8877 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 84:0b3ab51c8877 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 84:0b3ab51c8877 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 84:0b3ab51c8877 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 84:0b3ab51c8877 | 35 | * |
| bogdanm | 84:0b3ab51c8877 | 36 | ****************************************************************************** |
| bogdanm | 84:0b3ab51c8877 | 37 | */ |
| bogdanm | 84:0b3ab51c8877 | 38 | |
| bogdanm | 84:0b3ab51c8877 | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 40 | #ifndef __STM32L0xx_TSC_H |
| bogdanm | 84:0b3ab51c8877 | 41 | #define __STM32L0xx_TSC_H |
| bogdanm | 84:0b3ab51c8877 | 42 | |
| bogdanm | 84:0b3ab51c8877 | 43 | #ifdef __cplusplus |
| bogdanm | 84:0b3ab51c8877 | 44 | extern "C" { |
| bogdanm | 84:0b3ab51c8877 | 45 | #endif |
| bogdanm | 84:0b3ab51c8877 | 46 | |
| bogdanm | 84:0b3ab51c8877 | 47 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 48 | #include "stm32l0xx_hal_def.h" |
| bogdanm | 84:0b3ab51c8877 | 49 | |
| bogdanm | 84:0b3ab51c8877 | 50 | /** @addtogroup STM32L0xx_HAL_Driver |
| bogdanm | 84:0b3ab51c8877 | 51 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 52 | */ |
| bogdanm | 84:0b3ab51c8877 | 53 | |
| bogdanm | 84:0b3ab51c8877 | 54 | /** @addtogroup TSC |
| bogdanm | 84:0b3ab51c8877 | 55 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 56 | */ |
| bogdanm | 84:0b3ab51c8877 | 57 | |
| bogdanm | 84:0b3ab51c8877 | 58 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 59 | |
| bogdanm | 84:0b3ab51c8877 | 60 | /** |
| bogdanm | 84:0b3ab51c8877 | 61 | * @brief TSC state structure definition |
| bogdanm | 84:0b3ab51c8877 | 62 | */ |
| bogdanm | 84:0b3ab51c8877 | 63 | typedef enum |
| bogdanm | 84:0b3ab51c8877 | 64 | { |
| bogdanm | 84:0b3ab51c8877 | 65 | HAL_TSC_STATE_RESET = 0x00, /*!< TSC registers have their reset value */ |
| bogdanm | 84:0b3ab51c8877 | 66 | HAL_TSC_STATE_READY = 0x01, /*!< TSC registers are initialized or acquisition is completed with success */ |
| bogdanm | 84:0b3ab51c8877 | 67 | HAL_TSC_STATE_BUSY = 0x02, /*!< TSC initialization or acquisition is on-going */ |
| bogdanm | 84:0b3ab51c8877 | 68 | HAL_TSC_STATE_ERROR = 0x03 /*!< Acquisition is completed with max count error */ |
| bogdanm | 84:0b3ab51c8877 | 69 | } HAL_TSC_StateTypeDef; |
| bogdanm | 84:0b3ab51c8877 | 70 | |
| bogdanm | 84:0b3ab51c8877 | 71 | /** |
| bogdanm | 84:0b3ab51c8877 | 72 | * @brief TSC group status structure definition |
| bogdanm | 84:0b3ab51c8877 | 73 | */ |
| bogdanm | 84:0b3ab51c8877 | 74 | typedef enum |
| bogdanm | 84:0b3ab51c8877 | 75 | { |
| bogdanm | 84:0b3ab51c8877 | 76 | TSC_GROUP_ONGOING = 0x00, /*!< Acquisition on group is on-going or not started */ |
| bogdanm | 84:0b3ab51c8877 | 77 | TSC_GROUP_COMPLETED = 0x01 /*!< Acquisition on group is completed with success (no max count error) */ |
| bogdanm | 84:0b3ab51c8877 | 78 | } TSC_GroupStatusTypeDef; |
| bogdanm | 84:0b3ab51c8877 | 79 | |
| bogdanm | 84:0b3ab51c8877 | 80 | /** |
| bogdanm | 84:0b3ab51c8877 | 81 | * @brief TSC init structure definition |
| bogdanm | 84:0b3ab51c8877 | 82 | */ |
| bogdanm | 84:0b3ab51c8877 | 83 | typedef struct |
| bogdanm | 84:0b3ab51c8877 | 84 | { |
| bogdanm | 84:0b3ab51c8877 | 85 | uint32_t CTPulseHighLength; /*!< Charge-transfer high pulse length */ |
| bogdanm | 84:0b3ab51c8877 | 86 | uint32_t CTPulseLowLength; /*!< Charge-transfer low pulse length */ |
| bogdanm | 84:0b3ab51c8877 | 87 | uint32_t SpreadSpectrum; /*!< Spread spectrum activation */ |
| bogdanm | 84:0b3ab51c8877 | 88 | uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation */ |
| bogdanm | 84:0b3ab51c8877 | 89 | uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler */ |
| bogdanm | 84:0b3ab51c8877 | 90 | uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler */ |
| bogdanm | 84:0b3ab51c8877 | 91 | uint32_t MaxCountValue; /*!< Max count value */ |
| bogdanm | 84:0b3ab51c8877 | 92 | uint32_t IODefaultMode; /*!< IO default mode */ |
| bogdanm | 84:0b3ab51c8877 | 93 | uint32_t SynchroPinPolarity; /*!< Synchro pin polarity */ |
| bogdanm | 84:0b3ab51c8877 | 94 | uint32_t AcquisitionMode; /*!< Acquisition mode */ |
| bogdanm | 84:0b3ab51c8877 | 95 | uint32_t MaxCountInterrupt; /*!< Max count interrupt activation */ |
| bogdanm | 84:0b3ab51c8877 | 96 | uint32_t ChannelIOs; /*!< Channel IOs mask */ |
| bogdanm | 84:0b3ab51c8877 | 97 | uint32_t ShieldIOs; /*!< Shield IOs mask */ |
| bogdanm | 84:0b3ab51c8877 | 98 | uint32_t SamplingIOs; /*!< Sampling IOs mask */ |
| bogdanm | 84:0b3ab51c8877 | 99 | } TSC_InitTypeDef; |
| bogdanm | 84:0b3ab51c8877 | 100 | |
| bogdanm | 84:0b3ab51c8877 | 101 | /** |
| bogdanm | 84:0b3ab51c8877 | 102 | * @brief TSC IOs configuration structure definition |
| bogdanm | 84:0b3ab51c8877 | 103 | */ |
| bogdanm | 84:0b3ab51c8877 | 104 | typedef struct |
| bogdanm | 84:0b3ab51c8877 | 105 | { |
| bogdanm | 84:0b3ab51c8877 | 106 | uint32_t ChannelIOs; /*!< Channel IOs mask */ |
| bogdanm | 84:0b3ab51c8877 | 107 | uint32_t ShieldIOs; /*!< Shield IOs mask */ |
| bogdanm | 84:0b3ab51c8877 | 108 | uint32_t SamplingIOs; /*!< Sampling IOs mask */ |
| bogdanm | 84:0b3ab51c8877 | 109 | } TSC_IOConfigTypeDef; |
| bogdanm | 84:0b3ab51c8877 | 110 | |
| bogdanm | 84:0b3ab51c8877 | 111 | /** |
| bogdanm | 84:0b3ab51c8877 | 112 | * @brief TSC handle Structure definition |
| bogdanm | 84:0b3ab51c8877 | 113 | */ |
| bogdanm | 84:0b3ab51c8877 | 114 | typedef struct |
| bogdanm | 84:0b3ab51c8877 | 115 | { |
| bogdanm | 84:0b3ab51c8877 | 116 | TSC_TypeDef *Instance; /*!< Register base address */ |
| bogdanm | 84:0b3ab51c8877 | 117 | TSC_InitTypeDef Init; /*!< Initialization parameters */ |
| bogdanm | 84:0b3ab51c8877 | 118 | __IO HAL_TSC_StateTypeDef State; /*!< Peripheral state */ |
| bogdanm | 84:0b3ab51c8877 | 119 | HAL_LockTypeDef Lock; /*!< Lock feature */ |
| bogdanm | 84:0b3ab51c8877 | 120 | } TSC_HandleTypeDef; |
| bogdanm | 84:0b3ab51c8877 | 121 | |
| bogdanm | 84:0b3ab51c8877 | 122 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 123 | |
| bogdanm | 84:0b3ab51c8877 | 124 | /** @defgroup TSC_Exported_Constants |
| bogdanm | 84:0b3ab51c8877 | 125 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 126 | */ |
| bogdanm | 84:0b3ab51c8877 | 127 | |
| bogdanm | 84:0b3ab51c8877 | 128 | #define IS_TSC_ALL_INSTANCE(PERIPH) ((PERIPH) == TSC) |
| bogdanm | 84:0b3ab51c8877 | 129 | |
| bogdanm | 84:0b3ab51c8877 | 130 | #define TSC_CTPH_1CYCLE ((uint32_t)((uint32_t) 0 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 131 | #define TSC_CTPH_2CYCLES ((uint32_t)((uint32_t) 1 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 132 | #define TSC_CTPH_3CYCLES ((uint32_t)((uint32_t) 2 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 133 | #define TSC_CTPH_4CYCLES ((uint32_t)((uint32_t) 3 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 134 | #define TSC_CTPH_5CYCLES ((uint32_t)((uint32_t) 4 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 135 | #define TSC_CTPH_6CYCLES ((uint32_t)((uint32_t) 5 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 136 | #define TSC_CTPH_7CYCLES ((uint32_t)((uint32_t) 6 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 137 | #define TSC_CTPH_8CYCLES ((uint32_t)((uint32_t) 7 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 138 | #define TSC_CTPH_9CYCLES ((uint32_t)((uint32_t) 8 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 139 | #define TSC_CTPH_10CYCLES ((uint32_t)((uint32_t) 9 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 140 | #define TSC_CTPH_11CYCLES ((uint32_t)((uint32_t)10 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 141 | #define TSC_CTPH_12CYCLES ((uint32_t)((uint32_t)11 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 142 | #define TSC_CTPH_13CYCLES ((uint32_t)((uint32_t)12 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 143 | #define TSC_CTPH_14CYCLES ((uint32_t)((uint32_t)13 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 144 | #define TSC_CTPH_15CYCLES ((uint32_t)((uint32_t)14 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 145 | #define TSC_CTPH_16CYCLES ((uint32_t)((uint32_t)15 << 28)) |
| bogdanm | 84:0b3ab51c8877 | 146 | #define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \ |
| bogdanm | 84:0b3ab51c8877 | 147 | ((VAL) == TSC_CTPH_2CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 148 | ((VAL) == TSC_CTPH_3CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 149 | ((VAL) == TSC_CTPH_4CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 150 | ((VAL) == TSC_CTPH_5CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 151 | ((VAL) == TSC_CTPH_6CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 152 | ((VAL) == TSC_CTPH_7CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 153 | ((VAL) == TSC_CTPH_8CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 154 | ((VAL) == TSC_CTPH_9CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 155 | ((VAL) == TSC_CTPH_10CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 156 | ((VAL) == TSC_CTPH_11CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 157 | ((VAL) == TSC_CTPH_12CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 158 | ((VAL) == TSC_CTPH_13CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 159 | ((VAL) == TSC_CTPH_14CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 160 | ((VAL) == TSC_CTPH_15CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 161 | ((VAL) == TSC_CTPH_16CYCLES)) |
| bogdanm | 84:0b3ab51c8877 | 162 | |
| bogdanm | 84:0b3ab51c8877 | 163 | #define TSC_CTPL_1CYCLE ((uint32_t)((uint32_t) 0 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 164 | #define TSC_CTPL_2CYCLES ((uint32_t)((uint32_t) 1 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 165 | #define TSC_CTPL_3CYCLES ((uint32_t)((uint32_t) 2 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 166 | #define TSC_CTPL_4CYCLES ((uint32_t)((uint32_t) 3 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 167 | #define TSC_CTPL_5CYCLES ((uint32_t)((uint32_t) 4 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 168 | #define TSC_CTPL_6CYCLES ((uint32_t)((uint32_t) 5 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 169 | #define TSC_CTPL_7CYCLES ((uint32_t)((uint32_t) 6 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 170 | #define TSC_CTPL_8CYCLES ((uint32_t)((uint32_t) 7 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 171 | #define TSC_CTPL_9CYCLES ((uint32_t)((uint32_t) 8 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 172 | #define TSC_CTPL_10CYCLES ((uint32_t)((uint32_t) 9 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 173 | #define TSC_CTPL_11CYCLES ((uint32_t)((uint32_t)10 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 174 | #define TSC_CTPL_12CYCLES ((uint32_t)((uint32_t)11 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 175 | #define TSC_CTPL_13CYCLES ((uint32_t)((uint32_t)12 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 176 | #define TSC_CTPL_14CYCLES ((uint32_t)((uint32_t)13 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 177 | #define TSC_CTPL_15CYCLES ((uint32_t)((uint32_t)14 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 178 | #define TSC_CTPL_16CYCLES ((uint32_t)((uint32_t)15 << 24)) |
| bogdanm | 84:0b3ab51c8877 | 179 | #define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \ |
| bogdanm | 84:0b3ab51c8877 | 180 | ((VAL) == TSC_CTPL_2CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 181 | ((VAL) == TSC_CTPL_3CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 182 | ((VAL) == TSC_CTPL_4CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 183 | ((VAL) == TSC_CTPL_5CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 184 | ((VAL) == TSC_CTPL_6CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 185 | ((VAL) == TSC_CTPL_7CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 186 | ((VAL) == TSC_CTPL_8CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 187 | ((VAL) == TSC_CTPL_9CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 188 | ((VAL) == TSC_CTPL_10CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 189 | ((VAL) == TSC_CTPL_11CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 190 | ((VAL) == TSC_CTPL_12CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 191 | ((VAL) == TSC_CTPL_13CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 192 | ((VAL) == TSC_CTPL_14CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 193 | ((VAL) == TSC_CTPL_15CYCLES) || \ |
| bogdanm | 84:0b3ab51c8877 | 194 | ((VAL) == TSC_CTPL_16CYCLES)) |
| bogdanm | 84:0b3ab51c8877 | 195 | |
| bogdanm | 84:0b3ab51c8877 | 196 | #define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE)) |
| bogdanm | 84:0b3ab51c8877 | 197 | |
| bogdanm | 84:0b3ab51c8877 | 198 | #define IS_TSC_SSD(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < 128))) |
| bogdanm | 84:0b3ab51c8877 | 199 | |
| bogdanm | 84:0b3ab51c8877 | 200 | #define TSC_SS_PRESC_DIV1 ((uint32_t)0) |
| bogdanm | 84:0b3ab51c8877 | 201 | #define TSC_SS_PRESC_DIV2 (TSC_CR_SSPSC) |
| bogdanm | 84:0b3ab51c8877 | 202 | #define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2)) |
| bogdanm | 84:0b3ab51c8877 | 203 | |
| bogdanm | 84:0b3ab51c8877 | 204 | #define TSC_PG_PRESC_DIV1 ((uint32_t)(0 << 12)) |
| bogdanm | 84:0b3ab51c8877 | 205 | #define TSC_PG_PRESC_DIV2 ((uint32_t)(1 << 12)) |
| bogdanm | 84:0b3ab51c8877 | 206 | #define TSC_PG_PRESC_DIV4 ((uint32_t)(2 << 12)) |
| bogdanm | 84:0b3ab51c8877 | 207 | #define TSC_PG_PRESC_DIV8 ((uint32_t)(3 << 12)) |
| bogdanm | 84:0b3ab51c8877 | 208 | #define TSC_PG_PRESC_DIV16 ((uint32_t)(4 << 12)) |
| bogdanm | 84:0b3ab51c8877 | 209 | #define TSC_PG_PRESC_DIV32 ((uint32_t)(5 << 12)) |
| bogdanm | 84:0b3ab51c8877 | 210 | #define TSC_PG_PRESC_DIV64 ((uint32_t)(6 << 12)) |
| bogdanm | 84:0b3ab51c8877 | 211 | #define TSC_PG_PRESC_DIV128 ((uint32_t)(7 << 12)) |
| bogdanm | 84:0b3ab51c8877 | 212 | #define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \ |
| bogdanm | 84:0b3ab51c8877 | 213 | ((VAL) == TSC_PG_PRESC_DIV2) || \ |
| bogdanm | 84:0b3ab51c8877 | 214 | ((VAL) == TSC_PG_PRESC_DIV4) || \ |
| bogdanm | 84:0b3ab51c8877 | 215 | ((VAL) == TSC_PG_PRESC_DIV8) || \ |
| bogdanm | 84:0b3ab51c8877 | 216 | ((VAL) == TSC_PG_PRESC_DIV16) || \ |
| bogdanm | 84:0b3ab51c8877 | 217 | ((VAL) == TSC_PG_PRESC_DIV32) || \ |
| bogdanm | 84:0b3ab51c8877 | 218 | ((VAL) == TSC_PG_PRESC_DIV64) || \ |
| bogdanm | 84:0b3ab51c8877 | 219 | ((VAL) == TSC_PG_PRESC_DIV128)) |
| bogdanm | 84:0b3ab51c8877 | 220 | |
| bogdanm | 84:0b3ab51c8877 | 221 | #define TSC_MCV_255 ((uint32_t)(0 << 5)) |
| bogdanm | 84:0b3ab51c8877 | 222 | #define TSC_MCV_511 ((uint32_t)(1 << 5)) |
| bogdanm | 84:0b3ab51c8877 | 223 | #define TSC_MCV_1023 ((uint32_t)(2 << 5)) |
| bogdanm | 84:0b3ab51c8877 | 224 | #define TSC_MCV_2047 ((uint32_t)(3 << 5)) |
| bogdanm | 84:0b3ab51c8877 | 225 | #define TSC_MCV_4095 ((uint32_t)(4 << 5)) |
| bogdanm | 84:0b3ab51c8877 | 226 | #define TSC_MCV_8191 ((uint32_t)(5 << 5)) |
| bogdanm | 84:0b3ab51c8877 | 227 | #define TSC_MCV_16383 ((uint32_t)(6 << 5)) |
| bogdanm | 84:0b3ab51c8877 | 228 | #define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \ |
| bogdanm | 84:0b3ab51c8877 | 229 | ((VAL) == TSC_MCV_511) || \ |
| bogdanm | 84:0b3ab51c8877 | 230 | ((VAL) == TSC_MCV_1023) || \ |
| bogdanm | 84:0b3ab51c8877 | 231 | ((VAL) == TSC_MCV_2047) || \ |
| bogdanm | 84:0b3ab51c8877 | 232 | ((VAL) == TSC_MCV_4095) || \ |
| bogdanm | 84:0b3ab51c8877 | 233 | ((VAL) == TSC_MCV_8191) || \ |
| bogdanm | 84:0b3ab51c8877 | 234 | ((VAL) == TSC_MCV_16383)) |
| bogdanm | 84:0b3ab51c8877 | 235 | |
| bogdanm | 84:0b3ab51c8877 | 236 | #define TSC_IODEF_OUT_PP_LOW ((uint32_t)0) |
| bogdanm | 84:0b3ab51c8877 | 237 | #define TSC_IODEF_IN_FLOAT (TSC_CR_IODEF) |
| bogdanm | 84:0b3ab51c8877 | 238 | #define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT)) |
| bogdanm | 84:0b3ab51c8877 | 239 | |
| bogdanm | 84:0b3ab51c8877 | 240 | #define TSC_SYNC_POL_FALL ((uint32_t)0) |
| bogdanm | 84:0b3ab51c8877 | 241 | #define TSC_SYNC_POL_RISE_HIGH (TSC_CR_SYNCPOL) |
| bogdanm | 84:0b3ab51c8877 | 242 | #define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POL_FALL) || ((VAL) == TSC_SYNC_POL_RISE_HIGH)) |
| bogdanm | 84:0b3ab51c8877 | 243 | |
| bogdanm | 84:0b3ab51c8877 | 244 | #define TSC_ACQ_MODE_NORMAL ((uint32_t)0) |
| bogdanm | 92:4fc01daae5a5 | 245 | #define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM) |
| bogdanm | 84:0b3ab51c8877 | 246 | #define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO)) |
| bogdanm | 84:0b3ab51c8877 | 247 | |
| bogdanm | 84:0b3ab51c8877 | 248 | #define TSC_IOMODE_UNUSED ((uint32_t)0) |
| bogdanm | 84:0b3ab51c8877 | 249 | #define TSC_IOMODE_CHANNEL ((uint32_t)1) |
| bogdanm | 84:0b3ab51c8877 | 250 | #define TSC_IOMODE_SHIELD ((uint32_t)2) |
| bogdanm | 84:0b3ab51c8877 | 251 | #define TSC_IOMODE_SAMPLING ((uint32_t)3) |
| bogdanm | 84:0b3ab51c8877 | 252 | #define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \ |
| bogdanm | 84:0b3ab51c8877 | 253 | ((VAL) == TSC_IOMODE_CHANNEL) || \ |
| bogdanm | 84:0b3ab51c8877 | 254 | ((VAL) == TSC_IOMODE_SHIELD) || \ |
| bogdanm | 84:0b3ab51c8877 | 255 | ((VAL) == TSC_IOMODE_SAMPLING)) |
| bogdanm | 84:0b3ab51c8877 | 256 | |
| bogdanm | 92:4fc01daae5a5 | 257 | /** @defgroup TSC_interrupts_definition |
| bogdanm | 84:0b3ab51c8877 | 258 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 259 | */ |
| bogdanm | 84:0b3ab51c8877 | 260 | #define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE) |
| bogdanm | 84:0b3ab51c8877 | 261 | #define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE) |
| bogdanm | 84:0b3ab51c8877 | 262 | #define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE)) |
| bogdanm | 84:0b3ab51c8877 | 263 | /** |
| bogdanm | 84:0b3ab51c8877 | 264 | * @} |
| bogdanm | 84:0b3ab51c8877 | 265 | */ |
| bogdanm | 84:0b3ab51c8877 | 266 | |
| bogdanm | 92:4fc01daae5a5 | 267 | /** @defgroup TSC_flags_definition |
| bogdanm | 84:0b3ab51c8877 | 268 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 269 | */ |
| bogdanm | 84:0b3ab51c8877 | 270 | #define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF) |
| bogdanm | 84:0b3ab51c8877 | 271 | #define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF) |
| bogdanm | 84:0b3ab51c8877 | 272 | /** |
| bogdanm | 84:0b3ab51c8877 | 273 | * @} |
| bogdanm | 84:0b3ab51c8877 | 274 | */ |
| bogdanm | 84:0b3ab51c8877 | 275 | |
| bogdanm | 84:0b3ab51c8877 | 276 | #define TSC_NB_OF_GROUPS (8) |
| bogdanm | 84:0b3ab51c8877 | 277 | |
| bogdanm | 84:0b3ab51c8877 | 278 | #define TSC_GROUP1 ((uint32_t)0x00000001) |
| bogdanm | 84:0b3ab51c8877 | 279 | #define TSC_GROUP2 ((uint32_t)0x00000002) |
| bogdanm | 84:0b3ab51c8877 | 280 | #define TSC_GROUP3 ((uint32_t)0x00000004) |
| bogdanm | 84:0b3ab51c8877 | 281 | #define TSC_GROUP4 ((uint32_t)0x00000008) |
| bogdanm | 84:0b3ab51c8877 | 282 | #define TSC_GROUP5 ((uint32_t)0x00000010) |
| bogdanm | 84:0b3ab51c8877 | 283 | #define TSC_GROUP6 ((uint32_t)0x00000020) |
| bogdanm | 84:0b3ab51c8877 | 284 | #define TSC_GROUP7 ((uint32_t)0x00000040) |
| bogdanm | 84:0b3ab51c8877 | 285 | #define TSC_GROUP8 ((uint32_t)0x00000080) |
| bogdanm | 84:0b3ab51c8877 | 286 | #define TSC_ALL_GROUPS ((uint32_t)0x000000FF) |
| bogdanm | 84:0b3ab51c8877 | 287 | |
| bogdanm | 84:0b3ab51c8877 | 288 | #define TSC_GROUP1_IDX ((uint32_t)0) |
| bogdanm | 84:0b3ab51c8877 | 289 | #define TSC_GROUP2_IDX ((uint32_t)1) |
| bogdanm | 84:0b3ab51c8877 | 290 | #define TSC_GROUP3_IDX ((uint32_t)2) |
| bogdanm | 84:0b3ab51c8877 | 291 | #define TSC_GROUP4_IDX ((uint32_t)3) |
| bogdanm | 84:0b3ab51c8877 | 292 | #define TSC_GROUP5_IDX ((uint32_t)4) |
| bogdanm | 84:0b3ab51c8877 | 293 | #define TSC_GROUP6_IDX ((uint32_t)5) |
| bogdanm | 84:0b3ab51c8877 | 294 | #define TSC_GROUP7_IDX ((uint32_t)6) |
| bogdanm | 84:0b3ab51c8877 | 295 | #define TSC_GROUP8_IDX ((uint32_t)7) |
| bogdanm | 84:0b3ab51c8877 | 296 | #define IS_GROUP_INDEX(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < TSC_NB_OF_GROUPS))) |
| bogdanm | 84:0b3ab51c8877 | 297 | |
| bogdanm | 84:0b3ab51c8877 | 298 | #define TSC_GROUP1_IO1 ((uint32_t)0x00000001) |
| bogdanm | 84:0b3ab51c8877 | 299 | #define TSC_GROUP1_IO2 ((uint32_t)0x00000002) |
| bogdanm | 84:0b3ab51c8877 | 300 | #define TSC_GROUP1_IO3 ((uint32_t)0x00000004) |
| bogdanm | 84:0b3ab51c8877 | 301 | #define TSC_GROUP1_IO4 ((uint32_t)0x00000008) |
| bogdanm | 84:0b3ab51c8877 | 302 | #define TSC_GROUP1_ALL_IOS ((uint32_t)0x0000000F) |
| bogdanm | 84:0b3ab51c8877 | 303 | |
| bogdanm | 84:0b3ab51c8877 | 304 | #define TSC_GROUP2_IO1 ((uint32_t)0x00000010) |
| bogdanm | 84:0b3ab51c8877 | 305 | #define TSC_GROUP2_IO2 ((uint32_t)0x00000020) |
| bogdanm | 84:0b3ab51c8877 | 306 | #define TSC_GROUP2_IO3 ((uint32_t)0x00000040) |
| bogdanm | 84:0b3ab51c8877 | 307 | #define TSC_GROUP2_IO4 ((uint32_t)0x00000080) |
| bogdanm | 84:0b3ab51c8877 | 308 | #define TSC_GROUP2_ALL_IOS ((uint32_t)0x000000F0) |
| bogdanm | 84:0b3ab51c8877 | 309 | |
| bogdanm | 84:0b3ab51c8877 | 310 | #define TSC_GROUP3_IO1 ((uint32_t)0x00000100) |
| bogdanm | 84:0b3ab51c8877 | 311 | #define TSC_GROUP3_IO2 ((uint32_t)0x00000200) |
| bogdanm | 84:0b3ab51c8877 | 312 | #define TSC_GROUP3_IO3 ((uint32_t)0x00000400) |
| bogdanm | 84:0b3ab51c8877 | 313 | #define TSC_GROUP3_IO4 ((uint32_t)0x00000800) |
| bogdanm | 84:0b3ab51c8877 | 314 | #define TSC_GROUP3_ALL_IOS ((uint32_t)0x00000F00) |
| bogdanm | 84:0b3ab51c8877 | 315 | |
| bogdanm | 84:0b3ab51c8877 | 316 | #define TSC_GROUP4_IO1 ((uint32_t)0x00001000) |
| bogdanm | 84:0b3ab51c8877 | 317 | #define TSC_GROUP4_IO2 ((uint32_t)0x00002000) |
| bogdanm | 84:0b3ab51c8877 | 318 | #define TSC_GROUP4_IO3 ((uint32_t)0x00004000) |
| bogdanm | 84:0b3ab51c8877 | 319 | #define TSC_GROUP4_IO4 ((uint32_t)0x00008000) |
| bogdanm | 84:0b3ab51c8877 | 320 | #define TSC_GROUP4_ALL_IOS ((uint32_t)0x0000F000) |
| bogdanm | 84:0b3ab51c8877 | 321 | |
| bogdanm | 84:0b3ab51c8877 | 322 | #define TSC_GROUP5_IO1 ((uint32_t)0x00010000) |
| bogdanm | 84:0b3ab51c8877 | 323 | #define TSC_GROUP5_IO2 ((uint32_t)0x00020000) |
| bogdanm | 84:0b3ab51c8877 | 324 | #define TSC_GROUP5_IO3 ((uint32_t)0x00040000) |
| bogdanm | 84:0b3ab51c8877 | 325 | #define TSC_GROUP5_IO4 ((uint32_t)0x00080000) |
| bogdanm | 84:0b3ab51c8877 | 326 | #define TSC_GROUP5_ALL_IOS ((uint32_t)0x000F0000) |
| bogdanm | 84:0b3ab51c8877 | 327 | |
| bogdanm | 84:0b3ab51c8877 | 328 | #define TSC_GROUP6_IO1 ((uint32_t)0x00100000) |
| bogdanm | 84:0b3ab51c8877 | 329 | #define TSC_GROUP6_IO2 ((uint32_t)0x00200000) |
| bogdanm | 84:0b3ab51c8877 | 330 | #define TSC_GROUP6_IO3 ((uint32_t)0x00400000) |
| bogdanm | 84:0b3ab51c8877 | 331 | #define TSC_GROUP6_IO4 ((uint32_t)0x00800000) |
| bogdanm | 84:0b3ab51c8877 | 332 | #define TSC_GROUP6_ALL_IOS ((uint32_t)0x00F00000) |
| bogdanm | 84:0b3ab51c8877 | 333 | |
| bogdanm | 84:0b3ab51c8877 | 334 | #define TSC_GROUP7_IO1 ((uint32_t)0x01000000) |
| bogdanm | 84:0b3ab51c8877 | 335 | #define TSC_GROUP7_IO2 ((uint32_t)0x02000000) |
| bogdanm | 84:0b3ab51c8877 | 336 | #define TSC_GROUP7_IO3 ((uint32_t)0x04000000) |
| bogdanm | 84:0b3ab51c8877 | 337 | #define TSC_GROUP7_IO4 ((uint32_t)0x08000000) |
| bogdanm | 84:0b3ab51c8877 | 338 | #define TSC_GROUP7_ALL_IOS ((uint32_t)0x0F000000) |
| bogdanm | 84:0b3ab51c8877 | 339 | |
| bogdanm | 84:0b3ab51c8877 | 340 | #define TSC_GROUP8_IO1 ((uint32_t)0x10000000) |
| bogdanm | 84:0b3ab51c8877 | 341 | #define TSC_GROUP8_IO2 ((uint32_t)0x20000000) |
| bogdanm | 84:0b3ab51c8877 | 342 | #define TSC_GROUP8_IO3 ((uint32_t)0x40000000) |
| bogdanm | 84:0b3ab51c8877 | 343 | #define TSC_GROUP8_IO4 ((uint32_t)0x80000000) |
| bogdanm | 84:0b3ab51c8877 | 344 | #define TSC_GROUP8_ALL_IOS ((uint32_t)0xF0000000) |
| bogdanm | 84:0b3ab51c8877 | 345 | |
| bogdanm | 84:0b3ab51c8877 | 346 | #define TSC_ALL_GROUPS_ALL_IOS ((uint32_t)0xFFFFFFFF) |
| bogdanm | 84:0b3ab51c8877 | 347 | |
| bogdanm | 84:0b3ab51c8877 | 348 | /** |
| bogdanm | 84:0b3ab51c8877 | 349 | * @} |
| bogdanm | 84:0b3ab51c8877 | 350 | */ |
| bogdanm | 84:0b3ab51c8877 | 351 | |
| bogdanm | 84:0b3ab51c8877 | 352 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 353 | |
| bogdanm | 84:0b3ab51c8877 | 354 | /** @brief Reset TSC handle state |
| bogdanm | 84:0b3ab51c8877 | 355 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 356 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 357 | */ |
| bogdanm | 84:0b3ab51c8877 | 358 | #define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET) |
| bogdanm | 84:0b3ab51c8877 | 359 | |
| bogdanm | 84:0b3ab51c8877 | 360 | /** |
| bogdanm | 84:0b3ab51c8877 | 361 | * @brief Enable the TSC peripheral. |
| bogdanm | 84:0b3ab51c8877 | 362 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 363 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 364 | */ |
| bogdanm | 84:0b3ab51c8877 | 365 | #define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE) |
| bogdanm | 84:0b3ab51c8877 | 366 | |
| bogdanm | 84:0b3ab51c8877 | 367 | /** |
| bogdanm | 84:0b3ab51c8877 | 368 | * @brief Disable the TSC peripheral. |
| bogdanm | 84:0b3ab51c8877 | 369 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 370 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 371 | */ |
| bogdanm | 84:0b3ab51c8877 | 372 | #define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE)) |
| bogdanm | 84:0b3ab51c8877 | 373 | |
| bogdanm | 84:0b3ab51c8877 | 374 | /** |
| bogdanm | 84:0b3ab51c8877 | 375 | * @brief Start acquisition |
| bogdanm | 84:0b3ab51c8877 | 376 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 377 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 378 | */ |
| bogdanm | 84:0b3ab51c8877 | 379 | #define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START) |
| bogdanm | 84:0b3ab51c8877 | 380 | |
| bogdanm | 84:0b3ab51c8877 | 381 | /** |
| bogdanm | 84:0b3ab51c8877 | 382 | * @brief Stop acquisition |
| bogdanm | 84:0b3ab51c8877 | 383 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 384 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 385 | */ |
| bogdanm | 84:0b3ab51c8877 | 386 | #define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START)) |
| bogdanm | 84:0b3ab51c8877 | 387 | |
| bogdanm | 84:0b3ab51c8877 | 388 | /** |
| bogdanm | 84:0b3ab51c8877 | 389 | * @brief Set IO default mode to output push-pull low |
| bogdanm | 84:0b3ab51c8877 | 390 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 391 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 392 | */ |
| bogdanm | 84:0b3ab51c8877 | 393 | #define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF)) |
| bogdanm | 84:0b3ab51c8877 | 394 | |
| bogdanm | 84:0b3ab51c8877 | 395 | /** |
| bogdanm | 84:0b3ab51c8877 | 396 | * @brief Set IO default mode to input floating |
| bogdanm | 84:0b3ab51c8877 | 397 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 398 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 399 | */ |
| bogdanm | 84:0b3ab51c8877 | 400 | #define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF) |
| bogdanm | 84:0b3ab51c8877 | 401 | |
| bogdanm | 84:0b3ab51c8877 | 402 | /** |
| bogdanm | 84:0b3ab51c8877 | 403 | * @brief Set synchronization polarity to falling edge |
| bogdanm | 84:0b3ab51c8877 | 404 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 405 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 406 | */ |
| bogdanm | 84:0b3ab51c8877 | 407 | #define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL)) |
| bogdanm | 84:0b3ab51c8877 | 408 | |
| bogdanm | 84:0b3ab51c8877 | 409 | /** |
| bogdanm | 84:0b3ab51c8877 | 410 | * @brief Set synchronization polarity to rising edge and high level |
| bogdanm | 84:0b3ab51c8877 | 411 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 412 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 413 | */ |
| bogdanm | 84:0b3ab51c8877 | 414 | #define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL) |
| bogdanm | 84:0b3ab51c8877 | 415 | |
| bogdanm | 84:0b3ab51c8877 | 416 | /** |
| bogdanm | 84:0b3ab51c8877 | 417 | * @brief Enable TSC interrupt. |
| bogdanm | 84:0b3ab51c8877 | 418 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 419 | * @param __INTERRUPT__: TSC interrupt |
| bogdanm | 84:0b3ab51c8877 | 420 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 421 | */ |
| bogdanm | 84:0b3ab51c8877 | 422 | #define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
| bogdanm | 84:0b3ab51c8877 | 423 | |
| bogdanm | 84:0b3ab51c8877 | 424 | /** |
| bogdanm | 84:0b3ab51c8877 | 425 | * @brief Disable TSC interrupt. |
| bogdanm | 84:0b3ab51c8877 | 426 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 427 | * @param __INTERRUPT__: TSC interrupt |
| bogdanm | 84:0b3ab51c8877 | 428 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 429 | */ |
| bogdanm | 84:0b3ab51c8877 | 430 | #define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__))) |
| bogdanm | 84:0b3ab51c8877 | 431 | |
| bogdanm | 84:0b3ab51c8877 | 432 | /** @brief Check if the specified TSC interrupt source is enabled or disabled. |
| bogdanm | 84:0b3ab51c8877 | 433 | * @param __HANDLE__: TSC Handle |
| bogdanm | 84:0b3ab51c8877 | 434 | * @param __INTERRUPT__: TSC interrupt |
| bogdanm | 84:0b3ab51c8877 | 435 | * @retval SET or RESET |
| bogdanm | 84:0b3ab51c8877 | 436 | */ |
| bogdanm | 84:0b3ab51c8877 | 437 | #define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| bogdanm | 84:0b3ab51c8877 | 438 | |
| bogdanm | 84:0b3ab51c8877 | 439 | /** |
| bogdanm | 84:0b3ab51c8877 | 440 | * @brief Get the selected TSC's flag status. |
| bogdanm | 84:0b3ab51c8877 | 441 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 442 | * @param __FLAG__: TSC flag |
| bogdanm | 84:0b3ab51c8877 | 443 | * @retval SET or RESET |
| bogdanm | 84:0b3ab51c8877 | 444 | */ |
| bogdanm | 84:0b3ab51c8877 | 445 | #define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET) |
| bogdanm | 84:0b3ab51c8877 | 446 | |
| bogdanm | 84:0b3ab51c8877 | 447 | /** |
| bogdanm | 84:0b3ab51c8877 | 448 | * @brief Clear the TSC's pending flag. |
| bogdanm | 84:0b3ab51c8877 | 449 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 450 | * @param __FLAG__: TSC flag |
| bogdanm | 84:0b3ab51c8877 | 451 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 452 | */ |
| bogdanm | 92:4fc01daae5a5 | 453 | #define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| bogdanm | 84:0b3ab51c8877 | 454 | |
| bogdanm | 84:0b3ab51c8877 | 455 | /** |
| bogdanm | 84:0b3ab51c8877 | 456 | * @brief Enable schmitt trigger hysteresis on a group of IOs |
| bogdanm | 84:0b3ab51c8877 | 457 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 458 | * @param __GX_IOY_MASK__: IOs mask |
| bogdanm | 84:0b3ab51c8877 | 459 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 460 | */ |
| bogdanm | 84:0b3ab51c8877 | 461 | #define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__)) |
| bogdanm | 84:0b3ab51c8877 | 462 | |
| bogdanm | 84:0b3ab51c8877 | 463 | /** |
| bogdanm | 84:0b3ab51c8877 | 464 | * @brief Disable schmitt trigger hysteresis on a group of IOs |
| bogdanm | 84:0b3ab51c8877 | 465 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 466 | * @param __GX_IOY_MASK__: IOs mask |
| bogdanm | 84:0b3ab51c8877 | 467 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 468 | */ |
| bogdanm | 84:0b3ab51c8877 | 469 | #define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
| bogdanm | 84:0b3ab51c8877 | 470 | |
| bogdanm | 84:0b3ab51c8877 | 471 | /** |
| bogdanm | 84:0b3ab51c8877 | 472 | * @brief Open analog switch on a group of IOs |
| bogdanm | 84:0b3ab51c8877 | 473 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 474 | * @param __GX_IOY_MASK__: IOs mask |
| bogdanm | 84:0b3ab51c8877 | 475 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 476 | */ |
| bogdanm | 84:0b3ab51c8877 | 477 | #define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
| bogdanm | 84:0b3ab51c8877 | 478 | |
| bogdanm | 84:0b3ab51c8877 | 479 | /** |
| bogdanm | 84:0b3ab51c8877 | 480 | * @brief Close analog switch on a group of IOs |
| bogdanm | 84:0b3ab51c8877 | 481 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 482 | * @param __GX_IOY_MASK__: IOs mask |
| bogdanm | 84:0b3ab51c8877 | 483 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 484 | */ |
| bogdanm | 84:0b3ab51c8877 | 485 | #define __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__)) |
| bogdanm | 84:0b3ab51c8877 | 486 | |
| bogdanm | 84:0b3ab51c8877 | 487 | /** |
| bogdanm | 84:0b3ab51c8877 | 488 | * @brief Enable a group of IOs in channel mode |
| bogdanm | 84:0b3ab51c8877 | 489 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 490 | * @param __GX_IOY_MASK__: IOs mask |
| bogdanm | 84:0b3ab51c8877 | 491 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 492 | */ |
| bogdanm | 84:0b3ab51c8877 | 493 | #define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__)) |
| bogdanm | 84:0b3ab51c8877 | 494 | |
| bogdanm | 84:0b3ab51c8877 | 495 | /** |
| bogdanm | 84:0b3ab51c8877 | 496 | * @brief Disable a group of channel IOs |
| bogdanm | 84:0b3ab51c8877 | 497 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 498 | * @param __GX_IOY_MASK__: IOs mask |
| bogdanm | 84:0b3ab51c8877 | 499 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 500 | */ |
| bogdanm | 84:0b3ab51c8877 | 501 | #define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
| bogdanm | 84:0b3ab51c8877 | 502 | |
| bogdanm | 84:0b3ab51c8877 | 503 | /** |
| bogdanm | 84:0b3ab51c8877 | 504 | * @brief Enable a group of IOs in sampling mode |
| bogdanm | 84:0b3ab51c8877 | 505 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 506 | * @param __GX_IOY_MASK__: IOs mask |
| bogdanm | 84:0b3ab51c8877 | 507 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 508 | */ |
| bogdanm | 84:0b3ab51c8877 | 509 | #define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__)) |
| bogdanm | 84:0b3ab51c8877 | 510 | |
| bogdanm | 84:0b3ab51c8877 | 511 | /** |
| bogdanm | 84:0b3ab51c8877 | 512 | * @brief Disable a group of sampling IOs |
| bogdanm | 84:0b3ab51c8877 | 513 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 514 | * @param __GX_IOY_MASK__: IOs mask |
| bogdanm | 84:0b3ab51c8877 | 515 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 516 | */ |
| bogdanm | 84:0b3ab51c8877 | 517 | #define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
| bogdanm | 84:0b3ab51c8877 | 518 | |
| bogdanm | 84:0b3ab51c8877 | 519 | /** |
| bogdanm | 84:0b3ab51c8877 | 520 | * @brief Enable acquisition groups |
| bogdanm | 84:0b3ab51c8877 | 521 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 522 | * @param __GX_MASK__: Groups mask |
| bogdanm | 84:0b3ab51c8877 | 523 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 524 | */ |
| bogdanm | 84:0b3ab51c8877 | 525 | #define __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__)) |
| bogdanm | 84:0b3ab51c8877 | 526 | |
| bogdanm | 84:0b3ab51c8877 | 527 | /** |
| bogdanm | 84:0b3ab51c8877 | 528 | * @brief Disable acquisition groups |
| bogdanm | 84:0b3ab51c8877 | 529 | * @param __HANDLE__: TSC handle |
| bogdanm | 84:0b3ab51c8877 | 530 | * @param __GX_MASK__: Groups mask |
| bogdanm | 84:0b3ab51c8877 | 531 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 532 | */ |
| bogdanm | 84:0b3ab51c8877 | 533 | #define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__))) |
| bogdanm | 84:0b3ab51c8877 | 534 | |
| bogdanm | 84:0b3ab51c8877 | 535 | /** @brief Gets acquisition group status |
| bogdanm | 84:0b3ab51c8877 | 536 | * @param __HANDLE__: TSC Handle |
| bogdanm | 84:0b3ab51c8877 | 537 | * @param __GX_INDEX__: Group index |
| bogdanm | 84:0b3ab51c8877 | 538 | * @retval SET or RESET |
| bogdanm | 84:0b3ab51c8877 | 539 | */ |
| bogdanm | 84:0b3ab51c8877 | 540 | #define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \ |
| bogdanm | 84:0b3ab51c8877 | 541 | ((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) == (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING) |
| bogdanm | 84:0b3ab51c8877 | 542 | |
| bogdanm | 84:0b3ab51c8877 | 543 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 544 | |
| bogdanm | 84:0b3ab51c8877 | 545 | /* Initialization and de-initialization functions *****************************/ |
| bogdanm | 84:0b3ab51c8877 | 546 | HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 547 | HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc); |
| bogdanm | 84:0b3ab51c8877 | 548 | void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 549 | void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 550 | |
| bogdanm | 84:0b3ab51c8877 | 551 | /* IO operation functions *****************************************************/ |
| bogdanm | 84:0b3ab51c8877 | 552 | HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 553 | HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 554 | HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 555 | HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 556 | TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index); |
| bogdanm | 84:0b3ab51c8877 | 557 | uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index); |
| bogdanm | 84:0b3ab51c8877 | 558 | |
| bogdanm | 84:0b3ab51c8877 | 559 | /* Peripheral Control functions ***********************************************/ |
| bogdanm | 84:0b3ab51c8877 | 560 | HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config); |
| bogdanm | 84:0b3ab51c8877 | 561 | HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice); |
| bogdanm | 84:0b3ab51c8877 | 562 | |
| bogdanm | 84:0b3ab51c8877 | 563 | /* Peripheral State and Error functions ***************************************/ |
| bogdanm | 84:0b3ab51c8877 | 564 | HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 565 | HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 566 | void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 567 | |
| bogdanm | 84:0b3ab51c8877 | 568 | /* Callback functions *********************************************************/ |
| bogdanm | 84:0b3ab51c8877 | 569 | void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 570 | void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc); |
| bogdanm | 84:0b3ab51c8877 | 571 | |
| bogdanm | 84:0b3ab51c8877 | 572 | /** |
| bogdanm | 84:0b3ab51c8877 | 573 | * @} |
| bogdanm | 84:0b3ab51c8877 | 574 | */ |
| bogdanm | 84:0b3ab51c8877 | 575 | |
| bogdanm | 84:0b3ab51c8877 | 576 | /** |
| bogdanm | 84:0b3ab51c8877 | 577 | * @} |
| bogdanm | 84:0b3ab51c8877 | 578 | */ |
| bogdanm | 84:0b3ab51c8877 | 579 | |
| bogdanm | 84:0b3ab51c8877 | 580 | #ifdef __cplusplus |
| bogdanm | 84:0b3ab51c8877 | 581 | } |
| bogdanm | 84:0b3ab51c8877 | 582 | #endif |
| bogdanm | 84:0b3ab51c8877 | 583 | |
| bogdanm | 84:0b3ab51c8877 | 584 | #endif /*__STM32L0xx_TSC_H */ |
| bogdanm | 84:0b3ab51c8877 | 585 | |
| bogdanm | 84:0b3ab51c8877 | 586 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |