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TARGET_NUCLEO_L053R8/stm32l0xx_hal_uart.h@97:4298809c7c9e, 2015-04-08 (annotated)

Committer:
filartrix
Date:
Wed Apr 08 14:12:53 2015 +0000
Revision:
97:4298809c7c9e
Parent:
96:487b796308b0 
First reale BlueNRG module for nucleo 401 board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /**
bogdanm 84:0b3ab51c8877 2 ******************************************************************************
bogdanm 84:0b3ab51c8877 3 * @file stm32l0xx_hal_uart.h
bogdanm 84:0b3ab51c8877 4 * @author MCD Application Team
Kojto 96:487b796308b0 5 * @version V1.2.0
Kojto 96:487b796308b0 6 * @date 06-February-2015
bogdanm 84:0b3ab51c8877 7 * @brief Header file of UART HAL module.
bogdanm 84:0b3ab51c8877 8 ******************************************************************************
bogdanm 84:0b3ab51c8877 9 * @attention
bogdanm 84:0b3ab51c8877 10 *
Kojto 96:487b796308b0 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 84:0b3ab51c8877 12 *
bogdanm 84:0b3ab51c8877 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 84:0b3ab51c8877 14 * are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 84:0b3ab51c8877 16 * this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 84:0b3ab51c8877 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 84:0b3ab51c8877 19 * and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 84:0b3ab51c8877 21 * may be used to endorse or promote products derived from this software
bogdanm 84:0b3ab51c8877 22 * without specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 84:0b3ab51c8877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 84:0b3ab51c8877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 84:0b3ab51c8877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 84:0b3ab51c8877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 84:0b3ab51c8877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 84:0b3ab51c8877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 84:0b3ab51c8877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 34 *
bogdanm 84:0b3ab51c8877 35 ******************************************************************************
bogdanm 84:0b3ab51c8877 36 */
bogdanm 84:0b3ab51c8877 37
bogdanm 84:0b3ab51c8877 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 84:0b3ab51c8877 39 #ifndef __STM32L0xx_HAL_UART_H
bogdanm 84:0b3ab51c8877 40 #define __STM32L0xx_HAL_UART_H
bogdanm 84:0b3ab51c8877 41
bogdanm 84:0b3ab51c8877 42 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 43 extern "C" {
bogdanm 84:0b3ab51c8877 44 #endif
bogdanm 84:0b3ab51c8877 45
bogdanm 84:0b3ab51c8877 46 /* Includes ------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 47 #include "stm32l0xx_hal_def.h"
bogdanm 84:0b3ab51c8877 48
bogdanm 84:0b3ab51c8877 49 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 84:0b3ab51c8877 50 * @{
bogdanm 84:0b3ab51c8877 51 */
bogdanm 84:0b3ab51c8877 52
Kojto 96:487b796308b0 53 /** @defgroup UART UART
bogdanm 84:0b3ab51c8877 54 * @{
bogdanm 84:0b3ab51c8877 55 */
bogdanm 84:0b3ab51c8877 56
Kojto 96:487b796308b0 57 /******************************************************************************/
Kojto 96:487b796308b0 58 /* Exported types ------------------------------------------------------------*/
Kojto 96:487b796308b0 59 /******************************************************************************/
bogdanm 84:0b3ab51c8877 60
Kojto 96:487b796308b0 61 /** @defgroup UART_Exported_Types UART Exported Types
Kojto 96:487b796308b0 62 * @{
Kojto 96:487b796308b0 63 */
Kojto 96:487b796308b0 64
Kojto 96:487b796308b0 65 /** @defgroup UART_Init_Configuration UART initialization configuration structure
Kojto 96:487b796308b0 66 * @{
Kojto 96:487b796308b0 67 */
bogdanm 84:0b3ab51c8877 68 /**
bogdanm 84:0b3ab51c8877 69 * @brief UART Init Structure definition
bogdanm 84:0b3ab51c8877 70 */
bogdanm 84:0b3ab51c8877 71 typedef struct
bogdanm 84:0b3ab51c8877 72 {
bogdanm 84:0b3ab51c8877 73 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
bogdanm 84:0b3ab51c8877 74 The baud rate register is computed using the following formula:
bogdanm 84:0b3ab51c8877 75 - If oversampling is 16 or in LIN mode,
bogdanm 84:0b3ab51c8877 76 Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
bogdanm 84:0b3ab51c8877 77 - If oversampling is 8,
bogdanm 84:0b3ab51c8877 78 Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
bogdanm 84:0b3ab51c8877 79 Baud Rate Register[3] = 0
bogdanm 84:0b3ab51c8877 80 Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */
bogdanm 84:0b3ab51c8877 81
bogdanm 84:0b3ab51c8877 82 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm 92:4fc01daae5a5 83 This parameter can be a value of @ref UARTEx_Word_Length */
bogdanm 84:0b3ab51c8877 84
bogdanm 84:0b3ab51c8877 85 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
bogdanm 84:0b3ab51c8877 86 This parameter can be a value of @ref UART_Stop_Bits */
bogdanm 84:0b3ab51c8877 87
bogdanm 84:0b3ab51c8877 88 uint32_t Parity; /*!< Specifies the parity mode.
bogdanm 84:0b3ab51c8877 89 This parameter can be a value of @ref UART_Parity
bogdanm 84:0b3ab51c8877 90 @note When parity is enabled, the computed parity is inserted
bogdanm 84:0b3ab51c8877 91 at the MSB position of the transmitted data (9th bit when
bogdanm 84:0b3ab51c8877 92 the word length is set to 9 data bits; 8th bit when the
bogdanm 84:0b3ab51c8877 93 word length is set to 8 data bits). */
bogdanm 84:0b3ab51c8877 94
bogdanm 84:0b3ab51c8877 95 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
bogdanm 84:0b3ab51c8877 96 This parameter can be a value of @ref UART_Mode */
bogdanm 84:0b3ab51c8877 97
bogdanm 84:0b3ab51c8877 98 uint32_t HwFlowCtl; /*!< Specifies wether the hardware flow control mode is enabled
bogdanm 84:0b3ab51c8877 99 or disabled.
bogdanm 84:0b3ab51c8877 100 This parameter can be a value of @ref UART_Hardware_Flow_Control */
bogdanm 84:0b3ab51c8877 101
bogdanm 84:0b3ab51c8877 102 uint32_t OverSampling; /*!< Specifies wether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
bogdanm 84:0b3ab51c8877 103 This parameter can be a value of @ref UART_Over_Sampling */
bogdanm 84:0b3ab51c8877 104
bogdanm 84:0b3ab51c8877 105 uint32_t OneBitSampling; /*!< Specifies wether a single sample or three samples' majority vote is selected.
bogdanm 84:0b3ab51c8877 106 Selecting the single sample method increases the receiver tolerance to clock
Kojto 96:487b796308b0 107 deviations. This parameter can be a value of @ref UART_One_Bit */
bogdanm 84:0b3ab51c8877 108 }UART_InitTypeDef;
Kojto 96:487b796308b0 109 /**
Kojto 96:487b796308b0 110 * @}
Kojto 96:487b796308b0 111 */
Kojto 96:487b796308b0 112 /** @defgroup UART_Advanced_Feature UART advanced feature structure
Kojto 96:487b796308b0 113 * @{
Kojto 96:487b796308b0 114 */
bogdanm 84:0b3ab51c8877 115 /**
bogdanm 84:0b3ab51c8877 116 * @brief UART Advanced Features initalization structure definition
bogdanm 84:0b3ab51c8877 117 */
bogdanm 84:0b3ab51c8877 118 typedef struct
bogdanm 84:0b3ab51c8877 119 {
bogdanm 84:0b3ab51c8877 120 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
bogdanm 84:0b3ab51c8877 121 Advanced Features may be initialized at the same time .
bogdanm 84:0b3ab51c8877 122 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type */
bogdanm 84:0b3ab51c8877 123
bogdanm 84:0b3ab51c8877 124 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
bogdanm 84:0b3ab51c8877 125 This parameter can be a value of @ref UART_Tx_Inv */
bogdanm 84:0b3ab51c8877 126
bogdanm 84:0b3ab51c8877 127 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
bogdanm 84:0b3ab51c8877 128 This parameter can be a value of @ref UART_Rx_Inv */
bogdanm 84:0b3ab51c8877 129
bogdanm 84:0b3ab51c8877 130 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
bogdanm 84:0b3ab51c8877 131 vs negative/inverted logic).
bogdanm 84:0b3ab51c8877 132 This parameter can be a value of @ref UART_Data_Inv */
bogdanm 84:0b3ab51c8877 133
bogdanm 84:0b3ab51c8877 134 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
bogdanm 84:0b3ab51c8877 135 This parameter can be a value of @ref UART_Rx_Tx_Swap */
bogdanm 84:0b3ab51c8877 136
bogdanm 84:0b3ab51c8877 137 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
bogdanm 84:0b3ab51c8877 138 This parameter can be a value of @ref UART_Overrun_Disable */
bogdanm 84:0b3ab51c8877 139
bogdanm 84:0b3ab51c8877 140 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
bogdanm 84:0b3ab51c8877 141 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error */
bogdanm 84:0b3ab51c8877 142
bogdanm 84:0b3ab51c8877 143 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
bogdanm 84:0b3ab51c8877 144 This parameter can be a value of @ref UART_AutoBaudRate_Enable */
bogdanm 84:0b3ab51c8877 145
bogdanm 84:0b3ab51c8877 146 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
bogdanm 84:0b3ab51c8877 147 detection is carried out.
bogdanm 92:4fc01daae5a5 148 This parameter can be a value of @ref UARTEx_AutoBaud_Rate_Mode */
bogdanm 84:0b3ab51c8877 149
bogdanm 84:0b3ab51c8877 150 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
bogdanm 84:0b3ab51c8877 151 This parameter can be a value of @ref UART_MSB_First */
bogdanm 84:0b3ab51c8877 152 } UART_AdvFeatureInitTypeDef;
Kojto 96:487b796308b0 153 /**
Kojto 96:487b796308b0 154 * @}
Kojto 96:487b796308b0 155 */
bogdanm 84:0b3ab51c8877 156
Kojto 96:487b796308b0 157 /** @defgroup UART_State_Definition UART state definition
Kojto 96:487b796308b0 158 * @{
Kojto 96:487b796308b0 159 */
bogdanm 84:0b3ab51c8877 160 /**
bogdanm 84:0b3ab51c8877 161 * @brief HAL UART State structures definition
bogdanm 84:0b3ab51c8877 162 */
bogdanm 84:0b3ab51c8877 163 typedef enum
bogdanm 84:0b3ab51c8877 164 {
bogdanm 84:0b3ab51c8877 165 HAL_UART_STATE_RESET = 0x00, /*!< Peripheral Reset state */
bogdanm 84:0b3ab51c8877 166 HAL_UART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 84:0b3ab51c8877 167 HAL_UART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 84:0b3ab51c8877 168 HAL_UART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 84:0b3ab51c8877 169 HAL_UART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 84:0b3ab51c8877 170 HAL_UART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
bogdanm 84:0b3ab51c8877 171 HAL_UART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 84:0b3ab51c8877 172 HAL_UART_STATE_ERROR = 0x04 /*!< Error */
bogdanm 84:0b3ab51c8877 173 }HAL_UART_StateTypeDef;
Kojto 96:487b796308b0 174 /**
Kojto 96:487b796308b0 175 * @}
Kojto 96:487b796308b0 176 */
Kojto 96:487b796308b0 177 /** @defgroup UART_Error_Definition UART error definition
Kojto 96:487b796308b0 178 * @{
Kojto 96:487b796308b0 179 */
bogdanm 84:0b3ab51c8877 180 /**
Kojto 96:487b796308b0 181 * @brief HAL UART Error Code definition
bogdanm 84:0b3ab51c8877 182 */
bogdanm 84:0b3ab51c8877 183
Kojto 96:487b796308b0 184 #define HAL_UART_ERROR_NONE ((uint32_t)0x00) /*!< No error */
Kojto 96:487b796308b0 185 #define HAL_UART_ERROR_PE ((uint32_t)0x01) /*!< Parity error */
Kojto 96:487b796308b0 186 #define HAL_UART_ERROR_NE ((uint32_t)0x02) /*!< Noise error */
Kojto 96:487b796308b0 187 #define HAL_UART_ERROR_FE ((uint32_t)0x04) /*!< frame error */
Kojto 96:487b796308b0 188 #define HAL_UART_ERROR_ORE ((uint32_t)0x08) /*!< Overrun error */
Kojto 96:487b796308b0 189 #define HAL_UART_ERROR_DMA ((uint32_t)0x10) /*!< DMA transfer error */
Kojto 96:487b796308b0 190
Kojto 96:487b796308b0 191 /**
Kojto 96:487b796308b0 192 * @}
Kojto 96:487b796308b0 193 */
Kojto 96:487b796308b0 194 /** @defgroup UART_Clock_SourceDefinition UART clock source definition
Kojto 96:487b796308b0 195 * @{
Kojto 96:487b796308b0 196 */
bogdanm 84:0b3ab51c8877 197 /**
bogdanm 84:0b3ab51c8877 198 * @brief UART clock sources definition
bogdanm 84:0b3ab51c8877 199 */
bogdanm 84:0b3ab51c8877 200 typedef enum
bogdanm 84:0b3ab51c8877 201 {
bogdanm 84:0b3ab51c8877 202 UART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */
bogdanm 84:0b3ab51c8877 203 UART_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */
bogdanm 84:0b3ab51c8877 204 UART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */
bogdanm 84:0b3ab51c8877 205 UART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */
bogdanm 84:0b3ab51c8877 206 UART_CLOCKSOURCE_LSE = 0x08 /*!< LSE clock source */
bogdanm 84:0b3ab51c8877 207 }UART_ClockSourceTypeDef;
Kojto 96:487b796308b0 208 /**
Kojto 96:487b796308b0 209 * @}
Kojto 96:487b796308b0 210 */
Kojto 96:487b796308b0 211 /** @defgroup UART_handle_Definition Handle structure definition
Kojto 96:487b796308b0 212 * @{
Kojto 96:487b796308b0 213 */
bogdanm 84:0b3ab51c8877 214 /**
bogdanm 84:0b3ab51c8877 215 * @brief UART handle Structure definition
Kojto 96:487b796308b0 216 */
Kojto 96:487b796308b0 217
bogdanm 84:0b3ab51c8877 218 typedef struct
bogdanm 84:0b3ab51c8877 219 {
bogdanm 84:0b3ab51c8877 220 USART_TypeDef *Instance; /* UART registers base address */
bogdanm 84:0b3ab51c8877 221
bogdanm 84:0b3ab51c8877 222 UART_InitTypeDef Init; /* UART communication parameters */
bogdanm 84:0b3ab51c8877 223
bogdanm 84:0b3ab51c8877 224 UART_AdvFeatureInitTypeDef AdvancedInit; /* UART Advanced Features initialization parameters */
bogdanm 84:0b3ab51c8877 225
bogdanm 84:0b3ab51c8877 226 uint8_t *pTxBuffPtr; /* Pointer to UART Tx transfer Buffer */
bogdanm 84:0b3ab51c8877 227
bogdanm 84:0b3ab51c8877 228 uint16_t TxXferSize; /* UART Tx Transfer size */
bogdanm 84:0b3ab51c8877 229
bogdanm 84:0b3ab51c8877 230 uint16_t TxXferCount; /* UART Tx Transfer Counter */
bogdanm 84:0b3ab51c8877 231
bogdanm 84:0b3ab51c8877 232 uint8_t *pRxBuffPtr; /* Pointer to UART Rx transfer Buffer */
bogdanm 84:0b3ab51c8877 233
bogdanm 84:0b3ab51c8877 234 uint16_t RxXferSize; /* UART Rx Transfer size */
bogdanm 84:0b3ab51c8877 235
bogdanm 84:0b3ab51c8877 236 uint16_t RxXferCount; /* UART Rx Transfer Counter */
bogdanm 84:0b3ab51c8877 237
bogdanm 84:0b3ab51c8877 238 uint16_t Mask; /* UART Rx RDR register mask */
bogdanm 84:0b3ab51c8877 239
bogdanm 84:0b3ab51c8877 240 DMA_HandleTypeDef *hdmatx; /* UART Tx DMA Handle parameters */
bogdanm 84:0b3ab51c8877 241
bogdanm 84:0b3ab51c8877 242 DMA_HandleTypeDef *hdmarx; /* UART Rx DMA Handle parameters */
bogdanm 84:0b3ab51c8877 243
bogdanm 84:0b3ab51c8877 244 HAL_LockTypeDef Lock; /* Locking object */
bogdanm 84:0b3ab51c8877 245
bogdanm 84:0b3ab51c8877 246 __IO HAL_UART_StateTypeDef State; /* UART communication state */
bogdanm 84:0b3ab51c8877 247
Kojto 96:487b796308b0 248 __IO uint32_t ErrorCode; /* UART Error code */
bogdanm 84:0b3ab51c8877 249
bogdanm 84:0b3ab51c8877 250 }UART_HandleTypeDef;
Kojto 96:487b796308b0 251 /**
Kojto 96:487b796308b0 252 * @}
Kojto 96:487b796308b0 253 */
Kojto 96:487b796308b0 254 /**
Kojto 96:487b796308b0 255 * @}
Kojto 96:487b796308b0 256 */
bogdanm 84:0b3ab51c8877 257
bogdanm 84:0b3ab51c8877 258 /* Exported constants --------------------------------------------------------*/
Kojto 96:487b796308b0 259 /** @defgroup UART_Exported_Constants UART Exported Constants
bogdanm 84:0b3ab51c8877 260 * @{
bogdanm 84:0b3ab51c8877 261 */
bogdanm 84:0b3ab51c8877 262
Kojto 96:487b796308b0 263 /** @defgroup UART_Stop_Bits UART stop bit definition
bogdanm 84:0b3ab51c8877 264 * @{
bogdanm 84:0b3ab51c8877 265 */
bogdanm 84:0b3ab51c8877 266 #define UART_STOPBITS_1 ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 267 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
bogdanm 84:0b3ab51c8877 268 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
bogdanm 84:0b3ab51c8877 269 ((STOPBITS) == UART_STOPBITS_2))
bogdanm 84:0b3ab51c8877 270 /**
bogdanm 84:0b3ab51c8877 271 * @}
bogdanm 84:0b3ab51c8877 272 */
bogdanm 84:0b3ab51c8877 273
Kojto 96:487b796308b0 274 /** @defgroup UART_Parity UART parity definition
bogdanm 84:0b3ab51c8877 275 * @{
bogdanm 84:0b3ab51c8877 276 */
bogdanm 84:0b3ab51c8877 277 #define UART_PARITY_NONE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 278 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
bogdanm 84:0b3ab51c8877 279 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
bogdanm 84:0b3ab51c8877 280 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
bogdanm 84:0b3ab51c8877 281 ((PARITY) == UART_PARITY_EVEN) || \
bogdanm 84:0b3ab51c8877 282 ((PARITY) == UART_PARITY_ODD))
bogdanm 84:0b3ab51c8877 283 /**
bogdanm 84:0b3ab51c8877 284 * @}
bogdanm 84:0b3ab51c8877 285 */
bogdanm 84:0b3ab51c8877 286
Kojto 96:487b796308b0 287 /** @defgroup UART_Hardware_Flow_Control UART hardware flow control definition
bogdanm 84:0b3ab51c8877 288 * @{
bogdanm 84:0b3ab51c8877 289 */
bogdanm 84:0b3ab51c8877 290 #define UART_HWCONTROL_NONE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 291 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
bogdanm 84:0b3ab51c8877 292 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
bogdanm 84:0b3ab51c8877 293 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
bogdanm 84:0b3ab51c8877 294 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
bogdanm 84:0b3ab51c8877 295 (((CONTROL) == UART_HWCONTROL_NONE) || \
bogdanm 84:0b3ab51c8877 296 ((CONTROL) == UART_HWCONTROL_RTS) || \
bogdanm 84:0b3ab51c8877 297 ((CONTROL) == UART_HWCONTROL_CTS) || \
bogdanm 84:0b3ab51c8877 298 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
bogdanm 84:0b3ab51c8877 299 /**
bogdanm 84:0b3ab51c8877 300 * @}
bogdanm 84:0b3ab51c8877 301 */
bogdanm 84:0b3ab51c8877 302
Kojto 96:487b796308b0 303 /** @defgroup UART_Mode UART mode definition
bogdanm 84:0b3ab51c8877 304 * @{
bogdanm 84:0b3ab51c8877 305 */
bogdanm 84:0b3ab51c8877 306 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
bogdanm 84:0b3ab51c8877 307 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
bogdanm 84:0b3ab51c8877 308 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
bogdanm 84:0b3ab51c8877 309 #define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00))
bogdanm 84:0b3ab51c8877 310 /**
bogdanm 84:0b3ab51c8877 311 * @}
bogdanm 84:0b3ab51c8877 312 */
bogdanm 84:0b3ab51c8877 313
Kojto 96:487b796308b0 314 /** @defgroup UART_State UART state enable and disable definition
bogdanm 84:0b3ab51c8877 315 * @{
bogdanm 84:0b3ab51c8877 316 */
bogdanm 84:0b3ab51c8877 317 #define UART_STATE_DISABLE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 318 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
bogdanm 84:0b3ab51c8877 319 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
bogdanm 84:0b3ab51c8877 320 ((STATE) == UART_STATE_ENABLE))
bogdanm 84:0b3ab51c8877 321 /**
bogdanm 84:0b3ab51c8877 322 * @}
bogdanm 84:0b3ab51c8877 323 */
bogdanm 84:0b3ab51c8877 324
Kojto 96:487b796308b0 325 /** @defgroup UART_Over_Sampling UART over sampling definition
bogdanm 84:0b3ab51c8877 326 * @{
bogdanm 84:0b3ab51c8877 327 */
bogdanm 84:0b3ab51c8877 328 #define UART_OVERSAMPLING_16 ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 329 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
bogdanm 84:0b3ab51c8877 330 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
bogdanm 84:0b3ab51c8877 331 ((SAMPLING) == UART_OVERSAMPLING_8))
bogdanm 84:0b3ab51c8877 332 /**
bogdanm 84:0b3ab51c8877 333 * @}
bogdanm 84:0b3ab51c8877 334 */
bogdanm 84:0b3ab51c8877 335
bogdanm 84:0b3ab51c8877 336
Kojto 96:487b796308b0 337 /** @defgroup UART_Receiver_TimeOut UART receiver timeOut definition
bogdanm 84:0b3ab51c8877 338 * @{
bogdanm 84:0b3ab51c8877 339 */
bogdanm 84:0b3ab51c8877 340 #define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 341 #define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN)
bogdanm 84:0b3ab51c8877 342 #define IS_UART_RECEIVER_TIMEOUT(TIMEOUT) (((TIMEOUT) == UART_RECEIVER_TIMEOUT_DISABLE) || \
bogdanm 84:0b3ab51c8877 343 ((TIMEOUT) == UART_RECEIVER_TIMEOUT_ENABLE))
bogdanm 84:0b3ab51c8877 344 /**
bogdanm 84:0b3ab51c8877 345 * @}
bogdanm 84:0b3ab51c8877 346 */
bogdanm 84:0b3ab51c8877 347
Kojto 96:487b796308b0 348 /** @defgroup UART_LIN UART LIN enable and disable definition
bogdanm 84:0b3ab51c8877 349 * @{
bogdanm 84:0b3ab51c8877 350 */
bogdanm 84:0b3ab51c8877 351 #define UART_LIN_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 352 #define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN)
bogdanm 84:0b3ab51c8877 353 #define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) || \
bogdanm 84:0b3ab51c8877 354 ((LIN) == UART_LIN_ENABLE))
bogdanm 84:0b3ab51c8877 355 /**
bogdanm 84:0b3ab51c8877 356 * @}
bogdanm 84:0b3ab51c8877 357 */
bogdanm 84:0b3ab51c8877 358
Kojto 96:487b796308b0 359 /** @defgroup UART_LIN_Break_Detection UART LIN break detection definition
bogdanm 84:0b3ab51c8877 360 * @{
bogdanm 84:0b3ab51c8877 361 */
bogdanm 84:0b3ab51c8877 362 #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 363 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
bogdanm 84:0b3ab51c8877 364 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
bogdanm 84:0b3ab51c8877 365 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
bogdanm 84:0b3ab51c8877 366 /**
bogdanm 84:0b3ab51c8877 367 * @}
bogdanm 84:0b3ab51c8877 368 */
bogdanm 84:0b3ab51c8877 369
bogdanm 84:0b3ab51c8877 370
bogdanm 84:0b3ab51c8877 371
Kojto 96:487b796308b0 372 /** @defgroup UART_One_Bit UART one bit definition
bogdanm 84:0b3ab51c8877 373 * @{
bogdanm 84:0b3ab51c8877 374 */
Kojto 96:487b796308b0 375 #define UART_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000)
Kojto 96:487b796308b0 376 #define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT)
Kojto 96:487b796308b0 377 #define IS_UART_ONE_BIT_SAMPLE(ONEBIT) (((ONEBIT) == UART_ONE_BIT_SAMPLE_DISABLE) || \
Kojto 96:487b796308b0 378 ((ONEBIT) == UART_ONE_BIT_SAMPLE_ENABLE))
bogdanm 84:0b3ab51c8877 379 /**
bogdanm 84:0b3ab51c8877 380 * @}
bogdanm 84:0b3ab51c8877 381 */
bogdanm 84:0b3ab51c8877 382
Kojto 96:487b796308b0 383 /** @defgroup UART_DMA_Tx UART DMA Tx definition
bogdanm 84:0b3ab51c8877 384 * @{
bogdanm 84:0b3ab51c8877 385 */
bogdanm 84:0b3ab51c8877 386 #define UART_DMA_TX_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 387 #define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT)
bogdanm 84:0b3ab51c8877 388 #define IS_UART_DMA_TX(DMATX) (((DMATX) == UART_DMA_TX_DISABLE) || \
bogdanm 84:0b3ab51c8877 389 ((DMATX) == UART_DMA_TX_ENABLE))
bogdanm 84:0b3ab51c8877 390 /**
bogdanm 84:0b3ab51c8877 391 * @}
bogdanm 84:0b3ab51c8877 392 */
bogdanm 84:0b3ab51c8877 393
Kojto 96:487b796308b0 394 /** @defgroup UART_DMA_Rx UART DMA Rx definition
bogdanm 84:0b3ab51c8877 395 * @{
bogdanm 84:0b3ab51c8877 396 */
bogdanm 84:0b3ab51c8877 397 #define UART_DMA_RX_DISABLE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 398 #define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR)
bogdanm 84:0b3ab51c8877 399 #define IS_UART_DMA_RX(DMARX) (((DMARX) == UART_DMA_RX_DISABLE) || \
bogdanm 84:0b3ab51c8877 400 ((DMARX) == UART_DMA_RX_ENABLE))
bogdanm 84:0b3ab51c8877 401 /**
bogdanm 84:0b3ab51c8877 402 * @}
bogdanm 84:0b3ab51c8877 403 */
bogdanm 84:0b3ab51c8877 404
Kojto 96:487b796308b0 405 /** @defgroup UART_Half_Duplex_Selection UART half duplex selection definition
bogdanm 84:0b3ab51c8877 406 * @{
bogdanm 84:0b3ab51c8877 407 */
bogdanm 84:0b3ab51c8877 408 #define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 409 #define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL)
bogdanm 84:0b3ab51c8877 410 #define IS_UART_HALF_DUPLEX(HDSEL) (((HDSEL) == UART_HALF_DUPLEX_DISABLE) || \
bogdanm 84:0b3ab51c8877 411 ((HDSEL) == UART_HALF_DUPLEX_ENABLE))
bogdanm 84:0b3ab51c8877 412 /**
bogdanm 84:0b3ab51c8877 413 * @}
bogdanm 84:0b3ab51c8877 414 */
bogdanm 84:0b3ab51c8877 415
Kojto 96:487b796308b0 416 /** @defgroup UART_Flags UART flags definition
bogdanm 84:0b3ab51c8877 417 * Elements values convention: 0xXXXX
bogdanm 84:0b3ab51c8877 418 * - 0xXXXX : Flag mask in the ISR register
bogdanm 84:0b3ab51c8877 419 * @{
bogdanm 84:0b3ab51c8877 420 */
bogdanm 84:0b3ab51c8877 421 #define UART_FLAG_REACK ((uint32_t)0x00400000)
bogdanm 84:0b3ab51c8877 422 #define UART_FLAG_TEACK ((uint32_t)0x00200000)
bogdanm 84:0b3ab51c8877 423 #define UART_FLAG_WUF ((uint32_t)0x00100000)
bogdanm 84:0b3ab51c8877 424 #define UART_FLAG_RWU ((uint32_t)0x00080000)
bogdanm 84:0b3ab51c8877 425 #define UART_FLAG_SBKF ((uint32_t)0x00040000
bogdanm 84:0b3ab51c8877 426 #define UART_FLAG_CMF ((uint32_t)0x00020000)
bogdanm 84:0b3ab51c8877 427 #define UART_FLAG_BUSY ((uint32_t)0x00010000)
bogdanm 84:0b3ab51c8877 428 #define UART_FLAG_ABRF ((uint32_t)0x00008000)
bogdanm 84:0b3ab51c8877 429 #define UART_FLAG_ABRE ((uint32_t)0x00004000)
bogdanm 84:0b3ab51c8877 430 #define UART_FLAG_EOBF ((uint32_t)0x00001000)
bogdanm 84:0b3ab51c8877 431 #define UART_FLAG_RTOF ((uint32_t)0x00000800)
bogdanm 84:0b3ab51c8877 432 #define UART_FLAG_CTS ((uint32_t)0x00000400)
bogdanm 84:0b3ab51c8877 433 #define UART_FLAG_CTSIF ((uint32_t)0x00000200)
bogdanm 84:0b3ab51c8877 434 #define UART_FLAG_LBDF ((uint32_t)0x00000100)
bogdanm 84:0b3ab51c8877 435 #define UART_FLAG_TXE ((uint32_t)0x00000080)
bogdanm 84:0b3ab51c8877 436 #define UART_FLAG_TC ((uint32_t)0x00000040)
bogdanm 84:0b3ab51c8877 437 #define UART_FLAG_RXNE ((uint32_t)0x00000020)
bogdanm 84:0b3ab51c8877 438 #define UART_FLAG_IDLE ((uint32_t)0x00000010)
bogdanm 84:0b3ab51c8877 439 #define UART_FLAG_ORE ((uint32_t)0x00000008)
bogdanm 84:0b3ab51c8877 440 #define UART_FLAG_NE ((uint32_t)0x00000004)
bogdanm 84:0b3ab51c8877 441 #define UART_FLAG_FE ((uint32_t)0x00000002)
bogdanm 84:0b3ab51c8877 442 #define UART_FLAG_PE ((uint32_t)0x00000001)
bogdanm 84:0b3ab51c8877 443 /**
bogdanm 84:0b3ab51c8877 444 * @}
bogdanm 84:0b3ab51c8877 445 */
bogdanm 84:0b3ab51c8877 446
Kojto 96:487b796308b0 447 /** @defgroup UART_Interrupt_definition UART interrupt definition
Kojto 96:487b796308b0 448 * Elements values convention: 000ZZZZZ0XXYYYYYb
bogdanm 84:0b3ab51c8877 449 * - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm 84:0b3ab51c8877 450 * - XX : Interrupt source register (2bits)
bogdanm 84:0b3ab51c8877 451 * - 01: CR1 register
bogdanm 84:0b3ab51c8877 452 * - 10: CR2 register
bogdanm 84:0b3ab51c8877 453 * - 11: CR3 register
Kojto 96:487b796308b0 454 * - ZZZZZ : Flag position in the ISR register(5bits)
bogdanm 84:0b3ab51c8877 455 * @{
bogdanm 84:0b3ab51c8877 456 */
bogdanm 84:0b3ab51c8877 457 #define UART_IT_PE ((uint32_t)0x0028)
bogdanm 84:0b3ab51c8877 458 #define UART_IT_TXE ((uint32_t)0x0727)
bogdanm 84:0b3ab51c8877 459 #define UART_IT_TC ((uint32_t)0x0626)
bogdanm 84:0b3ab51c8877 460 #define UART_IT_RXNE ((uint32_t)0x0525)
bogdanm 84:0b3ab51c8877 461 #define UART_IT_IDLE ((uint32_t)0x0424)
bogdanm 84:0b3ab51c8877 462 #define UART_IT_LBD ((uint32_t)0x0846)
bogdanm 84:0b3ab51c8877 463 #define UART_IT_CTS ((uint32_t)0x096A)
Kojto 96:487b796308b0 464 #define UART_IT_CM ((uint32_t)0x112E)
bogdanm 84:0b3ab51c8877 465 #define UART_IT_WUF ((uint32_t)0x1476)
bogdanm 84:0b3ab51c8877 466
bogdanm 84:0b3ab51c8877 467 /** Elements values convention: 000000000XXYYYYYb
bogdanm 84:0b3ab51c8877 468 * - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm 84:0b3ab51c8877 469 * - XX : Interrupt source register (2bits)
bogdanm 84:0b3ab51c8877 470 * - 01: CR1 register
bogdanm 84:0b3ab51c8877 471 * - 10: CR2 register
bogdanm 84:0b3ab51c8877 472 * - 11: CR3 register
bogdanm 84:0b3ab51c8877 473 */
bogdanm 84:0b3ab51c8877 474 #define UART_IT_ERR ((uint32_t)0x0060)
bogdanm 84:0b3ab51c8877 475
bogdanm 84:0b3ab51c8877 476 /** Elements values convention: 0000ZZZZ00000000b
bogdanm 84:0b3ab51c8877 477 * - ZZZZ : Flag position in the ISR register(4bits)
bogdanm 84:0b3ab51c8877 478 */
bogdanm 84:0b3ab51c8877 479 #define UART_IT_ORE ((uint32_t)0x0300)
bogdanm 84:0b3ab51c8877 480 #define UART_IT_NE ((uint32_t)0x0200)
bogdanm 84:0b3ab51c8877 481 #define UART_IT_FE ((uint32_t)0x0100)
bogdanm 84:0b3ab51c8877 482 /**
bogdanm 84:0b3ab51c8877 483 * @}
bogdanm 84:0b3ab51c8877 484 */
bogdanm 84:0b3ab51c8877 485
Kojto 96:487b796308b0 486 /** @defgroup UART_IT_CLEAR_Flags UART interrupt clear flags definition
bogdanm 84:0b3ab51c8877 487 * @{
bogdanm 84:0b3ab51c8877 488 */
bogdanm 84:0b3ab51c8877 489 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
bogdanm 84:0b3ab51c8877 490 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
bogdanm 84:0b3ab51c8877 491 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
bogdanm 84:0b3ab51c8877 492 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
bogdanm 84:0b3ab51c8877 493 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
bogdanm 84:0b3ab51c8877 494 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
bogdanm 84:0b3ab51c8877 495 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
bogdanm 84:0b3ab51c8877 496 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
bogdanm 84:0b3ab51c8877 497 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */
bogdanm 84:0b3ab51c8877 498 #define UART_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */
bogdanm 84:0b3ab51c8877 499 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
bogdanm 84:0b3ab51c8877 500 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
bogdanm 84:0b3ab51c8877 501 /**
bogdanm 84:0b3ab51c8877 502 * @}
bogdanm 84:0b3ab51c8877 503 */
bogdanm 84:0b3ab51c8877 504
Kojto 96:487b796308b0 505 /** @defgroup UART_Request_Parameters UART request parameter definition
bogdanm 84:0b3ab51c8877 506 * @{
bogdanm 84:0b3ab51c8877 507 */
bogdanm 84:0b3ab51c8877 508 #define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */
bogdanm 84:0b3ab51c8877 509 #define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /*!< Send Break Request */
bogdanm 84:0b3ab51c8877 510 #define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /*!< Mute Mode Request */
bogdanm 84:0b3ab51c8877 511 #define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
bogdanm 84:0b3ab51c8877 512 #define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
bogdanm 84:0b3ab51c8877 513 #define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) || \
bogdanm 84:0b3ab51c8877 514 ((PARAM) == UART_SENDBREAK_REQUEST) || \
bogdanm 84:0b3ab51c8877 515 ((PARAM) == UART_MUTE_MODE_REQUEST) || \
bogdanm 84:0b3ab51c8877 516 ((PARAM) == UART_RXDATA_FLUSH_REQUEST) || \
bogdanm 84:0b3ab51c8877 517 ((PARAM) == UART_TXDATA_FLUSH_REQUEST))
bogdanm 84:0b3ab51c8877 518 /**
bogdanm 84:0b3ab51c8877 519 * @}
bogdanm 84:0b3ab51c8877 520 */
bogdanm 84:0b3ab51c8877 521
Kojto 96:487b796308b0 522 /** @defgroup UART_Advanced_Features_Initialization_Type UART advanced features initialization type definition
bogdanm 84:0b3ab51c8877 523 * @{
bogdanm 84:0b3ab51c8877 524 */
bogdanm 84:0b3ab51c8877 525 #define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 526 #define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001)
bogdanm 84:0b3ab51c8877 527 #define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002)
bogdanm 84:0b3ab51c8877 528 #define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004)
bogdanm 84:0b3ab51c8877 529 #define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008)
bogdanm 84:0b3ab51c8877 530 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010)
bogdanm 84:0b3ab51c8877 531 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020)
bogdanm 84:0b3ab51c8877 532 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040)
bogdanm 84:0b3ab51c8877 533 #define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080)
bogdanm 84:0b3ab51c8877 534 #define IS_UART_ADVFEATURE_INIT(INIT) ((INIT) <= (UART_ADVFEATURE_NO_INIT | \
bogdanm 84:0b3ab51c8877 535 UART_ADVFEATURE_TXINVERT_INIT | \
bogdanm 84:0b3ab51c8877 536 UART_ADVFEATURE_RXINVERT_INIT | \
bogdanm 84:0b3ab51c8877 537 UART_ADVFEATURE_DATAINVERT_INIT | \
bogdanm 84:0b3ab51c8877 538 UART_ADVFEATURE_SWAP_INIT | \
bogdanm 84:0b3ab51c8877 539 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
bogdanm 84:0b3ab51c8877 540 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
bogdanm 84:0b3ab51c8877 541 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
bogdanm 84:0b3ab51c8877 542 UART_ADVFEATURE_MSBFIRST_INIT))
bogdanm 84:0b3ab51c8877 543 /**
bogdanm 84:0b3ab51c8877 544 * @}
bogdanm 84:0b3ab51c8877 545 */
bogdanm 84:0b3ab51c8877 546
Kojto 96:487b796308b0 547 /** @defgroup UART_Tx_Inv UART advanced Tx inv activation definition
bogdanm 84:0b3ab51c8877 548 * @{
bogdanm 84:0b3ab51c8877 549 */
bogdanm 84:0b3ab51c8877 550 #define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 551 #define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV)
bogdanm 84:0b3ab51c8877 552 #define IS_UART_ADVFEATURE_TXINV(TXINV) (((TXINV) == UART_ADVFEATURE_TXINV_DISABLE) || \
bogdanm 84:0b3ab51c8877 553 ((TXINV) == UART_ADVFEATURE_TXINV_ENABLE))
bogdanm 84:0b3ab51c8877 554 /**
bogdanm 84:0b3ab51c8877 555 * @}
bogdanm 84:0b3ab51c8877 556 */
bogdanm 84:0b3ab51c8877 557
Kojto 96:487b796308b0 558 /** @defgroup UART_Rx_Inv UART advanced Rx inv activation definition
bogdanm 84:0b3ab51c8877 559 * @{
bogdanm 84:0b3ab51c8877 560 */
bogdanm 84:0b3ab51c8877 561 #define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 562 #define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV)
bogdanm 84:0b3ab51c8877 563 #define IS_UART_ADVFEATURE_RXINV(RXINV) (((RXINV) == UART_ADVFEATURE_RXINV_DISABLE) || \
bogdanm 84:0b3ab51c8877 564 ((RXINV) == UART_ADVFEATURE_RXINV_ENABLE))
bogdanm 84:0b3ab51c8877 565 /**
bogdanm 84:0b3ab51c8877 566 * @}
bogdanm 84:0b3ab51c8877 567 */
bogdanm 84:0b3ab51c8877 568
Kojto 96:487b796308b0 569 /** @defgroup UART_Data_Inv UART advanced data inv activation definition
bogdanm 84:0b3ab51c8877 570 * @{
bogdanm 84:0b3ab51c8877 571 */
bogdanm 84:0b3ab51c8877 572 #define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 573 #define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV)
bogdanm 84:0b3ab51c8877 574 #define IS_UART_ADVFEATURE_DATAINV(DATAINV) (((DATAINV) == UART_ADVFEATURE_DATAINV_DISABLE) || \
bogdanm 84:0b3ab51c8877 575 ((DATAINV) == UART_ADVFEATURE_DATAINV_ENABLE))
bogdanm 84:0b3ab51c8877 576 /**
bogdanm 84:0b3ab51c8877 577 * @}
bogdanm 84:0b3ab51c8877 578 */
bogdanm 84:0b3ab51c8877 579
Kojto 96:487b796308b0 580 /** @defgroup UART_Rx_Tx_Swap UART advanced swap activation definition
bogdanm 84:0b3ab51c8877 581 * @{
bogdanm 84:0b3ab51c8877 582 */
bogdanm 84:0b3ab51c8877 583 #define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 584 #define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP)
bogdanm 84:0b3ab51c8877 585 #define IS_UART_ADVFEATURE_SWAP(SWAP) (((SWAP) == UART_ADVFEATURE_SWAP_DISABLE) || \
bogdanm 84:0b3ab51c8877 586 ((SWAP) == UART_ADVFEATURE_SWAP_ENABLE))
bogdanm 84:0b3ab51c8877 587 /**
bogdanm 84:0b3ab51c8877 588 * @}
bogdanm 84:0b3ab51c8877 589 */
bogdanm 84:0b3ab51c8877 590
Kojto 96:487b796308b0 591 /** @defgroup UART_Overrun_Disable UART advanced overrun activation definition
bogdanm 84:0b3ab51c8877 592 * @{
bogdanm 84:0b3ab51c8877 593 */
bogdanm 84:0b3ab51c8877 594 #define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 595 #define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS)
bogdanm 84:0b3ab51c8877 596 #define IS_UART_OVERRUN(OVERRUN) (((OVERRUN) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
bogdanm 84:0b3ab51c8877 597 ((OVERRUN) == UART_ADVFEATURE_OVERRUN_DISABLE))
bogdanm 84:0b3ab51c8877 598 /**
bogdanm 84:0b3ab51c8877 599 * @}
bogdanm 84:0b3ab51c8877 600 */
bogdanm 84:0b3ab51c8877 601
Kojto 96:487b796308b0 602 /** @defgroup UART_AutoBaudRate_Enable UART advanced auto baud rate activation definition
bogdanm 84:0b3ab51c8877 603 * @{
bogdanm 84:0b3ab51c8877 604 */
bogdanm 84:0b3ab51c8877 605 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 606 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN)
bogdanm 84:0b3ab51c8877 607 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(AUTOBAUDRATE) (((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
bogdanm 84:0b3ab51c8877 608 ((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
bogdanm 84:0b3ab51c8877 609 /**
bogdanm 84:0b3ab51c8877 610 * @}
bogdanm 84:0b3ab51c8877 611 */
bogdanm 84:0b3ab51c8877 612
Kojto 96:487b796308b0 613 /** @defgroup UART_DMA_Disable_on_Rx_Error UART advanced DMA on Rx error activation definition
bogdanm 84:0b3ab51c8877 614 * @{
bogdanm 84:0b3ab51c8877 615 */
bogdanm 84:0b3ab51c8877 616 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 617 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE)
bogdanm 84:0b3ab51c8877 618 #define IS_UART_ADVFEATURE_DMAONRXERROR(DMA) (((DMA) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
bogdanm 84:0b3ab51c8877 619 ((DMA) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
bogdanm 84:0b3ab51c8877 620 /**
bogdanm 84:0b3ab51c8877 621 * @}
bogdanm 84:0b3ab51c8877 622 */
bogdanm 84:0b3ab51c8877 623
Kojto 96:487b796308b0 624 /** @defgroup UART_MSB_First UART advanced MSB first activation definition
bogdanm 84:0b3ab51c8877 625 * @{
bogdanm 84:0b3ab51c8877 626 */
bogdanm 84:0b3ab51c8877 627 #define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 628 #define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST)
bogdanm 84:0b3ab51c8877 629 #define IS_UART_ADVFEATURE_MSBFIRST(MSBFIRST) (((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
bogdanm 84:0b3ab51c8877 630 ((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_ENABLE))
bogdanm 84:0b3ab51c8877 631 /**
bogdanm 84:0b3ab51c8877 632 * @}
bogdanm 84:0b3ab51c8877 633 */
bogdanm 84:0b3ab51c8877 634
Kojto 96:487b796308b0 635 /** @defgroup UART_Stop_Mode_Enable UART advanced stop mode activation definition
bogdanm 84:0b3ab51c8877 636 * @{
bogdanm 84:0b3ab51c8877 637 */
bogdanm 84:0b3ab51c8877 638 #define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 639 #define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM)
bogdanm 84:0b3ab51c8877 640 #define IS_UART_ADVFEATURE_STOPMODE(STOPMODE) (((STOPMODE) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
bogdanm 84:0b3ab51c8877 641 ((STOPMODE) == UART_ADVFEATURE_STOPMODE_ENABLE))
bogdanm 84:0b3ab51c8877 642 /**
bogdanm 84:0b3ab51c8877 643 * @}
bogdanm 84:0b3ab51c8877 644 */
bogdanm 84:0b3ab51c8877 645
Kojto 96:487b796308b0 646 /** @defgroup UART_Mute_Mode UART advanced mute mode activation definition
bogdanm 84:0b3ab51c8877 647 * @{
bogdanm 84:0b3ab51c8877 648 */
bogdanm 84:0b3ab51c8877 649 #define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 650 #define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME)
bogdanm 84:0b3ab51c8877 651 #define IS_UART_MUTE_MODE(MUTE) (((MUTE) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
bogdanm 84:0b3ab51c8877 652 ((MUTE) == UART_ADVFEATURE_MUTEMODE_ENABLE))
bogdanm 84:0b3ab51c8877 653 /**
bogdanm 84:0b3ab51c8877 654 * @}
bogdanm 84:0b3ab51c8877 655 */
bogdanm 84:0b3ab51c8877 656
Kojto 96:487b796308b0 657 /** @defgroup UART_CR2_ADDRESS_LSBPOS UART CR2 address lsb position definition
bogdanm 84:0b3ab51c8877 658 * @{
bogdanm 84:0b3ab51c8877 659 */
bogdanm 84:0b3ab51c8877 660 #define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24)
bogdanm 84:0b3ab51c8877 661 /**
bogdanm 84:0b3ab51c8877 662 * @}
bogdanm 84:0b3ab51c8877 663 */
bogdanm 84:0b3ab51c8877 664
Kojto 96:487b796308b0 665 /** @defgroup UART_WakeUp_from_Stop_Selection UART wake up mode selection definition
bogdanm 84:0b3ab51c8877 666 * @{
bogdanm 84:0b3ab51c8877 667 */
bogdanm 84:0b3ab51c8877 668 #define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 669 #define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1)
bogdanm 84:0b3ab51c8877 670 #define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS)
bogdanm 84:0b3ab51c8877 671 #define IS_UART_WAKEUP_SELECTION(WAKE) (((WAKE) == UART_WAKEUP_ON_ADDRESS) || \
bogdanm 84:0b3ab51c8877 672 ((WAKE) == UART_WAKEUP_ON_STARTBIT) || \
bogdanm 84:0b3ab51c8877 673 ((WAKE) == UART_WAKEUP_ON_READDATA_NONEMPTY))
bogdanm 84:0b3ab51c8877 674 /**
bogdanm 84:0b3ab51c8877 675 * @}
bogdanm 84:0b3ab51c8877 676 */
bogdanm 84:0b3ab51c8877 677
Kojto 96:487b796308b0 678 /** @defgroup UART_DriverEnable_Polarity UART driver polarity level definition
bogdanm 84:0b3ab51c8877 679 * @{
bogdanm 84:0b3ab51c8877 680 */
bogdanm 84:0b3ab51c8877 681 #define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 682 #define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP)
bogdanm 84:0b3ab51c8877 683 #define IS_UART_DE_POLARITY(POLARITY) (((POLARITY) == UART_DE_POLARITY_HIGH) || \
bogdanm 84:0b3ab51c8877 684 ((POLARITY) == UART_DE_POLARITY_LOW))
bogdanm 84:0b3ab51c8877 685 /**
bogdanm 84:0b3ab51c8877 686 * @}
bogdanm 84:0b3ab51c8877 687 */
bogdanm 84:0b3ab51c8877 688
Kojto 96:487b796308b0 689 /** @defgroup UART_CR1_DEAT_ADDRESS_LSBPOS UART CR1 DEAT address lsb position definition
bogdanm 84:0b3ab51c8877 690 * @{
bogdanm 84:0b3ab51c8877 691 */
bogdanm 84:0b3ab51c8877 692 #define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21)
bogdanm 84:0b3ab51c8877 693 /**
bogdanm 84:0b3ab51c8877 694 * @}
bogdanm 84:0b3ab51c8877 695 */
bogdanm 84:0b3ab51c8877 696
Kojto 96:487b796308b0 697 /** @defgroup UART_CR1_DEDT_ADDRESS_LSBPOS UART CR1 DEDT address lsb position definition
bogdanm 84:0b3ab51c8877 698 * @{
bogdanm 84:0b3ab51c8877 699 */
bogdanm 84:0b3ab51c8877 700 #define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16)
bogdanm 84:0b3ab51c8877 701 /**
bogdanm 84:0b3ab51c8877 702 * @}
bogdanm 84:0b3ab51c8877 703 */
bogdanm 84:0b3ab51c8877 704
Kojto 96:487b796308b0 705 /** @defgroup UART_Interruption_Mask UART interruption mask definition
bogdanm 84:0b3ab51c8877 706 * @{
bogdanm 84:0b3ab51c8877 707 */
bogdanm 84:0b3ab51c8877 708 #define UART_IT_MASK ((uint32_t)0x001F)
bogdanm 84:0b3ab51c8877 709 /**
bogdanm 84:0b3ab51c8877 710 * @}
bogdanm 84:0b3ab51c8877 711 */
bogdanm 84:0b3ab51c8877 712
bogdanm 84:0b3ab51c8877 713 /**
bogdanm 84:0b3ab51c8877 714 * @}
bogdanm 84:0b3ab51c8877 715 */
bogdanm 84:0b3ab51c8877 716
bogdanm 84:0b3ab51c8877 717 /* Exported macro ------------------------------------------------------------*/
Kojto 96:487b796308b0 718 /** @defgroup UART_Exported_Macros UART Exported Macros
bogdanm 84:0b3ab51c8877 719 * @{
bogdanm 84:0b3ab51c8877 720 */
bogdanm 84:0b3ab51c8877 721
bogdanm 84:0b3ab51c8877 722 /** @brief Reset UART handle state
bogdanm 84:0b3ab51c8877 723 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 724 * The Handle Instance which can be USART1, USART2 or LPUART.
bogdanm 84:0b3ab51c8877 725 * @retval None
bogdanm 84:0b3ab51c8877 726 */
bogdanm 84:0b3ab51c8877 727 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET)
bogdanm 84:0b3ab51c8877 728
Kojto 96:487b796308b0 729 /** @brief Flush the UART Data registers
Kojto 96:487b796308b0 730 * @param __HANDLE__: specifies the UART Handle.
Kojto 96:487b796308b0 731 */
Kojto 96:487b796308b0 732 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
Kojto 96:487b796308b0 733 do{ \
Kojto 96:487b796308b0 734 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
Kojto 96:487b796308b0 735 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
Kojto 96:487b796308b0 736 } while(0)
Kojto 96:487b796308b0 737
Kojto 96:487b796308b0 738
Kojto 96:487b796308b0 739 /** @brief Clears the specified UART pending flag.
Kojto 96:487b796308b0 740 * @param __HANDLE__: specifies the UART Handle.
Kojto 96:487b796308b0 741 * @param __FLAG__: specifies the flag to check.
Kojto 96:487b796308b0 742 * This parameter can be any combination of the following values:
Kojto 96:487b796308b0 743 * @arg UART_CLEAR_PEF
Kojto 96:487b796308b0 744 * @arg UART_CLEAR_FEF
Kojto 96:487b796308b0 745 * @arg UART_CLEAR_NEF
Kojto 96:487b796308b0 746 * @arg UART_CLEAR_OREF
Kojto 96:487b796308b0 747 * @arg UART_CLEAR_IDLEF
Kojto 96:487b796308b0 748 * @arg UART_CLEAR_TCF
Kojto 96:487b796308b0 749 * @arg UART_CLEAR_LBDF
Kojto 96:487b796308b0 750 * @arg UART_CLEAR_CTSF
Kojto 96:487b796308b0 751 * @arg UART_CLEAR_RTOF
Kojto 96:487b796308b0 752 * @arg UART_CLEAR_EOBF
Kojto 96:487b796308b0 753 * @arg UART_CLEAR_CMF
Kojto 96:487b796308b0 754 * @arg UART_CLEAR_WUF
Kojto 96:487b796308b0 755 * @retval None
Kojto 96:487b796308b0 756 */
Kojto 96:487b796308b0 757 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = ~(__FLAG__))
Kojto 96:487b796308b0 758
Kojto 96:487b796308b0 759 /** @brief Clear the UART PE pending flag.
Kojto 96:487b796308b0 760 * @param __HANDLE__: specifies the UART Handle.
Kojto 96:487b796308b0 761 * @retval None
Kojto 96:487b796308b0 762 */
Kojto 96:487b796308b0 763 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_PEF)
Kojto 96:487b796308b0 764
Kojto 96:487b796308b0 765 /** @brief Clear the UART FE pending flag.
Kojto 96:487b796308b0 766 * @param __HANDLE__: specifies the UART Handle.
Kojto 96:487b796308b0 767 * @retval None
Kojto 96:487b796308b0 768 */
Kojto 96:487b796308b0 769 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_FEF)
Kojto 96:487b796308b0 770
Kojto 96:487b796308b0 771 /** @brief Clear the UART NE pending flag.
Kojto 96:487b796308b0 772 * @param __HANDLE__: specifies the UART Handle.
Kojto 96:487b796308b0 773 * @retval None
Kojto 96:487b796308b0 774 */
Kojto 96:487b796308b0 775 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_NEF)
Kojto 96:487b796308b0 776
Kojto 96:487b796308b0 777 /** @brief Clear the UART ORE pending flag.
Kojto 96:487b796308b0 778 * @param __HANDLE__: specifies the UART Handle.
Kojto 96:487b796308b0 779 * @retval None
Kojto 96:487b796308b0 780 */
Kojto 96:487b796308b0 781 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_OREF)
Kojto 96:487b796308b0 782
Kojto 96:487b796308b0 783 /** @brief Clear the UART IDLE pending flag.
Kojto 96:487b796308b0 784 * @param __HANDLE__: specifies the UART Handle.
Kojto 96:487b796308b0 785 * @retval None
Kojto 96:487b796308b0 786 */
Kojto 96:487b796308b0 787 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG(__HANDLE__,UART_CLEAR_IDLEF)
Kojto 96:487b796308b0 788
bogdanm 84:0b3ab51c8877 789 /** @brief Checks whether the specified UART flag is set or not.
bogdanm 84:0b3ab51c8877 790 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 791 * This parameter can be USART1, USART2 or LPUART.
bogdanm 84:0b3ab51c8877 792 * @param __FLAG__: specifies the flag to check.
bogdanm 84:0b3ab51c8877 793 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 794 * @arg UART_FLAG_REACK: Receive enable ackowledge flag
bogdanm 84:0b3ab51c8877 795 * @arg UART_FLAG_TEACK: Transmit enable ackowledge flag
bogdanm 84:0b3ab51c8877 796 * @arg UART_FLAG_WUF: Wake up from stop mode flag
bogdanm 84:0b3ab51c8877 797 * @arg UART_FLAG_RWU: Receiver wake up flag (is the UART in mute mode)
bogdanm 84:0b3ab51c8877 798 * @arg UART_FLAG_SBKF: Send Break flag
bogdanm 84:0b3ab51c8877 799 * @arg UART_FLAG_CMF: Character match flag
bogdanm 84:0b3ab51c8877 800 * @arg UART_FLAG_BUSY: Busy flag
bogdanm 84:0b3ab51c8877 801 * @arg UART_FLAG_ABRF: Auto Baud rate detection flag
bogdanm 84:0b3ab51c8877 802 * @arg UART_FLAG_ABRE: Auto Baud rate detection error flag
bogdanm 84:0b3ab51c8877 803 * @arg UART_FLAG_EOBF: End of block flag
bogdanm 84:0b3ab51c8877 804 * @arg UART_FLAG_RTOF: Receiver timeout flag
bogdanm 84:0b3ab51c8877 805 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
bogdanm 84:0b3ab51c8877 806 * @arg UART_FLAG_LBD: LIN Break detection flag
bogdanm 84:0b3ab51c8877 807 * @arg UART_FLAG_TXE: Transmit data register empty flag
bogdanm 84:0b3ab51c8877 808 * @arg UART_FLAG_TC: Transmission Complete flag
bogdanm 84:0b3ab51c8877 809 * @arg UART_FLAG_RXNE: Receive data register not empty flag
bogdanm 84:0b3ab51c8877 810 * @arg UART_FLAG_IDLE: Idle Line detection flag
bogdanm 84:0b3ab51c8877 811 * @arg UART_FLAG_ORE: OverRun Error flag
bogdanm 84:0b3ab51c8877 812 * @arg UART_FLAG_NE: Noise Error flag
bogdanm 84:0b3ab51c8877 813 * @arg UART_FLAG_FE: Framing Error flag
bogdanm 84:0b3ab51c8877 814 * @arg UART_FLAG_PE: Parity Error flag
bogdanm 84:0b3ab51c8877 815 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 816 */
bogdanm 84:0b3ab51c8877 817 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
bogdanm 84:0b3ab51c8877 818
bogdanm 84:0b3ab51c8877 819 /** @brief Enables the specified UART interrupt.
bogdanm 84:0b3ab51c8877 820 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 821 * This parameter can be USART1, USART2 or LPUART.
bogdanm 84:0b3ab51c8877 822 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
bogdanm 84:0b3ab51c8877 823 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 824 * @arg UART_IT_WUF: Wakeup from stop mode interrupt
bogdanm 84:0b3ab51c8877 825 * @arg UART_IT_CM: Character match interrupt
bogdanm 84:0b3ab51c8877 826 * @arg UART_IT_CTS: CTS change interrupt
bogdanm 84:0b3ab51c8877 827 * @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm 84:0b3ab51c8877 828 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 829 * @arg UART_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 830 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 831 * @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 832 * @arg UART_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 833 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm 84:0b3ab51c8877 834 * @retval None
bogdanm 84:0b3ab51c8877 835 */
bogdanm 84:0b3ab51c8877 836 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 |= (1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm 84:0b3ab51c8877 837 ((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 |= (1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm 84:0b3ab51c8877 838 ((__HANDLE__)->Instance->CR3 |= (1 << ((__INTERRUPT__) & UART_IT_MASK))))
bogdanm 84:0b3ab51c8877 839
bogdanm 84:0b3ab51c8877 840 /** @brief Disables the specified UART interrupt.
bogdanm 84:0b3ab51c8877 841 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 842 * This parameter can be USART1, USART2 or LPUART.
bogdanm 84:0b3ab51c8877 843 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
bogdanm 84:0b3ab51c8877 844 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 845 * @arg UART_IT_WUF: Wakeup from stop mode interrupt
bogdanm 84:0b3ab51c8877 846 * @arg UART_IT_CM: Character match interrupt
bogdanm 84:0b3ab51c8877 847 * @arg UART_IT_CTS: CTS change interrupt
bogdanm 84:0b3ab51c8877 848 * @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm 84:0b3ab51c8877 849 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 850 * @arg UART_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 851 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 852 * @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 853 * @arg UART_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 854 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm 84:0b3ab51c8877 855 * @retval None
bogdanm 84:0b3ab51c8877 856 */
bogdanm 84:0b3ab51c8877 857 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm 84:0b3ab51c8877 858 ((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))): \
bogdanm 84:0b3ab51c8877 859 ((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))))
bogdanm 84:0b3ab51c8877 860
bogdanm 84:0b3ab51c8877 861 /** @brief Checks whether the specified UART interrupt has occurred or not.
bogdanm 84:0b3ab51c8877 862 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 863 * This parameter can be USART1, USART2 or LPUART.
bogdanm 84:0b3ab51c8877 864 * @param __IT__: specifies the UART interrupt to check.
bogdanm 84:0b3ab51c8877 865 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 866 * @arg UART_IT_WUF: Wakeup from stop mode interrupt
bogdanm 84:0b3ab51c8877 867 * @arg UART_IT_CM: Character match interrupt
bogdanm 84:0b3ab51c8877 868 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
bogdanm 84:0b3ab51c8877 869 * @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm 84:0b3ab51c8877 870 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 871 * @arg UART_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 872 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 873 * @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 874 * @arg UART_IT_ORE: OverRun Error interrupt
bogdanm 84:0b3ab51c8877 875 * @arg UART_IT_NE: Noise Error interrupt
bogdanm 84:0b3ab51c8877 876 * @arg UART_IT_FE: Framing Error interrupt
bogdanm 84:0b3ab51c8877 877 * @arg UART_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 878 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 879 */
bogdanm 84:0b3ab51c8877 880 #define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
bogdanm 84:0b3ab51c8877 881
bogdanm 84:0b3ab51c8877 882 /** @brief Checks whether the specified UART interrupt source is enabled.
bogdanm 84:0b3ab51c8877 883 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 884 * This parameter can be USART1, USART2 or LPUART.
bogdanm 84:0b3ab51c8877 885 * @param __IT__: specifies the UART interrupt source to check.
bogdanm 84:0b3ab51c8877 886 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 887 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
bogdanm 84:0b3ab51c8877 888 * @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm 84:0b3ab51c8877 889 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 890 * @arg UART_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 891 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 892 * @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 893 * @arg UART_IT_ORE: OverRun Error interrupt
bogdanm 84:0b3ab51c8877 894 * @arg UART_IT_NE: Noise Error interrupt
bogdanm 84:0b3ab51c8877 895 * @arg UART_IT_FE: Framing Error interrupt
bogdanm 84:0b3ab51c8877 896 * @arg UART_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 897 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 898 */
bogdanm 84:0b3ab51c8877 899 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \
bogdanm 84:0b3ab51c8877 900 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & UART_IT_MASK)))
bogdanm 84:0b3ab51c8877 901
bogdanm 84:0b3ab51c8877 902 /** @brief Clears the specified UART ISR flag, in setting the proper ICR register flag.
bogdanm 84:0b3ab51c8877 903 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 904 * This parameter can be USART1, USART2 or LPUART.
bogdanm 84:0b3ab51c8877 905 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
bogdanm 84:0b3ab51c8877 906 * to clear the corresponding interrupt
bogdanm 84:0b3ab51c8877 907 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 908 * @arg UART_CLEAR_PEF: Parity Error Clear Flag
bogdanm 84:0b3ab51c8877 909 * @arg UART_CLEAR_FEF: Framing Error Clear Flag
bogdanm 84:0b3ab51c8877 910 * @arg UART_CLEAR_NEF: Noise detected Clear Flag
bogdanm 84:0b3ab51c8877 911 * @arg UART_CLEAR_OREF: OverRun Error Clear Flag
bogdanm 84:0b3ab51c8877 912 * @arg UART_CLEAR_IDLEF: IDLE line detected Clear Flag
bogdanm 84:0b3ab51c8877 913 * @arg UART_CLEAR_TCF: Transmission Complete Clear Flag
bogdanm 84:0b3ab51c8877 914 * @arg UART_CLEAR_LBDF: LIN Break Detection Clear Flag
bogdanm 84:0b3ab51c8877 915 * @arg UART_CLEAR_CTSF: CTS Interrupt Clear Flag
bogdanm 84:0b3ab51c8877 916 * @arg UART_CLEAR_RTOF: Receiver Time Out Clear Flag
bogdanm 84:0b3ab51c8877 917 * @arg UART_CLEAR_EOBF: End Of Block Clear Flag
bogdanm 84:0b3ab51c8877 918 * @arg UART_CLEAR_CMF: Character Match Clear Flag
bogdanm 84:0b3ab51c8877 919 * @arg UART_CLEAR_WUF: Wake Up from stop mode Clear Flag
bogdanm 84:0b3ab51c8877 920 * @retval None
bogdanm 84:0b3ab51c8877 921 */
bogdanm 92:4fc01daae5a5 922 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
bogdanm 84:0b3ab51c8877 923
bogdanm 84:0b3ab51c8877 924 /** @brief Set a specific UART request flag.
bogdanm 84:0b3ab51c8877 925 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 926 * This parameter can be USART1, USART2 or LPUART.
bogdanm 84:0b3ab51c8877 927 * @param __REQ__: specifies the request flag to set
bogdanm 84:0b3ab51c8877 928 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 929 * @arg UART_AUTOBAUD_REQUEST: Auto-Baud Rate Request
bogdanm 84:0b3ab51c8877 930 * @arg UART_SENDBREAK_REQUEST: Send Break Request
bogdanm 84:0b3ab51c8877 931 * @arg UART_MUTE_MODE_REQUEST: Mute Mode Request
bogdanm 84:0b3ab51c8877 932 * @arg UART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
bogdanm 84:0b3ab51c8877 933 * @arg UART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
bogdanm 84:0b3ab51c8877 934 * @retval None
bogdanm 84:0b3ab51c8877 935 */
Kojto 96:487b796308b0 936 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__))
Kojto 96:487b796308b0 937
Kojto 96:487b796308b0 938 /** @brief Enables the UART one bit sample method
Kojto 96:487b796308b0 939 * @param __HANDLE__: specifies the UART Handle.
Kojto 96:487b796308b0 940 * @retval None
Kojto 96:487b796308b0 941 */
Kojto 96:487b796308b0 942 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
Kojto 96:487b796308b0 943
Kojto 96:487b796308b0 944 /** @brief Disables the UART one bit sample method
Kojto 96:487b796308b0 945 * @param __HANDLE__: specifies the UART Handle.
Kojto 96:487b796308b0 946 * @retval None
Kojto 96:487b796308b0 947 */
Kojto 96:487b796308b0 948 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
bogdanm 84:0b3ab51c8877 949
bogdanm 84:0b3ab51c8877 950 /** @brief Enable UART
bogdanm 84:0b3ab51c8877 951 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 952 * The Handle Instance can be USART1, USART2 or LPUART.
bogdanm 84:0b3ab51c8877 953 * @retval None
bogdanm 84:0b3ab51c8877 954 */
bogdanm 84:0b3ab51c8877 955 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
bogdanm 84:0b3ab51c8877 956
bogdanm 84:0b3ab51c8877 957 /** @brief Disable UART
bogdanm 84:0b3ab51c8877 958 * @param __HANDLE__: specifies the UART Handle.
bogdanm 84:0b3ab51c8877 959 * The Handle Instance can be USART1, USART2 or LPUART.
bogdanm 84:0b3ab51c8877 960 * @retval None
bogdanm 84:0b3ab51c8877 961 */
bogdanm 84:0b3ab51c8877 962 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
bogdanm 84:0b3ab51c8877 963
bogdanm 92:4fc01daae5a5 964 /** @brief Enable CTS flow control
bogdanm 92:4fc01daae5a5 965 * This macro allows to enable CTS hardware flow control for a given UART instance,
bogdanm 92:4fc01daae5a5 966 * without need to call HAL_UART_Init() function.
bogdanm 92:4fc01daae5a5 967 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm 92:4fc01daae5a5 968 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
bogdanm 92:4fc01daae5a5 969 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm 92:4fc01daae5a5 970 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm 92:4fc01daae5a5 971 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm 92:4fc01daae5a5 972 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm 92:4fc01daae5a5 973 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 974 * The Handle Instance can be USART1, USART2 or LPUART.
bogdanm 92:4fc01daae5a5 975 * @retval None
bogdanm 92:4fc01daae5a5 976 */
bogdanm 92:4fc01daae5a5 977 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
bogdanm 92:4fc01daae5a5 978 do{ \
bogdanm 92:4fc01daae5a5 979 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
bogdanm 92:4fc01daae5a5 980 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
bogdanm 92:4fc01daae5a5 981 } while(0)
bogdanm 92:4fc01daae5a5 982
bogdanm 92:4fc01daae5a5 983 /** @brief Disable CTS flow control
bogdanm 92:4fc01daae5a5 984 * This macro allows to disable CTS hardware flow control for a given UART instance,
bogdanm 92:4fc01daae5a5 985 * without need to call HAL_UART_Init() function.
bogdanm 92:4fc01daae5a5 986 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm 92:4fc01daae5a5 987 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
bogdanm 92:4fc01daae5a5 988 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm 92:4fc01daae5a5 989 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm 92:4fc01daae5a5 990 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm 92:4fc01daae5a5 991 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm 92:4fc01daae5a5 992 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 993 * The Handle Instance can be USART1, USART2 or LPUART.
bogdanm 92:4fc01daae5a5 994 * @retval None
bogdanm 92:4fc01daae5a5 995 */
bogdanm 92:4fc01daae5a5 996 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
bogdanm 92:4fc01daae5a5 997 do{ \
bogdanm 92:4fc01daae5a5 998 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
bogdanm 92:4fc01daae5a5 999 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
bogdanm 92:4fc01daae5a5 1000 } while(0)
bogdanm 92:4fc01daae5a5 1001
bogdanm 92:4fc01daae5a5 1002 /** @brief Enable RTS flow control
bogdanm 92:4fc01daae5a5 1003 * This macro allows to enable RTS hardware flow control for a given UART instance,
bogdanm 92:4fc01daae5a5 1004 * without need to call HAL_UART_Init() function.
bogdanm 92:4fc01daae5a5 1005 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm 92:4fc01daae5a5 1006 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
bogdanm 92:4fc01daae5a5 1007 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm 92:4fc01daae5a5 1008 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm 92:4fc01daae5a5 1009 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm 92:4fc01daae5a5 1010 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm 92:4fc01daae5a5 1011 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 1012 * The Handle Instance can be USART1, USART2 or LPUART.
bogdanm 92:4fc01daae5a5 1013 * @retval None
bogdanm 92:4fc01daae5a5 1014 */
bogdanm 92:4fc01daae5a5 1015 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
bogdanm 92:4fc01daae5a5 1016 do{ \
bogdanm 92:4fc01daae5a5 1017 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
bogdanm 92:4fc01daae5a5 1018 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
bogdanm 92:4fc01daae5a5 1019 } while(0)
bogdanm 92:4fc01daae5a5 1020
bogdanm 92:4fc01daae5a5 1021 /** @brief Disable RTS flow control
bogdanm 92:4fc01daae5a5 1022 * This macro allows to disable RTS hardware flow control for a given UART instance,
bogdanm 92:4fc01daae5a5 1023 * without need to call HAL_UART_Init() function.
bogdanm 92:4fc01daae5a5 1024 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm 92:4fc01daae5a5 1025 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
bogdanm 92:4fc01daae5a5 1026 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm 92:4fc01daae5a5 1027 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm 92:4fc01daae5a5 1028 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm 92:4fc01daae5a5 1029 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm 92:4fc01daae5a5 1030 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 1031 * The Handle Instance can be USART1, USART2 or LPUART.
bogdanm 92:4fc01daae5a5 1032 * @retval None
bogdanm 92:4fc01daae5a5 1033 */
bogdanm 92:4fc01daae5a5 1034 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
bogdanm 92:4fc01daae5a5 1035 do{ \
bogdanm 92:4fc01daae5a5 1036 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
bogdanm 92:4fc01daae5a5 1037 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
bogdanm 92:4fc01daae5a5 1038 } while(0)
bogdanm 92:4fc01daae5a5 1039
Kojto 96:487b796308b0 1040 /** @brief macros to enables or disables the UART's one bit sampling method
Kojto 96:487b796308b0 1041 * @param __HANDLE__: specifies the UART Handle.
Kojto 96:487b796308b0 1042 * @retval None
Kojto 96:487b796308b0 1043 */
Kojto 96:487b796308b0 1044 #define __HAL_UART_ONE_BIT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
Kojto 96:487b796308b0 1045 #define __HAL_UART_ONE_BIT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
Kojto 96:487b796308b0 1046
bogdanm 92:4fc01daae5a5 1047
bogdanm 84:0b3ab51c8877 1048 /** @brief BRR division operation to set BRR register with LPUART
bogdanm 84:0b3ab51c8877 1049 * @param _PCLK_: LPUART clock
bogdanm 84:0b3ab51c8877 1050 * @param _BAUD_: Baud rate set by the user
bogdanm 84:0b3ab51c8877 1051 * @retval Division result
bogdanm 84:0b3ab51c8877 1052 */
bogdanm 84:0b3ab51c8877 1053 #define __DIV_LPUART(_PCLK_, _BAUD_) (((_PCLK_)*256)/((_BAUD_)))
bogdanm 84:0b3ab51c8877 1054
bogdanm 84:0b3ab51c8877 1055 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode
bogdanm 84:0b3ab51c8877 1056 * @param _PCLK_: UART clock
bogdanm 84:0b3ab51c8877 1057 * @param _BAUD_: Baud rate set by the user
bogdanm 84:0b3ab51c8877 1058 * @retval Division result
bogdanm 84:0b3ab51c8877 1059 */
Kojto 96:487b796308b0 1060 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*2)/((_BAUD_)))
bogdanm 84:0b3ab51c8877 1061
bogdanm 84:0b3ab51c8877 1062 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode
bogdanm 84:0b3ab51c8877 1063 * @param _PCLK_: UART clock
bogdanm 84:0b3ab51c8877 1064 * @param _BAUD_: Baud rate set by the user
bogdanm 84:0b3ab51c8877 1065 * @retval Division result
bogdanm 84:0b3ab51c8877 1066 */
Kojto 96:487b796308b0 1067 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_))/((_BAUD_)))
bogdanm 84:0b3ab51c8877 1068
bogdanm 84:0b3ab51c8877 1069 /** @brief Check UART Baud rate
bogdanm 84:0b3ab51c8877 1070 * @param BAUDRATE: Baudrate specified by the user
bogdanm 84:0b3ab51c8877 1071 * The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz)
bogdanm 84:0b3ab51c8877 1072 * divided by the smallest oversampling used on the USART (i.e. 8)
bogdanm 84:0b3ab51c8877 1073 * @retval Test result (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 1074 */
bogdanm 84:0b3ab51c8877 1075 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 4000001)
bogdanm 84:0b3ab51c8877 1076
bogdanm 84:0b3ab51c8877 1077 /** @brief Check UART byte address
bogdanm 84:0b3ab51c8877 1078 * @param ADDRESS: UART 8-bit address for wake-up process scheme
bogdanm 84:0b3ab51c8877 1079 * @retval Test result (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 1080 */
bogdanm 84:0b3ab51c8877 1081 #define IS_UART_7B_ADDRESS(ADDRESS) ((ADDRESS) <= 0x7F)
bogdanm 84:0b3ab51c8877 1082
bogdanm 84:0b3ab51c8877 1083 /** @brief Check UART 4-bit address
bogdanm 84:0b3ab51c8877 1084 * @param ADDRESS: UART 4-bit address for wake-up process scheme
bogdanm 84:0b3ab51c8877 1085 * @retval Test result (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 1086 */
bogdanm 84:0b3ab51c8877 1087 #define IS_UART_4B_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
bogdanm 84:0b3ab51c8877 1088
bogdanm 84:0b3ab51c8877 1089 /** @brief Check UART assertion time
bogdanm 84:0b3ab51c8877 1090 * @param TIME: 5-bit value assertion time
bogdanm 84:0b3ab51c8877 1091 * @retval Test result (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 1092 */
bogdanm 84:0b3ab51c8877 1093 #define IS_UART_ASSERTIONTIME(TIME) ((TIME) <= 0x1F)
bogdanm 84:0b3ab51c8877 1094
bogdanm 84:0b3ab51c8877 1095 /** @brief Check UART deassertion time
bogdanm 84:0b3ab51c8877 1096 * @param TIME: 5-bit value deassertion time
bogdanm 84:0b3ab51c8877 1097 * @retval Test result (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 1098 */
bogdanm 84:0b3ab51c8877 1099 #define IS_UART_DEASSERTIONTIME(TIME) ((TIME) <= 0x1F)
bogdanm 84:0b3ab51c8877 1100
bogdanm 84:0b3ab51c8877 1101 /**
bogdanm 84:0b3ab51c8877 1102 * @}
bogdanm 84:0b3ab51c8877 1103 */
bogdanm 84:0b3ab51c8877 1104 /* Include UART HAL Extension module */
bogdanm 84:0b3ab51c8877 1105 #include "stm32l0xx_hal_uart_ex.h"
Kojto 96:487b796308b0 1106
Kojto 96:487b796308b0 1107 /******************************************************************************/
bogdanm 84:0b3ab51c8877 1108 /* Exported functions --------------------------------------------------------*/
Kojto 96:487b796308b0 1109 /******************************************************************************/
Kojto 96:487b796308b0 1110
Kojto 96:487b796308b0 1111 /* Exported functions --------------------------------------------------------*/
Kojto 96:487b796308b0 1112 /** @defgroup UART_Exported_Functions UART Exported Functions
Kojto 96:487b796308b0 1113 * @{
Kojto 96:487b796308b0 1114 */
bogdanm 84:0b3ab51c8877 1115 /* Initialization/de-initialization functions ********************************/
Kojto 96:487b796308b0 1116 /** @defgroup UART_Exported_Functions_Group1 Initialization/de-initialization methods
Kojto 96:487b796308b0 1117 * @{
Kojto 96:487b796308b0 1118 */
bogdanm 84:0b3ab51c8877 1119 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1120 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1121 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
bogdanm 84:0b3ab51c8877 1122 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
bogdanm 84:0b3ab51c8877 1123 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1124 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1125 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
Kojto 96:487b796308b0 1126 /**
Kojto 96:487b796308b0 1127 * @}
Kojto 96:487b796308b0 1128 */
bogdanm 84:0b3ab51c8877 1129
bogdanm 84:0b3ab51c8877 1130 /* IO operation functions *****************************************************/
Kojto 96:487b796308b0 1131 /** @defgroup UART_Exported_Functions_Group2 IO operation functions
Kojto 96:487b796308b0 1132 * @{
Kojto 96:487b796308b0 1133 */
bogdanm 84:0b3ab51c8877 1134 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 84:0b3ab51c8877 1135 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 84:0b3ab51c8877 1136 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 84:0b3ab51c8877 1137 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 84:0b3ab51c8877 1138 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 84:0b3ab51c8877 1139 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 84:0b3ab51c8877 1140 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1141 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1142 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1143 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1144 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1145 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1146 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1147 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1148 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
Kojto 96:487b796308b0 1149 /**
Kojto 96:487b796308b0 1150 * @}
Kojto 96:487b796308b0 1151 */
bogdanm 84:0b3ab51c8877 1152 /* Peripheral Control and State functions ************************************/
Kojto 96:487b796308b0 1153 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control funtions
Kojto 96:487b796308b0 1154 * @{
Kojto 96:487b796308b0 1155 */
bogdanm 84:0b3ab51c8877 1156 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1157 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1158 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1159 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1160 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1161 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1162 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1163 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
Kojto 96:487b796308b0 1164 /**
Kojto 96:487b796308b0 1165 * @}
Kojto 96:487b796308b0 1166 */
bogdanm 84:0b3ab51c8877 1167 void UART_SetConfig(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1168 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
bogdanm 84:0b3ab51c8877 1169 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm 84:0b3ab51c8877 1170 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
Kojto 96:487b796308b0 1171
Kojto 96:487b796308b0 1172 /**
Kojto 96:487b796308b0 1173 * @}
Kojto 96:487b796308b0 1174 */
Kojto 96:487b796308b0 1175
bogdanm 84:0b3ab51c8877 1176 /**
bogdanm 84:0b3ab51c8877 1177 * @}
bogdanm 84:0b3ab51c8877 1178 */
bogdanm 84:0b3ab51c8877 1179 /**
bogdanm 84:0b3ab51c8877 1180 * @}
bogdanm 84:0b3ab51c8877 1181 */
bogdanm 84:0b3ab51c8877 1182
bogdanm 84:0b3ab51c8877 1183 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 1184 }
bogdanm 84:0b3ab51c8877 1185 #endif
bogdanm 84:0b3ab51c8877 1186
bogdanm 84:0b3ab51c8877 1187 #endif /* __STM32L0xx_HAL_UART_H */
bogdanm 84:0b3ab51c8877 1188
bogdanm 84:0b3ab51c8877 1189 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/