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TARGET_NUCLEO_L053R8/stm32l0xx_hal_tim_ex.h@97:4298809c7c9e, 2015-04-08 (annotated)

Committer:
filartrix
Date:
Wed Apr 08 14:12:53 2015 +0000
Revision:
97:4298809c7c9e
Parent:
96:487b796308b0 
First reale BlueNRG module for nucleo 401 board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /**
bogdanm 84:0b3ab51c8877 2 ******************************************************************************
bogdanm 84:0b3ab51c8877 3 * @file stm32l0xx_hal_tim_ex.h
bogdanm 84:0b3ab51c8877 4 * @author MCD Application Team
Kojto 96:487b796308b0 5 * @version V1.2.0
Kojto 96:487b796308b0 6 * @date 06-February-2015
bogdanm 84:0b3ab51c8877 7 * @brief Header file of TIM HAL module.
bogdanm 84:0b3ab51c8877 8 ******************************************************************************
bogdanm 84:0b3ab51c8877 9 * @attention
bogdanm 84:0b3ab51c8877 10 *
Kojto 96:487b796308b0 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 84:0b3ab51c8877 12 *
bogdanm 84:0b3ab51c8877 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 84:0b3ab51c8877 14 * are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 84:0b3ab51c8877 16 * this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 84:0b3ab51c8877 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 84:0b3ab51c8877 19 * and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 84:0b3ab51c8877 21 * may be used to endorse or promote products derived from this software
bogdanm 84:0b3ab51c8877 22 * without specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 84:0b3ab51c8877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 84:0b3ab51c8877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 84:0b3ab51c8877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 84:0b3ab51c8877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 84:0b3ab51c8877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 84:0b3ab51c8877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 84:0b3ab51c8877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 34 *
bogdanm 84:0b3ab51c8877 35 ******************************************************************************
bogdanm 84:0b3ab51c8877 36 */
bogdanm 84:0b3ab51c8877 37
bogdanm 84:0b3ab51c8877 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 84:0b3ab51c8877 39 #ifndef __STM32L0xx_HAL_TIM_EX_H
bogdanm 84:0b3ab51c8877 40 #define __STM32L0xx_HAL_TIM_EX_H
bogdanm 84:0b3ab51c8877 41
bogdanm 84:0b3ab51c8877 42 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 43 extern "C" {
bogdanm 84:0b3ab51c8877 44 #endif
bogdanm 84:0b3ab51c8877 45
bogdanm 84:0b3ab51c8877 46 /* Includes ------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 47 #include "stm32l0xx_hal_def.h"
bogdanm 84:0b3ab51c8877 48
Kojto 96:487b796308b0 49 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 84:0b3ab51c8877 50 * @{
bogdanm 84:0b3ab51c8877 51 */
bogdanm 84:0b3ab51c8877 52
Kojto 96:487b796308b0 53 /** @defgroup TIMEx TIMEx (Timer extended)
bogdanm 84:0b3ab51c8877 54 * @{
bogdanm 84:0b3ab51c8877 55 */
bogdanm 84:0b3ab51c8877 56
bogdanm 84:0b3ab51c8877 57 /* Exported types ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 58
bogdanm 84:0b3ab51c8877 59 /**
bogdanm 84:0b3ab51c8877 60 * @brief TIM Master configuration Structure definition
bogdanm 84:0b3ab51c8877 61 */
bogdanm 84:0b3ab51c8877 62 typedef struct {
bogdanm 84:0b3ab51c8877 63 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
Kojto 96:487b796308b0 64 This parameter can be a value of @ref TIM_Master_Mode_Selection */
bogdanm 84:0b3ab51c8877 65 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
bogdanm 92:4fc01daae5a5 66 This parameter can be a value of @ref TIM_Master_Slave_Mode */
bogdanm 84:0b3ab51c8877 67 }TIM_MasterConfigTypeDef;
bogdanm 84:0b3ab51c8877 68
bogdanm 84:0b3ab51c8877 69
Kojto 96:487b796308b0 70
bogdanm 84:0b3ab51c8877 71 /* Exported constants --------------------------------------------------------*/
Kojto 96:487b796308b0 72 /** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants
bogdanm 84:0b3ab51c8877 73 * @{
bogdanm 84:0b3ab51c8877 74 */
bogdanm 84:0b3ab51c8877 75
Kojto 96:487b796308b0 76 /** @defgroup TIMEx_Trigger_Selection Trigger selection
bogdanm 84:0b3ab51c8877 77 * @{
bogdanm 84:0b3ab51c8877 78 */
Kojto 96:487b796308b0 79 #define TIM_TRGO_RESET ((uint32_t)0x0000)
Kojto 96:487b796308b0 80 #define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
Kojto 96:487b796308b0 81 #define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
Kojto 96:487b796308b0 82 #define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
Kojto 96:487b796308b0 83 #define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
Kojto 96:487b796308b0 84 #define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0))
Kojto 96:487b796308b0 85 #define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1))
Kojto 96:487b796308b0 86 #define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
bogdanm 84:0b3ab51c8877 87
Kojto 96:487b796308b0 88 #define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) || \
Kojto 96:487b796308b0 89 ((__SOURCE__) == TIM_TRGO_ENABLE) || \
Kojto 96:487b796308b0 90 ((__SOURCE__) == TIM_TRGO_UPDATE) || \
Kojto 96:487b796308b0 91 ((__SOURCE__) == TIM_TRGO_OC1) || \
Kojto 96:487b796308b0 92 ((__SOURCE__) == TIM_TRGO_OC1REF) || \
Kojto 96:487b796308b0 93 ((__SOURCE__) == TIM_TRGO_OC2REF) || \
Kojto 96:487b796308b0 94 ((__SOURCE__) == TIM_TRGO_OC3REF) || \
Kojto 96:487b796308b0 95 ((__SOURCE__) == TIM_TRGO_OC4REF))
bogdanm 84:0b3ab51c8877 96
bogdanm 84:0b3ab51c8877 97 /**
bogdanm 84:0b3ab51c8877 98 * @}
bogdanm 84:0b3ab51c8877 99 */
bogdanm 84:0b3ab51c8877 100
Kojto 96:487b796308b0 101 /** @defgroup TIMEx_Remap Remaping
bogdanm 84:0b3ab51c8877 102 * @{
bogdanm 84:0b3ab51c8877 103 */
bogdanm 84:0b3ab51c8877 104
Kojto 96:487b796308b0 105 #define TIM2_ETR_GPIO ((uint32_t)0x0)
Kojto 96:487b796308b0 106 #define TIM2_ETR_HSI48 TIM2_OR_ETR_RMP_2
Kojto 96:487b796308b0 107 #define TIM2_ETR_LSE (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0)
Kojto 96:487b796308b0 108 #define TIM2_ETR_COMP2_OUT (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1)
Kojto 96:487b796308b0 109 #define TIM2_ETR_COMP1_OUT TIM2_OR_ETR_RMP
Kojto 96:487b796308b0 110 #define TIM2_TI4_GPIO ((uint32_t)0x0)
Kojto 96:487b796308b0 111 #define TIM2_TI4_COMP2 TIM2_OR_TI4_RMP_0
Kojto 96:487b796308b0 112 #define TIM2_TI4_COMP1 TIM2_OR_TI4_RMP_1
Kojto 96:487b796308b0 113
Kojto 96:487b796308b0 114 #define TIM21_ETR_GPIO ((uint32_t)0x0)
Kojto 96:487b796308b0 115 #define TIM21_ETR_COMP2_OUT TIM21_OR_ETR_RMP_0
Kojto 96:487b796308b0 116 #define TIM21_ETR_COMP1_OUT TIM21_OR_ETR_RMP_1
Kojto 96:487b796308b0 117 #define TIM21_ETR_LSE TIM21_OR_ETR_RMP
Kojto 96:487b796308b0 118 #define TIM21_TI1_GPIO ((uint32_t)0x0)
Kojto 96:487b796308b0 119 #define TIM21_TI1_MCO TIM21_OR_TI1_RMP
Kojto 96:487b796308b0 120 #define TIM21_TI1_RTC_WKUT_IT TIM21_OR_TI1_RMP_0
Kojto 96:487b796308b0 121 #define TIM21_TI1_HSE_RTC TIM21_OR_TI1_RMP_1
Kojto 96:487b796308b0 122 #define TIM21_TI1_MSI (TIM21_OR_TI1_RMP_0 | TIM21_OR_TI1_RMP_1)
Kojto 96:487b796308b0 123 #define TIM21_TI1_LSE TIM21_OR_TI1_RMP_2
Kojto 96:487b796308b0 124 #define TIM21_TI1_LSI (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_0)
Kojto 96:487b796308b0 125 #define TIM21_TI1_COMP1_OUT (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_1)
Kojto 96:487b796308b0 126 #define TIM21_TI2_GPIO ((uint32_t)0x0)
Kojto 96:487b796308b0 127 #define TIM21_TI2_COMP2_OUT TIM21_OR_TI2_RMP
Kojto 96:487b796308b0 128
Kojto 96:487b796308b0 129 #define TIM22_ETR_LSE ((uint32_t)0x0)
Kojto 96:487b796308b0 130 #define TIM22_ETR_COMP2_OUT TIM22_OR_ETR_RMP_0
Kojto 96:487b796308b0 131 #define TIM22_ETR_COMP1_OUT TIM22_OR_ETR_RMP_1
Kojto 96:487b796308b0 132 #define TIM22_ETR_GPIO TIM22_OR_ETR_RMP
Kojto 96:487b796308b0 133 #define TIM22_TI1_GPIO1 ((uint32_t)0x0)
Kojto 96:487b796308b0 134 #define TIM22_TI1_COMP2_OUT TIM22_OR_TI1_RMP_0
Kojto 96:487b796308b0 135 #define TIM22_TI1_COMP1_OUT TIM22_OR_TI1_RMP_1
Kojto 96:487b796308b0 136 #define TIM22_TI1_GPIO2 TIM22_OR_TI1_RMP
Kojto 96:487b796308b0 137
Kojto 96:487b796308b0 138 #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
Kojto 96:487b796308b0 139 || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
Kojto 96:487b796308b0 140
Kojto 96:487b796308b0 141 #define TIM3_TI4_GPIO_DEF ((uint32_t)0x0)
Kojto 96:487b796308b0 142 #define TIM3_TI4_GPIOC9_AF2 TIM3_OR_TI4_RMP
Kojto 96:487b796308b0 143 #define TIM3_TI2_GPIO_DEF ((uint32_t)0x0)
Kojto 96:487b796308b0 144 #define TIM3_TI2_GPIOB5_AF4 TIM3_OR_TI2_RMP
Kojto 96:487b796308b0 145 #define TIM3_TI1_USB_SOF ((uint32_t)0x0)
Kojto 96:487b796308b0 146 #define TIM3_TI1_GPIO TIM3_OR_TI1_RMP
Kojto 96:487b796308b0 147 #define TIM3_ETR_GPIO ((uint32_t)0x0)
Kojto 96:487b796308b0 148 #define TIM3_ETR_HSI TIM3_OR_ETR_RMP_1
Kojto 96:487b796308b0 149
Kojto 96:487b796308b0 150 #endif /*defined (STM32L07Xxx) or defined (STM32L08Xxx) */
Kojto 96:487b796308b0 151
Kojto 96:487b796308b0 152
Kojto 96:487b796308b0 153
Kojto 96:487b796308b0 154 #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
Kojto 96:487b796308b0 155 || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
bogdanm 84:0b3ab51c8877 156
bogdanm 84:0b3ab51c8877 157
Kojto 96:487b796308b0 158 #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \
Kojto 96:487b796308b0 159 (((__INSTANCE__ == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \
Kojto 96:487b796308b0 160 ((__INSTANCE__ == TIM22) && ((__TIM_REMAP__) <= (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \
Kojto 96:487b796308b0 161 ((__INSTANCE__ == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))) || \
Kojto 96:487b796308b0 162 ((__INSTANCE__ == TIM3) && ((__TIM_REMAP__) <= (TIM3_OR_ETR_RMP | TIM3_OR_TI1_RMP | TIM3_OR_TI2_RMP | TIM3_OR_TI4_RMP))))
Kojto 96:487b796308b0 163
Kojto 96:487b796308b0 164 #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \
Kojto 96:487b796308b0 165 (((__INSTANCE__ == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
Kojto 96:487b796308b0 166 ((__CHANNEL__) == TIM_CHANNEL_2) || \
Kojto 96:487b796308b0 167 ((__CHANNEL__) == TIM_CHANNEL_3) || \
Kojto 96:487b796308b0 168 ((__CHANNEL__) == TIM_CHANNEL_4))) || \
Kojto 96:487b796308b0 169 ((__INSTANCE__ == TIM3) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
Kojto 96:487b796308b0 170 ((__CHANNEL__) == TIM_CHANNEL_2) || \
Kojto 96:487b796308b0 171 ((__CHANNEL__) == TIM_CHANNEL_3) || \
Kojto 96:487b796308b0 172 ((__CHANNEL__) == TIM_CHANNEL_4))) || \
Kojto 96:487b796308b0 173 ((__INSTANCE__ == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
Kojto 96:487b796308b0 174 ((__CHANNEL__) == TIM_CHANNEL_2))) || \
Kojto 96:487b796308b0 175 ((__INSTANCE__ == TIM22) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
Kojto 96:487b796308b0 176 ((__CHANNEL__) == TIM_CHANNEL_2))))
Kojto 96:487b796308b0 177
Kojto 96:487b796308b0 178 #else
Kojto 96:487b796308b0 179
Kojto 96:487b796308b0 180 #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \
Kojto 96:487b796308b0 181 (((__INSTANCE__ == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \
Kojto 96:487b796308b0 182 ((__INSTANCE__ == TIM22) && ((__TIM_REMAP__) <= (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \
Kojto 96:487b796308b0 183 ((__INSTANCE__ == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))))
bogdanm 84:0b3ab51c8877 184
Kojto 96:487b796308b0 185 #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \
Kojto 96:487b796308b0 186 (((__INSTANCE__ == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
Kojto 96:487b796308b0 187 ((__CHANNEL__) == TIM_CHANNEL_2) || \
Kojto 96:487b796308b0 188 ((__CHANNEL__) == TIM_CHANNEL_3) || \
Kojto 96:487b796308b0 189 ((__CHANNEL__) == TIM_CHANNEL_4))) || \
Kojto 96:487b796308b0 190 ((__INSTANCE__ == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
Kojto 96:487b796308b0 191 ((__CHANNEL__) == TIM_CHANNEL_2))) || \
Kojto 96:487b796308b0 192 ((__INSTANCE__ == TIM22) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
Kojto 96:487b796308b0 193 ((__CHANNEL__) == TIM_CHANNEL_2))))
Kojto 96:487b796308b0 194
Kojto 96:487b796308b0 195 #endif /*defined (STM32L07Xxx) or defined (STM32L08Xxx) */
Kojto 96:487b796308b0 196
Kojto 96:487b796308b0 197
Kojto 96:487b796308b0 198 /**
Kojto 96:487b796308b0 199 * @}
Kojto 96:487b796308b0 200 */
Kojto 96:487b796308b0 201
Kojto 96:487b796308b0 202 /**
Kojto 96:487b796308b0 203 * @}
Kojto 96:487b796308b0 204 */
Kojto 96:487b796308b0 205
Kojto 96:487b796308b0 206
Kojto 96:487b796308b0 207 /* Exported macro ------------------------------------------------------------*/
Kojto 96:487b796308b0 208 /* Exported functions --------------------------------------------------------*/
Kojto 96:487b796308b0 209 /* Control functions ***********************************************************/
Kojto 96:487b796308b0 210
Kojto 96:487b796308b0 211 /** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions
Kojto 96:487b796308b0 212 * @{
Kojto 96:487b796308b0 213 */
Kojto 96:487b796308b0 214
Kojto 96:487b796308b0 215 /** @defgroup TIMEx_Exported_Functions_Group1 TIMEx Peripheral Control functions
Kojto 96:487b796308b0 216 * @{
Kojto 96:487b796308b0 217 */
Kojto 96:487b796308b0 218
Kojto 96:487b796308b0 219 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
Kojto 96:487b796308b0 220 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
Kojto 96:487b796308b0 221
Kojto 96:487b796308b0 222 /**
Kojto 96:487b796308b0 223 * @}
Kojto 96:487b796308b0 224 */
Kojto 96:487b796308b0 225
Kojto 96:487b796308b0 226 /**
Kojto 96:487b796308b0 227 * @}
Kojto 96:487b796308b0 228 */
bogdanm 84:0b3ab51c8877 229
bogdanm 84:0b3ab51c8877 230 /**
bogdanm 84:0b3ab51c8877 231 * @}
bogdanm 84:0b3ab51c8877 232 */
bogdanm 84:0b3ab51c8877 233
bogdanm 84:0b3ab51c8877 234 /**
bogdanm 84:0b3ab51c8877 235 * @}
Kojto 96:487b796308b0 236 */
bogdanm 84:0b3ab51c8877 237
bogdanm 84:0b3ab51c8877 238 /**
bogdanm 84:0b3ab51c8877 239 * @}
Kojto 96:487b796308b0 240 */
bogdanm 84:0b3ab51c8877 241 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 242 }
bogdanm 84:0b3ab51c8877 243 #endif
bogdanm 84:0b3ab51c8877 244
bogdanm 84:0b3ab51c8877 245 #endif /* __STM32L0xx_HAL_TIM_EX_H */
bogdanm 84:0b3ab51c8877 246
bogdanm 84:0b3ab51c8877 247 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Kojto 96:487b796308b0 248