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TARGET_NUCLEO_F401RE/stm32f4xx_hal_irda.h@97:4298809c7c9e, 2015-04-08 (annotated)

Committer:
filartrix
Date:
Wed Apr 08 14:12:53 2015 +0000
Revision:
97:4298809c7c9e
Parent:
90:cb3d968589d8 
First reale BlueNRG module for nucleo 401 board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_irda.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 19-June-2014
emilmont 77:869cf507173a 7 * @brief Header file of IRDA HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_IRDA_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_IRDA_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 47 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 48
emilmont 77:869cf507173a 49 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 50 * @{
emilmont 77:869cf507173a 51 */
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup IRDA
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
emilmont 77:869cf507173a 57 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /**
emilmont 77:869cf507173a 60 * @brief IRDA Init Structure definition
emilmont 77:869cf507173a 61 */
emilmont 77:869cf507173a 62 typedef struct
emilmont 77:869cf507173a 63 {
emilmont 77:869cf507173a 64 uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
emilmont 77:869cf507173a 65 The baud rate is computed using the following formula:
emilmont 77:869cf507173a 66 - IntegerDivider = ((PCLKx) / (8 * (hirda->Init.BaudRate)))
emilmont 77:869cf507173a 67 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */
emilmont 77:869cf507173a 68
emilmont 77:869cf507173a 69 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
emilmont 77:869cf507173a 70 This parameter can be a value of @ref IRDA_Word_Length */
emilmont 77:869cf507173a 71
emilmont 77:869cf507173a 72
emilmont 77:869cf507173a 73 uint32_t Parity; /*!< Specifies the parity mode.
emilmont 77:869cf507173a 74 This parameter can be a value of @ref IRDA_Parity
emilmont 77:869cf507173a 75 @note When parity is enabled, the computed parity is inserted
emilmont 77:869cf507173a 76 at the MSB position of the transmitted data (9th bit when
emilmont 77:869cf507173a 77 the word length is set to 9 data bits; 8th bit when the
emilmont 77:869cf507173a 78 word length is set to 8 data bits). */
emilmont 77:869cf507173a 79
emilmont 77:869cf507173a 80 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
emilmont 77:869cf507173a 81 This parameter can be a value of @ref IRDA_Mode */
emilmont 77:869cf507173a 82
emilmont 77:869cf507173a 83 uint8_t Prescaler; /*!< Specifies the Prescaler */
emilmont 77:869cf507173a 84
emilmont 77:869cf507173a 85 uint32_t IrDAMode; /*!< Specifies the IrDA mode
emilmont 77:869cf507173a 86 This parameter can be a value of @ref IrDA_Low_Power */
emilmont 77:869cf507173a 87 }IRDA_InitTypeDef;
emilmont 77:869cf507173a 88
emilmont 77:869cf507173a 89 /**
emilmont 77:869cf507173a 90 * @brief HAL State structures definition
emilmont 77:869cf507173a 91 */
emilmont 77:869cf507173a 92 typedef enum
emilmont 77:869cf507173a 93 {
emilmont 77:869cf507173a 94 HAL_IRDA_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
emilmont 77:869cf507173a 95 HAL_IRDA_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
emilmont 77:869cf507173a 96 HAL_IRDA_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
emilmont 77:869cf507173a 97 HAL_IRDA_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
emilmont 77:869cf507173a 98 HAL_IRDA_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
emilmont 77:869cf507173a 99 HAL_IRDA_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
emilmont 77:869cf507173a 100 HAL_IRDA_STATE_TIMEOUT = 0x03, /*!< Timeout state */
emilmont 77:869cf507173a 101 HAL_IRDA_STATE_ERROR = 0x04 /*!< Error */
emilmont 77:869cf507173a 102 }HAL_IRDA_StateTypeDef;
emilmont 77:869cf507173a 103
emilmont 77:869cf507173a 104 /**
emilmont 77:869cf507173a 105 * @brief HAL IRDA Error Code structure definition
emilmont 77:869cf507173a 106 */
emilmont 77:869cf507173a 107 typedef enum
emilmont 77:869cf507173a 108 {
emilmont 77:869cf507173a 109 HAL_IRDA_ERROR_NONE = 0x00, /*!< No error */
emilmont 77:869cf507173a 110 HAL_IRDA_ERROR_PE = 0x01, /*!< Parity error */
emilmont 77:869cf507173a 111 HAL_IRDA_ERROR_NE = 0x02, /*!< Noise error */
emilmont 77:869cf507173a 112 HAL_IRDA_ERROR_FE = 0x04, /*!< frame error */
emilmont 77:869cf507173a 113 HAL_IRDA_ERROR_ORE = 0x08, /*!< Overrun error */
emilmont 77:869cf507173a 114 HAL_IRDA_ERROR_DMA = 0x10 /*!< DMA transfer error */
emilmont 77:869cf507173a 115 }HAL_IRDA_ErrorTypeDef;
emilmont 77:869cf507173a 116
emilmont 77:869cf507173a 117 /**
emilmont 77:869cf507173a 118 * @brief IRDA handle Structure definition
emilmont 77:869cf507173a 119 */
emilmont 77:869cf507173a 120 typedef struct
emilmont 77:869cf507173a 121 {
emilmont 77:869cf507173a 122 USART_TypeDef *Instance; /* USART registers base address */
emilmont 77:869cf507173a 123
emilmont 77:869cf507173a 124 IRDA_InitTypeDef Init; /* IRDA communication parameters */
emilmont 77:869cf507173a 125
emilmont 77:869cf507173a 126 uint8_t *pTxBuffPtr; /* Pointer to IRDA Tx transfer Buffer */
emilmont 77:869cf507173a 127
emilmont 77:869cf507173a 128 uint16_t TxXferSize; /* IRDA Tx Transfer size */
emilmont 77:869cf507173a 129
emilmont 77:869cf507173a 130 uint16_t TxXferCount; /* IRDA Tx Transfer Counter */
emilmont 77:869cf507173a 131
emilmont 77:869cf507173a 132 uint8_t *pRxBuffPtr; /* Pointer to IRDA Rx transfer Buffer */
emilmont 77:869cf507173a 133
emilmont 77:869cf507173a 134 uint16_t RxXferSize; /* IRDA Rx Transfer size */
emilmont 77:869cf507173a 135
emilmont 77:869cf507173a 136 uint16_t RxXferCount; /* IRDA Rx Transfer Counter */
emilmont 77:869cf507173a 137
emilmont 77:869cf507173a 138 DMA_HandleTypeDef *hdmatx; /* IRDA Tx DMA Handle parameters */
emilmont 77:869cf507173a 139
emilmont 77:869cf507173a 140 DMA_HandleTypeDef *hdmarx; /* IRDA Rx DMA Handle parameters */
emilmont 77:869cf507173a 141
emilmont 77:869cf507173a 142 HAL_LockTypeDef Lock; /* Locking object */
emilmont 77:869cf507173a 143
emilmont 77:869cf507173a 144 __IO HAL_IRDA_StateTypeDef State; /* IRDA communication state */
emilmont 77:869cf507173a 145
emilmont 77:869cf507173a 146 __IO HAL_IRDA_ErrorTypeDef ErrorCode; /* IRDA Error code */
emilmont 77:869cf507173a 147
emilmont 77:869cf507173a 148 }IRDA_HandleTypeDef;
emilmont 77:869cf507173a 149
emilmont 77:869cf507173a 150 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 151 /** @defgroup IRDA_Exported_Constants
emilmont 77:869cf507173a 152 * @{
emilmont 77:869cf507173a 153 */
emilmont 77:869cf507173a 154
emilmont 77:869cf507173a 155 /** @defgroup IRDA_Word_Length
emilmont 77:869cf507173a 156 * @{
emilmont 77:869cf507173a 157 */
emilmont 77:869cf507173a 158 #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000)
emilmont 77:869cf507173a 159 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
emilmont 77:869cf507173a 160 #define IS_IRDA_WORD_LENGTH(LENGTH) (((LENGTH) == IRDA_WORDLENGTH_8B) || \
emilmont 77:869cf507173a 161 ((LENGTH) == IRDA_WORDLENGTH_9B))
emilmont 77:869cf507173a 162 /**
emilmont 77:869cf507173a 163 * @}
emilmont 77:869cf507173a 164 */
emilmont 77:869cf507173a 165
emilmont 77:869cf507173a 166
emilmont 77:869cf507173a 167 /** @defgroup IRDA_Parity
emilmont 77:869cf507173a 168 * @{
emilmont 77:869cf507173a 169 */
emilmont 77:869cf507173a 170 #define IRDA_PARITY_NONE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 171 #define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
emilmont 77:869cf507173a 172 #define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
emilmont 77:869cf507173a 173 #define IS_IRDA_PARITY(PARITY) (((PARITY) == IRDA_PARITY_NONE) || \
emilmont 77:869cf507173a 174 ((PARITY) == IRDA_PARITY_EVEN) || \
emilmont 77:869cf507173a 175 ((PARITY) == IRDA_PARITY_ODD))
emilmont 77:869cf507173a 176 /**
emilmont 77:869cf507173a 177 * @}
emilmont 77:869cf507173a 178 */
emilmont 77:869cf507173a 179
emilmont 77:869cf507173a 180
emilmont 77:869cf507173a 181 /** @defgroup IRDA_Mode
emilmont 77:869cf507173a 182 * @{
emilmont 77:869cf507173a 183 */
emilmont 77:869cf507173a 184 #define IRDA_MODE_RX ((uint32_t)USART_CR1_RE)
emilmont 77:869cf507173a 185 #define IRDA_MODE_TX ((uint32_t)USART_CR1_TE)
emilmont 77:869cf507173a 186 #define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
emilmont 77:869cf507173a 187 #define IS_IRDA_MODE(MODE) ((((MODE) & (uint32_t)0x0000FFF3) == 0x00) && ((MODE) != (uint32_t)0x000000))
emilmont 77:869cf507173a 188 /**
emilmont 77:869cf507173a 189 * @}
emilmont 77:869cf507173a 190 */
emilmont 77:869cf507173a 191
emilmont 77:869cf507173a 192 /** @defgroup IrDA_Low_Power
emilmont 77:869cf507173a 193 * @{
emilmont 77:869cf507173a 194 */
emilmont 77:869cf507173a 195 #define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP)
emilmont 77:869cf507173a 196 #define IRDA_POWERMODE_NORMAL ((uint32_t)0x00000000)
emilmont 77:869cf507173a 197 #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \
emilmont 77:869cf507173a 198 ((MODE) == IRDA_POWERMODE_NORMAL))
emilmont 77:869cf507173a 199 /**
emilmont 77:869cf507173a 200 * @}
emilmont 77:869cf507173a 201 */
emilmont 77:869cf507173a 202
emilmont 77:869cf507173a 203 /** @defgroup IRDA_Flags
emilmont 77:869cf507173a 204 * Elements values convention: 0xXXXX
emilmont 77:869cf507173a 205 * - 0xXXXX : Flag mask in the SR register
emilmont 77:869cf507173a 206 * @{
emilmont 77:869cf507173a 207 */
emilmont 77:869cf507173a 208 #define IRDA_FLAG_TXE ((uint32_t)0x00000080)
emilmont 77:869cf507173a 209 #define IRDA_FLAG_TC ((uint32_t)0x00000040)
emilmont 77:869cf507173a 210 #define IRDA_FLAG_RXNE ((uint32_t)0x00000020)
emilmont 77:869cf507173a 211 #define IRDA_FLAG_IDLE ((uint32_t)0x00000010)
emilmont 77:869cf507173a 212 #define IRDA_FLAG_ORE ((uint32_t)0x00000008)
emilmont 77:869cf507173a 213 #define IRDA_FLAG_NE ((uint32_t)0x00000004)
emilmont 77:869cf507173a 214 #define IRDA_FLAG_FE ((uint32_t)0x00000002)
emilmont 77:869cf507173a 215 #define IRDA_FLAG_PE ((uint32_t)0x00000001)
emilmont 77:869cf507173a 216 /**
emilmont 77:869cf507173a 217 * @}
emilmont 77:869cf507173a 218 */
emilmont 77:869cf507173a 219
emilmont 77:869cf507173a 220 /** @defgroup IRDA_Interrupt_definition
emilmont 77:869cf507173a 221 * Elements values convention: 0xY000XXXX
emilmont 77:869cf507173a 222 * - XXXX : Interrupt mask in the XX register
emilmont 77:869cf507173a 223 * - Y : Interrupt source register (2bits)
emilmont 77:869cf507173a 224 * - 01: CR1 register
emilmont 77:869cf507173a 225 * - 10: CR2 register
emilmont 77:869cf507173a 226 * - 11: CR3 register
emilmont 77:869cf507173a 227 *
emilmont 77:869cf507173a 228 * @{
emilmont 77:869cf507173a 229 */
emilmont 77:869cf507173a 230
emilmont 77:869cf507173a 231 #define IRDA_IT_PE ((uint32_t)0x10000100)
emilmont 77:869cf507173a 232 #define IRDA_IT_TXE ((uint32_t)0x10000080)
emilmont 77:869cf507173a 233 #define IRDA_IT_TC ((uint32_t)0x10000040)
emilmont 77:869cf507173a 234 #define IRDA_IT_RXNE ((uint32_t)0x10000020)
emilmont 77:869cf507173a 235 #define IRDA_IT_IDLE ((uint32_t)0x10000010)
bogdanm 85:024bf7f99721 236
emilmont 77:869cf507173a 237 #define IRDA_IT_LBD ((uint32_t)0x20000040)
emilmont 77:869cf507173a 238
bogdanm 85:024bf7f99721 239 #define IRDA_IT_CTS ((uint32_t)0x30000400)
emilmont 77:869cf507173a 240 #define IRDA_IT_ERR ((uint32_t)0x30000001)
emilmont 77:869cf507173a 241
emilmont 77:869cf507173a 242 /**
emilmont 77:869cf507173a 243 * @}
emilmont 77:869cf507173a 244 */
bogdanm 85:024bf7f99721 245
emilmont 77:869cf507173a 246 /**
emilmont 77:869cf507173a 247 * @}
emilmont 77:869cf507173a 248 */
emilmont 77:869cf507173a 249
emilmont 77:869cf507173a 250 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 251
bogdanm 85:024bf7f99721 252 /** @brief Reset IRDA handle state
Kojto 90:cb3d968589d8 253 * @param __HANDLE__: specifies the USART Handle.
Kojto 90:cb3d968589d8 254 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
Kojto 90:cb3d968589d8 255 * UART peripheral.
bogdanm 85:024bf7f99721 256 * @retval None
bogdanm 85:024bf7f99721 257 */
bogdanm 85:024bf7f99721 258 #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET)
bogdanm 85:024bf7f99721 259
bogdanm 85:024bf7f99721 260 /** @brief Flushs the IRDA DR register
Kojto 90:cb3d968589d8 261 * @param __HANDLE__: specifies the USART Handle.
Kojto 90:cb3d968589d8 262 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
Kojto 90:cb3d968589d8 263 * UART peripheral.
bogdanm 85:024bf7f99721 264 */
bogdanm 85:024bf7f99721 265 #define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
bogdanm 85:024bf7f99721 266
emilmont 77:869cf507173a 267 /** @brief Checks whether the specified IRDA flag is set or not.
emilmont 77:869cf507173a 268 * @param __HANDLE__: specifies the USART Handle.
emilmont 77:869cf507173a 269 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
emilmont 77:869cf507173a 270 * UART peripheral.
emilmont 77:869cf507173a 271 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 272 * This parameter can be one of the following values:
emilmont 77:869cf507173a 273 * @arg IRDA_FLAG_TXE: Transmit data register empty flag
emilmont 77:869cf507173a 274 * @arg IRDA_FLAG_TC: Transmission Complete flag
emilmont 77:869cf507173a 275 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag
emilmont 77:869cf507173a 276 * @arg IRDA_FLAG_IDLE: Idle Line detection flag
emilmont 77:869cf507173a 277 * @arg IRDA_FLAG_ORE: OverRun Error flag
emilmont 77:869cf507173a 278 * @arg IRDA_FLAG_NE: Noise Error flag
emilmont 77:869cf507173a 279 * @arg IRDA_FLAG_FE: Framing Error flag
emilmont 77:869cf507173a 280 * @arg IRDA_FLAG_PE: Parity Error flag
emilmont 77:869cf507173a 281 * @retval The new state of __FLAG__ (TRUE or FALSE).
emilmont 77:869cf507173a 282 */
emilmont 77:869cf507173a 283 #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
emilmont 77:869cf507173a 284
emilmont 77:869cf507173a 285 /** @brief Clears the specified IRDA pending flag.
emilmont 77:869cf507173a 286 * @param __HANDLE__: specifies the USART Handle.
emilmont 77:869cf507173a 287 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
emilmont 77:869cf507173a 288 * UART peripheral.
emilmont 77:869cf507173a 289 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 290 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 291 * @arg IRDA_FLAG_TC: Transmission Complete flag.
emilmont 77:869cf507173a 292 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag.
emilmont 77:869cf507173a 293 *
emilmont 77:869cf507173a 294 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
emilmont 77:869cf507173a 295 * error) and IDLE (Idle line detected) flags are cleared by software
emilmont 77:869cf507173a 296 * sequence: a read operation to USART_SR register followed by a read
emilmont 77:869cf507173a 297 * operation to USART_DR register.
emilmont 77:869cf507173a 298 * @note RXNE flag can be also cleared by a read to the USART_DR register.
emilmont 77:869cf507173a 299 * @note TC flag can be also cleared by software sequence: a read operation to
emilmont 77:869cf507173a 300 * USART_SR register followed by a write operation to USART_DR register.
emilmont 77:869cf507173a 301 * @note TXE flag is cleared only by a write to the USART_DR register.
emilmont 77:869cf507173a 302 *
emilmont 77:869cf507173a 303 * @retval None
emilmont 77:869cf507173a 304 */
Kojto 90:cb3d968589d8 305 #define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
Kojto 90:cb3d968589d8 306
Kojto 90:cb3d968589d8 307 /** @brief Clear the IRDA PE pending flag.
Kojto 90:cb3d968589d8 308 * @param __HANDLE__: specifies the USART Handle.
Kojto 90:cb3d968589d8 309 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
Kojto 90:cb3d968589d8 310 * UART peripheral.
Kojto 90:cb3d968589d8 311 * @retval None
Kojto 90:cb3d968589d8 312 */
Kojto 90:cb3d968589d8 313 #define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\
Kojto 90:cb3d968589d8 314 (__HANDLE__)->Instance->DR;}while(0)
Kojto 90:cb3d968589d8 315 /** @brief Clear the IRDA FE pending flag.
Kojto 90:cb3d968589d8 316 * @param __HANDLE__: specifies the USART Handle.
Kojto 90:cb3d968589d8 317 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
Kojto 90:cb3d968589d8 318 * UART peripheral.
Kojto 90:cb3d968589d8 319 * @retval None
Kojto 90:cb3d968589d8 320 */
Kojto 90:cb3d968589d8 321 #define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
emilmont 77:869cf507173a 322
Kojto 90:cb3d968589d8 323 /** @brief Clear the IRDA NE pending flag.
Kojto 90:cb3d968589d8 324 * @param __HANDLE__: specifies the USART Handle.
Kojto 90:cb3d968589d8 325 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
Kojto 90:cb3d968589d8 326 * UART peripheral.
Kojto 90:cb3d968589d8 327 * @retval None
Kojto 90:cb3d968589d8 328 */
Kojto 90:cb3d968589d8 329 #define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
Kojto 90:cb3d968589d8 330
Kojto 90:cb3d968589d8 331 /** @brief Clear the IRDA ORE pending flag.
Kojto 90:cb3d968589d8 332 * @param __HANDLE__: specifies the USART Handle.
Kojto 90:cb3d968589d8 333 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
Kojto 90:cb3d968589d8 334 * UART peripheral.
Kojto 90:cb3d968589d8 335 * @retval None
Kojto 90:cb3d968589d8 336 */
Kojto 90:cb3d968589d8 337 #define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
Kojto 90:cb3d968589d8 338
Kojto 90:cb3d968589d8 339 /** @brief Clear the IRDA IDLE pending flag.
Kojto 90:cb3d968589d8 340 * @param __HANDLE__: specifies the USART Handle.
Kojto 90:cb3d968589d8 341 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
Kojto 90:cb3d968589d8 342 * UART peripheral.
Kojto 90:cb3d968589d8 343 * @retval None
Kojto 90:cb3d968589d8 344 */
Kojto 90:cb3d968589d8 345 #define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
emilmont 77:869cf507173a 346
emilmont 77:869cf507173a 347 /** @brief Enables or disables the specified IRDA interrupt.
emilmont 77:869cf507173a 348 * @param __HANDLE__: specifies the USART Handle.
emilmont 77:869cf507173a 349 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
emilmont 77:869cf507173a 350 * UART peripheral.
emilmont 77:869cf507173a 351 * @param __INTERRUPT__: specifies the IRDA interrupt source to check.
emilmont 77:869cf507173a 352 * This parameter can be one of the following values:
emilmont 77:869cf507173a 353 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
emilmont 77:869cf507173a 354 * @arg IRDA_IT_TC: Transmission complete interrupt
emilmont 77:869cf507173a 355 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
emilmont 77:869cf507173a 356 * @arg IRDA_IT_IDLE: Idle line detection interrupt
emilmont 77:869cf507173a 357 * @arg IRDA_IT_PE: Parity Error interrupt
emilmont 77:869cf507173a 358 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
emilmont 77:869cf507173a 359 * @param NewState: new state of the specified IRDA interrupt.
emilmont 77:869cf507173a 360 * This parameter can be: ENABLE or DISABLE.
emilmont 77:869cf507173a 361 * @retval None
emilmont 77:869cf507173a 362 */
emilmont 77:869cf507173a 363 #define IRDA_IT_MASK ((uint32_t)0x0000FFFF)
emilmont 77:869cf507173a 364 #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
emilmont 77:869cf507173a 365 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
emilmont 77:869cf507173a 366 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & IRDA_IT_MASK)))
emilmont 77:869cf507173a 367 #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
emilmont 77:869cf507173a 368 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
emilmont 77:869cf507173a 369 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & IRDA_IT_MASK)))
emilmont 77:869cf507173a 370
emilmont 77:869cf507173a 371 /** @brief Checks whether the specified IRDA interrupt has occurred or not.
emilmont 77:869cf507173a 372 * @param __HANDLE__: specifies the USART Handle.
emilmont 77:869cf507173a 373 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
emilmont 77:869cf507173a 374 * UART peripheral.
emilmont 77:869cf507173a 375 * @param __IT__: specifies the IRDA interrupt source to check.
emilmont 77:869cf507173a 376 * This parameter can be one of the following values:
emilmont 77:869cf507173a 377 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
emilmont 77:869cf507173a 378 * @arg IRDA_IT_TC: Transmission complete interrupt
emilmont 77:869cf507173a 379 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
emilmont 77:869cf507173a 380 * @arg IRDA_IT_IDLE: Idle line detection interrupt
emilmont 77:869cf507173a 381 * @arg USART_IT_ERR: Error interrupt
emilmont 77:869cf507173a 382 * @arg IRDA_IT_PE: Parity Error interrupt
emilmont 77:869cf507173a 383 * @retval The new state of __IT__ (TRUE or FALSE).
emilmont 77:869cf507173a 384 */
emilmont 77:869cf507173a 385 #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == 1)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == 2)? \
emilmont 77:869cf507173a 386 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & IRDA_IT_MASK))
emilmont 77:869cf507173a 387
emilmont 77:869cf507173a 388
emilmont 77:869cf507173a 389
emilmont 77:869cf507173a 390 #define __IRDA_ENABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
emilmont 77:869cf507173a 391 #define __IRDA_DISABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
emilmont 77:869cf507173a 392
emilmont 77:869cf507173a 393 #define __DIV(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_)))
emilmont 77:869cf507173a 394 #define __DIVMANT(_PCLK_, _BAUD_) (__DIV((_PCLK_), (_BAUD_))/100)
emilmont 77:869cf507173a 395 #define __DIVFRAQ(_PCLK_, _BAUD_) (((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
emilmont 77:869cf507173a 396 #define __IRDA_BRR(_PCLK_, _BAUD_) ((__DIVMANT((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
emilmont 77:869cf507173a 397
emilmont 77:869cf507173a 398 #define IS_IRDA_BAUDRATE(BAUDRATE) ((BAUDRATE) < 115201)
emilmont 77:869cf507173a 399
emilmont 77:869cf507173a 400
emilmont 77:869cf507173a 401 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 402 /* Initialization/de-initialization functions **********************************/
emilmont 77:869cf507173a 403 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
emilmont 77:869cf507173a 404 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
bogdanm 81:7d30d6019079 405 void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
bogdanm 81:7d30d6019079 406 void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
emilmont 77:869cf507173a 407
emilmont 77:869cf507173a 408 /* IO operation functions *******************************************************/
emilmont 77:869cf507173a 409 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
emilmont 77:869cf507173a 410 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
emilmont 77:869cf507173a 411 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
emilmont 77:869cf507173a 412 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
emilmont 77:869cf507173a 413 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
emilmont 77:869cf507173a 414 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
Kojto 90:cb3d968589d8 415 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
Kojto 90:cb3d968589d8 416 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
Kojto 90:cb3d968589d8 417 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
emilmont 77:869cf507173a 418 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
bogdanm 81:7d30d6019079 419 void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 81:7d30d6019079 420 void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
Kojto 90:cb3d968589d8 421 void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
Kojto 90:cb3d968589d8 422 void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 81:7d30d6019079 423 void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
emilmont 77:869cf507173a 424
emilmont 77:869cf507173a 425 /* Peripheral State functions **************************************************/
emilmont 77:869cf507173a 426 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
emilmont 77:869cf507173a 427 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
emilmont 77:869cf507173a 428
emilmont 77:869cf507173a 429 /**
emilmont 77:869cf507173a 430 * @}
emilmont 77:869cf507173a 431 */
emilmont 77:869cf507173a 432
emilmont 77:869cf507173a 433 /**
emilmont 77:869cf507173a 434 * @}
emilmont 77:869cf507173a 435 */
emilmont 77:869cf507173a 436
emilmont 77:869cf507173a 437 #ifdef __cplusplus
emilmont 77:869cf507173a 438 }
emilmont 77:869cf507173a 439 #endif
emilmont 77:869cf507173a 440
emilmont 77:869cf507173a 441 #endif /* __STM32F4xx_HAL_IRDA_H */
emilmont 77:869cf507173a 442
emilmont 77:869cf507173a 443 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/