Filippo Casamassima / mbed

my fork

Dependents:   Nucleo_blueNRG

Fork of mbed by mbed official

TARGET_NUCLEO_F334R8/stm32f3xx_hal_pwr.h@97:4298809c7c9e, 2015-04-08 (annotated)

Committer:
filartrix
Date:
Wed Apr 08 14:12:53 2015 +0000
Revision:
97:4298809c7c9e
Parent:
92:4fc01daae5a5 
First reale BlueNRG module for nucleo 401 board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 86:04dd9b1680ae 1 /**
bogdanm 86:04dd9b1680ae 2 ******************************************************************************
bogdanm 86:04dd9b1680ae 3 * @file stm32f3xx_hal_pwr.h
bogdanm 86:04dd9b1680ae 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 12-Sept-2014
bogdanm 86:04dd9b1680ae 7 * @brief Header file of PWR HAL module.
bogdanm 86:04dd9b1680ae 8 ******************************************************************************
bogdanm 86:04dd9b1680ae 9 * @attention
bogdanm 86:04dd9b1680ae 10 *
bogdanm 86:04dd9b1680ae 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 86:04dd9b1680ae 12 *
bogdanm 86:04dd9b1680ae 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 86:04dd9b1680ae 14 * are permitted provided that the following conditions are met:
bogdanm 86:04dd9b1680ae 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 86:04dd9b1680ae 16 * this list of conditions and the following disclaimer.
bogdanm 86:04dd9b1680ae 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 86:04dd9b1680ae 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 86:04dd9b1680ae 19 * and/or other materials provided with the distribution.
bogdanm 86:04dd9b1680ae 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 86:04dd9b1680ae 21 * may be used to endorse or promote products derived from this software
bogdanm 86:04dd9b1680ae 22 * without specific prior written permission.
bogdanm 86:04dd9b1680ae 23 *
bogdanm 86:04dd9b1680ae 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 86:04dd9b1680ae 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 86:04dd9b1680ae 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 86:04dd9b1680ae 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 86:04dd9b1680ae 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 86:04dd9b1680ae 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 86:04dd9b1680ae 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 86:04dd9b1680ae 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 86:04dd9b1680ae 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 86:04dd9b1680ae 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 86:04dd9b1680ae 34 *
bogdanm 86:04dd9b1680ae 35 ******************************************************************************
bogdanm 86:04dd9b1680ae 36 */
bogdanm 86:04dd9b1680ae 37
bogdanm 86:04dd9b1680ae 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 86:04dd9b1680ae 39 #ifndef __STM32F3xx_HAL_PWR_H
bogdanm 86:04dd9b1680ae 40 #define __STM32F3xx_HAL_PWR_H
bogdanm 86:04dd9b1680ae 41
bogdanm 86:04dd9b1680ae 42 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 43 extern "C" {
bogdanm 86:04dd9b1680ae 44 #endif
bogdanm 86:04dd9b1680ae 45
bogdanm 86:04dd9b1680ae 46 /* Includes ------------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 47 #include "stm32f3xx_hal_def.h"
bogdanm 86:04dd9b1680ae 48
bogdanm 86:04dd9b1680ae 49 /** @addtogroup STM32F3xx_HAL_Driver
bogdanm 86:04dd9b1680ae 50 * @{
bogdanm 86:04dd9b1680ae 51 */
bogdanm 86:04dd9b1680ae 52
bogdanm 92:4fc01daae5a5 53 /** @addtogroup PWR PWR HAL Driver module
bogdanm 86:04dd9b1680ae 54 * @{
bogdanm 86:04dd9b1680ae 55 */
bogdanm 86:04dd9b1680ae 56
bogdanm 86:04dd9b1680ae 57 /* Exported types ------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 58 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 59 /** @defgroup PWR_Alias_Exported_Constants PWR Alias Exported Constants
bogdanm 92:4fc01daae5a5 60 * @{
bogdanm 92:4fc01daae5a5 61 */
bogdanm 86:04dd9b1680ae 62 /* ------------- PWR registers bit address in the alias region ---------------*/
bogdanm 86:04dd9b1680ae 63 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
bogdanm 86:04dd9b1680ae 64
bogdanm 86:04dd9b1680ae 65 /* --- CR Register ---*/
bogdanm 86:04dd9b1680ae 66 #define CR_OFFSET (PWR_OFFSET + 0x00)
bogdanm 86:04dd9b1680ae 67 /* Alias word address of DBP bit */
bogdanm 86:04dd9b1680ae 68 #define DBP_BitNumber POSITION_VAL(PWR_CR_DBP)
bogdanm 86:04dd9b1680ae 69 #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
bogdanm 86:04dd9b1680ae 70
bogdanm 86:04dd9b1680ae 71 /* Alias word address of PVDE bit */
bogdanm 86:04dd9b1680ae 72 #define PVDE_BitNumber POSITION_VAL(PWR_CR_PVDE)
bogdanm 86:04dd9b1680ae 73 #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
bogdanm 86:04dd9b1680ae 74
bogdanm 86:04dd9b1680ae 75 /* --- CSR Register ---*/
bogdanm 86:04dd9b1680ae 76 #define CSR_OFFSET (PWR_OFFSET + 0x04)
bogdanm 86:04dd9b1680ae 77 /* Alias word address of EWUP1 bit */
bogdanm 86:04dd9b1680ae 78 #define EWUP1_BitNumber POSITION_VAL(PWR_CSR_EWUP1)
bogdanm 86:04dd9b1680ae 79 #define CSR_EWUP1_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP1_BitNumber * 4))
bogdanm 86:04dd9b1680ae 80
bogdanm 86:04dd9b1680ae 81 /* Alias word address of EWUP2 bit */
bogdanm 86:04dd9b1680ae 82 #define EWUP2_BitNumber POSITION_VAL(PWR_CSR_EWUP2)
bogdanm 86:04dd9b1680ae 83 #define CSR_EWUP2_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP2_BitNumber * 4))
bogdanm 86:04dd9b1680ae 84
bogdanm 86:04dd9b1680ae 85 /* Alias word address of EWUP3 bit */
bogdanm 86:04dd9b1680ae 86 #define EWUP3_BitNumber POSITION_VAL(PWR_CSR_EWUP3)
bogdanm 86:04dd9b1680ae 87 #define CSR_EWUP3_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP3_BitNumber * 4))
bogdanm 92:4fc01daae5a5 88 /**
bogdanm 92:4fc01daae5a5 89 * @}
bogdanm 86:04dd9b1680ae 90 */
bogdanm 86:04dd9b1680ae 91
bogdanm 92:4fc01daae5a5 92 /** @defgroup PWR_Exported_Constants PWR Exported Constants
bogdanm 92:4fc01daae5a5 93 * @{
bogdanm 92:4fc01daae5a5 94 */
bogdanm 92:4fc01daae5a5 95
bogdanm 92:4fc01daae5a5 96 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
bogdanm 86:04dd9b1680ae 97 * @{
bogdanm 86:04dd9b1680ae 98 */
bogdanm 86:04dd9b1680ae 99
bogdanm 86:04dd9b1680ae 100 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
bogdanm 86:04dd9b1680ae 101 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
bogdanm 86:04dd9b1680ae 102 #define PWR_WAKEUP_PIN3 ((uint32_t)0x02)
bogdanm 86:04dd9b1680ae 103 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
bogdanm 86:04dd9b1680ae 104 ((PIN) == PWR_WAKEUP_PIN2) || \
bogdanm 86:04dd9b1680ae 105 ((PIN) == PWR_WAKEUP_PIN3))
bogdanm 86:04dd9b1680ae 106 /**
bogdanm 86:04dd9b1680ae 107 * @}
bogdanm 86:04dd9b1680ae 108 */
bogdanm 86:04dd9b1680ae 109
bogdanm 92:4fc01daae5a5 110 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in STOP mode
bogdanm 86:04dd9b1680ae 111 * @{
bogdanm 86:04dd9b1680ae 112 */
bogdanm 86:04dd9b1680ae 113 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 114 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
bogdanm 86:04dd9b1680ae 115
bogdanm 86:04dd9b1680ae 116 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
bogdanm 86:04dd9b1680ae 117 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
bogdanm 86:04dd9b1680ae 118 /**
bogdanm 86:04dd9b1680ae 119 * @}
bogdanm 86:04dd9b1680ae 120 */
bogdanm 86:04dd9b1680ae 121
bogdanm 92:4fc01daae5a5 122 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
bogdanm 86:04dd9b1680ae 123 * @{
bogdanm 86:04dd9b1680ae 124 */
bogdanm 86:04dd9b1680ae 125 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
bogdanm 86:04dd9b1680ae 126 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
bogdanm 86:04dd9b1680ae 127 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
bogdanm 86:04dd9b1680ae 128 /**
bogdanm 86:04dd9b1680ae 129 * @}
bogdanm 86:04dd9b1680ae 130 */
bogdanm 86:04dd9b1680ae 131
bogdanm 92:4fc01daae5a5 132 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
bogdanm 86:04dd9b1680ae 133 * @{
bogdanm 86:04dd9b1680ae 134 */
bogdanm 86:04dd9b1680ae 135 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
bogdanm 86:04dd9b1680ae 136 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
bogdanm 86:04dd9b1680ae 137 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
bogdanm 86:04dd9b1680ae 138 /**
bogdanm 86:04dd9b1680ae 139 * @}
bogdanm 86:04dd9b1680ae 140 */
bogdanm 86:04dd9b1680ae 141
bogdanm 92:4fc01daae5a5 142 /** @defgroup PWR_Flag PWR Flag
bogdanm 86:04dd9b1680ae 143 * @{
bogdanm 86:04dd9b1680ae 144 */
bogdanm 86:04dd9b1680ae 145 #define PWR_FLAG_WU PWR_CSR_WUF
bogdanm 86:04dd9b1680ae 146 #define PWR_FLAG_SB PWR_CSR_SBF
bogdanm 86:04dd9b1680ae 147 #define PWR_FLAG_PVDO PWR_CSR_PVDO
bogdanm 86:04dd9b1680ae 148 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
bogdanm 86:04dd9b1680ae 149 #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
bogdanm 86:04dd9b1680ae 150 ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_VREFINTRDY))
bogdanm 86:04dd9b1680ae 151
bogdanm 86:04dd9b1680ae 152
bogdanm 86:04dd9b1680ae 153 /**
bogdanm 86:04dd9b1680ae 154 * @}
bogdanm 86:04dd9b1680ae 155 */
bogdanm 86:04dd9b1680ae 156
bogdanm 86:04dd9b1680ae 157 /**
bogdanm 86:04dd9b1680ae 158 * @}
bogdanm 86:04dd9b1680ae 159 */
bogdanm 86:04dd9b1680ae 160
bogdanm 86:04dd9b1680ae 161 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 162 /** @defgroup PWR_Exported_Macro PWR Exported Macro
bogdanm 86:04dd9b1680ae 163 * @{
bogdanm 86:04dd9b1680ae 164 */
bogdanm 86:04dd9b1680ae 165
bogdanm 86:04dd9b1680ae 166 /** @brief Check PWR flag is set or not.
bogdanm 86:04dd9b1680ae 167 * @param __FLAG__: specifies the flag to check.
bogdanm 86:04dd9b1680ae 168 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 169 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
bogdanm 86:04dd9b1680ae 170 * was received from the WKUP pin or from the RTC alarm (Alarm A
bogdanm 86:04dd9b1680ae 171 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
bogdanm 86:04dd9b1680ae 172 * An additional wakeup event is detected if the WKUP pin is enabled
bogdanm 86:04dd9b1680ae 173 * (by setting the EWUP bit) when the WKUP pin level is already high.
bogdanm 86:04dd9b1680ae 174 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
bogdanm 86:04dd9b1680ae 175 * resumed from StandBy mode.
bogdanm 86:04dd9b1680ae 176 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
bogdanm 86:04dd9b1680ae 177 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
bogdanm 86:04dd9b1680ae 178 * For this reason, this bit is equal to 0 after Standby or reset
bogdanm 86:04dd9b1680ae 179 * until the PVDE bit is set.
bogdanm 86:04dd9b1680ae 180 * @arg PWR_FLAG_VREFINTRDY: This flag indicates that the internal reference
bogdanm 86:04dd9b1680ae 181 * voltage VREFINT is ready.
bogdanm 86:04dd9b1680ae 182 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 86:04dd9b1680ae 183 */
bogdanm 86:04dd9b1680ae 184 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
bogdanm 86:04dd9b1680ae 185
bogdanm 86:04dd9b1680ae 186 /** @brief Clear the PWR's pending flags.
bogdanm 86:04dd9b1680ae 187 * @param __FLAG__: specifies the flag to clear.
bogdanm 86:04dd9b1680ae 188 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 189 * @arg PWR_FLAG_WU: Wake Up flag
bogdanm 86:04dd9b1680ae 190 * @arg PWR_FLAG_SB: StandBy flag
bogdanm 86:04dd9b1680ae 191 */
bogdanm 86:04dd9b1680ae 192 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2)
bogdanm 86:04dd9b1680ae 193
bogdanm 86:04dd9b1680ae 194 /**
bogdanm 86:04dd9b1680ae 195 * @}
bogdanm 86:04dd9b1680ae 196 */
bogdanm 86:04dd9b1680ae 197
bogdanm 92:4fc01daae5a5 198 /* Include PWR HAL Extended module */
bogdanm 86:04dd9b1680ae 199 #include "stm32f3xx_hal_pwr_ex.h"
bogdanm 86:04dd9b1680ae 200
bogdanm 86:04dd9b1680ae 201 /* Exported functions --------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 202
bogdanm 92:4fc01daae5a5 203 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
bogdanm 92:4fc01daae5a5 204 * @{
bogdanm 92:4fc01daae5a5 205 */
bogdanm 92:4fc01daae5a5 206
bogdanm 92:4fc01daae5a5 207 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 92:4fc01daae5a5 208 * @{
bogdanm 92:4fc01daae5a5 209 */
bogdanm 92:4fc01daae5a5 210
bogdanm 86:04dd9b1680ae 211 /* Initialization and de-initialization functions *****************************/
bogdanm 86:04dd9b1680ae 212 void HAL_PWR_DeInit(void);
bogdanm 86:04dd9b1680ae 213
bogdanm 92:4fc01daae5a5 214 /**
bogdanm 92:4fc01daae5a5 215 * @}
bogdanm 92:4fc01daae5a5 216 */
bogdanm 92:4fc01daae5a5 217
bogdanm 92:4fc01daae5a5 218 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
bogdanm 92:4fc01daae5a5 219 * @{
bogdanm 92:4fc01daae5a5 220 */
bogdanm 92:4fc01daae5a5 221
bogdanm 86:04dd9b1680ae 222 /* Peripheral Control functions **********************************************/
bogdanm 86:04dd9b1680ae 223 void HAL_PWR_EnableBkUpAccess(void);
bogdanm 86:04dd9b1680ae 224 void HAL_PWR_DisableBkUpAccess(void);
bogdanm 92:4fc01daae5a5 225
bogdanm 92:4fc01daae5a5 226 /* WakeUp pins configuration functions ****************************************/
bogdanm 86:04dd9b1680ae 227 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
bogdanm 86:04dd9b1680ae 228 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
bogdanm 86:04dd9b1680ae 229
bogdanm 92:4fc01daae5a5 230 /* Low Power modes configuration functions ************************************/
bogdanm 86:04dd9b1680ae 231 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
bogdanm 86:04dd9b1680ae 232 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
bogdanm 86:04dd9b1680ae 233 void HAL_PWR_EnterSTANDBYMode(void);
bogdanm 86:04dd9b1680ae 234
bogdanm 86:04dd9b1680ae 235 /**
bogdanm 86:04dd9b1680ae 236 * @}
bogdanm 86:04dd9b1680ae 237 */
bogdanm 86:04dd9b1680ae 238
bogdanm 86:04dd9b1680ae 239 /**
bogdanm 86:04dd9b1680ae 240 * @}
bogdanm 86:04dd9b1680ae 241 */
bogdanm 86:04dd9b1680ae 242
bogdanm 92:4fc01daae5a5 243 /**
bogdanm 92:4fc01daae5a5 244 * @}
bogdanm 92:4fc01daae5a5 245 */
bogdanm 92:4fc01daae5a5 246
bogdanm 92:4fc01daae5a5 247 /**
bogdanm 92:4fc01daae5a5 248 * @}
bogdanm 92:4fc01daae5a5 249 */
bogdanm 92:4fc01daae5a5 250
bogdanm 86:04dd9b1680ae 251 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 252 }
bogdanm 86:04dd9b1680ae 253 #endif
bogdanm 86:04dd9b1680ae 254
bogdanm 86:04dd9b1680ae 255
bogdanm 86:04dd9b1680ae 256 #endif /* __STM32F3xx_HAL_PWR_H */
bogdanm 86:04dd9b1680ae 257
bogdanm 86:04dd9b1680ae 258 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/