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TARGET_NUCLEO_F302R8/stm32f3xx_hal_sram.h@97:4298809c7c9e, 2015-04-08 (annotated)

Committer:
filartrix
Date:
Wed Apr 08 14:12:53 2015 +0000
Revision:
97:4298809c7c9e
Parent:
90:cb3d968589d8 
First reale BlueNRG module for nucleo 401 board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 90:cb3d968589d8 1 /**
Kojto 90:cb3d968589d8 2 ******************************************************************************
Kojto 90:cb3d968589d8 3 * @file stm32f3xx_hal_sram.h
Kojto 90:cb3d968589d8 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 12-Sept-2014
Kojto 90:cb3d968589d8 7 * @brief Header file of SRAM HAL module.
Kojto 90:cb3d968589d8 8 ******************************************************************************
Kojto 90:cb3d968589d8 9 * @attention
Kojto 90:cb3d968589d8 10 *
Kojto 90:cb3d968589d8 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 90:cb3d968589d8 12 *
Kojto 90:cb3d968589d8 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 14 * are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 90:cb3d968589d8 16 * this list of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 90:cb3d968589d8 18 * this list of conditions and the following disclaimer in the documentation
Kojto 90:cb3d968589d8 19 * and/or other materials provided with the distribution.
Kojto 90:cb3d968589d8 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 90:cb3d968589d8 21 * may be used to endorse or promote products derived from this software
Kojto 90:cb3d968589d8 22 * without specific prior written permission.
Kojto 90:cb3d968589d8 23 *
Kojto 90:cb3d968589d8 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 90:cb3d968589d8 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 90:cb3d968589d8 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 90:cb3d968589d8 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 90:cb3d968589d8 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 90:cb3d968589d8 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 90:cb3d968589d8 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 90:cb3d968589d8 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 90:cb3d968589d8 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 34 *
Kojto 90:cb3d968589d8 35 ******************************************************************************
Kojto 90:cb3d968589d8 36 */
Kojto 90:cb3d968589d8 37
Kojto 90:cb3d968589d8 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 90:cb3d968589d8 39 #ifndef __STM32F3xx_HAL_SRAM_H
Kojto 90:cb3d968589d8 40 #define __STM32F3xx_HAL_SRAM_H
Kojto 90:cb3d968589d8 41
Kojto 90:cb3d968589d8 42 #ifdef __cplusplus
Kojto 90:cb3d968589d8 43 extern "C" {
Kojto 90:cb3d968589d8 44 #endif
Kojto 90:cb3d968589d8 45
Kojto 90:cb3d968589d8 46 /* Includes ------------------------------------------------------------------*/
Kojto 90:cb3d968589d8 47 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
Kojto 90:cb3d968589d8 48 #include "stm32f3xx_ll_fmc.h"
Kojto 90:cb3d968589d8 49 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
Kojto 90:cb3d968589d8 50
Kojto 90:cb3d968589d8 51
Kojto 90:cb3d968589d8 52 /** @addtogroup STM32F3xx_HAL_Driver
Kojto 90:cb3d968589d8 53 * @{
Kojto 90:cb3d968589d8 54 */
Kojto 90:cb3d968589d8 55
Kojto 90:cb3d968589d8 56 /** @addtogroup SRAM
Kojto 90:cb3d968589d8 57 * @{
Kojto 90:cb3d968589d8 58 */
Kojto 90:cb3d968589d8 59
Kojto 90:cb3d968589d8 60 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
Kojto 90:cb3d968589d8 61
Kojto 90:cb3d968589d8 62 /* Exported typedef ----------------------------------------------------------*/
Kojto 90:cb3d968589d8 63
Kojto 90:cb3d968589d8 64 /** @defgroup SRAM_Exported_Types SRAM Exported Types
Kojto 90:cb3d968589d8 65 * @{
Kojto 90:cb3d968589d8 66 */
Kojto 90:cb3d968589d8 67 /**
Kojto 90:cb3d968589d8 68 * @brief HAL SRAM State structures definition
Kojto 90:cb3d968589d8 69 */
Kojto 90:cb3d968589d8 70 typedef enum
Kojto 90:cb3d968589d8 71 {
Kojto 90:cb3d968589d8 72 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
Kojto 90:cb3d968589d8 73 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
Kojto 90:cb3d968589d8 74 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
Kojto 90:cb3d968589d8 75 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
Kojto 90:cb3d968589d8 76 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
Kojto 90:cb3d968589d8 77
Kojto 90:cb3d968589d8 78 }HAL_SRAM_StateTypeDef;
Kojto 90:cb3d968589d8 79
Kojto 90:cb3d968589d8 80 /**
Kojto 90:cb3d968589d8 81 * @brief SRAM handle Structure definition
Kojto 90:cb3d968589d8 82 */
Kojto 90:cb3d968589d8 83 typedef struct
Kojto 90:cb3d968589d8 84 {
Kojto 90:cb3d968589d8 85 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
Kojto 90:cb3d968589d8 86
Kojto 90:cb3d968589d8 87 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
Kojto 90:cb3d968589d8 88
Kojto 90:cb3d968589d8 89 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
Kojto 90:cb3d968589d8 90
Kojto 90:cb3d968589d8 91 HAL_LockTypeDef Lock; /*!< SRAM locking object */
Kojto 90:cb3d968589d8 92
Kojto 90:cb3d968589d8 93 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
Kojto 90:cb3d968589d8 94
Kojto 90:cb3d968589d8 95 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
Kojto 90:cb3d968589d8 96
Kojto 90:cb3d968589d8 97 }SRAM_HandleTypeDef;
Kojto 90:cb3d968589d8 98
Kojto 90:cb3d968589d8 99 /**
Kojto 90:cb3d968589d8 100 * @}
Kojto 90:cb3d968589d8 101 */
Kojto 90:cb3d968589d8 102
Kojto 90:cb3d968589d8 103 /* Exported constants --------------------------------------------------------*/
Kojto 90:cb3d968589d8 104 /* Exported macro ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 105
Kojto 90:cb3d968589d8 106 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
Kojto 90:cb3d968589d8 107 * @{
Kojto 90:cb3d968589d8 108 */
Kojto 90:cb3d968589d8 109
Kojto 90:cb3d968589d8 110 /** @brief Reset SRAM handle state
Kojto 90:cb3d968589d8 111 * @param __HANDLE__: SRAM handle
Kojto 90:cb3d968589d8 112 * @retval None
Kojto 90:cb3d968589d8 113 */
Kojto 90:cb3d968589d8 114 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
Kojto 90:cb3d968589d8 115
Kojto 90:cb3d968589d8 116 /**
Kojto 90:cb3d968589d8 117 * @}
Kojto 90:cb3d968589d8 118 */
Kojto 90:cb3d968589d8 119
Kojto 90:cb3d968589d8 120 /* Exported functions --------------------------------------------------------*/
Kojto 90:cb3d968589d8 121 /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
Kojto 90:cb3d968589d8 122 * @{
Kojto 90:cb3d968589d8 123 */
Kojto 90:cb3d968589d8 124
Kojto 90:cb3d968589d8 125 /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 90:cb3d968589d8 126 * @{
Kojto 90:cb3d968589d8 127 */
Kojto 90:cb3d968589d8 128
Kojto 90:cb3d968589d8 129 /* Initialization/de-initialization functions ********************************/
Kojto 90:cb3d968589d8 130 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
Kojto 90:cb3d968589d8 131 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 132 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 133 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 134
Kojto 90:cb3d968589d8 135 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Kojto 90:cb3d968589d8 136 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 90:cb3d968589d8 137
Kojto 90:cb3d968589d8 138 /**
Kojto 90:cb3d968589d8 139 * @}
Kojto 90:cb3d968589d8 140 */
Kojto 90:cb3d968589d8 141
Kojto 90:cb3d968589d8 142 /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
Kojto 90:cb3d968589d8 143 * @{
Kojto 90:cb3d968589d8 144 */
Kojto 90:cb3d968589d8 145
Kojto 90:cb3d968589d8 146 /* I/O operation functions ***************************************************/
Kojto 90:cb3d968589d8 147 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 148 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 149 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 150 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 151 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 152 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 153 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 154 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 155
Kojto 90:cb3d968589d8 156 /**
Kojto 90:cb3d968589d8 157 * @}
Kojto 90:cb3d968589d8 158 */
Kojto 90:cb3d968589d8 159
Kojto 90:cb3d968589d8 160 /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
Kojto 90:cb3d968589d8 161 * @{
Kojto 90:cb3d968589d8 162 */
Kojto 90:cb3d968589d8 163
Kojto 90:cb3d968589d8 164 /* SRAM Control functions ****************************************************/
Kojto 90:cb3d968589d8 165 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 166 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 167
Kojto 90:cb3d968589d8 168 /**
Kojto 90:cb3d968589d8 169 * @}
Kojto 90:cb3d968589d8 170 */
Kojto 90:cb3d968589d8 171
Kojto 90:cb3d968589d8 172 /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
Kojto 90:cb3d968589d8 173 * @{
Kojto 90:cb3d968589d8 174 */
Kojto 90:cb3d968589d8 175
Kojto 90:cb3d968589d8 176 /* SRAM Peripheral State functions ********************************************/
Kojto 90:cb3d968589d8 177 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 178
Kojto 90:cb3d968589d8 179 /**
Kojto 90:cb3d968589d8 180 * @}
Kojto 90:cb3d968589d8 181 */
Kojto 90:cb3d968589d8 182
Kojto 90:cb3d968589d8 183 /**
Kojto 90:cb3d968589d8 184 * @}
Kojto 90:cb3d968589d8 185 */
Kojto 90:cb3d968589d8 186
Kojto 90:cb3d968589d8 187 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
Kojto 90:cb3d968589d8 188 /**
Kojto 90:cb3d968589d8 189 * @}
Kojto 90:cb3d968589d8 190 */
Kojto 90:cb3d968589d8 191
Kojto 90:cb3d968589d8 192 /**
Kojto 90:cb3d968589d8 193 * @}
Kojto 90:cb3d968589d8 194 */
Kojto 90:cb3d968589d8 195
Kojto 90:cb3d968589d8 196 #ifdef __cplusplus
Kojto 90:cb3d968589d8 197 }
Kojto 90:cb3d968589d8 198 #endif
Kojto 90:cb3d968589d8 199
Kojto 90:cb3d968589d8 200 #endif /* __STM32F3xx_HAL_SRAM_H */
Kojto 90:cb3d968589d8 201
Kojto 90:cb3d968589d8 202 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/