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TARGET_NUCLEO_F091RC/stm32f0xx_hal_pwr_ex.h@97:4298809c7c9e, 2015-04-08 (annotated)

Committer:
filartrix
Date:
Wed Apr 08 14:12:53 2015 +0000
Revision:
97:4298809c7c9e
Parent:
93:e188a91d3eaa 
First reale BlueNRG module for nucleo 401 board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 90:cb3d968589d8 1 /**
Kojto 90:cb3d968589d8 2 ******************************************************************************
Kojto 90:cb3d968589d8 3 * @file stm32f0xx_hal_pwr_ex.h
Kojto 90:cb3d968589d8 4 * @author MCD Application Team
Kojto 93:e188a91d3eaa 5 * @version V1.2.0
Kojto 93:e188a91d3eaa 6 * @date 11-December-2014
Kojto 90:cb3d968589d8 7 * @brief Header file of PWR HAL Extension module.
Kojto 90:cb3d968589d8 8 ******************************************************************************
Kojto 90:cb3d968589d8 9 * @attention
Kojto 90:cb3d968589d8 10 *
Kojto 90:cb3d968589d8 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 90:cb3d968589d8 12 *
Kojto 90:cb3d968589d8 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 14 * are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 90:cb3d968589d8 16 * this list of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 90:cb3d968589d8 18 * this list of conditions and the following disclaimer in the documentation
Kojto 90:cb3d968589d8 19 * and/or other materials provided with the distribution.
Kojto 90:cb3d968589d8 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 90:cb3d968589d8 21 * may be used to endorse or promote products derived from this software
Kojto 90:cb3d968589d8 22 * without specific prior written permission.
Kojto 90:cb3d968589d8 23 *
Kojto 90:cb3d968589d8 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 90:cb3d968589d8 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 90:cb3d968589d8 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 90:cb3d968589d8 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 90:cb3d968589d8 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 90:cb3d968589d8 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 90:cb3d968589d8 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 90:cb3d968589d8 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 90:cb3d968589d8 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 34 *
Kojto 90:cb3d968589d8 35 ******************************************************************************
Kojto 90:cb3d968589d8 36 */
Kojto 90:cb3d968589d8 37
Kojto 90:cb3d968589d8 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 90:cb3d968589d8 39 #ifndef __STM32F0xx_HAL_PWR_EX_H
Kojto 90:cb3d968589d8 40 #define __STM32F0xx_HAL_PWR_EX_H
Kojto 90:cb3d968589d8 41
Kojto 90:cb3d968589d8 42 #ifdef __cplusplus
Kojto 90:cb3d968589d8 43 extern "C" {
Kojto 90:cb3d968589d8 44 #endif
Kojto 90:cb3d968589d8 45
Kojto 90:cb3d968589d8 46 /* Includes ------------------------------------------------------------------*/
Kojto 90:cb3d968589d8 47 #include "stm32f0xx_hal_def.h"
Kojto 90:cb3d968589d8 48
Kojto 90:cb3d968589d8 49 /** @addtogroup STM32F0xx_HAL_Driver
Kojto 90:cb3d968589d8 50 * @{
Kojto 90:cb3d968589d8 51 */
Kojto 90:cb3d968589d8 52
Kojto 90:cb3d968589d8 53 /** @addtogroup PWREx
Kojto 90:cb3d968589d8 54 * @{
Kojto 90:cb3d968589d8 55 */
Kojto 90:cb3d968589d8 56
Kojto 90:cb3d968589d8 57 /* Exported types ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 58
Kojto 90:cb3d968589d8 59 /** @defgroup PWREx_Exported_Types PWREx Exported Types
Kojto 90:cb3d968589d8 60 * @{
Kojto 90:cb3d968589d8 61 */
Kojto 90:cb3d968589d8 62
Kojto 90:cb3d968589d8 63 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
Kojto 90:cb3d968589d8 64 defined (STM32F071xB) || defined (STM32F072xB) || \
Kojto 90:cb3d968589d8 65 defined (STM32F091xC)
Kojto 90:cb3d968589d8 66
Kojto 90:cb3d968589d8 67 /**
Kojto 90:cb3d968589d8 68 * @brief PWR PVD configuration structure definition
Kojto 90:cb3d968589d8 69 */
Kojto 90:cb3d968589d8 70 typedef struct
Kojto 90:cb3d968589d8 71 {
Kojto 90:cb3d968589d8 72 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level
Kojto 90:cb3d968589d8 73 This parameter can be a value of @ref PWREx_PVD_detection_level */
Kojto 90:cb3d968589d8 74
Kojto 90:cb3d968589d8 75 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
Kojto 90:cb3d968589d8 76 This parameter can be a value of @ref PWREx_PVD_Mode */
Kojto 90:cb3d968589d8 77 }PWR_PVDTypeDef;
Kojto 90:cb3d968589d8 78
Kojto 90:cb3d968589d8 79 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
Kojto 90:cb3d968589d8 80 /* defined (STM32F071xB) || defined (STM32F072xB) || */
Kojto 90:cb3d968589d8 81 /* defined (STM32F091xC) */
Kojto 90:cb3d968589d8 82 /**
Kojto 90:cb3d968589d8 83 * @}
Kojto 90:cb3d968589d8 84 */
Kojto 90:cb3d968589d8 85 /* Exported constants --------------------------------------------------------*/
Kojto 90:cb3d968589d8 86
Kojto 90:cb3d968589d8 87 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
Kojto 90:cb3d968589d8 88 * @{
Kojto 90:cb3d968589d8 89 */
Kojto 90:cb3d968589d8 90
Kojto 90:cb3d968589d8 91
Kojto 90:cb3d968589d8 92 /** @defgroup PWREx_WakeUp_Pins PWREx Wakeup Pins
Kojto 90:cb3d968589d8 93 * @{
Kojto 90:cb3d968589d8 94 */
Kojto 93:e188a91d3eaa 95 #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
Kojto 93:e188a91d3eaa 96 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
Kojto 90:cb3d968589d8 97 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
Kojto 90:cb3d968589d8 98 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
Kojto 90:cb3d968589d8 99 #define PWR_WAKEUP_PIN3 ((uint32_t)0x02)
Kojto 90:cb3d968589d8 100 #define PWR_WAKEUP_PIN4 ((uint32_t)0x03)
Kojto 90:cb3d968589d8 101 #define PWR_WAKEUP_PIN5 ((uint32_t)0x04)
Kojto 90:cb3d968589d8 102 #define PWR_WAKEUP_PIN6 ((uint32_t)0x05)
Kojto 90:cb3d968589d8 103 #define PWR_WAKEUP_PIN7 ((uint32_t)0x06)
Kojto 90:cb3d968589d8 104 #define PWR_WAKEUP_PIN8 ((uint32_t)0x07)
Kojto 90:cb3d968589d8 105
Kojto 90:cb3d968589d8 106 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
Kojto 90:cb3d968589d8 107 ((PIN) == PWR_WAKEUP_PIN2) || \
Kojto 90:cb3d968589d8 108 ((PIN) == PWR_WAKEUP_PIN3) || \
Kojto 90:cb3d968589d8 109 ((PIN) == PWR_WAKEUP_PIN4) || \
Kojto 90:cb3d968589d8 110 ((PIN) == PWR_WAKEUP_PIN5) || \
Kojto 90:cb3d968589d8 111 ((PIN) == PWR_WAKEUP_PIN6) || \
Kojto 90:cb3d968589d8 112 ((PIN) == PWR_WAKEUP_PIN7) || \
Kojto 90:cb3d968589d8 113 ((PIN) == PWR_WAKEUP_PIN8))
Kojto 90:cb3d968589d8 114 #else
Kojto 90:cb3d968589d8 115 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
Kojto 90:cb3d968589d8 116 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
Kojto 90:cb3d968589d8 117
Kojto 90:cb3d968589d8 118 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
Kojto 90:cb3d968589d8 119 ((PIN) == PWR_WAKEUP_PIN2))
Kojto 93:e188a91d3eaa 120 #endif /* defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || */
Kojto 93:e188a91d3eaa 121 /* defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
Kojto 90:cb3d968589d8 122 /**
Kojto 90:cb3d968589d8 123 * @}
Kojto 90:cb3d968589d8 124 */
Kojto 90:cb3d968589d8 125
Kojto 90:cb3d968589d8 126 /** @defgroup PWREx_EXTI_Line PWREx EXTI Line
Kojto 90:cb3d968589d8 127 * @{
Kojto 90:cb3d968589d8 128 */
Kojto 90:cb3d968589d8 129 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
Kojto 90:cb3d968589d8 130 defined (STM32F071xB) || defined (STM32F072xB) || \
Kojto 90:cb3d968589d8 131 defined (STM32F091xC)
Kojto 90:cb3d968589d8 132
Kojto 90:cb3d968589d8 133 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
Kojto 90:cb3d968589d8 134
Kojto 90:cb3d968589d8 135 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
Kojto 90:cb3d968589d8 136 /* defined (STM32F071xB) || defined (STM32F072xB) || */
Kojto 90:cb3d968589d8 137 /* defined (STM32F091xC) */
Kojto 90:cb3d968589d8 138
Kojto 90:cb3d968589d8 139 #if defined (STM32F042x6) || defined (STM32F048xx) || \
Kojto 90:cb3d968589d8 140 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
Kojto 90:cb3d968589d8 141 defined (STM32F091xC) || defined (STM32F098xx)
Kojto 90:cb3d968589d8 142
Kojto 90:cb3d968589d8 143 #define PWR_EXTI_LINE_VDDIO2 ((uint32_t)0x80000000) /*!< External interrupt line 31 Connected to the Vddio2 Monitor EXTI Line */
Kojto 90:cb3d968589d8 144
Kojto 93:e188a91d3eaa 145 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
Kojto 90:cb3d968589d8 146 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
Kojto 93:e188a91d3eaa 147 defined (STM32F091xC) || defined (STM32F098xx) ||*/
Kojto 90:cb3d968589d8 148 /**
Kojto 90:cb3d968589d8 149 * @}
Kojto 90:cb3d968589d8 150 */
Kojto 90:cb3d968589d8 151
Kojto 90:cb3d968589d8 152 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
Kojto 90:cb3d968589d8 153 defined (STM32F071xB) || defined (STM32F072xB) || \
Kojto 90:cb3d968589d8 154 defined (STM32F091xC)
Kojto 90:cb3d968589d8 155 /** @defgroup PWREx_PVD_detection_level PWREx PVD detection level
Kojto 90:cb3d968589d8 156 * @{
Kojto 90:cb3d968589d8 157 */
Kojto 90:cb3d968589d8 158 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
Kojto 90:cb3d968589d8 159 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
Kojto 90:cb3d968589d8 160 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
Kojto 90:cb3d968589d8 161 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
Kojto 90:cb3d968589d8 162 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
Kojto 90:cb3d968589d8 163 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
Kojto 90:cb3d968589d8 164 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
Kojto 90:cb3d968589d8 165 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
Kojto 90:cb3d968589d8 166 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
Kojto 90:cb3d968589d8 167 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
Kojto 90:cb3d968589d8 168 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
Kojto 90:cb3d968589d8 169 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
Kojto 90:cb3d968589d8 170 /**
Kojto 90:cb3d968589d8 171 * @}
Kojto 90:cb3d968589d8 172 */
Kojto 90:cb3d968589d8 173
Kojto 90:cb3d968589d8 174 /** @defgroup PWREx_PVD_Mode PWREx PVD Mode
Kojto 90:cb3d968589d8 175 * @{
Kojto 90:cb3d968589d8 176 */
Kojto 90:cb3d968589d8 177 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
Kojto 90:cb3d968589d8 178 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
Kojto 90:cb3d968589d8 179 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
Kojto 90:cb3d968589d8 180 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
Kojto 90:cb3d968589d8 181 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
Kojto 90:cb3d968589d8 182 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
Kojto 90:cb3d968589d8 183 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
Kojto 90:cb3d968589d8 184
Kojto 90:cb3d968589d8 185 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
Kojto 90:cb3d968589d8 186 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
Kojto 90:cb3d968589d8 187 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
Kojto 90:cb3d968589d8 188 ((MODE) == PWR_PVD_MODE_NORMAL))
Kojto 90:cb3d968589d8 189 /**
Kojto 90:cb3d968589d8 190 * @}
Kojto 90:cb3d968589d8 191 */
Kojto 90:cb3d968589d8 192 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
Kojto 90:cb3d968589d8 193 /* defined (STM32F071xB) || defined (STM32F072xB) || */
Kojto 90:cb3d968589d8 194 /* defined (STM32F091xC) */
Kojto 90:cb3d968589d8 195
Kojto 90:cb3d968589d8 196 /** @defgroup PWREx_Flag PWREx Flag
Kojto 90:cb3d968589d8 197 * @{
Kojto 90:cb3d968589d8 198 */
Kojto 90:cb3d968589d8 199 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
Kojto 90:cb3d968589d8 200 defined (STM32F071xB) || defined (STM32F072xB) || \
Kojto 90:cb3d968589d8 201 defined (STM32F091xC)
Kojto 90:cb3d968589d8 202
Kojto 90:cb3d968589d8 203 #define PWR_FLAG_WU PWR_CSR_WUF
Kojto 90:cb3d968589d8 204 #define PWR_FLAG_SB PWR_CSR_SBF
Kojto 90:cb3d968589d8 205 #define PWR_FLAG_PVDO PWR_CSR_PVDO
Kojto 90:cb3d968589d8 206 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
Kojto 93:e188a91d3eaa 207 #elif defined (STM32F070x6) || defined (STM32F070xB) || defined (STM32F030xC)
Kojto 93:e188a91d3eaa 208 #define PWR_FLAG_WU PWR_CSR_WUF
Kojto 93:e188a91d3eaa 209 #define PWR_FLAG_SB PWR_CSR_SBF
Kojto 93:e188a91d3eaa 210 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
Kojto 90:cb3d968589d8 211 #else
Kojto 90:cb3d968589d8 212 #define PWR_FLAG_WU PWR_CSR_WUF
Kojto 90:cb3d968589d8 213 #define PWR_FLAG_SB PWR_CSR_SBF
Kojto 90:cb3d968589d8 214
Kojto 90:cb3d968589d8 215 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
Kojto 90:cb3d968589d8 216 /* defined (STM32F071xB) || defined (STM32F072xB) || */
Kojto 90:cb3d968589d8 217 /* defined (STM32F091xC) */
Kojto 90:cb3d968589d8 218 /**
Kojto 90:cb3d968589d8 219 * @}
Kojto 90:cb3d968589d8 220 */
Kojto 90:cb3d968589d8 221
Kojto 90:cb3d968589d8 222 /**
Kojto 90:cb3d968589d8 223 * @}
Kojto 90:cb3d968589d8 224 */
Kojto 90:cb3d968589d8 225
Kojto 90:cb3d968589d8 226 /* Exported macro ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 227 /** @defgroup PWREx_Exported_Macros PWREx Exported Macros
Kojto 90:cb3d968589d8 228 * @{
Kojto 90:cb3d968589d8 229 */
Kojto 90:cb3d968589d8 230 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
Kojto 90:cb3d968589d8 231 defined (STM32F071xB) || defined (STM32F072xB) || \
Kojto 90:cb3d968589d8 232 defined (STM32F091xC)
Kojto 90:cb3d968589d8 233 /**
Kojto 90:cb3d968589d8 234 * @brief Enable interrupt on PVD Exti Line 16.
Kojto 90:cb3d968589d8 235 * @retval None.
Kojto 90:cb3d968589d8 236 */
Kojto 90:cb3d968589d8 237 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
Kojto 90:cb3d968589d8 238
Kojto 90:cb3d968589d8 239 /**
Kojto 90:cb3d968589d8 240 * @brief Disable interrupt on PVD Exti Line 16.
Kojto 90:cb3d968589d8 241 * @retval None.
Kojto 90:cb3d968589d8 242 */
Kojto 90:cb3d968589d8 243 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
Kojto 90:cb3d968589d8 244
Kojto 90:cb3d968589d8 245 /**
Kojto 90:cb3d968589d8 246 * @brief Enable event on PVD Exti Line 16.
Kojto 90:cb3d968589d8 247 * @retval None.
Kojto 90:cb3d968589d8 248 */
Kojto 90:cb3d968589d8 249 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
Kojto 90:cb3d968589d8 250
Kojto 90:cb3d968589d8 251 /**
Kojto 90:cb3d968589d8 252 * @brief Disable event on PVD Exti Line 16.
Kojto 90:cb3d968589d8 253 * @retval None.
Kojto 90:cb3d968589d8 254 */
Kojto 90:cb3d968589d8 255 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
Kojto 90:cb3d968589d8 256
Kojto 90:cb3d968589d8 257 /**
Kojto 90:cb3d968589d8 258 * @brief PVD EXTI line configuration: clear falling edge and rising edge trigger.
Kojto 90:cb3d968589d8 259 * @retval None.
Kojto 90:cb3d968589d8 260 */
Kojto 90:cb3d968589d8 261 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_PVD); \
Kojto 90:cb3d968589d8 262 EXTI->RTSR &= ~(PWR_EXTI_LINE_PVD)
Kojto 90:cb3d968589d8 263
Kojto 90:cb3d968589d8 264 /**
Kojto 90:cb3d968589d8 265 * @brief PVD EXTI line configuration: set falling edge trigger.
Kojto 90:cb3d968589d8 266 * @retval None.
Kojto 90:cb3d968589d8 267 */
Kojto 90:cb3d968589d8 268 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_PVD)
Kojto 90:cb3d968589d8 269
Kojto 90:cb3d968589d8 270 /**
Kojto 90:cb3d968589d8 271 * @brief PVD EXTI line configuration: set rising edge trigger.
Kojto 90:cb3d968589d8 272 * @retval None.
Kojto 90:cb3d968589d8 273 */
Kojto 90:cb3d968589d8 274 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->RTSR |= (PWR_EXTI_LINE_PVD)
Kojto 90:cb3d968589d8 275
Kojto 90:cb3d968589d8 276 /**
Kojto 90:cb3d968589d8 277 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
Kojto 90:cb3d968589d8 278 * @retval EXTI PVD Line Status.
Kojto 90:cb3d968589d8 279 */
Kojto 90:cb3d968589d8 280 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
Kojto 90:cb3d968589d8 281
Kojto 90:cb3d968589d8 282 /**
Kojto 90:cb3d968589d8 283 * @brief Clear the PVD EXTI flag.
Kojto 90:cb3d968589d8 284 * @retval None.
Kojto 90:cb3d968589d8 285 */
Kojto 90:cb3d968589d8 286 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
Kojto 90:cb3d968589d8 287
Kojto 90:cb3d968589d8 288 /**
Kojto 90:cb3d968589d8 289 * @brief Generate a Software interrupt on selected EXTI line.
Kojto 90:cb3d968589d8 290 * @retval None.
Kojto 90:cb3d968589d8 291 */
Kojto 90:cb3d968589d8 292 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
Kojto 90:cb3d968589d8 293
Kojto 90:cb3d968589d8 294 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
Kojto 90:cb3d968589d8 295 /* defined (STM32F071xB) || defined (STM32F072xB) || */
Kojto 90:cb3d968589d8 296 /* defined (STM32F091xC) */
Kojto 90:cb3d968589d8 297
Kojto 90:cb3d968589d8 298
Kojto 90:cb3d968589d8 299 #if defined (STM32F042x6) || defined (STM32F048xx) || \
Kojto 90:cb3d968589d8 300 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
Kojto 90:cb3d968589d8 301 defined (STM32F091xC) || defined (STM32F098xx)
Kojto 90:cb3d968589d8 302 /**
Kojto 90:cb3d968589d8 303 * @brief Enable interrupt on Vddio2 Monitor Exti Line 31.
Kojto 90:cb3d968589d8 304 * @retval None.
Kojto 90:cb3d968589d8 305 */
Kojto 90:cb3d968589d8 306 #define __HAL_PWR_VDDIO2_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_VDDIO2))
Kojto 90:cb3d968589d8 307
Kojto 90:cb3d968589d8 308 /**
Kojto 90:cb3d968589d8 309 * @brief Disable interrupt on Vddio2 Monitor Exti Line 31.
Kojto 90:cb3d968589d8 310 * @retval None.
Kojto 90:cb3d968589d8 311 */
Kojto 90:cb3d968589d8 312 #define __HAL_PWR_VDDIO2_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_VDDIO2))
Kojto 90:cb3d968589d8 313
Kojto 90:cb3d968589d8 314 /**
Kojto 90:cb3d968589d8 315 * @brief Vddio2 Monitor EXTI line configuration: clear falling edge and rising edge trigger.
Kojto 90:cb3d968589d8 316 * @retval None.
Kojto 90:cb3d968589d8 317 */
Kojto 90:cb3d968589d8 318 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2); \
Kojto 90:cb3d968589d8 319 EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2)
Kojto 90:cb3d968589d8 320
Kojto 90:cb3d968589d8 321 /**
Kojto 90:cb3d968589d8 322 * @brief Vddio2 Monitor EXTI line configuration: set falling edge trigger.
Kojto 90:cb3d968589d8 323 * @retval None.
Kojto 90:cb3d968589d8 324 */
Kojto 90:cb3d968589d8 325 #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_VDDIO2)
Kojto 90:cb3d968589d8 326
Kojto 90:cb3d968589d8 327 /**
Kojto 90:cb3d968589d8 328 * @brief Check whether the specified VDDIO2 monitor EXTI interrupt flag is set or not.
Kojto 90:cb3d968589d8 329 * @retval EXTI VDDIO2 Monitor Line Status.
Kojto 90:cb3d968589d8 330 */
Kojto 90:cb3d968589d8 331 #define __HAL_PWR_VDDIO2_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_VDDIO2))
Kojto 90:cb3d968589d8 332
Kojto 90:cb3d968589d8 333 /**
Kojto 90:cb3d968589d8 334 * @brief Clear the VDDIO2 Monitor EXTI flag.
Kojto 90:cb3d968589d8 335 * @retval None.
Kojto 90:cb3d968589d8 336 */
Kojto 90:cb3d968589d8 337 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_VDDIO2))
Kojto 90:cb3d968589d8 338
Kojto 90:cb3d968589d8 339 /**
Kojto 90:cb3d968589d8 340 * @brief Generate a Software interrupt on selected EXTI line.
Kojto 90:cb3d968589d8 341 * @retval None.
Kojto 90:cb3d968589d8 342 */
Kojto 90:cb3d968589d8 343 #define __HAL_PWR_VDDIO2_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_VDDIO2))
Kojto 90:cb3d968589d8 344
Kojto 90:cb3d968589d8 345
Kojto 93:e188a91d3eaa 346 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
Kojto 90:cb3d968589d8 347 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
Kojto 90:cb3d968589d8 348 defined (STM32F091xC) || defined (STM32F098xx) */
Kojto 90:cb3d968589d8 349
Kojto 90:cb3d968589d8 350 /**
Kojto 90:cb3d968589d8 351 * @}
Kojto 90:cb3d968589d8 352 */
Kojto 90:cb3d968589d8 353
Kojto 90:cb3d968589d8 354 /* Exported functions --------------------------------------------------------*/
Kojto 90:cb3d968589d8 355
Kojto 90:cb3d968589d8 356 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
Kojto 90:cb3d968589d8 357 * @{
Kojto 90:cb3d968589d8 358 */
Kojto 90:cb3d968589d8 359
Kojto 90:cb3d968589d8 360 /** @addtogroup PWREx_Exported_Functions_Group1
Kojto 90:cb3d968589d8 361 * @{
Kojto 90:cb3d968589d8 362 */
Kojto 90:cb3d968589d8 363 /* I/O operation functions ***************************************************/
Kojto 90:cb3d968589d8 364 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
Kojto 90:cb3d968589d8 365 defined (STM32F071xB) || defined (STM32F072xB) || \
Kojto 90:cb3d968589d8 366 defined (STM32F091xC)
Kojto 90:cb3d968589d8 367 void HAL_PWR_PVD_IRQHandler(void);
Kojto 90:cb3d968589d8 368 void HAL_PWR_PVDCallback(void);
Kojto 90:cb3d968589d8 369 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
Kojto 90:cb3d968589d8 370 /* defined (STM32F071xB) || defined (STM32F072xB) || */
Kojto 90:cb3d968589d8 371 /* defined (STM32F091xC) */
Kojto 90:cb3d968589d8 372
Kojto 90:cb3d968589d8 373 #if defined (STM32F042x6) || defined (STM32F048xx) || \
Kojto 90:cb3d968589d8 374 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
Kojto 90:cb3d968589d8 375 defined (STM32F091xC) || defined (STM32F098xx)
Kojto 90:cb3d968589d8 376 void HAL_PWR_Vddio2Monitor_IRQHandler(void);
Kojto 90:cb3d968589d8 377 void HAL_PWR_Vddio2MonitorCallback(void);
Kojto 90:cb3d968589d8 378 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
Kojto 90:cb3d968589d8 379 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
Kojto 90:cb3d968589d8 380 defined (STM32F091xC) || defined (STM32F098xx) */
Kojto 90:cb3d968589d8 381
Kojto 90:cb3d968589d8 382 /* Peripheral Control functions **********************************************/
Kojto 90:cb3d968589d8 383 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
Kojto 90:cb3d968589d8 384 defined (STM32F071xB) || defined (STM32F072xB) || \
Kojto 90:cb3d968589d8 385 defined (STM32F091xC)
Kojto 90:cb3d968589d8 386 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
Kojto 90:cb3d968589d8 387 void HAL_PWR_EnablePVD(void);
Kojto 90:cb3d968589d8 388 void HAL_PWR_DisablePVD(void);
Kojto 90:cb3d968589d8 389 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
Kojto 90:cb3d968589d8 390 /* defined (STM32F071xB) || defined (STM32F072xB) || */
Kojto 90:cb3d968589d8 391 /* defined (STM32F091xC) */
Kojto 90:cb3d968589d8 392
Kojto 90:cb3d968589d8 393 #if defined (STM32F042x6) || defined (STM32F048xx) || \
Kojto 90:cb3d968589d8 394 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
Kojto 90:cb3d968589d8 395 defined (STM32F091xC) || defined (STM32F098xx)
Kojto 90:cb3d968589d8 396 void HAL_PWR_EnableVddio2Monitor(void);
Kojto 90:cb3d968589d8 397 void HAL_PWR_DisableVddio2Monitor(void);
Kojto 90:cb3d968589d8 398 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
Kojto 90:cb3d968589d8 399 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
Kojto 90:cb3d968589d8 400 defined (STM32F091xC) || defined (STM32F098xx) */
Kojto 90:cb3d968589d8 401
Kojto 90:cb3d968589d8 402 /**
Kojto 90:cb3d968589d8 403 * @}
Kojto 90:cb3d968589d8 404 */
Kojto 90:cb3d968589d8 405
Kojto 90:cb3d968589d8 406 /**
Kojto 90:cb3d968589d8 407 * @}
Kojto 90:cb3d968589d8 408 */
Kojto 90:cb3d968589d8 409
Kojto 90:cb3d968589d8 410 /**
Kojto 90:cb3d968589d8 411 * @}
Kojto 90:cb3d968589d8 412 */
Kojto 90:cb3d968589d8 413
Kojto 90:cb3d968589d8 414 /**
Kojto 90:cb3d968589d8 415 * @}
Kojto 90:cb3d968589d8 416 */
Kojto 90:cb3d968589d8 417
Kojto 90:cb3d968589d8 418 #ifdef __cplusplus
Kojto 90:cb3d968589d8 419 }
Kojto 90:cb3d968589d8 420 #endif
Kojto 90:cb3d968589d8 421
Kojto 90:cb3d968589d8 422 #endif /* __STM32F0xx_HAL_PWR_EX_H */
Kojto 90:cb3d968589d8 423
Kojto 90:cb3d968589d8 424 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Kojto 90:cb3d968589d8 425