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TARGET_NUCLEO_F030R8/stm32f0xx_hal_smbus.h@97:4298809c7c9e, 2015-04-08 (annotated)
- Committer:
- filartrix
- Date:
- Wed Apr 08 14:12:53 2015 +0000
- Revision:
- 97:4298809c7c9e
- Parent:
- 93:e188a91d3eaa
First reale BlueNRG module for nucleo 401 board
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 90:cb3d968589d8 | 1 | /** |
| Kojto | 90:cb3d968589d8 | 2 | ****************************************************************************** |
| Kojto | 90:cb3d968589d8 | 3 | * @file stm32f0xx_hal_smbus.h |
| Kojto | 90:cb3d968589d8 | 4 | * @author MCD Application Team |
| Kojto | 93:e188a91d3eaa | 5 | * @version V1.2.0 |
| Kojto | 93:e188a91d3eaa | 6 | * @date 11-December-2014 |
| Kojto | 90:cb3d968589d8 | 7 | * @brief Header file of SMBUS HAL module. |
| Kojto | 90:cb3d968589d8 | 8 | ****************************************************************************** |
| Kojto | 90:cb3d968589d8 | 9 | * @attention |
| Kojto | 90:cb3d968589d8 | 10 | * |
| Kojto | 90:cb3d968589d8 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| Kojto | 90:cb3d968589d8 | 12 | * |
| Kojto | 90:cb3d968589d8 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| Kojto | 90:cb3d968589d8 | 14 | * are permitted provided that the following conditions are met: |
| Kojto | 90:cb3d968589d8 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| Kojto | 90:cb3d968589d8 | 16 | * this list of conditions and the following disclaimer. |
| Kojto | 90:cb3d968589d8 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Kojto | 90:cb3d968589d8 | 18 | * this list of conditions and the following disclaimer in the documentation |
| Kojto | 90:cb3d968589d8 | 19 | * and/or other materials provided with the distribution. |
| Kojto | 90:cb3d968589d8 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Kojto | 90:cb3d968589d8 | 21 | * may be used to endorse or promote products derived from this software |
| Kojto | 90:cb3d968589d8 | 22 | * without specific prior written permission. |
| Kojto | 90:cb3d968589d8 | 23 | * |
| Kojto | 90:cb3d968589d8 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Kojto | 90:cb3d968589d8 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Kojto | 90:cb3d968589d8 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Kojto | 90:cb3d968589d8 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Kojto | 90:cb3d968589d8 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Kojto | 90:cb3d968589d8 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Kojto | 90:cb3d968589d8 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Kojto | 90:cb3d968589d8 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Kojto | 90:cb3d968589d8 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Kojto | 90:cb3d968589d8 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Kojto | 90:cb3d968589d8 | 34 | * |
| Kojto | 90:cb3d968589d8 | 35 | ****************************************************************************** |
| Kojto | 90:cb3d968589d8 | 36 | */ |
| Kojto | 90:cb3d968589d8 | 37 | |
| Kojto | 90:cb3d968589d8 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Kojto | 90:cb3d968589d8 | 39 | #ifndef __STM32F0xx_HAL_SMBUS_H |
| Kojto | 90:cb3d968589d8 | 40 | #define __STM32F0xx_HAL_SMBUS_H |
| Kojto | 90:cb3d968589d8 | 41 | |
| Kojto | 90:cb3d968589d8 | 42 | #ifdef __cplusplus |
| Kojto | 90:cb3d968589d8 | 43 | extern "C" { |
| Kojto | 90:cb3d968589d8 | 44 | #endif |
| Kojto | 90:cb3d968589d8 | 45 | |
| Kojto | 90:cb3d968589d8 | 46 | /* Includes ------------------------------------------------------------------*/ |
| Kojto | 90:cb3d968589d8 | 47 | #include "stm32f0xx_hal_def.h" |
| Kojto | 90:cb3d968589d8 | 48 | |
| Kojto | 90:cb3d968589d8 | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
| Kojto | 90:cb3d968589d8 | 50 | * @{ |
| Kojto | 90:cb3d968589d8 | 51 | */ |
| Kojto | 90:cb3d968589d8 | 52 | |
| Kojto | 90:cb3d968589d8 | 53 | /** @addtogroup SMBUS |
| Kojto | 90:cb3d968589d8 | 54 | * @{ |
| Kojto | 90:cb3d968589d8 | 55 | */ |
| Kojto | 90:cb3d968589d8 | 56 | |
| Kojto | 90:cb3d968589d8 | 57 | /* Exported types ------------------------------------------------------------*/ |
| Kojto | 90:cb3d968589d8 | 58 | /** @defgroup SMBUS_Exported_Types SMBUS Exported Types |
| Kojto | 90:cb3d968589d8 | 59 | * @{ |
| Kojto | 90:cb3d968589d8 | 60 | */ |
| Kojto | 90:cb3d968589d8 | 61 | |
| Kojto | 90:cb3d968589d8 | 62 | /** |
| Kojto | 90:cb3d968589d8 | 63 | * @brief SMBUS Configuration Structure definition |
| Kojto | 90:cb3d968589d8 | 64 | */ |
| Kojto | 90:cb3d968589d8 | 65 | typedef struct |
| Kojto | 90:cb3d968589d8 | 66 | { |
| Kojto | 90:cb3d968589d8 | 67 | uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value. |
| Kojto | 90:cb3d968589d8 | 68 | This parameter calculated by referring to SMBUS initialization |
| Kojto | 90:cb3d968589d8 | 69 | section in Reference manual */ |
| Kojto | 90:cb3d968589d8 | 70 | uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not. |
| Kojto | 90:cb3d968589d8 | 71 | This parameter can be a a value of @ref SMBUS_Analog_Filter */ |
| Kojto | 90:cb3d968589d8 | 72 | |
| Kojto | 90:cb3d968589d8 | 73 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
| Kojto | 90:cb3d968589d8 | 74 | This parameter can be a 7-bit or 10-bit address. */ |
| Kojto | 90:cb3d968589d8 | 75 | |
| Kojto | 90:cb3d968589d8 | 76 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected. |
| Kojto | 90:cb3d968589d8 | 77 | This parameter can be a value of @ref SMBUS_addressing_mode */ |
| Kojto | 90:cb3d968589d8 | 78 | |
| Kojto | 90:cb3d968589d8 | 79 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
| Kojto | 90:cb3d968589d8 | 80 | This parameter can be a value of @ref SMBUS_dual_addressing_mode */ |
| Kojto | 90:cb3d968589d8 | 81 | |
| Kojto | 90:cb3d968589d8 | 82 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
| Kojto | 90:cb3d968589d8 | 83 | This parameter can be a 7-bit address. */ |
| Kojto | 90:cb3d968589d8 | 84 | |
| Kojto | 90:cb3d968589d8 | 85 | uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected |
| Kojto | 90:cb3d968589d8 | 86 | This parameter can be a value of @ref SMBUS_own_address2_masks. */ |
| Kojto | 90:cb3d968589d8 | 87 | |
| Kojto | 90:cb3d968589d8 | 88 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
| Kojto | 90:cb3d968589d8 | 89 | This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */ |
| Kojto | 90:cb3d968589d8 | 90 | |
| Kojto | 90:cb3d968589d8 | 91 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
| Kojto | 90:cb3d968589d8 | 92 | This parameter can be a value of @ref SMBUS_nostretch_mode */ |
| Kojto | 90:cb3d968589d8 | 93 | |
| Kojto | 90:cb3d968589d8 | 94 | uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected. |
| Kojto | 90:cb3d968589d8 | 95 | This parameter can be a value of @ref SMBUS_packet_error_check_mode */ |
| Kojto | 90:cb3d968589d8 | 96 | |
| Kojto | 90:cb3d968589d8 | 97 | uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected. |
| Kojto | 90:cb3d968589d8 | 98 | This parameter can be a value of @ref SMBUS_peripheral_mode */ |
| Kojto | 90:cb3d968589d8 | 99 | |
| Kojto | 90:cb3d968589d8 | 100 | uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value. |
| Kojto | 90:cb3d968589d8 | 101 | (Enable bits and different timeout values) |
| Kojto | 90:cb3d968589d8 | 102 | This parameter calculated by referring to SMBUS initialization |
| Kojto | 90:cb3d968589d8 | 103 | section in Reference manual */ |
| Kojto | 90:cb3d968589d8 | 104 | } SMBUS_InitTypeDef; |
| Kojto | 90:cb3d968589d8 | 105 | |
| Kojto | 90:cb3d968589d8 | 106 | /** |
| Kojto | 90:cb3d968589d8 | 107 | * @brief SMBUS handle Structure definition |
| Kojto | 90:cb3d968589d8 | 108 | */ |
| Kojto | 90:cb3d968589d8 | 109 | typedef struct |
| Kojto | 90:cb3d968589d8 | 110 | { |
| Kojto | 90:cb3d968589d8 | 111 | I2C_TypeDef *Instance; /*!< SMBUS registers base address */ |
| Kojto | 90:cb3d968589d8 | 112 | |
| Kojto | 90:cb3d968589d8 | 113 | SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */ |
| Kojto | 90:cb3d968589d8 | 114 | |
| Kojto | 90:cb3d968589d8 | 115 | uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */ |
| Kojto | 90:cb3d968589d8 | 116 | |
| Kojto | 90:cb3d968589d8 | 117 | uint16_t XferSize; /*!< SMBUS transfer size */ |
| Kojto | 90:cb3d968589d8 | 118 | |
| Kojto | 90:cb3d968589d8 | 119 | __IO uint16_t XferCount; /*!< SMBUS transfer counter */ |
| Kojto | 90:cb3d968589d8 | 120 | |
| Kojto | 90:cb3d968589d8 | 121 | __IO uint32_t XferOptions; /*!< SMBUS transfer options */ |
| Kojto | 90:cb3d968589d8 | 122 | |
| Kojto | 93:e188a91d3eaa | 123 | __IO uint32_t PreviousState; /*!< SMBUS communication Previous state |
| Kojto | 93:e188a91d3eaa | 124 | This parameter can be a value of @ref SMBUS_State */ |
| Kojto | 90:cb3d968589d8 | 125 | |
| Kojto | 90:cb3d968589d8 | 126 | HAL_LockTypeDef Lock; /*!< SMBUS locking object */ |
| Kojto | 90:cb3d968589d8 | 127 | |
| Kojto | 93:e188a91d3eaa | 128 | __IO uint32_t State; /*!< SMBUS communication state |
| Kojto | 93:e188a91d3eaa | 129 | This parameter can be a value of @ref SMBUS_State */ |
| Kojto | 90:cb3d968589d8 | 130 | |
| Kojto | 93:e188a91d3eaa | 131 | __IO uint32_t ErrorCode; /*!< SMBUS Error code |
| Kojto | 93:e188a91d3eaa | 132 | This parameter can be a value of @ref SMBUS_Error */ |
| Kojto | 90:cb3d968589d8 | 133 | |
| Kojto | 90:cb3d968589d8 | 134 | }SMBUS_HandleTypeDef; |
| Kojto | 90:cb3d968589d8 | 135 | /** |
| Kojto | 90:cb3d968589d8 | 136 | * @} |
| Kojto | 90:cb3d968589d8 | 137 | */ |
| Kojto | 90:cb3d968589d8 | 138 | |
| Kojto | 90:cb3d968589d8 | 139 | /* Exported constants --------------------------------------------------------*/ |
| Kojto | 90:cb3d968589d8 | 140 | |
| Kojto | 90:cb3d968589d8 | 141 | /** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants |
| Kojto | 90:cb3d968589d8 | 142 | * @{ |
| Kojto | 90:cb3d968589d8 | 143 | */ |
| Kojto | 90:cb3d968589d8 | 144 | |
| Kojto | 93:e188a91d3eaa | 145 | /** @defgroup SMBUS_Error SMBUS Error |
| Kojto | 93:e188a91d3eaa | 146 | * @{ |
| Kojto | 93:e188a91d3eaa | 147 | */ |
| Kojto | 93:e188a91d3eaa | 148 | #define HAL_SMBUS_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| Kojto | 93:e188a91d3eaa | 149 | #define HAL_SMBUS_ERROR_BERR ((uint32_t)0x00000001) /*!< BERR error */ |
| Kojto | 93:e188a91d3eaa | 150 | #define HAL_SMBUS_ERROR_ARLO ((uint32_t)0x00000002) /*!< ARLO error */ |
| Kojto | 93:e188a91d3eaa | 151 | #define HAL_SMBUS_ERROR_ACKF ((uint32_t)0x00000004) /*!< ACKF error */ |
| Kojto | 93:e188a91d3eaa | 152 | #define HAL_SMBUS_ERROR_OVR ((uint32_t)0x00000008) /*!< OVR error */ |
| Kojto | 93:e188a91d3eaa | 153 | #define HAL_SMBUS_ERROR_HALTIMEOUT ((uint32_t)0x00000010) /*!< Timeout error */ |
| Kojto | 93:e188a91d3eaa | 154 | #define HAL_SMBUS_ERROR_BUSTIMEOUT ((uint32_t)0x00000020) /*!< Bus Timeout error */ |
| Kojto | 93:e188a91d3eaa | 155 | #define HAL_SMBUS_ERROR_ALERT ((uint32_t)0x00000040) /*!< Alert error */ |
| Kojto | 93:e188a91d3eaa | 156 | #define HAL_SMBUS_ERROR_PECERR ((uint32_t)0x00000080) /*!< PEC error */ |
| Kojto | 93:e188a91d3eaa | 157 | /** |
| Kojto | 93:e188a91d3eaa | 158 | * @} |
| Kojto | 93:e188a91d3eaa | 159 | */ |
| Kojto | 93:e188a91d3eaa | 160 | |
| Kojto | 93:e188a91d3eaa | 161 | /** @defgroup SMBUS_State SMBUS State |
| Kojto | 93:e188a91d3eaa | 162 | * @{ |
| Kojto | 93:e188a91d3eaa | 163 | */ |
| Kojto | 93:e188a91d3eaa | 164 | |
| Kojto | 93:e188a91d3eaa | 165 | #define HAL_SMBUS_STATE_RESET ((uint32_t)0x00000000) /*!< SMBUS not yet initialized or disabled */ |
| Kojto | 93:e188a91d3eaa | 166 | #define HAL_SMBUS_STATE_READY ((uint32_t)0x00000001) /*!< SMBUS initialized and ready for use */ |
| Kojto | 93:e188a91d3eaa | 167 | #define HAL_SMBUS_STATE_BUSY ((uint32_t)0x00000002) /*!< SMBUS internal process is ongoing */ |
| Kojto | 93:e188a91d3eaa | 168 | #define HAL_SMBUS_STATE_MASTER_BUSY_TX ((uint32_t)0x00000012) /*!< Master Data Transmission process is ongoing */ |
| Kojto | 93:e188a91d3eaa | 169 | #define HAL_SMBUS_STATE_MASTER_BUSY_RX ((uint32_t)0x00000022) /*!< Master Data Reception process is ongoing */ |
| Kojto | 93:e188a91d3eaa | 170 | #define HAL_SMBUS_STATE_SLAVE_BUSY_TX ((uint32_t)0x00000032) /*!< Slave Data Transmission process is ongoing */ |
| Kojto | 93:e188a91d3eaa | 171 | #define HAL_SMBUS_STATE_SLAVE_BUSY_RX ((uint32_t)0x00000042) /*!< Slave Data Reception process is ongoing */ |
| Kojto | 93:e188a91d3eaa | 172 | #define HAL_SMBUS_STATE_TIMEOUT ((uint32_t)0x00000003) /*!< Timeout state */ |
| Kojto | 93:e188a91d3eaa | 173 | #define HAL_SMBUS_STATE_ERROR ((uint32_t)0x00000004) /*!< Reception process is ongoing */ |
| Kojto | 93:e188a91d3eaa | 174 | #define HAL_SMBUS_STATE_SLAVE_LISTEN ((uint32_t)0x00000008) /*!< Address Listen Mode is ongoing */ |
| Kojto | 93:e188a91d3eaa | 175 | /* Aliases for inter STM32 series compatibility */ |
| Kojto | 93:e188a91d3eaa | 176 | #define HAL_SMBUS_STATE_LISTEN HAL_SMBUS_STATE_SLAVE_LISTEN |
| Kojto | 93:e188a91d3eaa | 177 | |
| Kojto | 93:e188a91d3eaa | 178 | /** |
| Kojto | 93:e188a91d3eaa | 179 | * @} |
| Kojto | 93:e188a91d3eaa | 180 | */ |
| Kojto | 93:e188a91d3eaa | 181 | |
| Kojto | 90:cb3d968589d8 | 182 | /** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter |
| Kojto | 90:cb3d968589d8 | 183 | * @{ |
| Kojto | 90:cb3d968589d8 | 184 | */ |
| Kojto | 90:cb3d968589d8 | 185 | #define SMBUS_ANALOGFILTER_ENABLED ((uint32_t)0x00000000) |
| Kojto | 90:cb3d968589d8 | 186 | #define SMBUS_ANALOGFILTER_DISABLED I2C_CR1_ANFOFF |
| Kojto | 90:cb3d968589d8 | 187 | |
| Kojto | 90:cb3d968589d8 | 188 | #define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLED) || \ |
| Kojto | 90:cb3d968589d8 | 189 | ((FILTER) == SMBUS_ANALOGFILTER_DISABLED)) |
| Kojto | 90:cb3d968589d8 | 190 | /** |
| Kojto | 90:cb3d968589d8 | 191 | * @} |
| Kojto | 90:cb3d968589d8 | 192 | */ |
| Kojto | 90:cb3d968589d8 | 193 | |
| Kojto | 90:cb3d968589d8 | 194 | /** @defgroup SMBUS_addressing_mode SMBUS addressing mode |
| Kojto | 90:cb3d968589d8 | 195 | * @{ |
| Kojto | 90:cb3d968589d8 | 196 | */ |
| Kojto | 90:cb3d968589d8 | 197 | #define SMBUS_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001) |
| Kojto | 90:cb3d968589d8 | 198 | #define SMBUS_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002) |
| Kojto | 90:cb3d968589d8 | 199 | |
| Kojto | 90:cb3d968589d8 | 200 | #define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \ |
| Kojto | 90:cb3d968589d8 | 201 | ((MODE) == SMBUS_ADDRESSINGMODE_10BIT)) |
| Kojto | 90:cb3d968589d8 | 202 | /** |
| Kojto | 90:cb3d968589d8 | 203 | * @} |
| Kojto | 90:cb3d968589d8 | 204 | */ |
| Kojto | 90:cb3d968589d8 | 205 | |
| Kojto | 90:cb3d968589d8 | 206 | /** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode |
| Kojto | 90:cb3d968589d8 | 207 | * @{ |
| Kojto | 90:cb3d968589d8 | 208 | */ |
| Kojto | 90:cb3d968589d8 | 209 | |
| Kojto | 90:cb3d968589d8 | 210 | #define SMBUS_DUALADDRESS_DISABLED ((uint32_t)0x00000000) |
| Kojto | 90:cb3d968589d8 | 211 | #define SMBUS_DUALADDRESS_ENABLED I2C_OAR2_OA2EN |
| Kojto | 90:cb3d968589d8 | 212 | |
| Kojto | 90:cb3d968589d8 | 213 | #define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLED) || \ |
| Kojto | 90:cb3d968589d8 | 214 | ((ADDRESS) == SMBUS_DUALADDRESS_ENABLED)) |
| Kojto | 90:cb3d968589d8 | 215 | /** |
| Kojto | 90:cb3d968589d8 | 216 | * @} |
| Kojto | 90:cb3d968589d8 | 217 | */ |
| Kojto | 90:cb3d968589d8 | 218 | |
| Kojto | 90:cb3d968589d8 | 219 | /** @defgroup SMBUS_own_address2_masks SMBUS ownaddress2 masks |
| Kojto | 90:cb3d968589d8 | 220 | * @{ |
| Kojto | 90:cb3d968589d8 | 221 | */ |
| Kojto | 90:cb3d968589d8 | 222 | |
| Kojto | 90:cb3d968589d8 | 223 | #define SMBUS_OA2_NOMASK ((uint8_t)0x00) |
| Kojto | 90:cb3d968589d8 | 224 | #define SMBUS_OA2_MASK01 ((uint8_t)0x01) |
| Kojto | 90:cb3d968589d8 | 225 | #define SMBUS_OA2_MASK02 ((uint8_t)0x02) |
| Kojto | 90:cb3d968589d8 | 226 | #define SMBUS_OA2_MASK03 ((uint8_t)0x03) |
| Kojto | 90:cb3d968589d8 | 227 | #define SMBUS_OA2_MASK04 ((uint8_t)0x04) |
| Kojto | 90:cb3d968589d8 | 228 | #define SMBUS_OA2_MASK05 ((uint8_t)0x05) |
| Kojto | 90:cb3d968589d8 | 229 | #define SMBUS_OA2_MASK06 ((uint8_t)0x06) |
| Kojto | 90:cb3d968589d8 | 230 | #define SMBUS_OA2_MASK07 ((uint8_t)0x07) |
| Kojto | 90:cb3d968589d8 | 231 | |
| Kojto | 90:cb3d968589d8 | 232 | #define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \ |
| Kojto | 90:cb3d968589d8 | 233 | ((MASK) == SMBUS_OA2_MASK01) || \ |
| Kojto | 90:cb3d968589d8 | 234 | ((MASK) == SMBUS_OA2_MASK02) || \ |
| Kojto | 90:cb3d968589d8 | 235 | ((MASK) == SMBUS_OA2_MASK03) || \ |
| Kojto | 90:cb3d968589d8 | 236 | ((MASK) == SMBUS_OA2_MASK04) || \ |
| Kojto | 90:cb3d968589d8 | 237 | ((MASK) == SMBUS_OA2_MASK05) || \ |
| Kojto | 90:cb3d968589d8 | 238 | ((MASK) == SMBUS_OA2_MASK06) || \ |
| Kojto | 90:cb3d968589d8 | 239 | ((MASK) == SMBUS_OA2_MASK07)) |
| Kojto | 90:cb3d968589d8 | 240 | /** |
| Kojto | 90:cb3d968589d8 | 241 | * @} |
| Kojto | 90:cb3d968589d8 | 242 | */ |
| Kojto | 90:cb3d968589d8 | 243 | |
| Kojto | 90:cb3d968589d8 | 244 | |
| Kojto | 90:cb3d968589d8 | 245 | /** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode |
| Kojto | 90:cb3d968589d8 | 246 | * @{ |
| Kojto | 90:cb3d968589d8 | 247 | */ |
| Kojto | 90:cb3d968589d8 | 248 | #define SMBUS_GENERALCALL_DISABLED ((uint32_t)0x00000000) |
| Kojto | 90:cb3d968589d8 | 249 | #define SMBUS_GENERALCALL_ENABLED I2C_CR1_GCEN |
| Kojto | 90:cb3d968589d8 | 250 | |
| Kojto | 90:cb3d968589d8 | 251 | #define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLED) || \ |
| Kojto | 90:cb3d968589d8 | 252 | ((CALL) == SMBUS_GENERALCALL_ENABLED)) |
| Kojto | 90:cb3d968589d8 | 253 | /** |
| Kojto | 90:cb3d968589d8 | 254 | * @} |
| Kojto | 90:cb3d968589d8 | 255 | */ |
| Kojto | 90:cb3d968589d8 | 256 | |
| Kojto | 90:cb3d968589d8 | 257 | /** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode |
| Kojto | 90:cb3d968589d8 | 258 | * @{ |
| Kojto | 90:cb3d968589d8 | 259 | */ |
| Kojto | 90:cb3d968589d8 | 260 | #define SMBUS_NOSTRETCH_DISABLED ((uint32_t)0x00000000) |
| Kojto | 90:cb3d968589d8 | 261 | #define SMBUS_NOSTRETCH_ENABLED I2C_CR1_NOSTRETCH |
| Kojto | 90:cb3d968589d8 | 262 | |
| Kojto | 90:cb3d968589d8 | 263 | #define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLED) || \ |
| Kojto | 90:cb3d968589d8 | 264 | ((STRETCH) == SMBUS_NOSTRETCH_ENABLED)) |
| Kojto | 90:cb3d968589d8 | 265 | /** |
| Kojto | 90:cb3d968589d8 | 266 | * @} |
| Kojto | 90:cb3d968589d8 | 267 | */ |
| Kojto | 90:cb3d968589d8 | 268 | |
| Kojto | 90:cb3d968589d8 | 269 | /** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode |
| Kojto | 90:cb3d968589d8 | 270 | * @{ |
| Kojto | 90:cb3d968589d8 | 271 | */ |
| Kojto | 90:cb3d968589d8 | 272 | #define SMBUS_PEC_DISABLED ((uint32_t)0x00000000) |
| Kojto | 90:cb3d968589d8 | 273 | #define SMBUS_PEC_ENABLED I2C_CR1_PECEN |
| Kojto | 90:cb3d968589d8 | 274 | |
| Kojto | 90:cb3d968589d8 | 275 | #define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLED) || \ |
| Kojto | 90:cb3d968589d8 | 276 | ((PEC) == SMBUS_PEC_ENABLED)) |
| Kojto | 90:cb3d968589d8 | 277 | /** |
| Kojto | 90:cb3d968589d8 | 278 | * @} |
| Kojto | 90:cb3d968589d8 | 279 | */ |
| Kojto | 90:cb3d968589d8 | 280 | |
| Kojto | 90:cb3d968589d8 | 281 | /** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode |
| Kojto | 90:cb3d968589d8 | 282 | * @{ |
| Kojto | 90:cb3d968589d8 | 283 | */ |
| Kojto | 90:cb3d968589d8 | 284 | #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBHEN) |
| Kojto | 90:cb3d968589d8 | 285 | #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (uint32_t)(0x00000000) |
| Kojto | 90:cb3d968589d8 | 286 | #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBDEN) |
| Kojto | 90:cb3d968589d8 | 287 | |
| Kojto | 90:cb3d968589d8 | 288 | #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \ |
| Kojto | 90:cb3d968589d8 | 289 | ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \ |
| Kojto | 90:cb3d968589d8 | 290 | ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)) |
| Kojto | 90:cb3d968589d8 | 291 | /** |
| Kojto | 90:cb3d968589d8 | 292 | * @} |
| Kojto | 90:cb3d968589d8 | 293 | */ |
| Kojto | 90:cb3d968589d8 | 294 | |
| Kojto | 90:cb3d968589d8 | 295 | /** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition |
| Kojto | 90:cb3d968589d8 | 296 | * @{ |
| Kojto | 90:cb3d968589d8 | 297 | */ |
| Kojto | 90:cb3d968589d8 | 298 | |
| Kojto | 90:cb3d968589d8 | 299 | #define SMBUS_SOFTEND_MODE ((uint32_t)0x00000000) |
| Kojto | 90:cb3d968589d8 | 300 | #define SMBUS_RELOAD_MODE I2C_CR2_RELOAD |
| Kojto | 90:cb3d968589d8 | 301 | #define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND |
| Kojto | 90:cb3d968589d8 | 302 | #define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE |
| Kojto | 90:cb3d968589d8 | 303 | |
| Kojto | 90:cb3d968589d8 | 304 | #define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \ |
| Kojto | 90:cb3d968589d8 | 305 | ((MODE) == SMBUS_AUTOEND_MODE) || \ |
| Kojto | 90:cb3d968589d8 | 306 | ((MODE) == SMBUS_SOFTEND_MODE) || \ |
| Kojto | 90:cb3d968589d8 | 307 | ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \ |
| Kojto | 90:cb3d968589d8 | 308 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \ |
| Kojto | 90:cb3d968589d8 | 309 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \ |
| Kojto | 90:cb3d968589d8 | 310 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE ))) |
| Kojto | 90:cb3d968589d8 | 311 | |
| Kojto | 90:cb3d968589d8 | 312 | /** |
| Kojto | 90:cb3d968589d8 | 313 | * @} |
| Kojto | 90:cb3d968589d8 | 314 | */ |
| Kojto | 90:cb3d968589d8 | 315 | |
| Kojto | 90:cb3d968589d8 | 316 | /** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition |
| Kojto | 90:cb3d968589d8 | 317 | * @{ |
| Kojto | 90:cb3d968589d8 | 318 | */ |
| Kojto | 90:cb3d968589d8 | 319 | |
| Kojto | 90:cb3d968589d8 | 320 | #define SMBUS_NO_STARTSTOP ((uint32_t)0x00000000) |
| Kojto | 90:cb3d968589d8 | 321 | #define SMBUS_GENERATE_STOP I2C_CR2_STOP |
| Kojto | 90:cb3d968589d8 | 322 | #define SMBUS_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) |
| Kojto | 90:cb3d968589d8 | 323 | #define SMBUS_GENERATE_START_WRITE I2C_CR2_START |
| Kojto | 90:cb3d968589d8 | 324 | |
| Kojto | 90:cb3d968589d8 | 325 | #define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \ |
| Kojto | 90:cb3d968589d8 | 326 | ((REQUEST) == SMBUS_GENERATE_START_READ) || \ |
| Kojto | 90:cb3d968589d8 | 327 | ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \ |
| Kojto | 90:cb3d968589d8 | 328 | ((REQUEST) == SMBUS_NO_STARTSTOP)) |
| Kojto | 90:cb3d968589d8 | 329 | |
| Kojto | 90:cb3d968589d8 | 330 | /** |
| Kojto | 90:cb3d968589d8 | 331 | * @} |
| Kojto | 90:cb3d968589d8 | 332 | */ |
| Kojto | 90:cb3d968589d8 | 333 | |
| Kojto | 90:cb3d968589d8 | 334 | /** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition |
| Kojto | 90:cb3d968589d8 | 335 | * @{ |
| Kojto | 90:cb3d968589d8 | 336 | */ |
| Kojto | 90:cb3d968589d8 | 337 | |
| Kojto | 90:cb3d968589d8 | 338 | #define SMBUS_FIRST_FRAME ((uint32_t)(SMBUS_SOFTEND_MODE)) |
| Kojto | 90:cb3d968589d8 | 339 | #define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE)) |
| Kojto | 90:cb3d968589d8 | 340 | #define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
| Kojto | 90:cb3d968589d8 | 341 | #define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
| Kojto | 90:cb3d968589d8 | 342 | #define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
| Kojto | 90:cb3d968589d8 | 343 | #define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
| Kojto | 90:cb3d968589d8 | 344 | |
| Kojto | 90:cb3d968589d8 | 345 | #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \ |
| Kojto | 90:cb3d968589d8 | 346 | ((REQUEST) == SMBUS_NEXT_FRAME) || \ |
| Kojto | 90:cb3d968589d8 | 347 | ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \ |
| Kojto | 90:cb3d968589d8 | 348 | ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \ |
| Kojto | 90:cb3d968589d8 | 349 | ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \ |
| Kojto | 90:cb3d968589d8 | 350 | ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC)) |
| Kojto | 90:cb3d968589d8 | 351 | |
| Kojto | 90:cb3d968589d8 | 352 | /** |
| Kojto | 90:cb3d968589d8 | 353 | * @} |
| Kojto | 90:cb3d968589d8 | 354 | */ |
| Kojto | 90:cb3d968589d8 | 355 | |
| Kojto | 90:cb3d968589d8 | 356 | /** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition |
| Kojto | 90:cb3d968589d8 | 357 | * @brief SMBUS Interrupt definition |
| Kojto | 90:cb3d968589d8 | 358 | * Elements values convention: 0xXXXXXXXX |
| Kojto | 90:cb3d968589d8 | 359 | * - XXXXXXXX : Interrupt control mask |
| Kojto | 90:cb3d968589d8 | 360 | * @{ |
| Kojto | 90:cb3d968589d8 | 361 | */ |
| Kojto | 90:cb3d968589d8 | 362 | #define SMBUS_IT_ERRI I2C_CR1_ERRIE |
| Kojto | 90:cb3d968589d8 | 363 | #define SMBUS_IT_TCI I2C_CR1_TCIE |
| Kojto | 90:cb3d968589d8 | 364 | #define SMBUS_IT_STOPI I2C_CR1_STOPIE |
| Kojto | 90:cb3d968589d8 | 365 | #define SMBUS_IT_NACKI I2C_CR1_NACKIE |
| Kojto | 90:cb3d968589d8 | 366 | #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE |
| Kojto | 90:cb3d968589d8 | 367 | #define SMBUS_IT_RXI I2C_CR1_RXIE |
| Kojto | 90:cb3d968589d8 | 368 | #define SMBUS_IT_TXI I2C_CR1_TXIE |
| Kojto | 90:cb3d968589d8 | 369 | #define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI) |
| Kojto | 90:cb3d968589d8 | 370 | #define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI) |
| Kojto | 90:cb3d968589d8 | 371 | #define SMBUS_IT_ALERT (SMBUS_IT_ERRI) |
| Kojto | 90:cb3d968589d8 | 372 | #define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI) |
| Kojto | 90:cb3d968589d8 | 373 | /** |
| Kojto | 90:cb3d968589d8 | 374 | * @} |
| Kojto | 90:cb3d968589d8 | 375 | */ |
| Kojto | 90:cb3d968589d8 | 376 | |
| Kojto | 90:cb3d968589d8 | 377 | /** @defgroup SMBUS_Flag_definition SMBUS Flag definition |
| Kojto | 90:cb3d968589d8 | 378 | * @brief Flag definition |
| Kojto | 90:cb3d968589d8 | 379 | * Elements values convention: 0xXXXXYYYY |
| Kojto | 90:cb3d968589d8 | 380 | * - XXXXXXXX : Flag mask |
| Kojto | 90:cb3d968589d8 | 381 | * @{ |
| Kojto | 90:cb3d968589d8 | 382 | */ |
| Kojto | 90:cb3d968589d8 | 383 | |
| Kojto | 90:cb3d968589d8 | 384 | #define SMBUS_FLAG_TXE I2C_ISR_TXE |
| Kojto | 90:cb3d968589d8 | 385 | #define SMBUS_FLAG_TXIS I2C_ISR_TXIS |
| Kojto | 90:cb3d968589d8 | 386 | #define SMBUS_FLAG_RXNE I2C_ISR_RXNE |
| Kojto | 90:cb3d968589d8 | 387 | #define SMBUS_FLAG_ADDR I2C_ISR_ADDR |
| Kojto | 90:cb3d968589d8 | 388 | #define SMBUS_FLAG_AF I2C_ISR_NACKF |
| Kojto | 90:cb3d968589d8 | 389 | #define SMBUS_FLAG_STOPF I2C_ISR_STOPF |
| Kojto | 90:cb3d968589d8 | 390 | #define SMBUS_FLAG_TC I2C_ISR_TC |
| Kojto | 90:cb3d968589d8 | 391 | #define SMBUS_FLAG_TCR I2C_ISR_TCR |
| Kojto | 90:cb3d968589d8 | 392 | #define SMBUS_FLAG_BERR I2C_ISR_BERR |
| Kojto | 90:cb3d968589d8 | 393 | #define SMBUS_FLAG_ARLO I2C_ISR_ARLO |
| Kojto | 90:cb3d968589d8 | 394 | #define SMBUS_FLAG_OVR I2C_ISR_OVR |
| Kojto | 90:cb3d968589d8 | 395 | #define SMBUS_FLAG_PECERR I2C_ISR_PECERR |
| Kojto | 90:cb3d968589d8 | 396 | #define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
| Kojto | 90:cb3d968589d8 | 397 | #define SMBUS_FLAG_ALERT I2C_ISR_ALERT |
| Kojto | 90:cb3d968589d8 | 398 | #define SMBUS_FLAG_BUSY I2C_ISR_BUSY |
| Kojto | 90:cb3d968589d8 | 399 | #define SMBUS_FLAG_DIR I2C_ISR_DIR |
| Kojto | 90:cb3d968589d8 | 400 | /** |
| Kojto | 90:cb3d968589d8 | 401 | * @} |
| Kojto | 90:cb3d968589d8 | 402 | */ |
| Kojto | 90:cb3d968589d8 | 403 | |
| Kojto | 90:cb3d968589d8 | 404 | /** |
| Kojto | 90:cb3d968589d8 | 405 | * @} |
| Kojto | 90:cb3d968589d8 | 406 | */ |
| Kojto | 90:cb3d968589d8 | 407 | |
| Kojto | 90:cb3d968589d8 | 408 | /* Exported macros ------------------------------------------------------------*/ |
| Kojto | 90:cb3d968589d8 | 409 | /** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros |
| Kojto | 90:cb3d968589d8 | 410 | * @{ |
| Kojto | 90:cb3d968589d8 | 411 | */ |
| Kojto | 90:cb3d968589d8 | 412 | |
| Kojto | 90:cb3d968589d8 | 413 | /** @brief Reset SMBUS handle state |
| Kojto | 90:cb3d968589d8 | 414 | * @param __HANDLE__: SMBUS handle. |
| Kojto | 90:cb3d968589d8 | 415 | * @retval None |
| Kojto | 90:cb3d968589d8 | 416 | */ |
| Kojto | 90:cb3d968589d8 | 417 | #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET) |
| Kojto | 90:cb3d968589d8 | 418 | |
| Kojto | 90:cb3d968589d8 | 419 | /** @brief Enable or disable the specified SMBUS interrupts. |
| Kojto | 90:cb3d968589d8 | 420 | * @param __HANDLE__: specifies the SMBUS Handle. |
| Kojto | 90:cb3d968589d8 | 421 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| Kojto | 90:cb3d968589d8 | 422 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| Kojto | 90:cb3d968589d8 | 423 | * This parameter can be one of the following values: |
| Kojto | 90:cb3d968589d8 | 424 | * @arg SMBUS_IT_ERRI: Errors interrupt enable |
| Kojto | 90:cb3d968589d8 | 425 | * @arg SMBUS_IT_TCI: Transfer complete interrupt enable |
| Kojto | 90:cb3d968589d8 | 426 | * @arg SMBUS_IT_STOPI: STOP detection interrupt enable |
| Kojto | 90:cb3d968589d8 | 427 | * @arg SMBUS_IT_NACKI: NACK received interrupt enable |
| Kojto | 90:cb3d968589d8 | 428 | * @arg SMBUS_IT_ADDRI: Address match interrupt enable |
| Kojto | 90:cb3d968589d8 | 429 | * @arg SMBUS_IT_RXI: RX interrupt enable |
| Kojto | 90:cb3d968589d8 | 430 | * @arg SMBUS_IT_TXI: TX interrupt enable |
| Kojto | 90:cb3d968589d8 | 431 | * |
| Kojto | 90:cb3d968589d8 | 432 | * @retval None |
| Kojto | 90:cb3d968589d8 | 433 | */ |
| Kojto | 90:cb3d968589d8 | 434 | |
| Kojto | 90:cb3d968589d8 | 435 | #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
| Kojto | 90:cb3d968589d8 | 436 | #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
| Kojto | 90:cb3d968589d8 | 437 | |
| Kojto | 90:cb3d968589d8 | 438 | /** @brief Checks if the specified SMBUS interrupt source is enabled or disabled. |
| Kojto | 90:cb3d968589d8 | 439 | * @param __HANDLE__: specifies the SMBUS Handle. |
| Kojto | 90:cb3d968589d8 | 440 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| Kojto | 90:cb3d968589d8 | 441 | * @param __INTERRUPT__: specifies the SMBUS interrupt source to check. |
| Kojto | 90:cb3d968589d8 | 442 | * This parameter can be one of the following values: |
| Kojto | 90:cb3d968589d8 | 443 | * @arg SMBUS_IT_ERRI: Errors interrupt enable |
| Kojto | 90:cb3d968589d8 | 444 | * @arg SMBUS_IT_TCI: Transfer complete interrupt enable |
| Kojto | 90:cb3d968589d8 | 445 | * @arg SMBUS_IT_STOPI: STOP detection interrupt enable |
| Kojto | 90:cb3d968589d8 | 446 | * @arg SMBUS_IT_NACKI: NACK received interrupt enable |
| Kojto | 90:cb3d968589d8 | 447 | * @arg SMBUS_IT_ADDRI: Address match interrupt enable |
| Kojto | 90:cb3d968589d8 | 448 | * @arg SMBUS_IT_RXI: RX interrupt enable |
| Kojto | 90:cb3d968589d8 | 449 | * @arg SMBUS_IT_TXI: TX interrupt enable |
| Kojto | 90:cb3d968589d8 | 450 | * |
| Kojto | 90:cb3d968589d8 | 451 | * @retval The new state of __IT__ (TRUE or FALSE). |
| Kojto | 90:cb3d968589d8 | 452 | */ |
| Kojto | 90:cb3d968589d8 | 453 | #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| Kojto | 90:cb3d968589d8 | 454 | |
| Kojto | 90:cb3d968589d8 | 455 | /** @brief Checks whether the specified SMBUS flag is set or not. |
| Kojto | 90:cb3d968589d8 | 456 | * @param __HANDLE__: specifies the SMBUS Handle. |
| Kojto | 90:cb3d968589d8 | 457 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| Kojto | 90:cb3d968589d8 | 458 | * @param __FLAG__: specifies the flag to check. |
| Kojto | 90:cb3d968589d8 | 459 | * This parameter can be one of the following values: |
| Kojto | 90:cb3d968589d8 | 460 | * @arg SMBUS_FLAG_TXE: Transmit data register empty |
| Kojto | 90:cb3d968589d8 | 461 | * @arg SMBUS_FLAG_TXIS: Transmit interrupt status |
| Kojto | 90:cb3d968589d8 | 462 | * @arg SMBUS_FLAG_RXNE: Receive data register not empty |
| Kojto | 90:cb3d968589d8 | 463 | * @arg SMBUS_FLAG_ADDR: Address matched (slave mode) |
| Kojto | 90:cb3d968589d8 | 464 | * @arg SMBUS_FLAG_AF: NACK received flag |
| Kojto | 90:cb3d968589d8 | 465 | * @arg SMBUS_FLAG_STOPF: STOP detection flag |
| Kojto | 90:cb3d968589d8 | 466 | * @arg SMBUS_FLAG_TC: Transfer complete (master mode) |
| Kojto | 90:cb3d968589d8 | 467 | * @arg SMBUS_FLAG_TCR: Transfer complete reload |
| Kojto | 90:cb3d968589d8 | 468 | * @arg SMBUS_FLAG_BERR: Bus error |
| Kojto | 90:cb3d968589d8 | 469 | * @arg SMBUS_FLAG_ARLO: Arbitration lost |
| Kojto | 90:cb3d968589d8 | 470 | * @arg SMBUS_FLAG_OVR: Overrun/Underrun |
| Kojto | 90:cb3d968589d8 | 471 | * @arg SMBUS_FLAG_PECERR: PEC error in reception |
| Kojto | 90:cb3d968589d8 | 472 | * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag |
| Kojto | 90:cb3d968589d8 | 473 | * @arg SMBUS_FLAG_ALERT: SMBus alert |
| Kojto | 90:cb3d968589d8 | 474 | * @arg SMBUS_FLAG_BUSY: Bus busy |
| Kojto | 90:cb3d968589d8 | 475 | * @arg SMBUS_FLAG_DIR: Transfer direction (slave mode) |
| Kojto | 90:cb3d968589d8 | 476 | * |
| Kojto | 90:cb3d968589d8 | 477 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| Kojto | 90:cb3d968589d8 | 478 | */ |
| Kojto | 90:cb3d968589d8 | 479 | #define SMBUS_FLAG_MASK ((uint32_t)0x0001FFFF) |
| Kojto | 90:cb3d968589d8 | 480 | #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) |
| Kojto | 90:cb3d968589d8 | 481 | |
| Kojto | 90:cb3d968589d8 | 482 | /** @brief Clears the SMBUS pending flags which are cleared by writing 1 in a specific bit. |
| Kojto | 90:cb3d968589d8 | 483 | * @param __HANDLE__: specifies the SMBUS Handle. |
| Kojto | 90:cb3d968589d8 | 484 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| Kojto | 90:cb3d968589d8 | 485 | * @param __FLAG__: specifies the flag to clear. |
| Kojto | 90:cb3d968589d8 | 486 | * This parameter can be any combination of the following values: |
| Kojto | 90:cb3d968589d8 | 487 | * @arg SMBUS_FLAG_ADDR: Address matched (slave mode) |
| Kojto | 90:cb3d968589d8 | 488 | * @arg SMBUS_FLAG_AF: NACK received flag |
| Kojto | 90:cb3d968589d8 | 489 | * @arg SMBUS_FLAG_STOPF: STOP detection flag |
| Kojto | 90:cb3d968589d8 | 490 | * @arg SMBUS_FLAG_BERR: Bus error |
| Kojto | 90:cb3d968589d8 | 491 | * @arg SMBUS_FLAG_ARLO: Arbitration lost |
| Kojto | 90:cb3d968589d8 | 492 | * @arg SMBUS_FLAG_OVR: Overrun/Underrun |
| Kojto | 90:cb3d968589d8 | 493 | * @arg SMBUS_FLAG_PECERR: PEC error in reception |
| Kojto | 90:cb3d968589d8 | 494 | * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag |
| Kojto | 90:cb3d968589d8 | 495 | * @arg SMBUS_FLAG_ALERT: SMBus alert |
| Kojto | 90:cb3d968589d8 | 496 | * |
| Kojto | 90:cb3d968589d8 | 497 | * @retval None |
| Kojto | 90:cb3d968589d8 | 498 | */ |
| Kojto | 90:cb3d968589d8 | 499 | #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| Kojto | 90:cb3d968589d8 | 500 | |
| Kojto | 90:cb3d968589d8 | 501 | |
| Kojto | 90:cb3d968589d8 | 502 | #define __HAL_SMBUS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE) |
| Kojto | 90:cb3d968589d8 | 503 | #define __HAL_SMBUS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE) |
| Kojto | 90:cb3d968589d8 | 504 | |
| Kojto | 90:cb3d968589d8 | 505 | #define __HAL_SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN))) |
| Kojto | 90:cb3d968589d8 | 506 | #define __HAL_SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
| Kojto | 90:cb3d968589d8 | 507 | |
| Kojto | 90:cb3d968589d8 | 508 | #define __HAL_SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ |
| Kojto | 90:cb3d968589d8 | 509 | (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) |
| Kojto | 90:cb3d968589d8 | 510 | |
| Kojto | 90:cb3d968589d8 | 511 | #define __HAL_SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17) |
| Kojto | 90:cb3d968589d8 | 512 | #define __HAL_SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16) |
| Kojto | 90:cb3d968589d8 | 513 | #define __HAL_SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) |
| Kojto | 90:cb3d968589d8 | 514 | #define __HAL_SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE) |
| Kojto | 90:cb3d968589d8 | 515 | #define __HAL_SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN) |
| Kojto | 90:cb3d968589d8 | 516 | #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) ((__HANDLE__)->Instance->CR2 |= I2C_CR2_NACK) |
| Kojto | 90:cb3d968589d8 | 517 | |
| Kojto | 90:cb3d968589d8 | 518 | #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF) |
| Kojto | 90:cb3d968589d8 | 519 | #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF) |
| Kojto | 90:cb3d968589d8 | 520 | /** |
| Kojto | 90:cb3d968589d8 | 521 | * @} |
| Kojto | 90:cb3d968589d8 | 522 | */ |
| Kojto | 90:cb3d968589d8 | 523 | |
| Kojto | 90:cb3d968589d8 | 524 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 90:cb3d968589d8 | 525 | /** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions |
| Kojto | 90:cb3d968589d8 | 526 | * @{ |
| Kojto | 90:cb3d968589d8 | 527 | */ |
| Kojto | 90:cb3d968589d8 | 528 | |
| Kojto | 90:cb3d968589d8 | 529 | /** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions |
| Kojto | 90:cb3d968589d8 | 530 | * @{ |
| Kojto | 90:cb3d968589d8 | 531 | */ |
| Kojto | 90:cb3d968589d8 | 532 | |
| Kojto | 90:cb3d968589d8 | 533 | /* Initialization and de-initialization functions **********************************/ |
| Kojto | 90:cb3d968589d8 | 534 | HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 535 | HAL_StatusTypeDef HAL_SMBUS_DeInit (SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 536 | void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 537 | void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 538 | |
| Kojto | 90:cb3d968589d8 | 539 | /** |
| Kojto | 90:cb3d968589d8 | 540 | * @} |
| Kojto | 90:cb3d968589d8 | 541 | */ |
| Kojto | 90:cb3d968589d8 | 542 | |
| Kojto | 90:cb3d968589d8 | 543 | /** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions |
| Kojto | 90:cb3d968589d8 | 544 | * @{ |
| Kojto | 90:cb3d968589d8 | 545 | */ |
| Kojto | 90:cb3d968589d8 | 546 | |
| Kojto | 90:cb3d968589d8 | 547 | /* IO operation functions *****************************************************/ |
| Kojto | 90:cb3d968589d8 | 548 | /******* Blocking mode: Polling */ |
| Kojto | 90:cb3d968589d8 | 549 | HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
| Kojto | 90:cb3d968589d8 | 550 | |
| Kojto | 90:cb3d968589d8 | 551 | /******* Non-Blocking mode: Interrupt */ |
| Kojto | 90:cb3d968589d8 | 552 | HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| Kojto | 90:cb3d968589d8 | 553 | HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| Kojto | 90:cb3d968589d8 | 554 | HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress); |
| Kojto | 90:cb3d968589d8 | 555 | HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| Kojto | 90:cb3d968589d8 | 556 | HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| Kojto | 90:cb3d968589d8 | 557 | |
| Kojto | 90:cb3d968589d8 | 558 | HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 559 | HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 560 | HAL_StatusTypeDef HAL_SMBUS_Slave_Listen_IT(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 561 | HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 562 | |
| Kojto | 90:cb3d968589d8 | 563 | /* Aliases for new API and to insure inter STM32 series compatibility */ |
| Kojto | 90:cb3d968589d8 | 564 | #define HAL_SMBUS_EnableListen_IT HAL_SMBUS_Slave_Listen_IT |
| Kojto | 90:cb3d968589d8 | 565 | |
| Kojto | 90:cb3d968589d8 | 566 | /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */ |
| Kojto | 90:cb3d968589d8 | 567 | void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 568 | void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 569 | void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 570 | void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 571 | void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 572 | void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 573 | void HAL_SMBUS_SlaveAddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); |
| Kojto | 90:cb3d968589d8 | 574 | void HAL_SMBUS_SlaveListenCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 575 | |
| Kojto | 90:cb3d968589d8 | 576 | /* Aliases for new API and to insure inter STM32 series compatibility */ |
| Kojto | 90:cb3d968589d8 | 577 | #define HAL_SMBUS_AddrCallback HAL_SMBUS_SlaveAddrCallback |
| Kojto | 90:cb3d968589d8 | 578 | #define HAL_SMBUS_ListenCpltCallback HAL_SMBUS_SlaveListenCpltCallback |
| Kojto | 90:cb3d968589d8 | 579 | |
| Kojto | 90:cb3d968589d8 | 580 | void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 581 | |
| Kojto | 90:cb3d968589d8 | 582 | /** |
| Kojto | 90:cb3d968589d8 | 583 | * @} |
| Kojto | 90:cb3d968589d8 | 584 | */ |
| Kojto | 90:cb3d968589d8 | 585 | |
| Kojto | 90:cb3d968589d8 | 586 | /** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions |
| Kojto | 90:cb3d968589d8 | 587 | * @{ |
| Kojto | 90:cb3d968589d8 | 588 | */ |
| Kojto | 90:cb3d968589d8 | 589 | |
| Kojto | 90:cb3d968589d8 | 590 | /* Peripheral State and Errors functions **************************************************/ |
| Kojto | 93:e188a91d3eaa | 591 | uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 93:e188a91d3eaa | 592 | uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus); |
| Kojto | 90:cb3d968589d8 | 593 | |
| Kojto | 90:cb3d968589d8 | 594 | /** |
| Kojto | 90:cb3d968589d8 | 595 | * @} |
| Kojto | 90:cb3d968589d8 | 596 | */ |
| Kojto | 90:cb3d968589d8 | 597 | |
| Kojto | 90:cb3d968589d8 | 598 | /** |
| Kojto | 90:cb3d968589d8 | 599 | * @} |
| Kojto | 90:cb3d968589d8 | 600 | */ |
| Kojto | 90:cb3d968589d8 | 601 | |
| Kojto | 90:cb3d968589d8 | 602 | /** |
| Kojto | 90:cb3d968589d8 | 603 | * @} |
| Kojto | 90:cb3d968589d8 | 604 | */ |
| Kojto | 90:cb3d968589d8 | 605 | |
| Kojto | 90:cb3d968589d8 | 606 | /** |
| Kojto | 90:cb3d968589d8 | 607 | * @} |
| Kojto | 90:cb3d968589d8 | 608 | */ |
| Kojto | 90:cb3d968589d8 | 609 | #ifdef __cplusplus |
| Kojto | 90:cb3d968589d8 | 610 | } |
| Kojto | 90:cb3d968589d8 | 611 | #endif |
| Kojto | 90:cb3d968589d8 | 612 | |
| Kojto | 90:cb3d968589d8 | 613 | |
| Kojto | 90:cb3d968589d8 | 614 | #endif /* __STM32F0xx_HAL_SMBUS_H */ |
| Kojto | 90:cb3d968589d8 | 615 | |
| Kojto | 90:cb3d968589d8 | 616 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| Kojto | 90:cb3d968589d8 | 617 |