Filippo Casamassima / mbed

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Dependents:   Nucleo_blueNRG

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TARGET_LPC4337/system_LPC43xx.h@97:4298809c7c9e, 2015-04-08 (annotated)

Committer:
filartrix
Date:
Wed Apr 08 14:12:53 2015 +0000
Revision:
97:4298809c7c9e
Parent:
89:552587b429a1 
First reale BlueNRG module for nucleo 401 board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 89:552587b429a1 1 /*
bogdanm 89:552587b429a1 2 * @brief LPC43xx/LPC18xx mcu header
bogdanm 89:552587b429a1 3 *
bogdanm 89:552587b429a1 4 * Copyright(C) NXP Semiconductors, 2012
bogdanm 89:552587b429a1 5 * All rights reserved.
bogdanm 89:552587b429a1 6 *
bogdanm 89:552587b429a1 7 * Software that is described herein is for illustrative purposes only
bogdanm 89:552587b429a1 8 * which provides customers with programming information regarding the
bogdanm 89:552587b429a1 9 * LPC products. This software is supplied "AS IS" without any warranties of
bogdanm 89:552587b429a1 10 * any kind, and NXP Semiconductors and its licensor disclaim any and
bogdanm 89:552587b429a1 11 * all warranties, express or implied, including all implied warranties of
bogdanm 89:552587b429a1 12 * merchantability, fitness for a particular purpose and non-infringement of
bogdanm 89:552587b429a1 13 * intellectual property rights. NXP Semiconductors assumes no responsibility
bogdanm 89:552587b429a1 14 * or liability for the use of the software, conveys no license or rights under any
bogdanm 89:552587b429a1 15 * patent, copyright, mask work right, or any other intellectual property rights in
bogdanm 89:552587b429a1 16 * or to any products. NXP Semiconductors reserves the right to make changes
bogdanm 89:552587b429a1 17 * in the software without notification. NXP Semiconductors also makes no
bogdanm 89:552587b429a1 18 * representation or warranty that such application will be suitable for the
bogdanm 89:552587b429a1 19 * specified use without further testing or modification.
bogdanm 89:552587b429a1 20 *
bogdanm 89:552587b429a1 21 * Permission to use, copy, modify, and distribute this software and its
bogdanm 89:552587b429a1 22 * documentation is hereby granted, under NXP Semiconductors' and its
bogdanm 89:552587b429a1 23 * licensor's relevant copyrights in the software, without fee, provided that it
bogdanm 89:552587b429a1 24 * is used in conjunction with NXP Semiconductors microcontrollers. This
bogdanm 89:552587b429a1 25 * copyright, permission, and disclaimer notice must appear in all copies of
bogdanm 89:552587b429a1 26 * this code.
bogdanm 89:552587b429a1 27 */
bogdanm 89:552587b429a1 28
bogdanm 89:552587b429a1 29 #ifndef __SYSTEM_LPC43XX_H
bogdanm 89:552587b429a1 30 #define __SYSTEM_LPC43XX_H
bogdanm 89:552587b429a1 31
bogdanm 89:552587b429a1 32 #ifdef __cplusplus
bogdanm 89:552587b429a1 33 extern "C" {
bogdanm 89:552587b429a1 34 #endif
bogdanm 89:552587b429a1 35
bogdanm 89:552587b429a1 36 /* System initialization options */
bogdanm 89:552587b429a1 37 #define PIN_SETUP 1 /* Configure pins during initialization */
bogdanm 89:552587b429a1 38 #define CLOCK_SETUP 1 /* Configure clocks during initialization */
bogdanm 89:552587b429a1 39 #define MEMORY_SETUP 0 /* Configure external memory during init */
bogdanm 89:552587b429a1 40 #define SPIFI_INIT 1 /* Initialize SPIFI */
bogdanm 89:552587b429a1 41
bogdanm 89:552587b429a1 42 /* Crystal frequency into device */
bogdanm 89:552587b429a1 43 #define CRYSTAL_MAIN_FREQ_IN 12000000
bogdanm 89:552587b429a1 44
bogdanm 89:552587b429a1 45 /* Crystal frequency into device for RTC/32K input */
bogdanm 89:552587b429a1 46 #define CRYSTAL_32K_FREQ_IN 32768
bogdanm 89:552587b429a1 47
bogdanm 89:552587b429a1 48 /* Default CPU clock frequency */
bogdanm 89:552587b429a1 49 #if defined(CHIP_LPC43XX)
bogdanm 89:552587b429a1 50 #define MAX_CLOCK_FREQ (204000000)
bogdanm 89:552587b429a1 51 #else
bogdanm 89:552587b429a1 52 #define MAX_CLOCK_FREQ (180000000)
bogdanm 89:552587b429a1 53 #endif
bogdanm 89:552587b429a1 54
bogdanm 89:552587b429a1 55 #if defined(__FPU_PRESENT) && __FPU_PRESENT == 1
bogdanm 89:552587b429a1 56 /* FPU declarations */
bogdanm 89:552587b429a1 57 #define LPC_CPACR 0xE000ED88
bogdanm 89:552587b429a1 58
bogdanm 89:552587b429a1 59 #define SCB_MVFR0 0xE000EF40
bogdanm 89:552587b429a1 60 #define SCB_MVFR0_RESET 0x10110021
bogdanm 89:552587b429a1 61
bogdanm 89:552587b429a1 62 #define SCB_MVFR1 0xE000EF44
bogdanm 89:552587b429a1 63 #define SCB_MVFR1_RESET 0x11000011
bogdanm 89:552587b429a1 64
bogdanm 89:552587b429a1 65 #if defined(__ARMCC_VERSION)
bogdanm 89:552587b429a1 66 void fpuInit(void) __attribute__ ((section("BOOTSTRAP_CODE")));
bogdanm 89:552587b429a1 67 #else
bogdanm 89:552587b429a1 68 extern void fpuInit(void);
bogdanm 89:552587b429a1 69 #endif
bogdanm 89:552587b429a1 70 #endif
bogdanm 89:552587b429a1 71
bogdanm 89:552587b429a1 72 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
bogdanm 89:552587b429a1 73
bogdanm 89:552587b429a1 74 /**
bogdanm 89:552587b429a1 75 * Initialize the system
bogdanm 89:552587b429a1 76 *
bogdanm 89:552587b429a1 77 * @param none
bogdanm 89:552587b429a1 78 * @return none
bogdanm 89:552587b429a1 79 *
bogdanm 89:552587b429a1 80 * @brief Setup the microcontroller system.
bogdanm 89:552587b429a1 81 * Initialize the System and update the SystemCoreClock variable.
bogdanm 89:552587b429a1 82 */
bogdanm 89:552587b429a1 83 extern void SystemInit (void);
bogdanm 89:552587b429a1 84 extern void SystemCoreClockUpdate(void);
bogdanm 89:552587b429a1 85
bogdanm 89:552587b429a1 86 #ifdef __cplusplus
bogdanm 89:552587b429a1 87 }
bogdanm 89:552587b429a1 88 #endif
bogdanm 89:552587b429a1 89
bogdanm 89:552587b429a1 90 #endif /* __SYSTEM_LPC43XX_H */