my fork
Fork of mbed by
TARGET_LPC2368/LPC23xx.h@97:4298809c7c9e, 2015-04-08 (annotated)
- Committer:
- filartrix
- Date:
- Wed Apr 08 14:12:53 2015 +0000
- Revision:
- 97:4298809c7c9e
- Parent:
- 66:9c8f0e3462fb
First reale BlueNRG module for nucleo 401 board
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 66:9c8f0e3462fb | 1 | /* mbed Microcontroller Library - LPC23xx CMSIS-like structs |
bogdanm | 66:9c8f0e3462fb | 2 | * Copyright (C) 2009 ARM Limited. All rights reserved. |
bogdanm | 66:9c8f0e3462fb | 3 | * |
bogdanm | 66:9c8f0e3462fb | 4 | * An LPC23xx header file, based on the CMSIS LPC17xx.h and old LPC23xx.h |
bogdanm | 66:9c8f0e3462fb | 5 | */ |
bogdanm | 66:9c8f0e3462fb | 6 | |
bogdanm | 66:9c8f0e3462fb | 7 | #ifndef __LPC23xx_H |
bogdanm | 66:9c8f0e3462fb | 8 | #define __LPC23xx_H |
bogdanm | 66:9c8f0e3462fb | 9 | |
bogdanm | 66:9c8f0e3462fb | 10 | #ifdef __cplusplus |
bogdanm | 66:9c8f0e3462fb | 11 | extern "C" { |
bogdanm | 66:9c8f0e3462fb | 12 | #endif |
bogdanm | 66:9c8f0e3462fb | 13 | |
bogdanm | 66:9c8f0e3462fb | 14 | /* |
bogdanm | 66:9c8f0e3462fb | 15 | * ========================================================================== |
bogdanm | 66:9c8f0e3462fb | 16 | * ---------- Interrupt Number Definition ----------------------------------- |
bogdanm | 66:9c8f0e3462fb | 17 | * ========================================================================== |
bogdanm | 66:9c8f0e3462fb | 18 | */ |
bogdanm | 66:9c8f0e3462fb | 19 | |
bogdanm | 66:9c8f0e3462fb | 20 | typedef enum IRQn |
bogdanm | 66:9c8f0e3462fb | 21 | { |
bogdanm | 66:9c8f0e3462fb | 22 | /****** LPC23xx Specific Interrupt Numbers *******************************************************/ |
bogdanm | 66:9c8f0e3462fb | 23 | WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 24 | |
bogdanm | 66:9c8f0e3462fb | 25 | TIMER0_IRQn = 4, /*!< Timer0 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 26 | TIMER1_IRQn = 5, /*!< Timer1 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 27 | UART0_IRQn = 6, /*!< UART0 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 28 | UART1_IRQn = 7, /*!< UART1 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 29 | PWM1_IRQn = 8, /*!< PWM1 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 30 | I2C0_IRQn = 9, /*!< I2C0 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 31 | SPI_IRQn = 10, /*!< SPI Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 32 | SSP0_IRQn = 10, /*!< SSP0 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 33 | SSP1_IRQn = 11, /*!< SSP1 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 34 | PLL0_IRQn = 12, /*!< PLL0 Lock (Main PLL) Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 35 | RTC_IRQn = 13, /*!< Real Time Clock Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 36 | EINT0_IRQn = 14, /*!< External Interrupt 0 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 37 | EINT1_IRQn = 15, /*!< External Interrupt 1 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 38 | EINT2_IRQn = 16, /*!< External Interrupt 2 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 39 | EINT3_IRQn = 17, /*!< External Interrupt 3 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 40 | ADC_IRQn = 18, /*!< A/D Converter Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 41 | I2C1_IRQn = 19, /*!< I2C1 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 42 | BOD_IRQn = 20, /*!< Brown-Out Detect Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 43 | ENET_IRQn = 21, /*!< Ethernet Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 44 | USB_IRQn = 22, /*!< USB Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 45 | CAN_IRQn = 23, /*!< CAN Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 46 | MIC_IRQn = 24, /*!< Multimedia Interface Controler */ |
bogdanm | 66:9c8f0e3462fb | 47 | DMA_IRQn = 25, /*!< General Purpose DMA Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 48 | TIMER2_IRQn = 26, /*!< Timer2 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 49 | TIMER3_IRQn = 27, /*!< Timer3 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 50 | UART2_IRQn = 28, /*!< UART2 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 51 | UART3_IRQn = 29, /*!< UART3 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 52 | I2C2_IRQn = 30, /*!< I2C2 Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 53 | I2S_IRQn = 31, /*!< I2S Interrupt */ |
bogdanm | 66:9c8f0e3462fb | 54 | } IRQn_Type; |
bogdanm | 66:9c8f0e3462fb | 55 | |
bogdanm | 66:9c8f0e3462fb | 56 | /* |
bogdanm | 66:9c8f0e3462fb | 57 | * ========================================================================== |
bogdanm | 66:9c8f0e3462fb | 58 | * ----------- Processor and Core Peripheral Section ------------------------ |
bogdanm | 66:9c8f0e3462fb | 59 | * ========================================================================== |
bogdanm | 66:9c8f0e3462fb | 60 | */ |
bogdanm | 66:9c8f0e3462fb | 61 | |
bogdanm | 66:9c8f0e3462fb | 62 | /* Configuration of the ARM7 Processor and Core Peripherals */ |
bogdanm | 66:9c8f0e3462fb | 63 | #define __MPU_PRESENT 0 /*!< MPU present or not */ |
bogdanm | 66:9c8f0e3462fb | 64 | #define __NVIC_PRIO_BITS 4 /*!< Number of Bits used for Priority Levels */ |
bogdanm | 66:9c8f0e3462fb | 65 | #define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ |
bogdanm | 66:9c8f0e3462fb | 66 | |
bogdanm | 66:9c8f0e3462fb | 67 | |
bogdanm | 66:9c8f0e3462fb | 68 | #include <core_arm7.h> |
bogdanm | 66:9c8f0e3462fb | 69 | #include "system_LPC23xx.h" /* System Header */ |
bogdanm | 66:9c8f0e3462fb | 70 | |
bogdanm | 66:9c8f0e3462fb | 71 | |
bogdanm | 66:9c8f0e3462fb | 72 | /******************************************************************************/ |
bogdanm | 66:9c8f0e3462fb | 73 | /* Device Specific Peripheral registers structures */ |
bogdanm | 66:9c8f0e3462fb | 74 | /******************************************************************************/ |
bogdanm | 66:9c8f0e3462fb | 75 | #if defined ( __CC_ARM ) |
bogdanm | 66:9c8f0e3462fb | 76 | #pragma anon_unions |
bogdanm | 66:9c8f0e3462fb | 77 | #endif |
bogdanm | 66:9c8f0e3462fb | 78 | |
bogdanm | 66:9c8f0e3462fb | 79 | /*------------- Vector Interupt Controler (VIC) ------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 80 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 81 | { |
bogdanm | 66:9c8f0e3462fb | 82 | __I uint32_t IRQStatus; |
bogdanm | 66:9c8f0e3462fb | 83 | __I uint32_t FIQStatus; |
bogdanm | 66:9c8f0e3462fb | 84 | __I uint32_t RawIntr; |
bogdanm | 66:9c8f0e3462fb | 85 | __IO uint32_t IntSelect; |
bogdanm | 66:9c8f0e3462fb | 86 | __IO uint32_t IntEnable; |
bogdanm | 66:9c8f0e3462fb | 87 | __O uint32_t IntEnClr; |
bogdanm | 66:9c8f0e3462fb | 88 | __IO uint32_t SoftInt; |
bogdanm | 66:9c8f0e3462fb | 89 | __O uint32_t SoftIntClr; |
bogdanm | 66:9c8f0e3462fb | 90 | __IO uint32_t Protection; |
bogdanm | 66:9c8f0e3462fb | 91 | __IO uint32_t SWPriorityMask; |
bogdanm | 66:9c8f0e3462fb | 92 | __IO uint32_t RESERVED0[54]; |
bogdanm | 66:9c8f0e3462fb | 93 | __IO uint32_t VectAddr[32]; |
bogdanm | 66:9c8f0e3462fb | 94 | __IO uint32_t RESERVED1[32]; |
bogdanm | 66:9c8f0e3462fb | 95 | __IO uint32_t VectPriority[32]; |
bogdanm | 66:9c8f0e3462fb | 96 | __IO uint32_t RESERVED2[800]; |
bogdanm | 66:9c8f0e3462fb | 97 | __IO uint32_t Address; |
bogdanm | 66:9c8f0e3462fb | 98 | } LPC_VIC_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 99 | |
bogdanm | 66:9c8f0e3462fb | 100 | /*------------- System Control (SC) ------------------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 101 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 102 | { |
bogdanm | 66:9c8f0e3462fb | 103 | __IO uint32_t MAMCR; |
bogdanm | 66:9c8f0e3462fb | 104 | __IO uint32_t MAMTIM; |
bogdanm | 66:9c8f0e3462fb | 105 | uint32_t RESERVED0[14]; |
bogdanm | 66:9c8f0e3462fb | 106 | __IO uint32_t MEMMAP; |
bogdanm | 66:9c8f0e3462fb | 107 | uint32_t RESERVED1[15]; |
bogdanm | 66:9c8f0e3462fb | 108 | __IO uint32_t PLL0CON; /* Clocking and Power Control */ |
bogdanm | 66:9c8f0e3462fb | 109 | __IO uint32_t PLL0CFG; |
bogdanm | 66:9c8f0e3462fb | 110 | __I uint32_t PLL0STAT; |
bogdanm | 66:9c8f0e3462fb | 111 | __O uint32_t PLL0FEED; |
bogdanm | 66:9c8f0e3462fb | 112 | uint32_t RESERVED2[12]; |
bogdanm | 66:9c8f0e3462fb | 113 | __IO uint32_t PCON; |
bogdanm | 66:9c8f0e3462fb | 114 | __IO uint32_t PCONP; |
bogdanm | 66:9c8f0e3462fb | 115 | uint32_t RESERVED3[15]; |
bogdanm | 66:9c8f0e3462fb | 116 | __IO uint32_t CCLKCFG; |
bogdanm | 66:9c8f0e3462fb | 117 | __IO uint32_t USBCLKCFG; |
bogdanm | 66:9c8f0e3462fb | 118 | __IO uint32_t CLKSRCSEL; |
bogdanm | 66:9c8f0e3462fb | 119 | uint32_t RESERVED4[12]; |
bogdanm | 66:9c8f0e3462fb | 120 | __IO uint32_t EXTINT; /* External Interrupts */ |
bogdanm | 66:9c8f0e3462fb | 121 | __IO uint32_t INTWAKE; |
bogdanm | 66:9c8f0e3462fb | 122 | __IO uint32_t EXTMODE; |
bogdanm | 66:9c8f0e3462fb | 123 | __IO uint32_t EXTPOLAR; |
bogdanm | 66:9c8f0e3462fb | 124 | uint32_t RESERVED6[12]; |
bogdanm | 66:9c8f0e3462fb | 125 | __IO uint32_t RSID; /* Reset */ |
bogdanm | 66:9c8f0e3462fb | 126 | __IO uint32_t CSPR; |
bogdanm | 66:9c8f0e3462fb | 127 | __IO uint32_t AHBCFG1; |
bogdanm | 66:9c8f0e3462fb | 128 | __IO uint32_t AHBCFG2; |
bogdanm | 66:9c8f0e3462fb | 129 | uint32_t RESERVED7[4]; |
bogdanm | 66:9c8f0e3462fb | 130 | __IO uint32_t SCS; /* Syscon Miscellaneous Registers */ |
bogdanm | 66:9c8f0e3462fb | 131 | __IO uint32_t IRCTRIM; /* Clock Dividers */ |
bogdanm | 66:9c8f0e3462fb | 132 | __IO uint32_t PCLKSEL0; |
bogdanm | 66:9c8f0e3462fb | 133 | __IO uint32_t PCLKSEL1; |
bogdanm | 66:9c8f0e3462fb | 134 | uint32_t RESERVED8[4]; |
bogdanm | 66:9c8f0e3462fb | 135 | __IO uint32_t USBIntSt; /* USB Device/OTG Interrupt Register */ |
bogdanm | 66:9c8f0e3462fb | 136 | uint32_t RESERVED9; |
bogdanm | 66:9c8f0e3462fb | 137 | // __IO uint32_t CLKOUTCFG; /* Clock Output Configuration */ |
bogdanm | 66:9c8f0e3462fb | 138 | } LPC_SC_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 139 | |
bogdanm | 66:9c8f0e3462fb | 140 | /*------------- Pin Connect Block (PINCON) -----------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 141 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 142 | { |
bogdanm | 66:9c8f0e3462fb | 143 | __IO uint32_t PINSEL0; |
bogdanm | 66:9c8f0e3462fb | 144 | __IO uint32_t PINSEL1; |
bogdanm | 66:9c8f0e3462fb | 145 | __IO uint32_t PINSEL2; |
bogdanm | 66:9c8f0e3462fb | 146 | __IO uint32_t PINSEL3; |
bogdanm | 66:9c8f0e3462fb | 147 | __IO uint32_t PINSEL4; |
bogdanm | 66:9c8f0e3462fb | 148 | __IO uint32_t PINSEL5; |
bogdanm | 66:9c8f0e3462fb | 149 | __IO uint32_t PINSEL6; |
bogdanm | 66:9c8f0e3462fb | 150 | __IO uint32_t PINSEL7; |
bogdanm | 66:9c8f0e3462fb | 151 | __IO uint32_t PINSEL8; |
bogdanm | 66:9c8f0e3462fb | 152 | __IO uint32_t PINSEL9; |
bogdanm | 66:9c8f0e3462fb | 153 | __IO uint32_t PINSEL10; |
bogdanm | 66:9c8f0e3462fb | 154 | uint32_t RESERVED0[5]; |
bogdanm | 66:9c8f0e3462fb | 155 | __IO uint32_t PINMODE0; |
bogdanm | 66:9c8f0e3462fb | 156 | __IO uint32_t PINMODE1; |
bogdanm | 66:9c8f0e3462fb | 157 | __IO uint32_t PINMODE2; |
bogdanm | 66:9c8f0e3462fb | 158 | __IO uint32_t PINMODE3; |
bogdanm | 66:9c8f0e3462fb | 159 | __IO uint32_t PINMODE4; |
bogdanm | 66:9c8f0e3462fb | 160 | __IO uint32_t PINMODE5; |
bogdanm | 66:9c8f0e3462fb | 161 | __IO uint32_t PINMODE6; |
bogdanm | 66:9c8f0e3462fb | 162 | __IO uint32_t PINMODE7; |
bogdanm | 66:9c8f0e3462fb | 163 | __IO uint32_t PINMODE8; |
bogdanm | 66:9c8f0e3462fb | 164 | __IO uint32_t PINMODE9; |
bogdanm | 66:9c8f0e3462fb | 165 | __IO uint32_t PINMODE_OD0; |
bogdanm | 66:9c8f0e3462fb | 166 | __IO uint32_t PINMODE_OD1; |
bogdanm | 66:9c8f0e3462fb | 167 | __IO uint32_t PINMODE_OD2; |
bogdanm | 66:9c8f0e3462fb | 168 | __IO uint32_t PINMODE_OD3; |
bogdanm | 66:9c8f0e3462fb | 169 | __IO uint32_t PINMODE_OD4; |
bogdanm | 66:9c8f0e3462fb | 170 | } LPC_PINCON_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 171 | |
bogdanm | 66:9c8f0e3462fb | 172 | /*------------- General Purpose Input/Output (GPIO) --------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 173 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 174 | { |
bogdanm | 66:9c8f0e3462fb | 175 | __IO uint32_t FIODIR; |
bogdanm | 66:9c8f0e3462fb | 176 | uint32_t RESERVED0[3]; |
bogdanm | 66:9c8f0e3462fb | 177 | __IO uint32_t FIOMASK; |
bogdanm | 66:9c8f0e3462fb | 178 | __IO uint32_t FIOPIN; |
bogdanm | 66:9c8f0e3462fb | 179 | __IO uint32_t FIOSET; |
bogdanm | 66:9c8f0e3462fb | 180 | __O uint32_t FIOCLR; |
bogdanm | 66:9c8f0e3462fb | 181 | } LPC_GPIO_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 182 | |
bogdanm | 66:9c8f0e3462fb | 183 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 184 | { |
bogdanm | 66:9c8f0e3462fb | 185 | __I uint32_t IntStatus; |
bogdanm | 66:9c8f0e3462fb | 186 | __I uint32_t IO0IntStatR; |
bogdanm | 66:9c8f0e3462fb | 187 | __I uint32_t IO0IntStatF; |
bogdanm | 66:9c8f0e3462fb | 188 | __O uint32_t IO0IntClr; |
bogdanm | 66:9c8f0e3462fb | 189 | __IO uint32_t IO0IntEnR; |
bogdanm | 66:9c8f0e3462fb | 190 | __IO uint32_t IO0IntEnF; |
bogdanm | 66:9c8f0e3462fb | 191 | uint32_t RESERVED0[3]; |
bogdanm | 66:9c8f0e3462fb | 192 | __I uint32_t IO2IntStatR; |
bogdanm | 66:9c8f0e3462fb | 193 | __I uint32_t IO2IntStatF; |
bogdanm | 66:9c8f0e3462fb | 194 | __O uint32_t IO2IntClr; |
bogdanm | 66:9c8f0e3462fb | 195 | __IO uint32_t IO2IntEnR; |
bogdanm | 66:9c8f0e3462fb | 196 | __IO uint32_t IO2IntEnF; |
bogdanm | 66:9c8f0e3462fb | 197 | } LPC_GPIOINT_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 198 | |
bogdanm | 66:9c8f0e3462fb | 199 | /*------------- Timer (TIM) --------------------------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 200 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 201 | { |
bogdanm | 66:9c8f0e3462fb | 202 | __IO uint32_t IR; |
bogdanm | 66:9c8f0e3462fb | 203 | __IO uint32_t TCR; |
bogdanm | 66:9c8f0e3462fb | 204 | __IO uint32_t TC; |
bogdanm | 66:9c8f0e3462fb | 205 | __IO uint32_t PR; |
bogdanm | 66:9c8f0e3462fb | 206 | __IO uint32_t PC; |
bogdanm | 66:9c8f0e3462fb | 207 | __IO uint32_t MCR; |
bogdanm | 66:9c8f0e3462fb | 208 | __IO uint32_t MR0; |
bogdanm | 66:9c8f0e3462fb | 209 | __IO uint32_t MR1; |
bogdanm | 66:9c8f0e3462fb | 210 | __IO uint32_t MR2; |
bogdanm | 66:9c8f0e3462fb | 211 | __IO uint32_t MR3; |
bogdanm | 66:9c8f0e3462fb | 212 | __IO uint32_t CCR; |
bogdanm | 66:9c8f0e3462fb | 213 | __I uint32_t CR0; |
bogdanm | 66:9c8f0e3462fb | 214 | __I uint32_t CR1; |
bogdanm | 66:9c8f0e3462fb | 215 | uint32_t RESERVED0[2]; |
bogdanm | 66:9c8f0e3462fb | 216 | __IO uint32_t EMR; |
bogdanm | 66:9c8f0e3462fb | 217 | uint32_t RESERVED1[12]; |
bogdanm | 66:9c8f0e3462fb | 218 | __IO uint32_t CTCR; |
bogdanm | 66:9c8f0e3462fb | 219 | } LPC_TIM_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 220 | |
bogdanm | 66:9c8f0e3462fb | 221 | /*------------- Pulse-Width Modulation (PWM) ---------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 222 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 223 | { |
bogdanm | 66:9c8f0e3462fb | 224 | __IO uint32_t IR; |
bogdanm | 66:9c8f0e3462fb | 225 | __IO uint32_t TCR; |
bogdanm | 66:9c8f0e3462fb | 226 | __IO uint32_t TC; |
bogdanm | 66:9c8f0e3462fb | 227 | __IO uint32_t PR; |
bogdanm | 66:9c8f0e3462fb | 228 | __IO uint32_t PC; |
bogdanm | 66:9c8f0e3462fb | 229 | __IO uint32_t MCR; |
bogdanm | 66:9c8f0e3462fb | 230 | __IO uint32_t MR0; |
bogdanm | 66:9c8f0e3462fb | 231 | __IO uint32_t MR1; |
bogdanm | 66:9c8f0e3462fb | 232 | __IO uint32_t MR2; |
bogdanm | 66:9c8f0e3462fb | 233 | __IO uint32_t MR3; |
bogdanm | 66:9c8f0e3462fb | 234 | __IO uint32_t CCR; |
bogdanm | 66:9c8f0e3462fb | 235 | __I uint32_t CR0; |
bogdanm | 66:9c8f0e3462fb | 236 | __I uint32_t CR1; |
bogdanm | 66:9c8f0e3462fb | 237 | __I uint32_t CR2; |
bogdanm | 66:9c8f0e3462fb | 238 | __I uint32_t CR3; |
bogdanm | 66:9c8f0e3462fb | 239 | uint32_t RESERVED0; |
bogdanm | 66:9c8f0e3462fb | 240 | __IO uint32_t MR4; |
bogdanm | 66:9c8f0e3462fb | 241 | __IO uint32_t MR5; |
bogdanm | 66:9c8f0e3462fb | 242 | __IO uint32_t MR6; |
bogdanm | 66:9c8f0e3462fb | 243 | __IO uint32_t PCR; |
bogdanm | 66:9c8f0e3462fb | 244 | __IO uint32_t LER; |
bogdanm | 66:9c8f0e3462fb | 245 | uint32_t RESERVED1[7]; |
bogdanm | 66:9c8f0e3462fb | 246 | __IO uint32_t CTCR; |
bogdanm | 66:9c8f0e3462fb | 247 | } LPC_PWM_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 248 | |
bogdanm | 66:9c8f0e3462fb | 249 | /*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/ |
bogdanm | 66:9c8f0e3462fb | 250 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 251 | { |
bogdanm | 66:9c8f0e3462fb | 252 | union { |
bogdanm | 66:9c8f0e3462fb | 253 | __I uint8_t RBR; |
bogdanm | 66:9c8f0e3462fb | 254 | __O uint8_t THR; |
bogdanm | 66:9c8f0e3462fb | 255 | __IO uint8_t DLL; |
bogdanm | 66:9c8f0e3462fb | 256 | uint32_t RESERVED0; |
bogdanm | 66:9c8f0e3462fb | 257 | }; |
bogdanm | 66:9c8f0e3462fb | 258 | union { |
bogdanm | 66:9c8f0e3462fb | 259 | __IO uint8_t DLM; |
bogdanm | 66:9c8f0e3462fb | 260 | __IO uint32_t IER; |
bogdanm | 66:9c8f0e3462fb | 261 | }; |
bogdanm | 66:9c8f0e3462fb | 262 | union { |
bogdanm | 66:9c8f0e3462fb | 263 | __I uint32_t IIR; |
bogdanm | 66:9c8f0e3462fb | 264 | __O uint8_t FCR; |
bogdanm | 66:9c8f0e3462fb | 265 | }; |
bogdanm | 66:9c8f0e3462fb | 266 | __IO uint8_t LCR; |
bogdanm | 66:9c8f0e3462fb | 267 | uint8_t RESERVED1[7]; |
bogdanm | 66:9c8f0e3462fb | 268 | __IO uint8_t LSR; |
bogdanm | 66:9c8f0e3462fb | 269 | uint8_t RESERVED2[7]; |
bogdanm | 66:9c8f0e3462fb | 270 | __IO uint8_t SCR; |
bogdanm | 66:9c8f0e3462fb | 271 | uint8_t RESERVED3[3]; |
bogdanm | 66:9c8f0e3462fb | 272 | __IO uint32_t ACR; |
bogdanm | 66:9c8f0e3462fb | 273 | __IO uint8_t ICR; |
bogdanm | 66:9c8f0e3462fb | 274 | uint8_t RESERVED4[3]; |
bogdanm | 66:9c8f0e3462fb | 275 | __IO uint8_t FDR; |
bogdanm | 66:9c8f0e3462fb | 276 | uint8_t RESERVED5[7]; |
bogdanm | 66:9c8f0e3462fb | 277 | __IO uint8_t TER; |
bogdanm | 66:9c8f0e3462fb | 278 | uint8_t RESERVED6[27]; |
bogdanm | 66:9c8f0e3462fb | 279 | __IO uint8_t RS485CTRL; |
bogdanm | 66:9c8f0e3462fb | 280 | uint8_t RESERVED7[3]; |
bogdanm | 66:9c8f0e3462fb | 281 | __IO uint8_t ADRMATCH; |
bogdanm | 66:9c8f0e3462fb | 282 | } LPC_UART_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 283 | |
bogdanm | 66:9c8f0e3462fb | 284 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 285 | { |
bogdanm | 66:9c8f0e3462fb | 286 | union { |
bogdanm | 66:9c8f0e3462fb | 287 | __I uint8_t RBR; |
bogdanm | 66:9c8f0e3462fb | 288 | __O uint8_t THR; |
bogdanm | 66:9c8f0e3462fb | 289 | __IO uint8_t DLL; |
bogdanm | 66:9c8f0e3462fb | 290 | uint32_t RESERVED0; |
bogdanm | 66:9c8f0e3462fb | 291 | }; |
bogdanm | 66:9c8f0e3462fb | 292 | union { |
bogdanm | 66:9c8f0e3462fb | 293 | __IO uint8_t DLM; |
bogdanm | 66:9c8f0e3462fb | 294 | __IO uint32_t IER; |
bogdanm | 66:9c8f0e3462fb | 295 | }; |
bogdanm | 66:9c8f0e3462fb | 296 | union { |
bogdanm | 66:9c8f0e3462fb | 297 | __I uint32_t IIR; |
bogdanm | 66:9c8f0e3462fb | 298 | __O uint8_t FCR; |
bogdanm | 66:9c8f0e3462fb | 299 | }; |
bogdanm | 66:9c8f0e3462fb | 300 | __IO uint8_t LCR; |
bogdanm | 66:9c8f0e3462fb | 301 | uint8_t RESERVED1[3]; |
bogdanm | 66:9c8f0e3462fb | 302 | __IO uint8_t MCR; |
bogdanm | 66:9c8f0e3462fb | 303 | uint8_t RESERVED2[3]; |
bogdanm | 66:9c8f0e3462fb | 304 | __IO uint8_t LSR; |
bogdanm | 66:9c8f0e3462fb | 305 | uint8_t RESERVED3[3]; |
bogdanm | 66:9c8f0e3462fb | 306 | __IO uint8_t MSR; |
bogdanm | 66:9c8f0e3462fb | 307 | uint8_t RESERVED4[3]; |
bogdanm | 66:9c8f0e3462fb | 308 | __IO uint8_t SCR; |
bogdanm | 66:9c8f0e3462fb | 309 | uint8_t RESERVED5[3]; |
bogdanm | 66:9c8f0e3462fb | 310 | __IO uint32_t ACR; |
bogdanm | 66:9c8f0e3462fb | 311 | uint32_t RESERVED6; |
bogdanm | 66:9c8f0e3462fb | 312 | __IO uint32_t FDR; |
bogdanm | 66:9c8f0e3462fb | 313 | uint32_t RESERVED7; |
bogdanm | 66:9c8f0e3462fb | 314 | __IO uint8_t TER; |
bogdanm | 66:9c8f0e3462fb | 315 | uint8_t RESERVED8[27]; |
bogdanm | 66:9c8f0e3462fb | 316 | __IO uint8_t RS485CTRL; |
bogdanm | 66:9c8f0e3462fb | 317 | uint8_t RESERVED9[3]; |
bogdanm | 66:9c8f0e3462fb | 318 | __IO uint8_t ADRMATCH; |
bogdanm | 66:9c8f0e3462fb | 319 | uint8_t RESERVED10[3]; |
bogdanm | 66:9c8f0e3462fb | 320 | __IO uint8_t RS485DLY; |
bogdanm | 66:9c8f0e3462fb | 321 | } LPC_UART1_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 322 | |
bogdanm | 66:9c8f0e3462fb | 323 | /*------------- Serial Peripheral Interface (SPI) ----------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 324 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 325 | { |
bogdanm | 66:9c8f0e3462fb | 326 | __IO uint32_t SPCR; |
bogdanm | 66:9c8f0e3462fb | 327 | __I uint32_t SPSR; |
bogdanm | 66:9c8f0e3462fb | 328 | __IO uint32_t SPDR; |
bogdanm | 66:9c8f0e3462fb | 329 | __IO uint32_t SPCCR; |
bogdanm | 66:9c8f0e3462fb | 330 | uint32_t RESERVED0[3]; |
bogdanm | 66:9c8f0e3462fb | 331 | __IO uint32_t SPINT; |
bogdanm | 66:9c8f0e3462fb | 332 | } LPC_SPI_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 333 | |
bogdanm | 66:9c8f0e3462fb | 334 | /*------------- Synchronous Serial Communication (SSP) -----------------------*/ |
bogdanm | 66:9c8f0e3462fb | 335 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 336 | { |
bogdanm | 66:9c8f0e3462fb | 337 | __IO uint32_t CR0; |
bogdanm | 66:9c8f0e3462fb | 338 | __IO uint32_t CR1; |
bogdanm | 66:9c8f0e3462fb | 339 | __IO uint32_t DR; |
bogdanm | 66:9c8f0e3462fb | 340 | __I uint32_t SR; |
bogdanm | 66:9c8f0e3462fb | 341 | __IO uint32_t CPSR; |
bogdanm | 66:9c8f0e3462fb | 342 | __IO uint32_t IMSC; |
bogdanm | 66:9c8f0e3462fb | 343 | __IO uint32_t RIS; |
bogdanm | 66:9c8f0e3462fb | 344 | __IO uint32_t MIS; |
bogdanm | 66:9c8f0e3462fb | 345 | __IO uint32_t ICR; |
bogdanm | 66:9c8f0e3462fb | 346 | __IO uint32_t DMACR; |
bogdanm | 66:9c8f0e3462fb | 347 | } LPC_SSP_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 348 | |
bogdanm | 66:9c8f0e3462fb | 349 | /*------------- Inter-Integrated Circuit (I2C) -------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 350 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 351 | { |
bogdanm | 66:9c8f0e3462fb | 352 | __IO uint32_t I2CONSET; |
bogdanm | 66:9c8f0e3462fb | 353 | __I uint32_t I2STAT; |
bogdanm | 66:9c8f0e3462fb | 354 | __IO uint32_t I2DAT; |
bogdanm | 66:9c8f0e3462fb | 355 | __IO uint32_t I2ADR0; |
bogdanm | 66:9c8f0e3462fb | 356 | __IO uint32_t I2SCLH; |
bogdanm | 66:9c8f0e3462fb | 357 | __IO uint32_t I2SCLL; |
bogdanm | 66:9c8f0e3462fb | 358 | __O uint32_t I2CONCLR; |
bogdanm | 66:9c8f0e3462fb | 359 | __IO uint32_t MMCTRL; |
bogdanm | 66:9c8f0e3462fb | 360 | __IO uint32_t I2ADR1; |
bogdanm | 66:9c8f0e3462fb | 361 | __IO uint32_t I2ADR2; |
bogdanm | 66:9c8f0e3462fb | 362 | __IO uint32_t I2ADR3; |
bogdanm | 66:9c8f0e3462fb | 363 | __I uint32_t I2DATA_BUFFER; |
bogdanm | 66:9c8f0e3462fb | 364 | __IO uint32_t I2MASK0; |
bogdanm | 66:9c8f0e3462fb | 365 | __IO uint32_t I2MASK1; |
bogdanm | 66:9c8f0e3462fb | 366 | __IO uint32_t I2MASK2; |
bogdanm | 66:9c8f0e3462fb | 367 | __IO uint32_t I2MASK3; |
bogdanm | 66:9c8f0e3462fb | 368 | } LPC_I2C_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 369 | |
bogdanm | 66:9c8f0e3462fb | 370 | /*------------- Inter IC Sound (I2S) -----------------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 371 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 372 | { |
bogdanm | 66:9c8f0e3462fb | 373 | __IO uint32_t I2SDAO; |
bogdanm | 66:9c8f0e3462fb | 374 | __I uint32_t I2SDAI; |
bogdanm | 66:9c8f0e3462fb | 375 | __O uint32_t I2STXFIFO; |
bogdanm | 66:9c8f0e3462fb | 376 | __I uint32_t I2SRXFIFO; |
bogdanm | 66:9c8f0e3462fb | 377 | __I uint32_t I2SSTATE; |
bogdanm | 66:9c8f0e3462fb | 378 | __IO uint32_t I2SDMA1; |
bogdanm | 66:9c8f0e3462fb | 379 | __IO uint32_t I2SDMA2; |
bogdanm | 66:9c8f0e3462fb | 380 | __IO uint32_t I2SIRQ; |
bogdanm | 66:9c8f0e3462fb | 381 | __IO uint32_t I2STXRATE; |
bogdanm | 66:9c8f0e3462fb | 382 | __IO uint32_t I2SRXRATE; |
bogdanm | 66:9c8f0e3462fb | 383 | __IO uint32_t I2STXBITRATE; |
bogdanm | 66:9c8f0e3462fb | 384 | __IO uint32_t I2SRXBITRATE; |
bogdanm | 66:9c8f0e3462fb | 385 | __IO uint32_t I2STXMODE; |
bogdanm | 66:9c8f0e3462fb | 386 | __IO uint32_t I2SRXMODE; |
bogdanm | 66:9c8f0e3462fb | 387 | } LPC_I2S_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 388 | |
bogdanm | 66:9c8f0e3462fb | 389 | /*------------- Real-Time Clock (RTC) ----------------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 390 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 391 | { |
bogdanm | 66:9c8f0e3462fb | 392 | __IO uint8_t ILR; |
bogdanm | 66:9c8f0e3462fb | 393 | uint8_t RESERVED0[3]; |
bogdanm | 66:9c8f0e3462fb | 394 | __IO uint8_t CTC; |
bogdanm | 66:9c8f0e3462fb | 395 | uint8_t RESERVED1[3]; |
bogdanm | 66:9c8f0e3462fb | 396 | __IO uint8_t CCR; |
bogdanm | 66:9c8f0e3462fb | 397 | uint8_t RESERVED2[3]; |
bogdanm | 66:9c8f0e3462fb | 398 | __IO uint8_t CIIR; |
bogdanm | 66:9c8f0e3462fb | 399 | uint8_t RESERVED3[3]; |
bogdanm | 66:9c8f0e3462fb | 400 | __IO uint8_t AMR; |
bogdanm | 66:9c8f0e3462fb | 401 | uint8_t RESERVED4[3]; |
bogdanm | 66:9c8f0e3462fb | 402 | __I uint32_t CTIME0; |
bogdanm | 66:9c8f0e3462fb | 403 | __I uint32_t CTIME1; |
bogdanm | 66:9c8f0e3462fb | 404 | __I uint32_t CTIME2; |
bogdanm | 66:9c8f0e3462fb | 405 | __IO uint8_t SEC; |
bogdanm | 66:9c8f0e3462fb | 406 | uint8_t RESERVED5[3]; |
bogdanm | 66:9c8f0e3462fb | 407 | __IO uint8_t MIN; |
bogdanm | 66:9c8f0e3462fb | 408 | uint8_t RESERVED6[3]; |
bogdanm | 66:9c8f0e3462fb | 409 | __IO uint8_t HOUR; |
bogdanm | 66:9c8f0e3462fb | 410 | uint8_t RESERVED7[3]; |
bogdanm | 66:9c8f0e3462fb | 411 | __IO uint8_t DOM; |
bogdanm | 66:9c8f0e3462fb | 412 | uint8_t RESERVED8[3]; |
bogdanm | 66:9c8f0e3462fb | 413 | __IO uint8_t DOW; |
bogdanm | 66:9c8f0e3462fb | 414 | uint8_t RESERVED9[3]; |
bogdanm | 66:9c8f0e3462fb | 415 | __IO uint16_t DOY; |
bogdanm | 66:9c8f0e3462fb | 416 | uint16_t RESERVED10; |
bogdanm | 66:9c8f0e3462fb | 417 | __IO uint8_t MONTH; |
bogdanm | 66:9c8f0e3462fb | 418 | uint8_t RESERVED11[3]; |
bogdanm | 66:9c8f0e3462fb | 419 | __IO uint16_t YEAR; |
bogdanm | 66:9c8f0e3462fb | 420 | uint16_t RESERVED12; |
bogdanm | 66:9c8f0e3462fb | 421 | __IO uint32_t CALIBRATION; |
bogdanm | 66:9c8f0e3462fb | 422 | __IO uint32_t GPREG0; |
bogdanm | 66:9c8f0e3462fb | 423 | __IO uint32_t GPREG1; |
bogdanm | 66:9c8f0e3462fb | 424 | __IO uint32_t GPREG2; |
bogdanm | 66:9c8f0e3462fb | 425 | __IO uint32_t GPREG3; |
bogdanm | 66:9c8f0e3462fb | 426 | __IO uint32_t GPREG4; |
bogdanm | 66:9c8f0e3462fb | 427 | __IO uint8_t WAKEUPDIS; |
bogdanm | 66:9c8f0e3462fb | 428 | uint8_t RESERVED13[3]; |
bogdanm | 66:9c8f0e3462fb | 429 | __IO uint8_t PWRCTRL; |
bogdanm | 66:9c8f0e3462fb | 430 | uint8_t RESERVED14[3]; |
bogdanm | 66:9c8f0e3462fb | 431 | __IO uint8_t ALSEC; |
bogdanm | 66:9c8f0e3462fb | 432 | uint8_t RESERVED15[3]; |
bogdanm | 66:9c8f0e3462fb | 433 | __IO uint8_t ALMIN; |
bogdanm | 66:9c8f0e3462fb | 434 | uint8_t RESERVED16[3]; |
bogdanm | 66:9c8f0e3462fb | 435 | __IO uint8_t ALHOUR; |
bogdanm | 66:9c8f0e3462fb | 436 | uint8_t RESERVED17[3]; |
bogdanm | 66:9c8f0e3462fb | 437 | __IO uint8_t ALDOM; |
bogdanm | 66:9c8f0e3462fb | 438 | uint8_t RESERVED18[3]; |
bogdanm | 66:9c8f0e3462fb | 439 | __IO uint8_t ALDOW; |
bogdanm | 66:9c8f0e3462fb | 440 | uint8_t RESERVED19[3]; |
bogdanm | 66:9c8f0e3462fb | 441 | __IO uint16_t ALDOY; |
bogdanm | 66:9c8f0e3462fb | 442 | uint16_t RESERVED20; |
bogdanm | 66:9c8f0e3462fb | 443 | __IO uint8_t ALMON; |
bogdanm | 66:9c8f0e3462fb | 444 | uint8_t RESERVED21[3]; |
bogdanm | 66:9c8f0e3462fb | 445 | __IO uint16_t ALYEAR; |
bogdanm | 66:9c8f0e3462fb | 446 | uint16_t RESERVED22; |
bogdanm | 66:9c8f0e3462fb | 447 | } LPC_RTC_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 448 | |
bogdanm | 66:9c8f0e3462fb | 449 | /*------------- Watchdog Timer (WDT) -----------------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 450 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 451 | { |
bogdanm | 66:9c8f0e3462fb | 452 | __IO uint8_t WDMOD; |
bogdanm | 66:9c8f0e3462fb | 453 | uint8_t RESERVED0[3]; |
bogdanm | 66:9c8f0e3462fb | 454 | __IO uint32_t WDTC; |
bogdanm | 66:9c8f0e3462fb | 455 | __O uint8_t WDFEED; |
bogdanm | 66:9c8f0e3462fb | 456 | uint8_t RESERVED1[3]; |
bogdanm | 66:9c8f0e3462fb | 457 | __I uint32_t WDTV; |
bogdanm | 66:9c8f0e3462fb | 458 | __IO uint32_t WDCLKSEL; |
bogdanm | 66:9c8f0e3462fb | 459 | } LPC_WDT_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 460 | |
bogdanm | 66:9c8f0e3462fb | 461 | /*------------- Analog-to-Digital Converter (ADC) ----------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 462 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 463 | { |
bogdanm | 66:9c8f0e3462fb | 464 | __IO uint32_t ADCR; |
bogdanm | 66:9c8f0e3462fb | 465 | __IO uint32_t ADGDR; |
bogdanm | 66:9c8f0e3462fb | 466 | uint32_t RESERVED0; |
bogdanm | 66:9c8f0e3462fb | 467 | __IO uint32_t ADINTEN; |
bogdanm | 66:9c8f0e3462fb | 468 | __I uint32_t ADDR0; |
bogdanm | 66:9c8f0e3462fb | 469 | __I uint32_t ADDR1; |
bogdanm | 66:9c8f0e3462fb | 470 | __I uint32_t ADDR2; |
bogdanm | 66:9c8f0e3462fb | 471 | __I uint32_t ADDR3; |
bogdanm | 66:9c8f0e3462fb | 472 | __I uint32_t ADDR4; |
bogdanm | 66:9c8f0e3462fb | 473 | __I uint32_t ADDR5; |
bogdanm | 66:9c8f0e3462fb | 474 | __I uint32_t ADDR6; |
bogdanm | 66:9c8f0e3462fb | 475 | __I uint32_t ADDR7; |
bogdanm | 66:9c8f0e3462fb | 476 | __I uint32_t ADSTAT; |
bogdanm | 66:9c8f0e3462fb | 477 | __IO uint32_t ADTRM; |
bogdanm | 66:9c8f0e3462fb | 478 | } LPC_ADC_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 479 | |
bogdanm | 66:9c8f0e3462fb | 480 | /*------------- Digital-to-Analog Converter (DAC) ----------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 481 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 482 | { |
bogdanm | 66:9c8f0e3462fb | 483 | __IO uint32_t DACR; |
bogdanm | 66:9c8f0e3462fb | 484 | __IO uint32_t DACCTRL; |
bogdanm | 66:9c8f0e3462fb | 485 | __IO uint16_t DACCNTVAL; |
bogdanm | 66:9c8f0e3462fb | 486 | } LPC_DAC_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 487 | |
bogdanm | 66:9c8f0e3462fb | 488 | /*------------- Multimedia Card Interface (MCI) ------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 489 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 490 | { |
bogdanm | 66:9c8f0e3462fb | 491 | __IO uint32_t MCIPower; /* Power control */ |
bogdanm | 66:9c8f0e3462fb | 492 | __IO uint32_t MCIClock; /* Clock control */ |
bogdanm | 66:9c8f0e3462fb | 493 | __IO uint32_t MCIArgument; |
bogdanm | 66:9c8f0e3462fb | 494 | __IO uint32_t MMCCommand; |
bogdanm | 66:9c8f0e3462fb | 495 | __I uint32_t MCIRespCmd; |
bogdanm | 66:9c8f0e3462fb | 496 | __I uint32_t MCIResponse0; |
bogdanm | 66:9c8f0e3462fb | 497 | __I uint32_t MCIResponse1; |
bogdanm | 66:9c8f0e3462fb | 498 | __I uint32_t MCIResponse2; |
bogdanm | 66:9c8f0e3462fb | 499 | __I uint32_t MCIResponse3; |
bogdanm | 66:9c8f0e3462fb | 500 | __IO uint32_t MCIDataTimer; |
bogdanm | 66:9c8f0e3462fb | 501 | __IO uint32_t MCIDataLength; |
bogdanm | 66:9c8f0e3462fb | 502 | __IO uint32_t MCIDataCtrl; |
bogdanm | 66:9c8f0e3462fb | 503 | __I uint32_t MCIDataCnt; |
bogdanm | 66:9c8f0e3462fb | 504 | } LPC_MCI_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 505 | |
bogdanm | 66:9c8f0e3462fb | 506 | /*------------- Controller Area Network (CAN) --------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 507 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 508 | { |
bogdanm | 66:9c8f0e3462fb | 509 | __IO uint32_t mask[512]; /* ID Masks */ |
bogdanm | 66:9c8f0e3462fb | 510 | } LPC_CANAF_RAM_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 511 | |
bogdanm | 66:9c8f0e3462fb | 512 | typedef struct /* Acceptance Filter Registers */ |
bogdanm | 66:9c8f0e3462fb | 513 | { |
bogdanm | 66:9c8f0e3462fb | 514 | __IO uint32_t AFMR; |
bogdanm | 66:9c8f0e3462fb | 515 | __IO uint32_t SFF_sa; |
bogdanm | 66:9c8f0e3462fb | 516 | __IO uint32_t SFF_GRP_sa; |
bogdanm | 66:9c8f0e3462fb | 517 | __IO uint32_t EFF_sa; |
bogdanm | 66:9c8f0e3462fb | 518 | __IO uint32_t EFF_GRP_sa; |
bogdanm | 66:9c8f0e3462fb | 519 | __IO uint32_t ENDofTable; |
bogdanm | 66:9c8f0e3462fb | 520 | __I uint32_t LUTerrAd; |
bogdanm | 66:9c8f0e3462fb | 521 | __I uint32_t LUTerr; |
bogdanm | 66:9c8f0e3462fb | 522 | } LPC_CANAF_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 523 | |
bogdanm | 66:9c8f0e3462fb | 524 | typedef struct /* Central Registers */ |
bogdanm | 66:9c8f0e3462fb | 525 | { |
bogdanm | 66:9c8f0e3462fb | 526 | __I uint32_t CANTxSR; |
bogdanm | 66:9c8f0e3462fb | 527 | __I uint32_t CANRxSR; |
bogdanm | 66:9c8f0e3462fb | 528 | __I uint32_t CANMSR; |
bogdanm | 66:9c8f0e3462fb | 529 | } LPC_CANCR_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 530 | |
bogdanm | 66:9c8f0e3462fb | 531 | typedef struct /* Controller Registers */ |
bogdanm | 66:9c8f0e3462fb | 532 | { |
bogdanm | 66:9c8f0e3462fb | 533 | __IO uint32_t MOD; |
bogdanm | 66:9c8f0e3462fb | 534 | __O uint32_t CMR; |
bogdanm | 66:9c8f0e3462fb | 535 | __IO uint32_t GSR; |
bogdanm | 66:9c8f0e3462fb | 536 | __I uint32_t ICR; |
bogdanm | 66:9c8f0e3462fb | 537 | __IO uint32_t IER; |
bogdanm | 66:9c8f0e3462fb | 538 | __IO uint32_t BTR; |
bogdanm | 66:9c8f0e3462fb | 539 | __IO uint32_t EWL; |
bogdanm | 66:9c8f0e3462fb | 540 | __I uint32_t SR; |
bogdanm | 66:9c8f0e3462fb | 541 | __IO uint32_t RFS; |
bogdanm | 66:9c8f0e3462fb | 542 | __IO uint32_t RID; |
bogdanm | 66:9c8f0e3462fb | 543 | __IO uint32_t RDA; |
bogdanm | 66:9c8f0e3462fb | 544 | __IO uint32_t RDB; |
bogdanm | 66:9c8f0e3462fb | 545 | __IO uint32_t TFI1; |
bogdanm | 66:9c8f0e3462fb | 546 | __IO uint32_t TID1; |
bogdanm | 66:9c8f0e3462fb | 547 | __IO uint32_t TDA1; |
bogdanm | 66:9c8f0e3462fb | 548 | __IO uint32_t TDB1; |
bogdanm | 66:9c8f0e3462fb | 549 | __IO uint32_t TFI2; |
bogdanm | 66:9c8f0e3462fb | 550 | __IO uint32_t TID2; |
bogdanm | 66:9c8f0e3462fb | 551 | __IO uint32_t TDA2; |
bogdanm | 66:9c8f0e3462fb | 552 | __IO uint32_t TDB2; |
bogdanm | 66:9c8f0e3462fb | 553 | __IO uint32_t TFI3; |
bogdanm | 66:9c8f0e3462fb | 554 | __IO uint32_t TID3; |
bogdanm | 66:9c8f0e3462fb | 555 | __IO uint32_t TDA3; |
bogdanm | 66:9c8f0e3462fb | 556 | __IO uint32_t TDB3; |
bogdanm | 66:9c8f0e3462fb | 557 | } LPC_CAN_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 558 | |
bogdanm | 66:9c8f0e3462fb | 559 | /*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/ |
bogdanm | 66:9c8f0e3462fb | 560 | typedef struct /* Common Registers */ |
bogdanm | 66:9c8f0e3462fb | 561 | { |
bogdanm | 66:9c8f0e3462fb | 562 | __I uint32_t DMACIntStat; |
bogdanm | 66:9c8f0e3462fb | 563 | __I uint32_t DMACIntTCStat; |
bogdanm | 66:9c8f0e3462fb | 564 | __O uint32_t DMACIntTCClear; |
bogdanm | 66:9c8f0e3462fb | 565 | __I uint32_t DMACIntErrStat; |
bogdanm | 66:9c8f0e3462fb | 566 | __O uint32_t DMACIntErrClr; |
bogdanm | 66:9c8f0e3462fb | 567 | __I uint32_t DMACRawIntTCStat; |
bogdanm | 66:9c8f0e3462fb | 568 | __I uint32_t DMACRawIntErrStat; |
bogdanm | 66:9c8f0e3462fb | 569 | __I uint32_t DMACEnbldChns; |
bogdanm | 66:9c8f0e3462fb | 570 | __IO uint32_t DMACSoftBReq; |
bogdanm | 66:9c8f0e3462fb | 571 | __IO uint32_t DMACSoftSReq; |
bogdanm | 66:9c8f0e3462fb | 572 | __IO uint32_t DMACSoftLBReq; |
bogdanm | 66:9c8f0e3462fb | 573 | __IO uint32_t DMACSoftLSReq; |
bogdanm | 66:9c8f0e3462fb | 574 | __IO uint32_t DMACConfig; |
bogdanm | 66:9c8f0e3462fb | 575 | __IO uint32_t DMACSync; |
bogdanm | 66:9c8f0e3462fb | 576 | } LPC_GPDMA_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 577 | |
bogdanm | 66:9c8f0e3462fb | 578 | typedef struct /* Channel Registers */ |
bogdanm | 66:9c8f0e3462fb | 579 | { |
bogdanm | 66:9c8f0e3462fb | 580 | __IO uint32_t DMACCSrcAddr; |
bogdanm | 66:9c8f0e3462fb | 581 | __IO uint32_t DMACCDestAddr; |
bogdanm | 66:9c8f0e3462fb | 582 | __IO uint32_t DMACCLLI; |
bogdanm | 66:9c8f0e3462fb | 583 | __IO uint32_t DMACCControl; |
bogdanm | 66:9c8f0e3462fb | 584 | __IO uint32_t DMACCConfig; |
bogdanm | 66:9c8f0e3462fb | 585 | } LPC_GPDMACH_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 586 | |
bogdanm | 66:9c8f0e3462fb | 587 | /*------------- Universal Serial Bus (USB) -----------------------------------*/ |
bogdanm | 66:9c8f0e3462fb | 588 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 589 | { |
bogdanm | 66:9c8f0e3462fb | 590 | __I uint32_t HcRevision; /* USB Host Registers */ |
bogdanm | 66:9c8f0e3462fb | 591 | __IO uint32_t HcControl; |
bogdanm | 66:9c8f0e3462fb | 592 | __IO uint32_t HcCommandStatus; |
bogdanm | 66:9c8f0e3462fb | 593 | __IO uint32_t HcInterruptStatus; |
bogdanm | 66:9c8f0e3462fb | 594 | __IO uint32_t HcInterruptEnable; |
bogdanm | 66:9c8f0e3462fb | 595 | __IO uint32_t HcInterruptDisable; |
bogdanm | 66:9c8f0e3462fb | 596 | __IO uint32_t HcHCCA; |
bogdanm | 66:9c8f0e3462fb | 597 | __I uint32_t HcPeriodCurrentED; |
bogdanm | 66:9c8f0e3462fb | 598 | __IO uint32_t HcControlHeadED; |
bogdanm | 66:9c8f0e3462fb | 599 | __IO uint32_t HcControlCurrentED; |
bogdanm | 66:9c8f0e3462fb | 600 | __IO uint32_t HcBulkHeadED; |
bogdanm | 66:9c8f0e3462fb | 601 | __IO uint32_t HcBulkCurrentED; |
bogdanm | 66:9c8f0e3462fb | 602 | __I uint32_t HcDoneHead; |
bogdanm | 66:9c8f0e3462fb | 603 | __IO uint32_t HcFmInterval; |
bogdanm | 66:9c8f0e3462fb | 604 | __I uint32_t HcFmRemaining; |
bogdanm | 66:9c8f0e3462fb | 605 | __I uint32_t HcFmNumber; |
bogdanm | 66:9c8f0e3462fb | 606 | __IO uint32_t HcPeriodicStart; |
bogdanm | 66:9c8f0e3462fb | 607 | __IO uint32_t HcLSTreshold; |
bogdanm | 66:9c8f0e3462fb | 608 | __IO uint32_t HcRhDescriptorA; |
bogdanm | 66:9c8f0e3462fb | 609 | __IO uint32_t HcRhDescriptorB; |
bogdanm | 66:9c8f0e3462fb | 610 | __IO uint32_t HcRhStatus; |
bogdanm | 66:9c8f0e3462fb | 611 | __IO uint32_t HcRhPortStatus1; |
bogdanm | 66:9c8f0e3462fb | 612 | __IO uint32_t HcRhPortStatus2; |
bogdanm | 66:9c8f0e3462fb | 613 | uint32_t RESERVED0[40]; |
bogdanm | 66:9c8f0e3462fb | 614 | __I uint32_t Module_ID; |
bogdanm | 66:9c8f0e3462fb | 615 | |
bogdanm | 66:9c8f0e3462fb | 616 | __I uint32_t OTGIntSt; /* USB On-The-Go Registers */ |
bogdanm | 66:9c8f0e3462fb | 617 | __IO uint32_t OTGIntEn; |
bogdanm | 66:9c8f0e3462fb | 618 | __O uint32_t OTGIntSet; |
bogdanm | 66:9c8f0e3462fb | 619 | __O uint32_t OTGIntClr; |
bogdanm | 66:9c8f0e3462fb | 620 | __IO uint32_t OTGStCtrl; |
bogdanm | 66:9c8f0e3462fb | 621 | __IO uint32_t OTGTmr; |
bogdanm | 66:9c8f0e3462fb | 622 | uint32_t RESERVED1[58]; |
bogdanm | 66:9c8f0e3462fb | 623 | |
bogdanm | 66:9c8f0e3462fb | 624 | __I uint32_t USBDevIntSt; /* USB Device Interrupt Registers */ |
bogdanm | 66:9c8f0e3462fb | 625 | __IO uint32_t USBDevIntEn; |
bogdanm | 66:9c8f0e3462fb | 626 | __O uint32_t USBDevIntClr; |
bogdanm | 66:9c8f0e3462fb | 627 | __O uint32_t USBDevIntSet; |
bogdanm | 66:9c8f0e3462fb | 628 | |
bogdanm | 66:9c8f0e3462fb | 629 | __O uint32_t USBCmdCode; /* USB Device SIE Command Registers */ |
bogdanm | 66:9c8f0e3462fb | 630 | __I uint32_t USBCmdData; |
bogdanm | 66:9c8f0e3462fb | 631 | |
bogdanm | 66:9c8f0e3462fb | 632 | __I uint32_t USBRxData; /* USB Device Transfer Registers */ |
bogdanm | 66:9c8f0e3462fb | 633 | __O uint32_t USBTxData; |
bogdanm | 66:9c8f0e3462fb | 634 | __I uint32_t USBRxPLen; |
bogdanm | 66:9c8f0e3462fb | 635 | __O uint32_t USBTxPLen; |
bogdanm | 66:9c8f0e3462fb | 636 | __IO uint32_t USBCtrl; |
bogdanm | 66:9c8f0e3462fb | 637 | __O uint32_t USBDevIntPri; |
bogdanm | 66:9c8f0e3462fb | 638 | |
bogdanm | 66:9c8f0e3462fb | 639 | __I uint32_t USBEpIntSt; /* USB Device Endpoint Interrupt Regs */ |
bogdanm | 66:9c8f0e3462fb | 640 | __IO uint32_t USBEpIntEn; |
bogdanm | 66:9c8f0e3462fb | 641 | __O uint32_t USBEpIntClr; |
bogdanm | 66:9c8f0e3462fb | 642 | __O uint32_t USBEpIntSet; |
bogdanm | 66:9c8f0e3462fb | 643 | __O uint32_t USBEpIntPri; |
bogdanm | 66:9c8f0e3462fb | 644 | |
bogdanm | 66:9c8f0e3462fb | 645 | __IO uint32_t USBReEp; /* USB Device Endpoint Realization Reg*/ |
bogdanm | 66:9c8f0e3462fb | 646 | __O uint32_t USBEpInd; |
bogdanm | 66:9c8f0e3462fb | 647 | __IO uint32_t USBMaxPSize; |
bogdanm | 66:9c8f0e3462fb | 648 | |
bogdanm | 66:9c8f0e3462fb | 649 | __I uint32_t USBDMARSt; /* USB Device DMA Registers */ |
bogdanm | 66:9c8f0e3462fb | 650 | __O uint32_t USBDMARClr; |
bogdanm | 66:9c8f0e3462fb | 651 | __O uint32_t USBDMARSet; |
bogdanm | 66:9c8f0e3462fb | 652 | uint32_t RESERVED2[9]; |
bogdanm | 66:9c8f0e3462fb | 653 | __IO uint32_t USBUDCAH; |
bogdanm | 66:9c8f0e3462fb | 654 | __I uint32_t USBEpDMASt; |
bogdanm | 66:9c8f0e3462fb | 655 | __O uint32_t USBEpDMAEn; |
bogdanm | 66:9c8f0e3462fb | 656 | __O uint32_t USBEpDMADis; |
bogdanm | 66:9c8f0e3462fb | 657 | __I uint32_t USBDMAIntSt; |
bogdanm | 66:9c8f0e3462fb | 658 | __IO uint32_t USBDMAIntEn; |
bogdanm | 66:9c8f0e3462fb | 659 | uint32_t RESERVED3[2]; |
bogdanm | 66:9c8f0e3462fb | 660 | __I uint32_t USBEoTIntSt; |
bogdanm | 66:9c8f0e3462fb | 661 | __O uint32_t USBEoTIntClr; |
bogdanm | 66:9c8f0e3462fb | 662 | __O uint32_t USBEoTIntSet; |
bogdanm | 66:9c8f0e3462fb | 663 | __I uint32_t USBNDDRIntSt; |
bogdanm | 66:9c8f0e3462fb | 664 | __O uint32_t USBNDDRIntClr; |
bogdanm | 66:9c8f0e3462fb | 665 | __O uint32_t USBNDDRIntSet; |
bogdanm | 66:9c8f0e3462fb | 666 | __I uint32_t USBSysErrIntSt; |
bogdanm | 66:9c8f0e3462fb | 667 | __O uint32_t USBSysErrIntClr; |
bogdanm | 66:9c8f0e3462fb | 668 | __O uint32_t USBSysErrIntSet; |
bogdanm | 66:9c8f0e3462fb | 669 | uint32_t RESERVED4[15]; |
bogdanm | 66:9c8f0e3462fb | 670 | |
bogdanm | 66:9c8f0e3462fb | 671 | __I uint32_t I2C_RX; /* USB OTG I2C Registers */ |
bogdanm | 66:9c8f0e3462fb | 672 | __O uint32_t I2C_WO; |
bogdanm | 66:9c8f0e3462fb | 673 | __I uint32_t I2C_STS; |
bogdanm | 66:9c8f0e3462fb | 674 | __IO uint32_t I2C_CTL; |
bogdanm | 66:9c8f0e3462fb | 675 | __IO uint32_t I2C_CLKHI; |
bogdanm | 66:9c8f0e3462fb | 676 | __O uint32_t I2C_CLKLO; |
bogdanm | 66:9c8f0e3462fb | 677 | uint32_t RESERVED5[823]; |
bogdanm | 66:9c8f0e3462fb | 678 | |
bogdanm | 66:9c8f0e3462fb | 679 | union { |
bogdanm | 66:9c8f0e3462fb | 680 | __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */ |
bogdanm | 66:9c8f0e3462fb | 681 | __IO uint32_t OTGClkCtrl; |
bogdanm | 66:9c8f0e3462fb | 682 | }; |
bogdanm | 66:9c8f0e3462fb | 683 | union { |
bogdanm | 66:9c8f0e3462fb | 684 | __I uint32_t USBClkSt; |
bogdanm | 66:9c8f0e3462fb | 685 | __I uint32_t OTGClkSt; |
bogdanm | 66:9c8f0e3462fb | 686 | }; |
bogdanm | 66:9c8f0e3462fb | 687 | } LPC_USB_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 688 | |
bogdanm | 66:9c8f0e3462fb | 689 | /*------------- Ethernet Media Access Controller (EMAC) ----------------------*/ |
bogdanm | 66:9c8f0e3462fb | 690 | typedef struct |
bogdanm | 66:9c8f0e3462fb | 691 | { |
bogdanm | 66:9c8f0e3462fb | 692 | __IO uint32_t MAC1; /* MAC Registers */ |
bogdanm | 66:9c8f0e3462fb | 693 | __IO uint32_t MAC2; |
bogdanm | 66:9c8f0e3462fb | 694 | __IO uint32_t IPGT; |
bogdanm | 66:9c8f0e3462fb | 695 | __IO uint32_t IPGR; |
bogdanm | 66:9c8f0e3462fb | 696 | __IO uint32_t CLRT; |
bogdanm | 66:9c8f0e3462fb | 697 | __IO uint32_t MAXF; |
bogdanm | 66:9c8f0e3462fb | 698 | __IO uint32_t SUPP; |
bogdanm | 66:9c8f0e3462fb | 699 | __IO uint32_t TEST; |
bogdanm | 66:9c8f0e3462fb | 700 | __IO uint32_t MCFG; |
bogdanm | 66:9c8f0e3462fb | 701 | __IO uint32_t MCMD; |
bogdanm | 66:9c8f0e3462fb | 702 | __IO uint32_t MADR; |
bogdanm | 66:9c8f0e3462fb | 703 | __O uint32_t MWTD; |
bogdanm | 66:9c8f0e3462fb | 704 | __I uint32_t MRDD; |
bogdanm | 66:9c8f0e3462fb | 705 | __I uint32_t MIND; |
bogdanm | 66:9c8f0e3462fb | 706 | uint32_t RESERVED0[2]; |
bogdanm | 66:9c8f0e3462fb | 707 | __IO uint32_t SA0; |
bogdanm | 66:9c8f0e3462fb | 708 | __IO uint32_t SA1; |
bogdanm | 66:9c8f0e3462fb | 709 | __IO uint32_t SA2; |
bogdanm | 66:9c8f0e3462fb | 710 | uint32_t RESERVED1[45]; |
bogdanm | 66:9c8f0e3462fb | 711 | __IO uint32_t Command; /* Control Registers */ |
bogdanm | 66:9c8f0e3462fb | 712 | __I uint32_t Status; |
bogdanm | 66:9c8f0e3462fb | 713 | __IO uint32_t RxDescriptor; |
bogdanm | 66:9c8f0e3462fb | 714 | __IO uint32_t RxStatus; |
bogdanm | 66:9c8f0e3462fb | 715 | __IO uint32_t RxDescriptorNumber; |
bogdanm | 66:9c8f0e3462fb | 716 | __I uint32_t RxProduceIndex; |
bogdanm | 66:9c8f0e3462fb | 717 | __IO uint32_t RxConsumeIndex; |
bogdanm | 66:9c8f0e3462fb | 718 | __IO uint32_t TxDescriptor; |
bogdanm | 66:9c8f0e3462fb | 719 | __IO uint32_t TxStatus; |
bogdanm | 66:9c8f0e3462fb | 720 | __IO uint32_t TxDescriptorNumber; |
bogdanm | 66:9c8f0e3462fb | 721 | __IO uint32_t TxProduceIndex; |
bogdanm | 66:9c8f0e3462fb | 722 | __I uint32_t TxConsumeIndex; |
bogdanm | 66:9c8f0e3462fb | 723 | uint32_t RESERVED2[10]; |
bogdanm | 66:9c8f0e3462fb | 724 | __I uint32_t TSV0; |
bogdanm | 66:9c8f0e3462fb | 725 | __I uint32_t TSV1; |
bogdanm | 66:9c8f0e3462fb | 726 | __I uint32_t RSV; |
bogdanm | 66:9c8f0e3462fb | 727 | uint32_t RESERVED3[3]; |
bogdanm | 66:9c8f0e3462fb | 728 | __IO uint32_t FlowControlCounter; |
bogdanm | 66:9c8f0e3462fb | 729 | __I uint32_t FlowControlStatus; |
bogdanm | 66:9c8f0e3462fb | 730 | uint32_t RESERVED4[34]; |
bogdanm | 66:9c8f0e3462fb | 731 | __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */ |
bogdanm | 66:9c8f0e3462fb | 732 | __IO uint32_t RxFilterWoLStatus; |
bogdanm | 66:9c8f0e3462fb | 733 | __IO uint32_t RxFilterWoLClear; |
bogdanm | 66:9c8f0e3462fb | 734 | uint32_t RESERVED5; |
bogdanm | 66:9c8f0e3462fb | 735 | __IO uint32_t HashFilterL; |
bogdanm | 66:9c8f0e3462fb | 736 | __IO uint32_t HashFilterH; |
bogdanm | 66:9c8f0e3462fb | 737 | uint32_t RESERVED6[882]; |
bogdanm | 66:9c8f0e3462fb | 738 | __I uint32_t IntStatus; /* Module Control Registers */ |
bogdanm | 66:9c8f0e3462fb | 739 | __IO uint32_t IntEnable; |
bogdanm | 66:9c8f0e3462fb | 740 | __O uint32_t IntClear; |
bogdanm | 66:9c8f0e3462fb | 741 | __O uint32_t IntSet; |
bogdanm | 66:9c8f0e3462fb | 742 | uint32_t RESERVED7; |
bogdanm | 66:9c8f0e3462fb | 743 | __IO uint32_t PowerDown; |
bogdanm | 66:9c8f0e3462fb | 744 | uint32_t RESERVED8; |
bogdanm | 66:9c8f0e3462fb | 745 | __IO uint32_t Module_ID; |
bogdanm | 66:9c8f0e3462fb | 746 | } LPC_EMAC_TypeDef; |
bogdanm | 66:9c8f0e3462fb | 747 | |
bogdanm | 66:9c8f0e3462fb | 748 | #if defined ( __CC_ARM ) |
bogdanm | 66:9c8f0e3462fb | 749 | #pragma no_anon_unions |
bogdanm | 66:9c8f0e3462fb | 750 | #endif |
bogdanm | 66:9c8f0e3462fb | 751 | |
bogdanm | 66:9c8f0e3462fb | 752 | /******************************************************************************/ |
bogdanm | 66:9c8f0e3462fb | 753 | /* Peripheral memory map */ |
bogdanm | 66:9c8f0e3462fb | 754 | /******************************************************************************/ |
bogdanm | 66:9c8f0e3462fb | 755 | /* Base addresses */ |
bogdanm | 66:9c8f0e3462fb | 756 | |
bogdanm | 66:9c8f0e3462fb | 757 | /* AHB Peripheral # 0 */ |
bogdanm | 66:9c8f0e3462fb | 758 | |
bogdanm | 66:9c8f0e3462fb | 759 | /* |
bogdanm | 66:9c8f0e3462fb | 760 | #define FLASH_BASE (0x00000000UL) |
bogdanm | 66:9c8f0e3462fb | 761 | #define RAM_BASE (0x10000000UL) |
bogdanm | 66:9c8f0e3462fb | 762 | #define GPIO_BASE (0x2009C000UL) |
bogdanm | 66:9c8f0e3462fb | 763 | #define APB0_BASE (0x40000000UL) |
bogdanm | 66:9c8f0e3462fb | 764 | #define APB1_BASE (0x40080000UL) |
bogdanm | 66:9c8f0e3462fb | 765 | #define AHB_BASE (0x50000000UL) |
bogdanm | 66:9c8f0e3462fb | 766 | #define CM3_BASE (0xE0000000UL) |
bogdanm | 66:9c8f0e3462fb | 767 | */ |
bogdanm | 66:9c8f0e3462fb | 768 | |
bogdanm | 66:9c8f0e3462fb | 769 | // TODO - #define VIC_BASE_ADDR 0xFFFFF000 |
bogdanm | 66:9c8f0e3462fb | 770 | |
bogdanm | 66:9c8f0e3462fb | 771 | #define LPC_WDT_BASE (0xE0000000) |
bogdanm | 66:9c8f0e3462fb | 772 | #define LPC_TIM0_BASE (0xE0004000) |
bogdanm | 66:9c8f0e3462fb | 773 | #define LPC_TIM1_BASE (0xE0008000) |
bogdanm | 66:9c8f0e3462fb | 774 | #define LPC_UART0_BASE (0xE000C000) |
bogdanm | 66:9c8f0e3462fb | 775 | #define LPC_UART1_BASE (0xE0010000) |
bogdanm | 66:9c8f0e3462fb | 776 | #define LPC_PWM1_BASE (0xE0018000) |
bogdanm | 66:9c8f0e3462fb | 777 | #define LPC_I2C0_BASE (0xE001C000) |
bogdanm | 66:9c8f0e3462fb | 778 | #define LPC_SPI_BASE (0xE0020000) |
bogdanm | 66:9c8f0e3462fb | 779 | #define LPC_RTC_BASE (0xE0024000) |
bogdanm | 66:9c8f0e3462fb | 780 | #define LPC_GPIOINT_BASE (0xE0028080) |
bogdanm | 66:9c8f0e3462fb | 781 | #define LPC_PINCON_BASE (0xE002C000) |
bogdanm | 66:9c8f0e3462fb | 782 | #define LPC_SSP1_BASE (0xE0030000) |
bogdanm | 66:9c8f0e3462fb | 783 | #define LPC_ADC_BASE (0xE0034000) |
bogdanm | 66:9c8f0e3462fb | 784 | #define LPC_CANAF_RAM_BASE (0xE0038000) |
bogdanm | 66:9c8f0e3462fb | 785 | #define LPC_CANAF_BASE (0xE003C000) |
bogdanm | 66:9c8f0e3462fb | 786 | #define LPC_CANCR_BASE (0xE0040000) |
bogdanm | 66:9c8f0e3462fb | 787 | #define LPC_CAN1_BASE (0xE0044000) |
bogdanm | 66:9c8f0e3462fb | 788 | #define LPC_CAN2_BASE (0xE0048000) |
bogdanm | 66:9c8f0e3462fb | 789 | #define LPC_I2C1_BASE (0xE005C000) |
bogdanm | 66:9c8f0e3462fb | 790 | #define LPC_SSP0_BASE (0xE0068000) |
bogdanm | 66:9c8f0e3462fb | 791 | #define LPC_DAC_BASE (0xE006C000) |
bogdanm | 66:9c8f0e3462fb | 792 | #define LPC_TIM2_BASE (0xE0070000) |
bogdanm | 66:9c8f0e3462fb | 793 | #define LPC_TIM3_BASE (0xE0074000) |
bogdanm | 66:9c8f0e3462fb | 794 | #define LPC_UART2_BASE (0xE0078000) |
bogdanm | 66:9c8f0e3462fb | 795 | #define LPC_UART3_BASE (0xE007C000) |
bogdanm | 66:9c8f0e3462fb | 796 | #define LPC_I2C2_BASE (0xE0080000) |
bogdanm | 66:9c8f0e3462fb | 797 | #define LPC_I2S_BASE (0xE0088000) |
bogdanm | 66:9c8f0e3462fb | 798 | #define LPC_MCI_BASE (0xE008C000) |
bogdanm | 66:9c8f0e3462fb | 799 | #define LPC_SC_BASE (0xE01FC000) |
bogdanm | 66:9c8f0e3462fb | 800 | #define LPC_EMAC_BASE (0xFFE00000) |
bogdanm | 66:9c8f0e3462fb | 801 | #define LPC_GPDMA_BASE (0xFFE04000) |
bogdanm | 66:9c8f0e3462fb | 802 | #define LPC_GPDMACH0_BASE (0xFFE04100) |
bogdanm | 66:9c8f0e3462fb | 803 | #define LPC_GPDMACH1_BASE (0xFFE04120) |
bogdanm | 66:9c8f0e3462fb | 804 | #define LPC_USB_BASE (0xFFE0C000) |
bogdanm | 66:9c8f0e3462fb | 805 | #define LPC_VIC_BASE (0xFFFFF000) |
bogdanm | 66:9c8f0e3462fb | 806 | |
bogdanm | 66:9c8f0e3462fb | 807 | /* GPIOs */ |
bogdanm | 66:9c8f0e3462fb | 808 | #define LPC_GPIO0_BASE (0x3FFFC000) |
bogdanm | 66:9c8f0e3462fb | 809 | #define LPC_GPIO1_BASE (0x3FFFC020) |
bogdanm | 66:9c8f0e3462fb | 810 | #define LPC_GPIO2_BASE (0x3FFFC040) |
bogdanm | 66:9c8f0e3462fb | 811 | #define LPC_GPIO3_BASE (0x3FFFC060) |
bogdanm | 66:9c8f0e3462fb | 812 | #define LPC_GPIO4_BASE (0x3FFFC080) |
bogdanm | 66:9c8f0e3462fb | 813 | |
bogdanm | 66:9c8f0e3462fb | 814 | |
bogdanm | 66:9c8f0e3462fb | 815 | /******************************************************************************/ |
bogdanm | 66:9c8f0e3462fb | 816 | /* Peripheral declaration */ |
bogdanm | 66:9c8f0e3462fb | 817 | /******************************************************************************/ |
bogdanm | 66:9c8f0e3462fb | 818 | #define LPC_SC (( LPC_SC_TypeDef *) LPC_SC_BASE) |
bogdanm | 66:9c8f0e3462fb | 819 | #define LPC_GPIO0 (( LPC_GPIO_TypeDef *) LPC_GPIO0_BASE) |
bogdanm | 66:9c8f0e3462fb | 820 | #define LPC_GPIO1 (( LPC_GPIO_TypeDef *) LPC_GPIO1_BASE) |
bogdanm | 66:9c8f0e3462fb | 821 | #define LPC_GPIO2 (( LPC_GPIO_TypeDef *) LPC_GPIO2_BASE) |
bogdanm | 66:9c8f0e3462fb | 822 | #define LPC_GPIO3 (( LPC_GPIO_TypeDef *) LPC_GPIO3_BASE) |
bogdanm | 66:9c8f0e3462fb | 823 | #define LPC_GPIO4 (( LPC_GPIO_TypeDef *) LPC_GPIO4_BASE) |
bogdanm | 66:9c8f0e3462fb | 824 | #define LPC_WDT (( LPC_WDT_TypeDef *) LPC_WDT_BASE) |
bogdanm | 66:9c8f0e3462fb | 825 | #define LPC_TIM0 (( LPC_TIM_TypeDef *) LPC_TIM0_BASE) |
bogdanm | 66:9c8f0e3462fb | 826 | #define LPC_TIM1 (( LPC_TIM_TypeDef *) LPC_TIM1_BASE) |
bogdanm | 66:9c8f0e3462fb | 827 | #define LPC_TIM2 (( LPC_TIM_TypeDef *) LPC_TIM2_BASE) |
bogdanm | 66:9c8f0e3462fb | 828 | #define LPC_TIM3 (( LPC_TIM_TypeDef *) LPC_TIM3_BASE) |
bogdanm | 66:9c8f0e3462fb | 829 | #define LPC_UART0 (( LPC_UART_TypeDef *) LPC_UART0_BASE) |
bogdanm | 66:9c8f0e3462fb | 830 | #define LPC_UART1 (( LPC_UART1_TypeDef *) LPC_UART1_BASE) |
bogdanm | 66:9c8f0e3462fb | 831 | #define LPC_UART2 (( LPC_UART_TypeDef *) LPC_UART2_BASE) |
bogdanm | 66:9c8f0e3462fb | 832 | #define LPC_UART3 (( LPC_UART_TypeDef *) LPC_UART3_BASE) |
bogdanm | 66:9c8f0e3462fb | 833 | #define LPC_PWM1 (( LPC_PWM_TypeDef *) LPC_PWM1_BASE) |
bogdanm | 66:9c8f0e3462fb | 834 | #define LPC_I2C0 (( LPC_I2C_TypeDef *) LPC_I2C0_BASE) |
bogdanm | 66:9c8f0e3462fb | 835 | #define LPC_I2C1 (( LPC_I2C_TypeDef *) LPC_I2C1_BASE) |
bogdanm | 66:9c8f0e3462fb | 836 | #define LPC_I2C2 (( LPC_I2C_TypeDef *) LPC_I2C2_BASE) |
bogdanm | 66:9c8f0e3462fb | 837 | #define LPC_I2S (( LPC_I2S_TypeDef *) LPC_I2S_BASE) |
bogdanm | 66:9c8f0e3462fb | 838 | #define LPC_SPI (( LPC_SPI_TypeDef *) LPC_SPI_BASE) |
bogdanm | 66:9c8f0e3462fb | 839 | #define LPC_RTC (( LPC_RTC_TypeDef *) LPC_RTC_BASE) |
bogdanm | 66:9c8f0e3462fb | 840 | #define LPC_GPIOINT (( LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE) |
bogdanm | 66:9c8f0e3462fb | 841 | #define LPC_PINCON (( LPC_PINCON_TypeDef *) LPC_PINCON_BASE) |
bogdanm | 66:9c8f0e3462fb | 842 | #define LPC_SSP0 (( LPC_SSP_TypeDef *) LPC_SSP0_BASE) |
bogdanm | 66:9c8f0e3462fb | 843 | #define LPC_SSP1 (( LPC_SSP_TypeDef *) LPC_SSP1_BASE) |
bogdanm | 66:9c8f0e3462fb | 844 | #define LPC_ADC (( LPC_ADC_TypeDef *) LPC_ADC_BASE) |
bogdanm | 66:9c8f0e3462fb | 845 | #define LPC_DAC (( LPC_DAC_TypeDef *) LPC_DAC_BASE) |
bogdanm | 66:9c8f0e3462fb | 846 | #define LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE) |
bogdanm | 66:9c8f0e3462fb | 847 | #define LPC_CANAF (( LPC_CANAF_TypeDef *) LPC_CANAF_BASE) |
bogdanm | 66:9c8f0e3462fb | 848 | #define LPC_CANCR (( LPC_CANCR_TypeDef *) LPC_CANCR_BASE) |
bogdanm | 66:9c8f0e3462fb | 849 | #define LPC_CAN1 (( LPC_CAN_TypeDef *) LPC_CAN1_BASE) |
bogdanm | 66:9c8f0e3462fb | 850 | #define LPC_CAN2 (( LPC_CAN_TypeDef *) LPC_CAN2_BASE) |
bogdanm | 66:9c8f0e3462fb | 851 | #define LPC_MCI (( LPC_MCI_TypeDef *) LPC_MCI_BASE) |
bogdanm | 66:9c8f0e3462fb | 852 | #define LPC_EMAC (( LPC_EMAC_TypeDef *) LPC_EMAC_BASE) |
bogdanm | 66:9c8f0e3462fb | 853 | #define LPC_GPDMA (( LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE) |
bogdanm | 66:9c8f0e3462fb | 854 | #define LPC_GPDMACH0 (( LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE) |
bogdanm | 66:9c8f0e3462fb | 855 | #define LPC_GPDMACH1 (( LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE) |
bogdanm | 66:9c8f0e3462fb | 856 | #define LPC_USB (( LPC_USB_TypeDef *) LPC_USB_BASE) |
bogdanm | 66:9c8f0e3462fb | 857 | #define LPC_VIC (( LPC_VIC_TypeDef *) LPC_VIC_BASE) |
bogdanm | 66:9c8f0e3462fb | 858 | |
bogdanm | 66:9c8f0e3462fb | 859 | #ifdef __cplusplus |
bogdanm | 66:9c8f0e3462fb | 860 | } |
bogdanm | 66:9c8f0e3462fb | 861 | #endif |
bogdanm | 66:9c8f0e3462fb | 862 | |
bogdanm | 66:9c8f0e3462fb | 863 | #endif // __LPC23xx_H |
bogdanm | 66:9c8f0e3462fb | 864 |