Filippo Casamassima / mbed

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Dependents:   Nucleo_blueNRG

Fork of mbed by mbed official

TARGET_NUCLEO_F401RE/stm32f4xx_hal_iwdg.h@85:024bf7f99721, 2014-06-11 (annotated)

Committer:
bogdanm
Date:
Wed Jun 11 15:14:05 2014 +0100
Revision:
85:024bf7f99721
Parent:
81:7d30d6019079
Child:
90:cb3d968589d8
Release 85 of the mbed library



Main changes:



- K64F Ethernet fixes

- Updated tests

- Fixes for various mbed targets

- Code cleanup: fixed warnings, more consistent code style

- GCC support for K64F



There is a known issue with the I2C interface on some ST targets. If you

find the I2C interface problematic on your ST board, please log a bug

against this on mbed.org.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_iwdg.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
bogdanm 85:024bf7f99721 5 * @version V1.1.0RC2
bogdanm 85:024bf7f99721 6 * @date 14-May-2014
emilmont 77:869cf507173a 7 * @brief Header file of IWDG HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_IWDG_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_IWDG_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 47 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 48
emilmont 77:869cf507173a 49 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 50 * @{
emilmont 77:869cf507173a 51 */
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup IWDG
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
bogdanm 81:7d30d6019079 57 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /**
emilmont 77:869cf507173a 60 * @brief IWDG HAL State Structure definition
emilmont 77:869cf507173a 61 */
emilmont 77:869cf507173a 62 typedef enum
emilmont 77:869cf507173a 63 {
emilmont 77:869cf507173a 64 HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */
emilmont 77:869cf507173a 65 HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */
bogdanm 81:7d30d6019079 66 HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */
emilmont 77:869cf507173a 67 HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */
emilmont 77:869cf507173a 68 HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */
emilmont 77:869cf507173a 69
emilmont 77:869cf507173a 70 }HAL_IWDG_StateTypeDef;
emilmont 77:869cf507173a 71
emilmont 77:869cf507173a 72 /**
emilmont 77:869cf507173a 73 * @brief IWDG Init structure definition
emilmont 77:869cf507173a 74 */
emilmont 77:869cf507173a 75 typedef struct
emilmont 77:869cf507173a 76 {
emilmont 77:869cf507173a 77 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
emilmont 77:869cf507173a 78 This parameter can be a value of @ref IWDG_Prescaler */
emilmont 77:869cf507173a 79
emilmont 77:869cf507173a 80 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
bogdanm 81:7d30d6019079 81 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
emilmont 77:869cf507173a 82
emilmont 77:869cf507173a 83 }IWDG_InitTypeDef;
emilmont 77:869cf507173a 84
emilmont 77:869cf507173a 85 /**
emilmont 77:869cf507173a 86 * @brief IWDG handle Structure definition
emilmont 77:869cf507173a 87 */
emilmont 77:869cf507173a 88 typedef struct
emilmont 77:869cf507173a 89 {
emilmont 77:869cf507173a 90 IWDG_TypeDef *Instance; /*!< Register base address */
emilmont 77:869cf507173a 91
emilmont 77:869cf507173a 92 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
emilmont 77:869cf507173a 93
emilmont 77:869cf507173a 94 HAL_LockTypeDef Lock; /*!< IWDG locking object */
emilmont 77:869cf507173a 95
emilmont 77:869cf507173a 96 __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */
emilmont 77:869cf507173a 97
emilmont 77:869cf507173a 98 }IWDG_HandleTypeDef;
emilmont 77:869cf507173a 99
emilmont 77:869cf507173a 100 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 101 /** @defgroup IWDG_Exported_Constants
emilmont 77:869cf507173a 102 * @{
emilmont 77:869cf507173a 103 */
emilmont 77:869cf507173a 104
emilmont 77:869cf507173a 105 /** @defgroup IWDG_Registers_BitMask
emilmont 77:869cf507173a 106 * @{
emilmont 77:869cf507173a 107 */
emilmont 77:869cf507173a 108 /* --- KR Register ---*/
emilmont 77:869cf507173a 109 /* KR register bit mask */
emilmont 77:869cf507173a 110 #define KR_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG reload counter enable */
emilmont 77:869cf507173a 111 #define KR_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG peripheral enable */
emilmont 77:869cf507173a 112 #define KR_KEY_EWA ((uint32_t)0x5555) /*!< IWDG KR write Access enable */
emilmont 77:869cf507173a 113 #define KR_KEY_DWA ((uint32_t)0x0000) /*!< IWDG KR write Access disable */
emilmont 77:869cf507173a 114
emilmont 77:869cf507173a 115 /**
emilmont 77:869cf507173a 116 * @}
emilmont 77:869cf507173a 117 */
emilmont 77:869cf507173a 118
emilmont 77:869cf507173a 119 /** @defgroup IWDG_Flag_definition
emilmont 77:869cf507173a 120 * @{
emilmont 77:869cf507173a 121 */
emilmont 77:869cf507173a 122 #define IWDG_FLAG_PVU ((uint32_t)0x0001) /*!< Watchdog counter prescaler value update flag */
emilmont 77:869cf507173a 123 #define IWDG_FLAG_RVU ((uint32_t)0x0002) /*!< Watchdog counter reload value update flag */
emilmont 77:869cf507173a 124
emilmont 77:869cf507173a 125 #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || \
emilmont 77:869cf507173a 126 ((FLAG) == IWDG_FLAG_RVU))
emilmont 77:869cf507173a 127
emilmont 77:869cf507173a 128 /**
emilmont 77:869cf507173a 129 * @}
emilmont 77:869cf507173a 130 */
emilmont 77:869cf507173a 131
emilmont 77:869cf507173a 132 /** @defgroup IWDG_Prescaler
emilmont 77:869cf507173a 133 * @{
emilmont 77:869cf507173a 134 */
emilmont 77:869cf507173a 135 #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */
emilmont 77:869cf507173a 136 #define IWDG_PRESCALER_8 ((uint8_t)0x01) /*!< IWDG prescaler set to 8 */
emilmont 77:869cf507173a 137 #define IWDG_PRESCALER_16 ((uint8_t)0x02) /*!< IWDG prescaler set to 16 */
emilmont 77:869cf507173a 138 #define IWDG_PRESCALER_32 ((uint8_t)0x03) /*!< IWDG prescaler set to 32 */
emilmont 77:869cf507173a 139 #define IWDG_PRESCALER_64 ((uint8_t)0x04) /*!< IWDG prescaler set to 64 */
emilmont 77:869cf507173a 140 #define IWDG_PRESCALER_128 ((uint8_t)0x05) /*!< IWDG prescaler set to 128 */
emilmont 77:869cf507173a 141 #define IWDG_PRESCALER_256 ((uint8_t)0x06) /*!< IWDG prescaler set to 256 */
emilmont 77:869cf507173a 142
emilmont 77:869cf507173a 143 #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_PRESCALER_4) || \
emilmont 77:869cf507173a 144 ((PRESCALER) == IWDG_PRESCALER_8) || \
emilmont 77:869cf507173a 145 ((PRESCALER) == IWDG_PRESCALER_16) || \
emilmont 77:869cf507173a 146 ((PRESCALER) == IWDG_PRESCALER_32) || \
emilmont 77:869cf507173a 147 ((PRESCALER) == IWDG_PRESCALER_64) || \
emilmont 77:869cf507173a 148 ((PRESCALER) == IWDG_PRESCALER_128)|| \
emilmont 77:869cf507173a 149 ((PRESCALER) == IWDG_PRESCALER_256))
emilmont 77:869cf507173a 150
emilmont 77:869cf507173a 151 /**
emilmont 77:869cf507173a 152 * @}
emilmont 77:869cf507173a 153 */
emilmont 77:869cf507173a 154
emilmont 77:869cf507173a 155 /** @defgroup IWDG_Reload_Value
emilmont 77:869cf507173a 156 * @{
emilmont 77:869cf507173a 157 */
emilmont 77:869cf507173a 158 #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
emilmont 77:869cf507173a 159
emilmont 77:869cf507173a 160 /**
emilmont 77:869cf507173a 161 * @}
emilmont 77:869cf507173a 162 */
emilmont 77:869cf507173a 163
emilmont 77:869cf507173a 164 /**
emilmont 77:869cf507173a 165 * @}
emilmont 77:869cf507173a 166 */
emilmont 77:869cf507173a 167
emilmont 77:869cf507173a 168 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 169
bogdanm 85:024bf7f99721 170 /** @brief Reset IWDG handle state
bogdanm 85:024bf7f99721 171 * @param __HANDLE__: IWDG handle
bogdanm 85:024bf7f99721 172 * @retval None
bogdanm 85:024bf7f99721 173 */
bogdanm 85:024bf7f99721 174 #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET)
bogdanm 85:024bf7f99721 175
emilmont 77:869cf507173a 176 /**
emilmont 77:869cf507173a 177 * @brief Enables the IWDG peripheral.
emilmont 77:869cf507173a 178 * @param __HANDLE__: IWDG handle
emilmont 77:869cf507173a 179 * @retval None
emilmont 77:869cf507173a 180 */
emilmont 77:869cf507173a 181 #define __HAL_IWDG_START(__HANDLE__) ((__HANDLE__)->Instance->KR |= KR_KEY_ENABLE)
emilmont 77:869cf507173a 182
emilmont 77:869cf507173a 183 /**
emilmont 77:869cf507173a 184 * @brief Reloads IWDG counter with value defined in the reload register
emilmont 77:869cf507173a 185 * (write access to IWDG_PR and IWDG_RLR registers disabled).
emilmont 77:869cf507173a 186 * @param __HANDLE__: IWDG handle
emilmont 77:869cf507173a 187 * @retval None
emilmont 77:869cf507173a 188 */
emilmont 77:869cf507173a 189 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) (((__HANDLE__)->Instance->KR) |= KR_KEY_RELOAD)
emilmont 77:869cf507173a 190
emilmont 77:869cf507173a 191 /**
emilmont 77:869cf507173a 192 * @brief Enables write access to IWDG_PR and IWDG_RLR registers.
emilmont 77:869cf507173a 193 * @param __HANDLE__: IWDG handle
emilmont 77:869cf507173a 194 * @retval None
emilmont 77:869cf507173a 195 */
emilmont 77:869cf507173a 196 #define __HAL_IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) (((__HANDLE__)->Instance->KR) |= KR_KEY_EWA)
emilmont 77:869cf507173a 197
emilmont 77:869cf507173a 198 /**
emilmont 77:869cf507173a 199 * @brief Disables write access to IWDG_PR and IWDG_RLR registers.
emilmont 77:869cf507173a 200 * @param __HANDLE__: IWDG handle
emilmont 77:869cf507173a 201 * @retval None
emilmont 77:869cf507173a 202 */
emilmont 77:869cf507173a 203 #define __HAL_IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) (((__HANDLE__)->Instance->KR) |= KR_KEY_DWA)
emilmont 77:869cf507173a 204
emilmont 77:869cf507173a 205 /**
emilmont 77:869cf507173a 206 * @brief Gets the selected IWDG's flag status.
emilmont 77:869cf507173a 207 * @param __HANDLE__: IWDG handle
emilmont 77:869cf507173a 208 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 209 * This parameter can be one of the following values:
emilmont 77:869cf507173a 210 * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
emilmont 77:869cf507173a 211 * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
emilmont 77:869cf507173a 212 * @retval The new state of __FLAG__ (TRUE or FALSE).
emilmont 77:869cf507173a 213 */
emilmont 77:869cf507173a 214 #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
emilmont 77:869cf507173a 215
emilmont 77:869cf507173a 216 /**
emilmont 77:869cf507173a 217 * @brief Clears the IWDG's pending flags.
emilmont 77:869cf507173a 218 * @param __HANDLE__: IWDG handle
emilmont 77:869cf507173a 219 * @param __FLAG__: specifies the flag to clear.
emilmont 77:869cf507173a 220 * This parameter can be one of the following values:
emilmont 77:869cf507173a 221 * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
emilmont 77:869cf507173a 222 * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
emilmont 77:869cf507173a 223 * @retval None
emilmont 77:869cf507173a 224 */
emilmont 77:869cf507173a 225 #define __HAL_IWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__))
emilmont 77:869cf507173a 226
emilmont 77:869cf507173a 227
emilmont 77:869cf507173a 228 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 229
bogdanm 81:7d30d6019079 230 /* Initialization/de-initialization functions ********************************/
emilmont 77:869cf507173a 231 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
bogdanm 81:7d30d6019079 232 void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
emilmont 77:869cf507173a 233
bogdanm 81:7d30d6019079 234 /* I/O operation functions ****************************************************/
emilmont 77:869cf507173a 235 HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
emilmont 77:869cf507173a 236 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
emilmont 77:869cf507173a 237
bogdanm 81:7d30d6019079 238 /* Peripheral State functions ************************************************/
emilmont 77:869cf507173a 239 HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
emilmont 77:869cf507173a 240
emilmont 77:869cf507173a 241 /**
emilmont 77:869cf507173a 242 * @}
emilmont 77:869cf507173a 243 */
emilmont 77:869cf507173a 244
emilmont 77:869cf507173a 245 /**
emilmont 77:869cf507173a 246 * @}
emilmont 77:869cf507173a 247 */
emilmont 77:869cf507173a 248
emilmont 77:869cf507173a 249 #ifdef __cplusplus
emilmont 77:869cf507173a 250 }
emilmont 77:869cf507173a 251 #endif
emilmont 77:869cf507173a 252
emilmont 77:869cf507173a 253 #endif /* __STM32F4xx_HAL_IWDG_H */
emilmont 77:869cf507173a 254
emilmont 77:869cf507173a 255 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/