Francisco Paez / freertos-cm3

Dependents:   mbed_lpc1768_freertos_lib

Committer:
fep
Date:
Wed May 31 02:36:43 2017 +0000
Revision:
0:5ff20db10a96
FreeRTOS v9.0.0 for ARM Cortex-M3 based boards.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
fep 0:5ff20db10a96 1 /*
fep 0:5ff20db10a96 2 FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
fep 0:5ff20db10a96 3 All rights reserved
fep 0:5ff20db10a96 4
fep 0:5ff20db10a96 5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
fep 0:5ff20db10a96 6
fep 0:5ff20db10a96 7 This file is part of the FreeRTOS distribution.
fep 0:5ff20db10a96 8
fep 0:5ff20db10a96 9 FreeRTOS is free software; you can redistribute it and/or modify it under
fep 0:5ff20db10a96 10 the terms of the GNU General Public License (version 2) as published by the
fep 0:5ff20db10a96 11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
fep 0:5ff20db10a96 12
fep 0:5ff20db10a96 13 ***************************************************************************
fep 0:5ff20db10a96 14 >>! NOTE: The modification to the GPL is included to allow you to !<<
fep 0:5ff20db10a96 15 >>! distribute a combined work that includes FreeRTOS without being !<<
fep 0:5ff20db10a96 16 >>! obliged to provide the source code for proprietary components !<<
fep 0:5ff20db10a96 17 >>! outside of the FreeRTOS kernel. !<<
fep 0:5ff20db10a96 18 ***************************************************************************
fep 0:5ff20db10a96 19
fep 0:5ff20db10a96 20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
fep 0:5ff20db10a96 21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
fep 0:5ff20db10a96 22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
fep 0:5ff20db10a96 23 link: http://www.freertos.org/a00114.html
fep 0:5ff20db10a96 24
fep 0:5ff20db10a96 25 ***************************************************************************
fep 0:5ff20db10a96 26 * *
fep 0:5ff20db10a96 27 * FreeRTOS provides completely free yet professionally developed, *
fep 0:5ff20db10a96 28 * robust, strictly quality controlled, supported, and cross *
fep 0:5ff20db10a96 29 * platform software that is more than just the market leader, it *
fep 0:5ff20db10a96 30 * is the industry's de facto standard. *
fep 0:5ff20db10a96 31 * *
fep 0:5ff20db10a96 32 * Help yourself get started quickly while simultaneously helping *
fep 0:5ff20db10a96 33 * to support the FreeRTOS project by purchasing a FreeRTOS *
fep 0:5ff20db10a96 34 * tutorial book, reference manual, or both: *
fep 0:5ff20db10a96 35 * http://www.FreeRTOS.org/Documentation *
fep 0:5ff20db10a96 36 * *
fep 0:5ff20db10a96 37 ***************************************************************************
fep 0:5ff20db10a96 38
fep 0:5ff20db10a96 39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
fep 0:5ff20db10a96 40 the FAQ page "My application does not run, what could be wrong?". Have you
fep 0:5ff20db10a96 41 defined configASSERT()?
fep 0:5ff20db10a96 42
fep 0:5ff20db10a96 43 http://www.FreeRTOS.org/support - In return for receiving this top quality
fep 0:5ff20db10a96 44 embedded software for free we request you assist our global community by
fep 0:5ff20db10a96 45 participating in the support forum.
fep 0:5ff20db10a96 46
fep 0:5ff20db10a96 47 http://www.FreeRTOS.org/training - Investing in training allows your team to
fep 0:5ff20db10a96 48 be as productive as possible as early as possible. Now you can receive
fep 0:5ff20db10a96 49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
fep 0:5ff20db10a96 50 Ltd, and the world's leading authority on the world's leading RTOS.
fep 0:5ff20db10a96 51
fep 0:5ff20db10a96 52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
fep 0:5ff20db10a96 53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
fep 0:5ff20db10a96 54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
fep 0:5ff20db10a96 55
fep 0:5ff20db10a96 56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
fep 0:5ff20db10a96 57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
fep 0:5ff20db10a96 58
fep 0:5ff20db10a96 59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
fep 0:5ff20db10a96 60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
fep 0:5ff20db10a96 61 licenses offer ticketed support, indemnification and commercial middleware.
fep 0:5ff20db10a96 62
fep 0:5ff20db10a96 63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
fep 0:5ff20db10a96 64 engineered and independently SIL3 certified version for use in safety and
fep 0:5ff20db10a96 65 mission critical applications that require provable dependability.
fep 0:5ff20db10a96 66
fep 0:5ff20db10a96 67 1 tab == 4 spaces!
fep 0:5ff20db10a96 68 */
fep 0:5ff20db10a96 69
fep 0:5ff20db10a96 70 /* Standard includes. */
fep 0:5ff20db10a96 71 #include <stdlib.h>
fep 0:5ff20db10a96 72
fep 0:5ff20db10a96 73 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
fep 0:5ff20db10a96 74 all the API functions to use the MPU wrappers. That should only be done when
fep 0:5ff20db10a96 75 task.h is included from an application file. */
fep 0:5ff20db10a96 76 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
fep 0:5ff20db10a96 77
fep 0:5ff20db10a96 78 /* FreeRTOS includes. */
fep 0:5ff20db10a96 79 #include "FreeRTOS.h"
fep 0:5ff20db10a96 80 #include "task.h"
fep 0:5ff20db10a96 81 #include "timers.h"
fep 0:5ff20db10a96 82 #include "event_groups.h"
fep 0:5ff20db10a96 83
fep 0:5ff20db10a96 84 /* Lint e961 and e750 are suppressed as a MISRA exception justified because the
fep 0:5ff20db10a96 85 MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the
fep 0:5ff20db10a96 86 header files above, but not in this file, in order to generate the correct
fep 0:5ff20db10a96 87 privileged Vs unprivileged linkage and placement. */
fep 0:5ff20db10a96 88 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */
fep 0:5ff20db10a96 89
fep 0:5ff20db10a96 90 /* The following bit fields convey control information in a task's event list
fep 0:5ff20db10a96 91 item value. It is important they don't clash with the
fep 0:5ff20db10a96 92 taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */
fep 0:5ff20db10a96 93 #if configUSE_16_BIT_TICKS == 1
fep 0:5ff20db10a96 94 #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100U
fep 0:5ff20db10a96 95 #define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200U
fep 0:5ff20db10a96 96 #define eventWAIT_FOR_ALL_BITS 0x0400U
fep 0:5ff20db10a96 97 #define eventEVENT_BITS_CONTROL_BYTES 0xff00U
fep 0:5ff20db10a96 98 #else
fep 0:5ff20db10a96 99 #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x01000000UL
fep 0:5ff20db10a96 100 #define eventUNBLOCKED_DUE_TO_BIT_SET 0x02000000UL
fep 0:5ff20db10a96 101 #define eventWAIT_FOR_ALL_BITS 0x04000000UL
fep 0:5ff20db10a96 102 #define eventEVENT_BITS_CONTROL_BYTES 0xff000000UL
fep 0:5ff20db10a96 103 #endif
fep 0:5ff20db10a96 104
fep 0:5ff20db10a96 105 typedef struct xEventGroupDefinition
fep 0:5ff20db10a96 106 {
fep 0:5ff20db10a96 107 EventBits_t uxEventBits;
fep 0:5ff20db10a96 108 List_t xTasksWaitingForBits; /*< List of tasks waiting for a bit to be set. */
fep 0:5ff20db10a96 109
fep 0:5ff20db10a96 110 #if( configUSE_TRACE_FACILITY == 1 )
fep 0:5ff20db10a96 111 UBaseType_t uxEventGroupNumber;
fep 0:5ff20db10a96 112 #endif
fep 0:5ff20db10a96 113
fep 0:5ff20db10a96 114 #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
fep 0:5ff20db10a96 115 uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */
fep 0:5ff20db10a96 116 #endif
fep 0:5ff20db10a96 117 } EventGroup_t;
fep 0:5ff20db10a96 118
fep 0:5ff20db10a96 119 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 120
fep 0:5ff20db10a96 121 /*
fep 0:5ff20db10a96 122 * Test the bits set in uxCurrentEventBits to see if the wait condition is met.
fep 0:5ff20db10a96 123 * The wait condition is defined by xWaitForAllBits. If xWaitForAllBits is
fep 0:5ff20db10a96 124 * pdTRUE then the wait condition is met if all the bits set in uxBitsToWaitFor
fep 0:5ff20db10a96 125 * are also set in uxCurrentEventBits. If xWaitForAllBits is pdFALSE then the
fep 0:5ff20db10a96 126 * wait condition is met if any of the bits set in uxBitsToWait for are also set
fep 0:5ff20db10a96 127 * in uxCurrentEventBits.
fep 0:5ff20db10a96 128 */
fep 0:5ff20db10a96 129 static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits ) PRIVILEGED_FUNCTION;
fep 0:5ff20db10a96 130
fep 0:5ff20db10a96 131 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 132
fep 0:5ff20db10a96 133 #if( configSUPPORT_STATIC_ALLOCATION == 1 )
fep 0:5ff20db10a96 134
fep 0:5ff20db10a96 135 EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer )
fep 0:5ff20db10a96 136 {
fep 0:5ff20db10a96 137 EventGroup_t *pxEventBits;
fep 0:5ff20db10a96 138
fep 0:5ff20db10a96 139 /* A StaticEventGroup_t object must be provided. */
fep 0:5ff20db10a96 140 configASSERT( pxEventGroupBuffer );
fep 0:5ff20db10a96 141
fep 0:5ff20db10a96 142 /* The user has provided a statically allocated event group - use it. */
fep 0:5ff20db10a96 143 pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 EventGroup_t and StaticEventGroup_t are guaranteed to have the same size and alignment requirement - checked by configASSERT(). */
fep 0:5ff20db10a96 144
fep 0:5ff20db10a96 145 if( pxEventBits != NULL )
fep 0:5ff20db10a96 146 {
fep 0:5ff20db10a96 147 pxEventBits->uxEventBits = 0;
fep 0:5ff20db10a96 148 vListInitialise( &( pxEventBits->xTasksWaitingForBits ) );
fep 0:5ff20db10a96 149
fep 0:5ff20db10a96 150 #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
fep 0:5ff20db10a96 151 {
fep 0:5ff20db10a96 152 /* Both static and dynamic allocation can be used, so note that
fep 0:5ff20db10a96 153 this event group was created statically in case the event group
fep 0:5ff20db10a96 154 is later deleted. */
fep 0:5ff20db10a96 155 pxEventBits->ucStaticallyAllocated = pdTRUE;
fep 0:5ff20db10a96 156 }
fep 0:5ff20db10a96 157 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
fep 0:5ff20db10a96 158
fep 0:5ff20db10a96 159 traceEVENT_GROUP_CREATE( pxEventBits );
fep 0:5ff20db10a96 160 }
fep 0:5ff20db10a96 161 else
fep 0:5ff20db10a96 162 {
fep 0:5ff20db10a96 163 traceEVENT_GROUP_CREATE_FAILED();
fep 0:5ff20db10a96 164 }
fep 0:5ff20db10a96 165
fep 0:5ff20db10a96 166 return ( EventGroupHandle_t ) pxEventBits;
fep 0:5ff20db10a96 167 }
fep 0:5ff20db10a96 168
fep 0:5ff20db10a96 169 #endif /* configSUPPORT_STATIC_ALLOCATION */
fep 0:5ff20db10a96 170 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 171
fep 0:5ff20db10a96 172 #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
fep 0:5ff20db10a96 173
fep 0:5ff20db10a96 174 EventGroupHandle_t xEventGroupCreate( void )
fep 0:5ff20db10a96 175 {
fep 0:5ff20db10a96 176 EventGroup_t *pxEventBits;
fep 0:5ff20db10a96 177
fep 0:5ff20db10a96 178 /* Allocate the event group. */
fep 0:5ff20db10a96 179 pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) );
fep 0:5ff20db10a96 180
fep 0:5ff20db10a96 181 if( pxEventBits != NULL )
fep 0:5ff20db10a96 182 {
fep 0:5ff20db10a96 183 pxEventBits->uxEventBits = 0;
fep 0:5ff20db10a96 184 vListInitialise( &( pxEventBits->xTasksWaitingForBits ) );
fep 0:5ff20db10a96 185
fep 0:5ff20db10a96 186 #if( configSUPPORT_STATIC_ALLOCATION == 1 )
fep 0:5ff20db10a96 187 {
fep 0:5ff20db10a96 188 /* Both static and dynamic allocation can be used, so note this
fep 0:5ff20db10a96 189 event group was allocated statically in case the event group is
fep 0:5ff20db10a96 190 later deleted. */
fep 0:5ff20db10a96 191 pxEventBits->ucStaticallyAllocated = pdFALSE;
fep 0:5ff20db10a96 192 }
fep 0:5ff20db10a96 193 #endif /* configSUPPORT_STATIC_ALLOCATION */
fep 0:5ff20db10a96 194
fep 0:5ff20db10a96 195 traceEVENT_GROUP_CREATE( pxEventBits );
fep 0:5ff20db10a96 196 }
fep 0:5ff20db10a96 197 else
fep 0:5ff20db10a96 198 {
fep 0:5ff20db10a96 199 traceEVENT_GROUP_CREATE_FAILED();
fep 0:5ff20db10a96 200 }
fep 0:5ff20db10a96 201
fep 0:5ff20db10a96 202 return ( EventGroupHandle_t ) pxEventBits;
fep 0:5ff20db10a96 203 }
fep 0:5ff20db10a96 204
fep 0:5ff20db10a96 205 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
fep 0:5ff20db10a96 206 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 207
fep 0:5ff20db10a96 208 EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait )
fep 0:5ff20db10a96 209 {
fep 0:5ff20db10a96 210 EventBits_t uxOriginalBitValue, uxReturn;
fep 0:5ff20db10a96 211 EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;
fep 0:5ff20db10a96 212 BaseType_t xAlreadyYielded;
fep 0:5ff20db10a96 213 BaseType_t xTimeoutOccurred = pdFALSE;
fep 0:5ff20db10a96 214
fep 0:5ff20db10a96 215 configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
fep 0:5ff20db10a96 216 configASSERT( uxBitsToWaitFor != 0 );
fep 0:5ff20db10a96 217 #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
fep 0:5ff20db10a96 218 {
fep 0:5ff20db10a96 219 configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
fep 0:5ff20db10a96 220 }
fep 0:5ff20db10a96 221 #endif
fep 0:5ff20db10a96 222
fep 0:5ff20db10a96 223 vTaskSuspendAll();
fep 0:5ff20db10a96 224 {
fep 0:5ff20db10a96 225 uxOriginalBitValue = pxEventBits->uxEventBits;
fep 0:5ff20db10a96 226
fep 0:5ff20db10a96 227 ( void ) xEventGroupSetBits( xEventGroup, uxBitsToSet );
fep 0:5ff20db10a96 228
fep 0:5ff20db10a96 229 if( ( ( uxOriginalBitValue | uxBitsToSet ) & uxBitsToWaitFor ) == uxBitsToWaitFor )
fep 0:5ff20db10a96 230 {
fep 0:5ff20db10a96 231 /* All the rendezvous bits are now set - no need to block. */
fep 0:5ff20db10a96 232 uxReturn = ( uxOriginalBitValue | uxBitsToSet );
fep 0:5ff20db10a96 233
fep 0:5ff20db10a96 234 /* Rendezvous always clear the bits. They will have been cleared
fep 0:5ff20db10a96 235 already unless this is the only task in the rendezvous. */
fep 0:5ff20db10a96 236 pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
fep 0:5ff20db10a96 237
fep 0:5ff20db10a96 238 xTicksToWait = 0;
fep 0:5ff20db10a96 239 }
fep 0:5ff20db10a96 240 else
fep 0:5ff20db10a96 241 {
fep 0:5ff20db10a96 242 if( xTicksToWait != ( TickType_t ) 0 )
fep 0:5ff20db10a96 243 {
fep 0:5ff20db10a96 244 traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor );
fep 0:5ff20db10a96 245
fep 0:5ff20db10a96 246 /* Store the bits that the calling task is waiting for in the
fep 0:5ff20db10a96 247 task's event list item so the kernel knows when a match is
fep 0:5ff20db10a96 248 found. Then enter the blocked state. */
fep 0:5ff20db10a96 249 vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | eventCLEAR_EVENTS_ON_EXIT_BIT | eventWAIT_FOR_ALL_BITS ), xTicksToWait );
fep 0:5ff20db10a96 250
fep 0:5ff20db10a96 251 /* This assignment is obsolete as uxReturn will get set after
fep 0:5ff20db10a96 252 the task unblocks, but some compilers mistakenly generate a
fep 0:5ff20db10a96 253 warning about uxReturn being returned without being set if the
fep 0:5ff20db10a96 254 assignment is omitted. */
fep 0:5ff20db10a96 255 uxReturn = 0;
fep 0:5ff20db10a96 256 }
fep 0:5ff20db10a96 257 else
fep 0:5ff20db10a96 258 {
fep 0:5ff20db10a96 259 /* The rendezvous bits were not set, but no block time was
fep 0:5ff20db10a96 260 specified - just return the current event bit value. */
fep 0:5ff20db10a96 261 uxReturn = pxEventBits->uxEventBits;
fep 0:5ff20db10a96 262 }
fep 0:5ff20db10a96 263 }
fep 0:5ff20db10a96 264 }
fep 0:5ff20db10a96 265 xAlreadyYielded = xTaskResumeAll();
fep 0:5ff20db10a96 266
fep 0:5ff20db10a96 267 if( xTicksToWait != ( TickType_t ) 0 )
fep 0:5ff20db10a96 268 {
fep 0:5ff20db10a96 269 if( xAlreadyYielded == pdFALSE )
fep 0:5ff20db10a96 270 {
fep 0:5ff20db10a96 271 portYIELD_WITHIN_API();
fep 0:5ff20db10a96 272 }
fep 0:5ff20db10a96 273 else
fep 0:5ff20db10a96 274 {
fep 0:5ff20db10a96 275 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 276 }
fep 0:5ff20db10a96 277
fep 0:5ff20db10a96 278 /* The task blocked to wait for its required bits to be set - at this
fep 0:5ff20db10a96 279 point either the required bits were set or the block time expired. If
fep 0:5ff20db10a96 280 the required bits were set they will have been stored in the task's
fep 0:5ff20db10a96 281 event list item, and they should now be retrieved then cleared. */
fep 0:5ff20db10a96 282 uxReturn = uxTaskResetEventItemValue();
fep 0:5ff20db10a96 283
fep 0:5ff20db10a96 284 if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 )
fep 0:5ff20db10a96 285 {
fep 0:5ff20db10a96 286 /* The task timed out, just return the current event bit value. */
fep 0:5ff20db10a96 287 taskENTER_CRITICAL();
fep 0:5ff20db10a96 288 {
fep 0:5ff20db10a96 289 uxReturn = pxEventBits->uxEventBits;
fep 0:5ff20db10a96 290
fep 0:5ff20db10a96 291 /* Although the task got here because it timed out before the
fep 0:5ff20db10a96 292 bits it was waiting for were set, it is possible that since it
fep 0:5ff20db10a96 293 unblocked another task has set the bits. If this is the case
fep 0:5ff20db10a96 294 then it needs to clear the bits before exiting. */
fep 0:5ff20db10a96 295 if( ( uxReturn & uxBitsToWaitFor ) == uxBitsToWaitFor )
fep 0:5ff20db10a96 296 {
fep 0:5ff20db10a96 297 pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
fep 0:5ff20db10a96 298 }
fep 0:5ff20db10a96 299 else
fep 0:5ff20db10a96 300 {
fep 0:5ff20db10a96 301 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 302 }
fep 0:5ff20db10a96 303 }
fep 0:5ff20db10a96 304 taskEXIT_CRITICAL();
fep 0:5ff20db10a96 305
fep 0:5ff20db10a96 306 xTimeoutOccurred = pdTRUE;
fep 0:5ff20db10a96 307 }
fep 0:5ff20db10a96 308 else
fep 0:5ff20db10a96 309 {
fep 0:5ff20db10a96 310 /* The task unblocked because the bits were set. */
fep 0:5ff20db10a96 311 }
fep 0:5ff20db10a96 312
fep 0:5ff20db10a96 313 /* Control bits might be set as the task had blocked should not be
fep 0:5ff20db10a96 314 returned. */
fep 0:5ff20db10a96 315 uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES;
fep 0:5ff20db10a96 316 }
fep 0:5ff20db10a96 317
fep 0:5ff20db10a96 318 traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred );
fep 0:5ff20db10a96 319
fep 0:5ff20db10a96 320 return uxReturn;
fep 0:5ff20db10a96 321 }
fep 0:5ff20db10a96 322 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 323
fep 0:5ff20db10a96 324 EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait )
fep 0:5ff20db10a96 325 {
fep 0:5ff20db10a96 326 EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;
fep 0:5ff20db10a96 327 EventBits_t uxReturn, uxControlBits = 0;
fep 0:5ff20db10a96 328 BaseType_t xWaitConditionMet, xAlreadyYielded;
fep 0:5ff20db10a96 329 BaseType_t xTimeoutOccurred = pdFALSE;
fep 0:5ff20db10a96 330
fep 0:5ff20db10a96 331 /* Check the user is not attempting to wait on the bits used by the kernel
fep 0:5ff20db10a96 332 itself, and that at least one bit is being requested. */
fep 0:5ff20db10a96 333 configASSERT( xEventGroup );
fep 0:5ff20db10a96 334 configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
fep 0:5ff20db10a96 335 configASSERT( uxBitsToWaitFor != 0 );
fep 0:5ff20db10a96 336 #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
fep 0:5ff20db10a96 337 {
fep 0:5ff20db10a96 338 configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
fep 0:5ff20db10a96 339 }
fep 0:5ff20db10a96 340 #endif
fep 0:5ff20db10a96 341
fep 0:5ff20db10a96 342 vTaskSuspendAll();
fep 0:5ff20db10a96 343 {
fep 0:5ff20db10a96 344 const EventBits_t uxCurrentEventBits = pxEventBits->uxEventBits;
fep 0:5ff20db10a96 345
fep 0:5ff20db10a96 346 /* Check to see if the wait condition is already met or not. */
fep 0:5ff20db10a96 347 xWaitConditionMet = prvTestWaitCondition( uxCurrentEventBits, uxBitsToWaitFor, xWaitForAllBits );
fep 0:5ff20db10a96 348
fep 0:5ff20db10a96 349 if( xWaitConditionMet != pdFALSE )
fep 0:5ff20db10a96 350 {
fep 0:5ff20db10a96 351 /* The wait condition has already been met so there is no need to
fep 0:5ff20db10a96 352 block. */
fep 0:5ff20db10a96 353 uxReturn = uxCurrentEventBits;
fep 0:5ff20db10a96 354 xTicksToWait = ( TickType_t ) 0;
fep 0:5ff20db10a96 355
fep 0:5ff20db10a96 356 /* Clear the wait bits if requested to do so. */
fep 0:5ff20db10a96 357 if( xClearOnExit != pdFALSE )
fep 0:5ff20db10a96 358 {
fep 0:5ff20db10a96 359 pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
fep 0:5ff20db10a96 360 }
fep 0:5ff20db10a96 361 else
fep 0:5ff20db10a96 362 {
fep 0:5ff20db10a96 363 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 364 }
fep 0:5ff20db10a96 365 }
fep 0:5ff20db10a96 366 else if( xTicksToWait == ( TickType_t ) 0 )
fep 0:5ff20db10a96 367 {
fep 0:5ff20db10a96 368 /* The wait condition has not been met, but no block time was
fep 0:5ff20db10a96 369 specified, so just return the current value. */
fep 0:5ff20db10a96 370 uxReturn = uxCurrentEventBits;
fep 0:5ff20db10a96 371 }
fep 0:5ff20db10a96 372 else
fep 0:5ff20db10a96 373 {
fep 0:5ff20db10a96 374 /* The task is going to block to wait for its required bits to be
fep 0:5ff20db10a96 375 set. uxControlBits are used to remember the specified behaviour of
fep 0:5ff20db10a96 376 this call to xEventGroupWaitBits() - for use when the event bits
fep 0:5ff20db10a96 377 unblock the task. */
fep 0:5ff20db10a96 378 if( xClearOnExit != pdFALSE )
fep 0:5ff20db10a96 379 {
fep 0:5ff20db10a96 380 uxControlBits |= eventCLEAR_EVENTS_ON_EXIT_BIT;
fep 0:5ff20db10a96 381 }
fep 0:5ff20db10a96 382 else
fep 0:5ff20db10a96 383 {
fep 0:5ff20db10a96 384 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 385 }
fep 0:5ff20db10a96 386
fep 0:5ff20db10a96 387 if( xWaitForAllBits != pdFALSE )
fep 0:5ff20db10a96 388 {
fep 0:5ff20db10a96 389 uxControlBits |= eventWAIT_FOR_ALL_BITS;
fep 0:5ff20db10a96 390 }
fep 0:5ff20db10a96 391 else
fep 0:5ff20db10a96 392 {
fep 0:5ff20db10a96 393 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 394 }
fep 0:5ff20db10a96 395
fep 0:5ff20db10a96 396 /* Store the bits that the calling task is waiting for in the
fep 0:5ff20db10a96 397 task's event list item so the kernel knows when a match is
fep 0:5ff20db10a96 398 found. Then enter the blocked state. */
fep 0:5ff20db10a96 399 vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | uxControlBits ), xTicksToWait );
fep 0:5ff20db10a96 400
fep 0:5ff20db10a96 401 /* This is obsolete as it will get set after the task unblocks, but
fep 0:5ff20db10a96 402 some compilers mistakenly generate a warning about the variable
fep 0:5ff20db10a96 403 being returned without being set if it is not done. */
fep 0:5ff20db10a96 404 uxReturn = 0;
fep 0:5ff20db10a96 405
fep 0:5ff20db10a96 406 traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor );
fep 0:5ff20db10a96 407 }
fep 0:5ff20db10a96 408 }
fep 0:5ff20db10a96 409 xAlreadyYielded = xTaskResumeAll();
fep 0:5ff20db10a96 410
fep 0:5ff20db10a96 411 if( xTicksToWait != ( TickType_t ) 0 )
fep 0:5ff20db10a96 412 {
fep 0:5ff20db10a96 413 if( xAlreadyYielded == pdFALSE )
fep 0:5ff20db10a96 414 {
fep 0:5ff20db10a96 415 portYIELD_WITHIN_API();
fep 0:5ff20db10a96 416 }
fep 0:5ff20db10a96 417 else
fep 0:5ff20db10a96 418 {
fep 0:5ff20db10a96 419 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 420 }
fep 0:5ff20db10a96 421
fep 0:5ff20db10a96 422 /* The task blocked to wait for its required bits to be set - at this
fep 0:5ff20db10a96 423 point either the required bits were set or the block time expired. If
fep 0:5ff20db10a96 424 the required bits were set they will have been stored in the task's
fep 0:5ff20db10a96 425 event list item, and they should now be retrieved then cleared. */
fep 0:5ff20db10a96 426 uxReturn = uxTaskResetEventItemValue();
fep 0:5ff20db10a96 427
fep 0:5ff20db10a96 428 if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 )
fep 0:5ff20db10a96 429 {
fep 0:5ff20db10a96 430 taskENTER_CRITICAL();
fep 0:5ff20db10a96 431 {
fep 0:5ff20db10a96 432 /* The task timed out, just return the current event bit value. */
fep 0:5ff20db10a96 433 uxReturn = pxEventBits->uxEventBits;
fep 0:5ff20db10a96 434
fep 0:5ff20db10a96 435 /* It is possible that the event bits were updated between this
fep 0:5ff20db10a96 436 task leaving the Blocked state and running again. */
fep 0:5ff20db10a96 437 if( prvTestWaitCondition( uxReturn, uxBitsToWaitFor, xWaitForAllBits ) != pdFALSE )
fep 0:5ff20db10a96 438 {
fep 0:5ff20db10a96 439 if( xClearOnExit != pdFALSE )
fep 0:5ff20db10a96 440 {
fep 0:5ff20db10a96 441 pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
fep 0:5ff20db10a96 442 }
fep 0:5ff20db10a96 443 else
fep 0:5ff20db10a96 444 {
fep 0:5ff20db10a96 445 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 446 }
fep 0:5ff20db10a96 447 }
fep 0:5ff20db10a96 448 else
fep 0:5ff20db10a96 449 {
fep 0:5ff20db10a96 450 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 451 }
fep 0:5ff20db10a96 452 }
fep 0:5ff20db10a96 453 taskEXIT_CRITICAL();
fep 0:5ff20db10a96 454
fep 0:5ff20db10a96 455 /* Prevent compiler warnings when trace macros are not used. */
fep 0:5ff20db10a96 456 xTimeoutOccurred = pdFALSE;
fep 0:5ff20db10a96 457 }
fep 0:5ff20db10a96 458 else
fep 0:5ff20db10a96 459 {
fep 0:5ff20db10a96 460 /* The task unblocked because the bits were set. */
fep 0:5ff20db10a96 461 }
fep 0:5ff20db10a96 462
fep 0:5ff20db10a96 463 /* The task blocked so control bits may have been set. */
fep 0:5ff20db10a96 464 uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES;
fep 0:5ff20db10a96 465 }
fep 0:5ff20db10a96 466 traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred );
fep 0:5ff20db10a96 467
fep 0:5ff20db10a96 468 return uxReturn;
fep 0:5ff20db10a96 469 }
fep 0:5ff20db10a96 470 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 471
fep 0:5ff20db10a96 472 EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear )
fep 0:5ff20db10a96 473 {
fep 0:5ff20db10a96 474 EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;
fep 0:5ff20db10a96 475 EventBits_t uxReturn;
fep 0:5ff20db10a96 476
fep 0:5ff20db10a96 477 /* Check the user is not attempting to clear the bits used by the kernel
fep 0:5ff20db10a96 478 itself. */
fep 0:5ff20db10a96 479 configASSERT( xEventGroup );
fep 0:5ff20db10a96 480 configASSERT( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
fep 0:5ff20db10a96 481
fep 0:5ff20db10a96 482 taskENTER_CRITICAL();
fep 0:5ff20db10a96 483 {
fep 0:5ff20db10a96 484 traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear );
fep 0:5ff20db10a96 485
fep 0:5ff20db10a96 486 /* The value returned is the event group value prior to the bits being
fep 0:5ff20db10a96 487 cleared. */
fep 0:5ff20db10a96 488 uxReturn = pxEventBits->uxEventBits;
fep 0:5ff20db10a96 489
fep 0:5ff20db10a96 490 /* Clear the bits. */
fep 0:5ff20db10a96 491 pxEventBits->uxEventBits &= ~uxBitsToClear;
fep 0:5ff20db10a96 492 }
fep 0:5ff20db10a96 493 taskEXIT_CRITICAL();
fep 0:5ff20db10a96 494
fep 0:5ff20db10a96 495 return uxReturn;
fep 0:5ff20db10a96 496 }
fep 0:5ff20db10a96 497 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 498
fep 0:5ff20db10a96 499 #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) )
fep 0:5ff20db10a96 500
fep 0:5ff20db10a96 501 BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear )
fep 0:5ff20db10a96 502 {
fep 0:5ff20db10a96 503 BaseType_t xReturn;
fep 0:5ff20db10a96 504
fep 0:5ff20db10a96 505 traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear );
fep 0:5ff20db10a96 506 xReturn = xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL );
fep 0:5ff20db10a96 507
fep 0:5ff20db10a96 508 return xReturn;
fep 0:5ff20db10a96 509 }
fep 0:5ff20db10a96 510
fep 0:5ff20db10a96 511 #endif
fep 0:5ff20db10a96 512 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 513
fep 0:5ff20db10a96 514 EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup )
fep 0:5ff20db10a96 515 {
fep 0:5ff20db10a96 516 UBaseType_t uxSavedInterruptStatus;
fep 0:5ff20db10a96 517 EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;
fep 0:5ff20db10a96 518 EventBits_t uxReturn;
fep 0:5ff20db10a96 519
fep 0:5ff20db10a96 520 uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
fep 0:5ff20db10a96 521 {
fep 0:5ff20db10a96 522 uxReturn = pxEventBits->uxEventBits;
fep 0:5ff20db10a96 523 }
fep 0:5ff20db10a96 524 portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
fep 0:5ff20db10a96 525
fep 0:5ff20db10a96 526 return uxReturn;
fep 0:5ff20db10a96 527 }
fep 0:5ff20db10a96 528 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 529
fep 0:5ff20db10a96 530 EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet )
fep 0:5ff20db10a96 531 {
fep 0:5ff20db10a96 532 ListItem_t *pxListItem, *pxNext;
fep 0:5ff20db10a96 533 ListItem_t const *pxListEnd;
fep 0:5ff20db10a96 534 List_t *pxList;
fep 0:5ff20db10a96 535 EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits;
fep 0:5ff20db10a96 536 EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;
fep 0:5ff20db10a96 537 BaseType_t xMatchFound = pdFALSE;
fep 0:5ff20db10a96 538
fep 0:5ff20db10a96 539 /* Check the user is not attempting to set the bits used by the kernel
fep 0:5ff20db10a96 540 itself. */
fep 0:5ff20db10a96 541 configASSERT( xEventGroup );
fep 0:5ff20db10a96 542 configASSERT( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
fep 0:5ff20db10a96 543
fep 0:5ff20db10a96 544 pxList = &( pxEventBits->xTasksWaitingForBits );
fep 0:5ff20db10a96 545 pxListEnd = listGET_END_MARKER( pxList ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */
fep 0:5ff20db10a96 546 vTaskSuspendAll();
fep 0:5ff20db10a96 547 {
fep 0:5ff20db10a96 548 traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet );
fep 0:5ff20db10a96 549
fep 0:5ff20db10a96 550 pxListItem = listGET_HEAD_ENTRY( pxList );
fep 0:5ff20db10a96 551
fep 0:5ff20db10a96 552 /* Set the bits. */
fep 0:5ff20db10a96 553 pxEventBits->uxEventBits |= uxBitsToSet;
fep 0:5ff20db10a96 554
fep 0:5ff20db10a96 555 /* See if the new bit value should unblock any tasks. */
fep 0:5ff20db10a96 556 while( pxListItem != pxListEnd )
fep 0:5ff20db10a96 557 {
fep 0:5ff20db10a96 558 pxNext = listGET_NEXT( pxListItem );
fep 0:5ff20db10a96 559 uxBitsWaitedFor = listGET_LIST_ITEM_VALUE( pxListItem );
fep 0:5ff20db10a96 560 xMatchFound = pdFALSE;
fep 0:5ff20db10a96 561
fep 0:5ff20db10a96 562 /* Split the bits waited for from the control bits. */
fep 0:5ff20db10a96 563 uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES;
fep 0:5ff20db10a96 564 uxBitsWaitedFor &= ~eventEVENT_BITS_CONTROL_BYTES;
fep 0:5ff20db10a96 565
fep 0:5ff20db10a96 566 if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( EventBits_t ) 0 )
fep 0:5ff20db10a96 567 {
fep 0:5ff20db10a96 568 /* Just looking for single bit being set. */
fep 0:5ff20db10a96 569 if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) != ( EventBits_t ) 0 )
fep 0:5ff20db10a96 570 {
fep 0:5ff20db10a96 571 xMatchFound = pdTRUE;
fep 0:5ff20db10a96 572 }
fep 0:5ff20db10a96 573 else
fep 0:5ff20db10a96 574 {
fep 0:5ff20db10a96 575 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 576 }
fep 0:5ff20db10a96 577 }
fep 0:5ff20db10a96 578 else if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) == uxBitsWaitedFor )
fep 0:5ff20db10a96 579 {
fep 0:5ff20db10a96 580 /* All bits are set. */
fep 0:5ff20db10a96 581 xMatchFound = pdTRUE;
fep 0:5ff20db10a96 582 }
fep 0:5ff20db10a96 583 else
fep 0:5ff20db10a96 584 {
fep 0:5ff20db10a96 585 /* Need all bits to be set, but not all the bits were set. */
fep 0:5ff20db10a96 586 }
fep 0:5ff20db10a96 587
fep 0:5ff20db10a96 588 if( xMatchFound != pdFALSE )
fep 0:5ff20db10a96 589 {
fep 0:5ff20db10a96 590 /* The bits match. Should the bits be cleared on exit? */
fep 0:5ff20db10a96 591 if( ( uxControlBits & eventCLEAR_EVENTS_ON_EXIT_BIT ) != ( EventBits_t ) 0 )
fep 0:5ff20db10a96 592 {
fep 0:5ff20db10a96 593 uxBitsToClear |= uxBitsWaitedFor;
fep 0:5ff20db10a96 594 }
fep 0:5ff20db10a96 595 else
fep 0:5ff20db10a96 596 {
fep 0:5ff20db10a96 597 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 598 }
fep 0:5ff20db10a96 599
fep 0:5ff20db10a96 600 /* Store the actual event flag value in the task's event list
fep 0:5ff20db10a96 601 item before removing the task from the event list. The
fep 0:5ff20db10a96 602 eventUNBLOCKED_DUE_TO_BIT_SET bit is set so the task knows
fep 0:5ff20db10a96 603 that is was unblocked due to its required bits matching, rather
fep 0:5ff20db10a96 604 than because it timed out. */
fep 0:5ff20db10a96 605 ( void ) xTaskRemoveFromUnorderedEventList( pxListItem, pxEventBits->uxEventBits | eventUNBLOCKED_DUE_TO_BIT_SET );
fep 0:5ff20db10a96 606 }
fep 0:5ff20db10a96 607
fep 0:5ff20db10a96 608 /* Move onto the next list item. Note pxListItem->pxNext is not
fep 0:5ff20db10a96 609 used here as the list item may have been removed from the event list
fep 0:5ff20db10a96 610 and inserted into the ready/pending reading list. */
fep 0:5ff20db10a96 611 pxListItem = pxNext;
fep 0:5ff20db10a96 612 }
fep 0:5ff20db10a96 613
fep 0:5ff20db10a96 614 /* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT
fep 0:5ff20db10a96 615 bit was set in the control word. */
fep 0:5ff20db10a96 616 pxEventBits->uxEventBits &= ~uxBitsToClear;
fep 0:5ff20db10a96 617 }
fep 0:5ff20db10a96 618 ( void ) xTaskResumeAll();
fep 0:5ff20db10a96 619
fep 0:5ff20db10a96 620 return pxEventBits->uxEventBits;
fep 0:5ff20db10a96 621 }
fep 0:5ff20db10a96 622 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 623
fep 0:5ff20db10a96 624 void vEventGroupDelete( EventGroupHandle_t xEventGroup )
fep 0:5ff20db10a96 625 {
fep 0:5ff20db10a96 626 EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;
fep 0:5ff20db10a96 627 const List_t *pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits );
fep 0:5ff20db10a96 628
fep 0:5ff20db10a96 629 vTaskSuspendAll();
fep 0:5ff20db10a96 630 {
fep 0:5ff20db10a96 631 traceEVENT_GROUP_DELETE( xEventGroup );
fep 0:5ff20db10a96 632
fep 0:5ff20db10a96 633 while( listCURRENT_LIST_LENGTH( pxTasksWaitingForBits ) > ( UBaseType_t ) 0 )
fep 0:5ff20db10a96 634 {
fep 0:5ff20db10a96 635 /* Unblock the task, returning 0 as the event list is being deleted
fep 0:5ff20db10a96 636 and cannot therefore have any bits set. */
fep 0:5ff20db10a96 637 configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) );
fep 0:5ff20db10a96 638 ( void ) xTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET );
fep 0:5ff20db10a96 639 }
fep 0:5ff20db10a96 640
fep 0:5ff20db10a96 641 #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
fep 0:5ff20db10a96 642 {
fep 0:5ff20db10a96 643 /* The event group can only have been allocated dynamically - free
fep 0:5ff20db10a96 644 it again. */
fep 0:5ff20db10a96 645 vPortFree( pxEventBits );
fep 0:5ff20db10a96 646 }
fep 0:5ff20db10a96 647 #elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
fep 0:5ff20db10a96 648 {
fep 0:5ff20db10a96 649 /* The event group could have been allocated statically or
fep 0:5ff20db10a96 650 dynamically, so check before attempting to free the memory. */
fep 0:5ff20db10a96 651 if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
fep 0:5ff20db10a96 652 {
fep 0:5ff20db10a96 653 vPortFree( pxEventBits );
fep 0:5ff20db10a96 654 }
fep 0:5ff20db10a96 655 else
fep 0:5ff20db10a96 656 {
fep 0:5ff20db10a96 657 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 658 }
fep 0:5ff20db10a96 659 }
fep 0:5ff20db10a96 660 #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
fep 0:5ff20db10a96 661 }
fep 0:5ff20db10a96 662 ( void ) xTaskResumeAll();
fep 0:5ff20db10a96 663 }
fep 0:5ff20db10a96 664 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 665
fep 0:5ff20db10a96 666 /* For internal use only - execute a 'set bits' command that was pended from
fep 0:5ff20db10a96 667 an interrupt. */
fep 0:5ff20db10a96 668 void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet )
fep 0:5ff20db10a96 669 {
fep 0:5ff20db10a96 670 ( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet );
fep 0:5ff20db10a96 671 }
fep 0:5ff20db10a96 672 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 673
fep 0:5ff20db10a96 674 /* For internal use only - execute a 'clear bits' command that was pended from
fep 0:5ff20db10a96 675 an interrupt. */
fep 0:5ff20db10a96 676 void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear )
fep 0:5ff20db10a96 677 {
fep 0:5ff20db10a96 678 ( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear );
fep 0:5ff20db10a96 679 }
fep 0:5ff20db10a96 680 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 681
fep 0:5ff20db10a96 682 static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits )
fep 0:5ff20db10a96 683 {
fep 0:5ff20db10a96 684 BaseType_t xWaitConditionMet = pdFALSE;
fep 0:5ff20db10a96 685
fep 0:5ff20db10a96 686 if( xWaitForAllBits == pdFALSE )
fep 0:5ff20db10a96 687 {
fep 0:5ff20db10a96 688 /* Task only has to wait for one bit within uxBitsToWaitFor to be
fep 0:5ff20db10a96 689 set. Is one already set? */
fep 0:5ff20db10a96 690 if( ( uxCurrentEventBits & uxBitsToWaitFor ) != ( EventBits_t ) 0 )
fep 0:5ff20db10a96 691 {
fep 0:5ff20db10a96 692 xWaitConditionMet = pdTRUE;
fep 0:5ff20db10a96 693 }
fep 0:5ff20db10a96 694 else
fep 0:5ff20db10a96 695 {
fep 0:5ff20db10a96 696 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 697 }
fep 0:5ff20db10a96 698 }
fep 0:5ff20db10a96 699 else
fep 0:5ff20db10a96 700 {
fep 0:5ff20db10a96 701 /* Task has to wait for all the bits in uxBitsToWaitFor to be set.
fep 0:5ff20db10a96 702 Are they set already? */
fep 0:5ff20db10a96 703 if( ( uxCurrentEventBits & uxBitsToWaitFor ) == uxBitsToWaitFor )
fep 0:5ff20db10a96 704 {
fep 0:5ff20db10a96 705 xWaitConditionMet = pdTRUE;
fep 0:5ff20db10a96 706 }
fep 0:5ff20db10a96 707 else
fep 0:5ff20db10a96 708 {
fep 0:5ff20db10a96 709 mtCOVERAGE_TEST_MARKER();
fep 0:5ff20db10a96 710 }
fep 0:5ff20db10a96 711 }
fep 0:5ff20db10a96 712
fep 0:5ff20db10a96 713 return xWaitConditionMet;
fep 0:5ff20db10a96 714 }
fep 0:5ff20db10a96 715 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 716
fep 0:5ff20db10a96 717 #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) )
fep 0:5ff20db10a96 718
fep 0:5ff20db10a96 719 BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken )
fep 0:5ff20db10a96 720 {
fep 0:5ff20db10a96 721 BaseType_t xReturn;
fep 0:5ff20db10a96 722
fep 0:5ff20db10a96 723 traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet );
fep 0:5ff20db10a96 724 xReturn = xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken );
fep 0:5ff20db10a96 725
fep 0:5ff20db10a96 726 return xReturn;
fep 0:5ff20db10a96 727 }
fep 0:5ff20db10a96 728
fep 0:5ff20db10a96 729 #endif
fep 0:5ff20db10a96 730 /*-----------------------------------------------------------*/
fep 0:5ff20db10a96 731
fep 0:5ff20db10a96 732 #if (configUSE_TRACE_FACILITY == 1)
fep 0:5ff20db10a96 733
fep 0:5ff20db10a96 734 UBaseType_t uxEventGroupGetNumber( void* xEventGroup )
fep 0:5ff20db10a96 735 {
fep 0:5ff20db10a96 736 UBaseType_t xReturn;
fep 0:5ff20db10a96 737 EventGroup_t *pxEventBits = ( EventGroup_t * ) xEventGroup;
fep 0:5ff20db10a96 738
fep 0:5ff20db10a96 739 if( xEventGroup == NULL )
fep 0:5ff20db10a96 740 {
fep 0:5ff20db10a96 741 xReturn = 0;
fep 0:5ff20db10a96 742 }
fep 0:5ff20db10a96 743 else
fep 0:5ff20db10a96 744 {
fep 0:5ff20db10a96 745 xReturn = pxEventBits->uxEventGroupNumber;
fep 0:5ff20db10a96 746 }
fep 0:5ff20db10a96 747
fep 0:5ff20db10a96 748 return xReturn;
fep 0:5ff20db10a96 749 }
fep 0:5ff20db10a96 750
fep 0:5ff20db10a96 751 #endif
fep 0:5ff20db10a96 752
fep 0:5ff20db10a96 753