Fabio Bobrow / CrazyflieSensors

Library containing Crazyflie 2.0 sensors drivers: - LPS25H (barometer) - MPU9250 (IMU) - PMW3901 (optical flow) - VL53L0X (range)

Dependents:   Drones-Controlador controladoatitude_cteste Drone_Controlador_Atitude optical_test

VL53L0X/VL53L0X.cpp@15:e07de535b86f, 2018-10-17 (annotated)

Committer:
fbob
Date:
Wed Oct 17 13:26:29 2018 +0000
Revision:
15:e07de535b86f
Parent:
13:7c993621bc1f 
Changed range and optical flow parameters names

Who changed what in which revision?

UserRevisionLine numberNew contents of line
fbob 12:2bbe233d25fb 1 /// Most of the functionality of this library is based on the VL53L0X API
fbob 12:2bbe233d25fb 2 // provided by ST (STSW-IMG005), and some of the explanatory comments are quoted
fbob 12:2bbe233d25fb 3 // or paraphrased from the API source code, API user manual (UM2039), and the
fbob 12:2bbe233d25fb 4 // VL53L0X datasheet.
fbob 12:2bbe233d25fb 5
fbob 11:b3a7164c4e12 6 #include "VL53L0X.h"
fbob 12:2bbe233d25fb 7 #include "mbed.h"
fbob 12:2bbe233d25fb 8 // Defines /////////////////////////////////////////////////////////////////////
fbob 12:2bbe233d25fb 9
fbob 12:2bbe233d25fb 10 // The Arduino two-wire interface uses a 7-bit number for the address,
fbob 12:2bbe233d25fb 11 // and sets the last bit correctly based on reads and writes
fbob 12:2bbe233d25fb 12 #define ADDRESS_DEFAULT 0b0101001 << 1
fbob 12:2bbe233d25fb 13
fbob 12:2bbe233d25fb 14 // Record the current time to check an upcoming timeout against
fbob 12:2bbe233d25fb 15 #define startTimeout() (timeout_start_ms = 0)
fbob 12:2bbe233d25fb 16
fbob 12:2bbe233d25fb 17 // Check if timeout is enabled (set to nonzero value) and has expired
fbob 12:2bbe233d25fb 18 #define checkTimeoutExpired() (io_timeout > 0 && ((uint16_t)10 - timeout_start_ms) > io_timeout)
fbob 12:2bbe233d25fb 19
fbob 12:2bbe233d25fb 20 // Decode VCSEL (vertical cavity surface emitting laser) pulse period in PCLKs
fbob 12:2bbe233d25fb 21 // from register value
fbob 12:2bbe233d25fb 22 // based on VL53L0X_decode_vcsel_period()
fbob 12:2bbe233d25fb 23 #define decodeVcselPeriod(reg_val) (((reg_val) + 1) << 1)
fbob 12:2bbe233d25fb 24
fbob 12:2bbe233d25fb 25 // Encode VCSEL pulse period register value from period in PCLKs
fbob 12:2bbe233d25fb 26 // based on VL53L0X_encode_vcsel_period()
fbob 12:2bbe233d25fb 27 #define encodeVcselPeriod(period_pclks) (((period_pclks) >> 1) - 1)
fbob 12:2bbe233d25fb 28
fbob 12:2bbe233d25fb 29 // Calculate macro period in *nanoseconds* from VCSEL period in PCLKs
fbob 12:2bbe233d25fb 30 // based on VL53L0X_calc_macro_period_ps()
fbob 12:2bbe233d25fb 31 // PLL_period_ps = 1655; macro_period_vclks = 2304
fbob 12:2bbe233d25fb 32 #define calcMacroPeriod(vcsel_period_pclks) ((((uint32_t)2304 * (vcsel_period_pclks) * 1655) + 500) / 1000)
fbob 12:2bbe233d25fb 33
fbob 12:2bbe233d25fb 34 // Constructors ////////////////////////////////////////////////////////////////
fbob 12:2bbe233d25fb 35
fbob 12:2bbe233d25fb 36 VL53L0X::VL53L0X(PinName sda, PinName scl) : m_i2c(sda,scl),m_addr(ADDRESS_DEFAULT), io_timeout(0) // no timeout
fbob 12:2bbe233d25fb 37 , did_timeout(false)
fbob 12:2bbe233d25fb 38 {
fbob 12:2bbe233d25fb 39 }
fbob 12:2bbe233d25fb 40
fbob 12:2bbe233d25fb 41 // Public Methods //////////////////////////////////////////////////////////////
fbob 12:2bbe233d25fb 42
fbob 12:2bbe233d25fb 43 void VL53L0X::setAddress(uint8_t new_addr)
fbob 12:2bbe233d25fb 44 {
fbob 12:2bbe233d25fb 45 writeReg(I2C_SLAVE_DEVICE_ADDRESS, new_addr & 0x7F);
fbob 12:2bbe233d25fb 46 address = new_addr;
fbob 12:2bbe233d25fb 47 }
fbob 12:2bbe233d25fb 48
fbob 12:2bbe233d25fb 49 // Initialize sensor using sequence based on VL53L0X_DataInit(),
fbob 12:2bbe233d25fb 50 // VL53L0X_StaticInit(), and VL53L0X_PerformRefCalibration().
fbob 12:2bbe233d25fb 51 // This function does not perform reference SPAD calibration
fbob 12:2bbe233d25fb 52 // (VL53L0X_PerformRefSpadManagement()), since the API user manual says that it
fbob 12:2bbe233d25fb 53 // is performed by ST on the bare modules; it seems like that should work well
fbob 12:2bbe233d25fb 54 // enough unless a cover glass is added.
fbob 12:2bbe233d25fb 55 // If io_2v8 (optional) is true or not given, the sensor is configured for 2V8
fbob 12:2bbe233d25fb 56 // mode.
fbob 12:2bbe233d25fb 57 bool VL53L0X::init_original(bool io_2v8)
fbob 12:2bbe233d25fb 58 {
fbob 12:2bbe233d25fb 59 // VL53L0X_DataInit() begin
fbob 12:2bbe233d25fb 60
fbob 12:2bbe233d25fb 61 // sensor uses 1V8 mode for I/O by default; switch to 2V8 mode if necessary
fbob 12:2bbe233d25fb 62 if (io_2v8)
fbob 12:2bbe233d25fb 63 {
fbob 12:2bbe233d25fb 64 writeReg(VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV,
fbob 12:2bbe233d25fb 65 readReg(VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV) | 0x01); // set bit 0
fbob 12:2bbe233d25fb 66 }
fbob 12:2bbe233d25fb 67
fbob 12:2bbe233d25fb 68 // "Set I2C standard mode"
fbob 12:2bbe233d25fb 69 writeReg(0x88, 0x00);
fbob 12:2bbe233d25fb 70
fbob 12:2bbe233d25fb 71 writeReg(0x80, 0x01);
fbob 12:2bbe233d25fb 72 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 73 writeReg(0x00, 0x00);
fbob 12:2bbe233d25fb 74 stop_variable = readReg(0x91);
fbob 12:2bbe233d25fb 75 writeReg(0x00, 0x01);
fbob 12:2bbe233d25fb 76 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 77 writeReg(0x80, 0x00);
fbob 12:2bbe233d25fb 78
fbob 12:2bbe233d25fb 79 // disable SIGNAL_RATE_MSRC (bit 1) and SIGNAL_RATE_PRE_RANGE (bit 4) limit checks
fbob 12:2bbe233d25fb 80 writeReg(MSRC_CONFIG_CONTROL, readReg(MSRC_CONFIG_CONTROL) | 0x12);
fbob 12:2bbe233d25fb 81
fbob 12:2bbe233d25fb 82 // set final range signal rate limit to 0.25 MCPS (million counts per second)
fbob 12:2bbe233d25fb 83 setSignalRateLimit(0.25);
fbob 12:2bbe233d25fb 84
fbob 12:2bbe233d25fb 85 writeReg(SYSTEM_SEQUENCE_CONFIG, 0xFF);
fbob 12:2bbe233d25fb 86
fbob 12:2bbe233d25fb 87 // VL53L0X_DataInit() end
fbob 12:2bbe233d25fb 88
fbob 12:2bbe233d25fb 89 // VL53L0X_StaticInit() begin
fbob 12:2bbe233d25fb 90
fbob 12:2bbe233d25fb 91 uint8_t spad_count;
fbob 12:2bbe233d25fb 92 bool spad_type_is_aperture;
fbob 12:2bbe233d25fb 93 if (!getSpadInfo(&spad_count, &spad_type_is_aperture)) { return false; }
fbob 12:2bbe233d25fb 94
fbob 12:2bbe233d25fb 95 // The SPAD map (RefGoodSpadMap) is read by VL53L0X_get_info_from_device() in
fbob 12:2bbe233d25fb 96 // the API, but the same data seems to be more easily readable from
fbob 12:2bbe233d25fb 97 // GLOBAL_CONFIG_SPAD_ENABLES_REF_0 through _6, so read it from there
fbob 12:2bbe233d25fb 98 char ref_spad_map[6];
fbob 12:2bbe233d25fb 99 readMulti(GLOBAL_CONFIG_SPAD_ENABLES_REF_0, ref_spad_map, 6);
fbob 12:2bbe233d25fb 100
fbob 12:2bbe233d25fb 101 // -- VL53L0X_set_reference_spads() begin (assume NVM values are valid)
fbob 12:2bbe233d25fb 102
fbob 12:2bbe233d25fb 103 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 104 writeReg(DYNAMIC_SPAD_REF_EN_START_OFFSET, 0x00);
fbob 12:2bbe233d25fb 105 writeReg(DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD, 0x2C);
fbob 12:2bbe233d25fb 106 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 107 writeReg(GLOBAL_CONFIG_REF_EN_START_SELECT, 0xB4);
fbob 12:2bbe233d25fb 108
fbob 12:2bbe233d25fb 109 uint8_t first_spad_to_enable = spad_type_is_aperture ? 12 : 0; // 12 is the first aperture spad
fbob 12:2bbe233d25fb 110 uint8_t spads_enabled = 0;
fbob 12:2bbe233d25fb 111
fbob 12:2bbe233d25fb 112 for (uint8_t i = 0; i < 48; i++)
fbob 12:2bbe233d25fb 113 {
fbob 12:2bbe233d25fb 114 if (i < first_spad_to_enable || spads_enabled == spad_count)
fbob 12:2bbe233d25fb 115 {
fbob 12:2bbe233d25fb 116 // This bit is lower than the first one that should be enabled, or
fbob 12:2bbe233d25fb 117 // (reference_spad_count) bits have already been enabled, so zero this bit
fbob 12:2bbe233d25fb 118 ref_spad_map[i / 8] &= ~(1 << (i % 8));
fbob 12:2bbe233d25fb 119 }
fbob 12:2bbe233d25fb 120 else if ((ref_spad_map[i / 8] >> (i % 8)) & 0x1)
fbob 12:2bbe233d25fb 121 {
fbob 12:2bbe233d25fb 122 spads_enabled++;
fbob 12:2bbe233d25fb 123 }
fbob 12:2bbe233d25fb 124 }
fbob 12:2bbe233d25fb 125
fbob 12:2bbe233d25fb 126 writeMulti(GLOBAL_CONFIG_SPAD_ENABLES_REF_0, ref_spad_map, 6);
fbob 12:2bbe233d25fb 127
fbob 12:2bbe233d25fb 128 // -- VL53L0X_set_reference_spads() end
fbob 12:2bbe233d25fb 129
fbob 12:2bbe233d25fb 130 // -- VL53L0X_load_tuning_settings() begin
fbob 12:2bbe233d25fb 131 // DefaultTuningSettings from vl53l0x_tuning.h
fbob 12:2bbe233d25fb 132
fbob 12:2bbe233d25fb 133 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 134 writeReg(0x00, 0x00);
fbob 12:2bbe233d25fb 135
fbob 12:2bbe233d25fb 136 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 137 writeReg(0x09, 0x00);
fbob 12:2bbe233d25fb 138 writeReg(0x10, 0x00);
fbob 12:2bbe233d25fb 139 writeReg(0x11, 0x00);
fbob 12:2bbe233d25fb 140
fbob 12:2bbe233d25fb 141 writeReg(0x24, 0x01);
fbob 12:2bbe233d25fb 142 writeReg(0x25, 0xFF);
fbob 12:2bbe233d25fb 143 writeReg(0x75, 0x00);
fbob 12:2bbe233d25fb 144
fbob 12:2bbe233d25fb 145 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 146 writeReg(0x4E, 0x2C);
fbob 12:2bbe233d25fb 147 writeReg(0x48, 0x00);
fbob 12:2bbe233d25fb 148 writeReg(0x30, 0x20);
fbob 12:2bbe233d25fb 149
fbob 12:2bbe233d25fb 150 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 151 writeReg(0x30, 0x09);
fbob 12:2bbe233d25fb 152 writeReg(0x54, 0x00);
fbob 12:2bbe233d25fb 153 writeReg(0x31, 0x04);
fbob 12:2bbe233d25fb 154 writeReg(0x32, 0x03);
fbob 12:2bbe233d25fb 155 writeReg(0x40, 0x83);
fbob 12:2bbe233d25fb 156 writeReg(0x46, 0x25);
fbob 12:2bbe233d25fb 157 writeReg(0x60, 0x00);
fbob 12:2bbe233d25fb 158 writeReg(0x27, 0x00);
fbob 12:2bbe233d25fb 159 writeReg(0x50, 0x06);
fbob 12:2bbe233d25fb 160 writeReg(0x51, 0x00);
fbob 12:2bbe233d25fb 161 writeReg(0x52, 0x96);
fbob 12:2bbe233d25fb 162 writeReg(0x56, 0x08);
fbob 12:2bbe233d25fb 163 writeReg(0x57, 0x30);
fbob 12:2bbe233d25fb 164 writeReg(0x61, 0x00);
fbob 12:2bbe233d25fb 165 writeReg(0x62, 0x00);
fbob 12:2bbe233d25fb 166 writeReg(0x64, 0x00);
fbob 12:2bbe233d25fb 167 writeReg(0x65, 0x00);
fbob 12:2bbe233d25fb 168 writeReg(0x66, 0xA0);
fbob 12:2bbe233d25fb 169
fbob 12:2bbe233d25fb 170 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 171 writeReg(0x22, 0x32);
fbob 12:2bbe233d25fb 172 writeReg(0x47, 0x14);
fbob 12:2bbe233d25fb 173 writeReg(0x49, 0xFF);
fbob 12:2bbe233d25fb 174 writeReg(0x4A, 0x00);
fbob 12:2bbe233d25fb 175
fbob 12:2bbe233d25fb 176 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 177 writeReg(0x7A, 0x0A);
fbob 12:2bbe233d25fb 178 writeReg(0x7B, 0x00);
fbob 12:2bbe233d25fb 179 writeReg(0x78, 0x21);
fbob 12:2bbe233d25fb 180
fbob 12:2bbe233d25fb 181 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 182 writeReg(0x23, 0x34);
fbob 12:2bbe233d25fb 183 writeReg(0x42, 0x00);
fbob 12:2bbe233d25fb 184 writeReg(0x44, 0xFF);
fbob 12:2bbe233d25fb 185 writeReg(0x45, 0x26);
fbob 12:2bbe233d25fb 186 writeReg(0x46, 0x05);
fbob 12:2bbe233d25fb 187 writeReg(0x40, 0x40);
fbob 12:2bbe233d25fb 188 writeReg(0x0E, 0x06);
fbob 12:2bbe233d25fb 189 writeReg(0x20, 0x1A);
fbob 12:2bbe233d25fb 190 writeReg(0x43, 0x40);
fbob 12:2bbe233d25fb 191
fbob 12:2bbe233d25fb 192 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 193 writeReg(0x34, 0x03);
fbob 12:2bbe233d25fb 194 writeReg(0x35, 0x44);
fbob 12:2bbe233d25fb 195
fbob 12:2bbe233d25fb 196 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 197 writeReg(0x31, 0x04);
fbob 12:2bbe233d25fb 198 writeReg(0x4B, 0x09);
fbob 12:2bbe233d25fb 199 writeReg(0x4C, 0x05);
fbob 12:2bbe233d25fb 200 writeReg(0x4D, 0x04);
fbob 12:2bbe233d25fb 201
fbob 12:2bbe233d25fb 202 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 203 writeReg(0x44, 0x00);
fbob 12:2bbe233d25fb 204 writeReg(0x45, 0x20);
fbob 12:2bbe233d25fb 205 writeReg(0x47, 0x08);
fbob 12:2bbe233d25fb 206 writeReg(0x48, 0x28);
fbob 12:2bbe233d25fb 207 writeReg(0x67, 0x00);
fbob 12:2bbe233d25fb 208 writeReg(0x70, 0x04);
fbob 12:2bbe233d25fb 209 writeReg(0x71, 0x01);
fbob 12:2bbe233d25fb 210 writeReg(0x72, 0xFE);
fbob 12:2bbe233d25fb 211 writeReg(0x76, 0x00);
fbob 12:2bbe233d25fb 212 writeReg(0x77, 0x00);
fbob 12:2bbe233d25fb 213
fbob 12:2bbe233d25fb 214 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 215 writeReg(0x0D, 0x01);
fbob 12:2bbe233d25fb 216
fbob 12:2bbe233d25fb 217 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 218 writeReg(0x80, 0x01);
fbob 12:2bbe233d25fb 219 writeReg(0x01, 0xF8);
fbob 12:2bbe233d25fb 220
fbob 12:2bbe233d25fb 221 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 222 writeReg(0x8E, 0x01);
fbob 12:2bbe233d25fb 223 writeReg(0x00, 0x01);
fbob 12:2bbe233d25fb 224 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 225 writeReg(0x80, 0x00);
fbob 12:2bbe233d25fb 226
fbob 12:2bbe233d25fb 227 // -- VL53L0X_load_tuning_settings() end
fbob 12:2bbe233d25fb 228
fbob 12:2bbe233d25fb 229 // "Set interrupt config to new sample ready"
fbob 12:2bbe233d25fb 230 // -- VL53L0X_SetGpioConfig() begin
fbob 12:2bbe233d25fb 231
fbob 12:2bbe233d25fb 232 writeReg(SYSTEM_INTERRUPT_CONFIG_GPIO, 0x04);
fbob 12:2bbe233d25fb 233 writeReg(GPIO_HV_MUX_ACTIVE_HIGH, readReg(GPIO_HV_MUX_ACTIVE_HIGH) & ~0x10); // active low
fbob 12:2bbe233d25fb 234 writeReg(SYSTEM_INTERRUPT_CLEAR, 0x01);
fbob 12:2bbe233d25fb 235
fbob 12:2bbe233d25fb 236 // -- VL53L0X_SetGpioConfig() end
fbob 12:2bbe233d25fb 237
fbob 12:2bbe233d25fb 238 measurement_timing_budget_us = getMeasurementTimingBudget();
fbob 12:2bbe233d25fb 239
fbob 12:2bbe233d25fb 240 // "Disable MSRC and TCC by default"
fbob 12:2bbe233d25fb 241 // MSRC = Minimum Signal Rate Check
fbob 12:2bbe233d25fb 242 // TCC = Target CentreCheck
fbob 12:2bbe233d25fb 243 // -- VL53L0X_SetSequenceStepEnable() begin
fbob 12:2bbe233d25fb 244
fbob 12:2bbe233d25fb 245 writeReg(SYSTEM_SEQUENCE_CONFIG, 0xE8);
fbob 12:2bbe233d25fb 246
fbob 12:2bbe233d25fb 247 // -- VL53L0X_SetSequenceStepEnable() end
fbob 12:2bbe233d25fb 248
fbob 12:2bbe233d25fb 249 // "Recalculate timing budget"
fbob 12:2bbe233d25fb 250 setMeasurementTimingBudget(measurement_timing_budget_us);
fbob 12:2bbe233d25fb 251
fbob 12:2bbe233d25fb 252 // VL53L0X_StaticInit() end
fbob 12:2bbe233d25fb 253
fbob 12:2bbe233d25fb 254 // VL53L0X_PerformRefCalibration() begin (VL53L0X_perform_ref_calibration())
fbob 12:2bbe233d25fb 255
fbob 12:2bbe233d25fb 256 // -- VL53L0X_perform_vhv_calibration() begin
fbob 12:2bbe233d25fb 257
fbob 12:2bbe233d25fb 258 writeReg(SYSTEM_SEQUENCE_CONFIG, 0x01);
fbob 12:2bbe233d25fb 259 if (!performSingleRefCalibration(0x40)) { return false; }
fbob 12:2bbe233d25fb 260
fbob 12:2bbe233d25fb 261 // -- VL53L0X_perform_vhv_calibration() end
fbob 12:2bbe233d25fb 262
fbob 12:2bbe233d25fb 263 // -- VL53L0X_perform_phase_calibration() begin
fbob 12:2bbe233d25fb 264
fbob 12:2bbe233d25fb 265 writeReg(SYSTEM_SEQUENCE_CONFIG, 0x02);
fbob 12:2bbe233d25fb 266 if (!performSingleRefCalibration(0x00)) { return false; }
fbob 12:2bbe233d25fb 267
fbob 12:2bbe233d25fb 268 // -- VL53L0X_perform_phase_calibration() end
fbob 12:2bbe233d25fb 269
fbob 12:2bbe233d25fb 270 // "restore the previous Sequence Config"
fbob 12:2bbe233d25fb 271 writeReg(SYSTEM_SEQUENCE_CONFIG, 0xE8);
fbob 12:2bbe233d25fb 272
fbob 12:2bbe233d25fb 273 // VL53L0X_PerformRefCalibration() end
fbob 12:2bbe233d25fb 274
fbob 12:2bbe233d25fb 275 return true;
fbob 12:2bbe233d25fb 276 }
fbob 12:2bbe233d25fb 277
fbob 12:2bbe233d25fb 278 // Set the return signal rate limit check value in units of MCPS (mega counts
fbob 12:2bbe233d25fb 279 // per second). "This represents the amplitude of the signal reflected from the
fbob 12:2bbe233d25fb 280 // target and detected by the device"; setting this limit presumably determines
fbob 12:2bbe233d25fb 281 // the minimum measurement necessary for the sensor to report a valid reading.
fbob 12:2bbe233d25fb 282 // Setting a lower limit increases the potential range of the sensor but also
fbob 12:2bbe233d25fb 283 // seems to increase the likelihood of getting an inaccurate reading because of
fbob 12:2bbe233d25fb 284 // unwanted reflections from objects other than the intended target.
fbob 12:2bbe233d25fb 285 // Defaults to 0.25 MCPS as initialized by the ST API and this library.
fbob 12:2bbe233d25fb 286 bool VL53L0X::setSignalRateLimit(float limit_Mcps)
fbob 12:2bbe233d25fb 287 {
fbob 12:2bbe233d25fb 288 if (limit_Mcps < 0 || limit_Mcps > 511.99) { return false; }
fbob 12:2bbe233d25fb 289
fbob 12:2bbe233d25fb 290 // Q9.7 fixed point format (9 integer bits, 7 fractional bits)
fbob 12:2bbe233d25fb 291 writeReg16Bit(FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT, limit_Mcps * (1 << 7));
fbob 12:2bbe233d25fb 292 return true;
fbob 12:2bbe233d25fb 293 }
fbob 12:2bbe233d25fb 294
fbob 12:2bbe233d25fb 295 // Get the return signal rate limit check value in MCPS
fbob 12:2bbe233d25fb 296 float VL53L0X::getSignalRateLimit(void)
fbob 12:2bbe233d25fb 297 {
fbob 12:2bbe233d25fb 298 return (float)readReg16Bit(FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT) / (1 << 7);
fbob 12:2bbe233d25fb 299 }
fbob 12:2bbe233d25fb 300
fbob 12:2bbe233d25fb 301 // Set the measurement timing budget in microseconds, which is the time allowed
fbob 12:2bbe233d25fb 302 // for one measurement; the ST API and this library take care of splitting the
fbob 12:2bbe233d25fb 303 // timing budget among the sub-steps in the ranging sequence. A longer timing
fbob 12:2bbe233d25fb 304 // budget allows for more accurate measurements. Increasing the budget by a
fbob 12:2bbe233d25fb 305 // factor of N decreases the range measurement standard deviation by a factor of
fbob 12:2bbe233d25fb 306 // sqrt(N). Defaults to about 33 milliseconds; the minimum is 20 ms.
fbob 12:2bbe233d25fb 307 // based on VL53L0X_set_measurement_timing_budget_micro_seconds()
fbob 12:2bbe233d25fb 308 bool VL53L0X::setMeasurementTimingBudget(uint32_t budget_us)
fbob 12:2bbe233d25fb 309 {
fbob 12:2bbe233d25fb 310 SequenceStepEnables enables;
fbob 12:2bbe233d25fb 311 SequenceStepTimeouts timeouts;
fbob 12:2bbe233d25fb 312
fbob 12:2bbe233d25fb 313 uint16_t const StartOverhead = 1320; // note that this is different than the value in get_
fbob 12:2bbe233d25fb 314 uint16_t const EndOverhead = 960;
fbob 12:2bbe233d25fb 315 uint16_t const MsrcOverhead = 660;
fbob 12:2bbe233d25fb 316 uint16_t const TccOverhead = 590;
fbob 12:2bbe233d25fb 317 uint16_t const DssOverhead = 690;
fbob 12:2bbe233d25fb 318 uint16_t const PreRangeOverhead = 660;
fbob 12:2bbe233d25fb 319 uint16_t const FinalRangeOverhead = 550;
fbob 12:2bbe233d25fb 320
fbob 12:2bbe233d25fb 321 uint32_t const MinTimingBudget = 20000;
fbob 12:2bbe233d25fb 322
fbob 12:2bbe233d25fb 323 if (budget_us < MinTimingBudget) { return false; }
fbob 12:2bbe233d25fb 324
fbob 12:2bbe233d25fb 325 uint32_t used_budget_us = StartOverhead + EndOverhead;
fbob 12:2bbe233d25fb 326
fbob 12:2bbe233d25fb 327 getSequenceStepEnables(&enables);
fbob 12:2bbe233d25fb 328 getSequenceStepTimeouts(&enables, &timeouts);
fbob 12:2bbe233d25fb 329
fbob 12:2bbe233d25fb 330 if (enables.tcc)
fbob 12:2bbe233d25fb 331 {
fbob 12:2bbe233d25fb 332 used_budget_us += (timeouts.msrc_dss_tcc_us + TccOverhead);
fbob 12:2bbe233d25fb 333 }
fbob 12:2bbe233d25fb 334
fbob 12:2bbe233d25fb 335 if (enables.dss)
fbob 12:2bbe233d25fb 336 {
fbob 12:2bbe233d25fb 337 used_budget_us += 2 * (timeouts.msrc_dss_tcc_us + DssOverhead);
fbob 12:2bbe233d25fb 338 }
fbob 12:2bbe233d25fb 339 else if (enables.msrc)
fbob 12:2bbe233d25fb 340 {
fbob 12:2bbe233d25fb 341 used_budget_us += (timeouts.msrc_dss_tcc_us + MsrcOverhead);
fbob 12:2bbe233d25fb 342 }
fbob 12:2bbe233d25fb 343
fbob 12:2bbe233d25fb 344 if (enables.pre_range)
fbob 12:2bbe233d25fb 345 {
fbob 12:2bbe233d25fb 346 used_budget_us += (timeouts.pre_range_us + PreRangeOverhead);
fbob 12:2bbe233d25fb 347 }
fbob 12:2bbe233d25fb 348
fbob 12:2bbe233d25fb 349 if (enables.final_range)
fbob 12:2bbe233d25fb 350 {
fbob 12:2bbe233d25fb 351 used_budget_us += FinalRangeOverhead;
fbob 12:2bbe233d25fb 352
fbob 12:2bbe233d25fb 353 // "Note that the final range timeout is determined by the timing
fbob 12:2bbe233d25fb 354 // budget and the sum of all other timeouts within the sequence.
fbob 12:2bbe233d25fb 355 // If there is no room for the final range timeout, then an error
fbob 12:2bbe233d25fb 356 // will be set. Otherwise the remaining time will be applied to
fbob 12:2bbe233d25fb 357 // the final range."
fbob 12:2bbe233d25fb 358
fbob 12:2bbe233d25fb 359 if (used_budget_us > budget_us)
fbob 12:2bbe233d25fb 360 {
fbob 12:2bbe233d25fb 361 // "Requested timeout too big."
fbob 12:2bbe233d25fb 362 return false;
fbob 12:2bbe233d25fb 363 }
fbob 12:2bbe233d25fb 364
fbob 12:2bbe233d25fb 365 uint32_t final_range_timeout_us = budget_us - used_budget_us;
fbob 12:2bbe233d25fb 366
fbob 12:2bbe233d25fb 367 // set_sequence_step_timeout() begin
fbob 12:2bbe233d25fb 368 // (SequenceStepId == VL53L0X_SEQUENCESTEP_FINAL_RANGE)
fbob 12:2bbe233d25fb 369
fbob 12:2bbe233d25fb 370 // "For the final range timeout, the pre-range timeout
fbob 12:2bbe233d25fb 371 // must be added. To do this both final and pre-range
fbob 12:2bbe233d25fb 372 // timeouts must be expressed in macro periods MClks
fbob 12:2bbe233d25fb 373 // because they have different vcsel periods."
fbob 12:2bbe233d25fb 374
fbob 12:2bbe233d25fb 375 uint16_t final_range_timeout_mclks =
fbob 12:2bbe233d25fb 376 timeoutMicrosecondsToMclks(final_range_timeout_us,
fbob 12:2bbe233d25fb 377 timeouts.final_range_vcsel_period_pclks);
fbob 12:2bbe233d25fb 378
fbob 12:2bbe233d25fb 379 if (enables.pre_range)
fbob 12:2bbe233d25fb 380 {
fbob 12:2bbe233d25fb 381 final_range_timeout_mclks += timeouts.pre_range_mclks;
fbob 12:2bbe233d25fb 382 }
fbob 12:2bbe233d25fb 383
fbob 12:2bbe233d25fb 384 writeReg16Bit(FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI,
fbob 12:2bbe233d25fb 385 encodeTimeout(final_range_timeout_mclks));
fbob 12:2bbe233d25fb 386
fbob 12:2bbe233d25fb 387 // set_sequence_step_timeout() end
fbob 12:2bbe233d25fb 388
fbob 12:2bbe233d25fb 389 measurement_timing_budget_us = budget_us; // store for internal reuse
fbob 12:2bbe233d25fb 390 }
fbob 12:2bbe233d25fb 391 return true;
fbob 12:2bbe233d25fb 392 }
fbob 12:2bbe233d25fb 393
fbob 12:2bbe233d25fb 394 // Get the measurement timing budget in microseconds
fbob 12:2bbe233d25fb 395 // based on VL53L0X_get_measurement_timing_budget_micro_seconds()
fbob 12:2bbe233d25fb 396 // in us
fbob 12:2bbe233d25fb 397 uint32_t VL53L0X::getMeasurementTimingBudget(void)
fbob 12:2bbe233d25fb 398 {
fbob 12:2bbe233d25fb 399 SequenceStepEnables enables;
fbob 12:2bbe233d25fb 400 SequenceStepTimeouts timeouts;
fbob 12:2bbe233d25fb 401
fbob 12:2bbe233d25fb 402 uint16_t const StartOverhead = 1910; // note that this is different than the value in set_
fbob 12:2bbe233d25fb 403 uint16_t const EndOverhead = 960;
fbob 12:2bbe233d25fb 404 uint16_t const MsrcOverhead = 660;
fbob 12:2bbe233d25fb 405 uint16_t const TccOverhead = 590;
fbob 12:2bbe233d25fb 406 uint16_t const DssOverhead = 690;
fbob 12:2bbe233d25fb 407 uint16_t const PreRangeOverhead = 660;
fbob 12:2bbe233d25fb 408 uint16_t const FinalRangeOverhead = 550;
fbob 12:2bbe233d25fb 409
fbob 12:2bbe233d25fb 410 // "Start and end overhead times always present"
fbob 12:2bbe233d25fb 411 uint32_t budget_us = StartOverhead + EndOverhead;
fbob 12:2bbe233d25fb 412
fbob 12:2bbe233d25fb 413 getSequenceStepEnables(&enables);
fbob 12:2bbe233d25fb 414 getSequenceStepTimeouts(&enables, &timeouts);
fbob 12:2bbe233d25fb 415
fbob 12:2bbe233d25fb 416 if (enables.tcc)
fbob 12:2bbe233d25fb 417 {
fbob 12:2bbe233d25fb 418 budget_us += (timeouts.msrc_dss_tcc_us + TccOverhead);
fbob 12:2bbe233d25fb 419 }
fbob 12:2bbe233d25fb 420
fbob 12:2bbe233d25fb 421 if (enables.dss)
fbob 12:2bbe233d25fb 422 {
fbob 12:2bbe233d25fb 423 budget_us += 2 * (timeouts.msrc_dss_tcc_us + DssOverhead);
fbob 12:2bbe233d25fb 424 }
fbob 12:2bbe233d25fb 425 else if (enables.msrc)
fbob 12:2bbe233d25fb 426 {
fbob 12:2bbe233d25fb 427 budget_us += (timeouts.msrc_dss_tcc_us + MsrcOverhead);
fbob 12:2bbe233d25fb 428 }
fbob 12:2bbe233d25fb 429
fbob 12:2bbe233d25fb 430 if (enables.pre_range)
fbob 12:2bbe233d25fb 431 {
fbob 12:2bbe233d25fb 432 budget_us += (timeouts.pre_range_us + PreRangeOverhead);
fbob 12:2bbe233d25fb 433 }
fbob 12:2bbe233d25fb 434
fbob 12:2bbe233d25fb 435 if (enables.final_range)
fbob 12:2bbe233d25fb 436 {
fbob 12:2bbe233d25fb 437 budget_us += (timeouts.final_range_us + FinalRangeOverhead);
fbob 12:2bbe233d25fb 438 }
fbob 12:2bbe233d25fb 439
fbob 12:2bbe233d25fb 440 measurement_timing_budget_us = budget_us; // store for internal reuse
fbob 12:2bbe233d25fb 441 return budget_us;
fbob 12:2bbe233d25fb 442 }
fbob 12:2bbe233d25fb 443
fbob 12:2bbe233d25fb 444 // Set the VCSEL (vertical cavity surface emitting laser) pulse period for the
fbob 12:2bbe233d25fb 445 // given period type (pre-range or final range) to the given value in PCLKs.
fbob 12:2bbe233d25fb 446 // Longer periods seem to increase the potential range of the sensor.
fbob 12:2bbe233d25fb 447 // Valid values are (even numbers only):
fbob 12:2bbe233d25fb 448 // pre: 12 to 18 (initialized default: 14)
fbob 12:2bbe233d25fb 449 // final: 8 to 14 (initialized default: 10)
fbob 12:2bbe233d25fb 450 // based on VL53L0X_set_vcsel_pulse_period()
fbob 12:2bbe233d25fb 451 bool VL53L0X::setVcselPulsePeriod(vcselPeriodType type, uint8_t period_pclks)
fbob 12:2bbe233d25fb 452 {
fbob 12:2bbe233d25fb 453 uint8_t vcsel_period_reg = encodeVcselPeriod(period_pclks);
fbob 12:2bbe233d25fb 454
fbob 12:2bbe233d25fb 455 SequenceStepEnables enables;
fbob 12:2bbe233d25fb 456 SequenceStepTimeouts timeouts;
fbob 12:2bbe233d25fb 457
fbob 12:2bbe233d25fb 458 getSequenceStepEnables(&enables);
fbob 12:2bbe233d25fb 459 getSequenceStepTimeouts(&enables, &timeouts);
fbob 12:2bbe233d25fb 460
fbob 12:2bbe233d25fb 461 // "Apply specific settings for the requested clock period"
fbob 12:2bbe233d25fb 462 // "Re-calculate and apply timeouts, in macro periods"
fbob 12:2bbe233d25fb 463
fbob 12:2bbe233d25fb 464 // "When the VCSEL period for the pre or final range is changed,
fbob 12:2bbe233d25fb 465 // the corresponding timeout must be read from the device using
fbob 12:2bbe233d25fb 466 // the current VCSEL period, then the new VCSEL period can be
fbob 12:2bbe233d25fb 467 // applied. The timeout then must be written back to the device
fbob 12:2bbe233d25fb 468 // using the new VCSEL period.
fbob 12:2bbe233d25fb 469 //
fbob 12:2bbe233d25fb 470 // For the MSRC timeout, the same applies - this timeout being
fbob 12:2bbe233d25fb 471 // dependant on the pre-range vcsel period."
fbob 12:2bbe233d25fb 472
fbob 12:2bbe233d25fb 473
fbob 12:2bbe233d25fb 474 if (type == VcselPeriodPreRange)
fbob 12:2bbe233d25fb 475 {
fbob 12:2bbe233d25fb 476 // "Set phase check limits"
fbob 12:2bbe233d25fb 477 switch (period_pclks)
fbob 12:2bbe233d25fb 478 {
fbob 12:2bbe233d25fb 479 case 12:
fbob 12:2bbe233d25fb 480 writeReg(PRE_RANGE_CONFIG_VALID_PHASE_HIGH, 0x18);
fbob 12:2bbe233d25fb 481 break;
fbob 12:2bbe233d25fb 482
fbob 12:2bbe233d25fb 483 case 14:
fbob 12:2bbe233d25fb 484 writeReg(PRE_RANGE_CONFIG_VALID_PHASE_HIGH, 0x30);
fbob 12:2bbe233d25fb 485 break;
fbob 12:2bbe233d25fb 486
fbob 12:2bbe233d25fb 487 case 16:
fbob 12:2bbe233d25fb 488 writeReg(PRE_RANGE_CONFIG_VALID_PHASE_HIGH, 0x40);
fbob 12:2bbe233d25fb 489 break;
fbob 12:2bbe233d25fb 490
fbob 12:2bbe233d25fb 491 case 18:
fbob 12:2bbe233d25fb 492 writeReg(PRE_RANGE_CONFIG_VALID_PHASE_HIGH, 0x50);
fbob 12:2bbe233d25fb 493 break;
fbob 12:2bbe233d25fb 494
fbob 12:2bbe233d25fb 495 default:
fbob 12:2bbe233d25fb 496 // invalid period
fbob 12:2bbe233d25fb 497 return false;
fbob 12:2bbe233d25fb 498 }
fbob 12:2bbe233d25fb 499 writeReg(PRE_RANGE_CONFIG_VALID_PHASE_LOW, 0x08);
fbob 12:2bbe233d25fb 500
fbob 12:2bbe233d25fb 501 // apply new VCSEL period
fbob 12:2bbe233d25fb 502 writeReg(PRE_RANGE_CONFIG_VCSEL_PERIOD, vcsel_period_reg);
fbob 12:2bbe233d25fb 503
fbob 12:2bbe233d25fb 504 // update timeouts
fbob 12:2bbe233d25fb 505
fbob 12:2bbe233d25fb 506 // set_sequence_step_timeout() begin
fbob 12:2bbe233d25fb 507 // (SequenceStepId == VL53L0X_SEQUENCESTEP_PRE_RANGE)
fbob 12:2bbe233d25fb 508
fbob 12:2bbe233d25fb 509 uint16_t new_pre_range_timeout_mclks =
fbob 12:2bbe233d25fb 510 timeoutMicrosecondsToMclks(timeouts.pre_range_us, period_pclks);
fbob 12:2bbe233d25fb 511
fbob 12:2bbe233d25fb 512 writeReg16Bit(PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI,
fbob 12:2bbe233d25fb 513 encodeTimeout(new_pre_range_timeout_mclks));
fbob 12:2bbe233d25fb 514
fbob 12:2bbe233d25fb 515 // set_sequence_step_timeout() end
fbob 12:2bbe233d25fb 516
fbob 12:2bbe233d25fb 517 // set_sequence_step_timeout() begin
fbob 12:2bbe233d25fb 518 // (SequenceStepId == VL53L0X_SEQUENCESTEP_MSRC)
fbob 12:2bbe233d25fb 519
fbob 12:2bbe233d25fb 520 uint16_t new_msrc_timeout_mclks =
fbob 12:2bbe233d25fb 521 timeoutMicrosecondsToMclks(timeouts.msrc_dss_tcc_us, period_pclks);
fbob 11:b3a7164c4e12 522
fbob 12:2bbe233d25fb 523 writeReg(MSRC_CONFIG_TIMEOUT_MACROP,
fbob 12:2bbe233d25fb 524 (new_msrc_timeout_mclks > 256) ? 255 : (new_msrc_timeout_mclks - 1));
fbob 12:2bbe233d25fb 525
fbob 12:2bbe233d25fb 526 // set_sequence_step_timeout() end
fbob 12:2bbe233d25fb 527 }
fbob 12:2bbe233d25fb 528 else if (type == VcselPeriodFinalRange)
fbob 12:2bbe233d25fb 529 {
fbob 12:2bbe233d25fb 530 switch (period_pclks)
fbob 12:2bbe233d25fb 531 {
fbob 12:2bbe233d25fb 532 case 8:
fbob 12:2bbe233d25fb 533 writeReg(FINAL_RANGE_CONFIG_VALID_PHASE_HIGH, 0x10);
fbob 12:2bbe233d25fb 534 writeReg(FINAL_RANGE_CONFIG_VALID_PHASE_LOW, 0x08);
fbob 12:2bbe233d25fb 535 writeReg(GLOBAL_CONFIG_VCSEL_WIDTH, 0x02);
fbob 12:2bbe233d25fb 536 writeReg(ALGO_PHASECAL_CONFIG_TIMEOUT, 0x0C);
fbob 12:2bbe233d25fb 537 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 538 writeReg(ALGO_PHASECAL_LIM, 0x30);
fbob 12:2bbe233d25fb 539 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 540 break;
fbob 12:2bbe233d25fb 541
fbob 12:2bbe233d25fb 542 case 10:
fbob 12:2bbe233d25fb 543 writeReg(FINAL_RANGE_CONFIG_VALID_PHASE_HIGH, 0x28);
fbob 12:2bbe233d25fb 544 writeReg(FINAL_RANGE_CONFIG_VALID_PHASE_LOW, 0x08);
fbob 12:2bbe233d25fb 545 writeReg(GLOBAL_CONFIG_VCSEL_WIDTH, 0x03);
fbob 12:2bbe233d25fb 546 writeReg(ALGO_PHASECAL_CONFIG_TIMEOUT, 0x09);
fbob 12:2bbe233d25fb 547 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 548 writeReg(ALGO_PHASECAL_LIM, 0x20);
fbob 12:2bbe233d25fb 549 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 550 break;
fbob 12:2bbe233d25fb 551
fbob 12:2bbe233d25fb 552 case 12:
fbob 12:2bbe233d25fb 553 writeReg(FINAL_RANGE_CONFIG_VALID_PHASE_HIGH, 0x38);
fbob 12:2bbe233d25fb 554 writeReg(FINAL_RANGE_CONFIG_VALID_PHASE_LOW, 0x08);
fbob 12:2bbe233d25fb 555 writeReg(GLOBAL_CONFIG_VCSEL_WIDTH, 0x03);
fbob 12:2bbe233d25fb 556 writeReg(ALGO_PHASECAL_CONFIG_TIMEOUT, 0x08);
fbob 12:2bbe233d25fb 557 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 558 writeReg(ALGO_PHASECAL_LIM, 0x20);
fbob 12:2bbe233d25fb 559 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 560 break;
fbob 12:2bbe233d25fb 561
fbob 12:2bbe233d25fb 562 case 14:
fbob 12:2bbe233d25fb 563 writeReg(FINAL_RANGE_CONFIG_VALID_PHASE_HIGH, 0x48);
fbob 12:2bbe233d25fb 564 writeReg(FINAL_RANGE_CONFIG_VALID_PHASE_LOW, 0x08);
fbob 12:2bbe233d25fb 565 writeReg(GLOBAL_CONFIG_VCSEL_WIDTH, 0x03);
fbob 12:2bbe233d25fb 566 writeReg(ALGO_PHASECAL_CONFIG_TIMEOUT, 0x07);
fbob 12:2bbe233d25fb 567 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 568 writeReg(ALGO_PHASECAL_LIM, 0x20);
fbob 12:2bbe233d25fb 569 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 570 break;
fbob 12:2bbe233d25fb 571
fbob 12:2bbe233d25fb 572 default:
fbob 12:2bbe233d25fb 573 // invalid period
fbob 12:2bbe233d25fb 574 return false;
fbob 12:2bbe233d25fb 575 }
fbob 12:2bbe233d25fb 576
fbob 12:2bbe233d25fb 577 // apply new VCSEL period
fbob 12:2bbe233d25fb 578 writeReg(FINAL_RANGE_CONFIG_VCSEL_PERIOD, vcsel_period_reg);
fbob 12:2bbe233d25fb 579
fbob 12:2bbe233d25fb 580 // update timeouts
fbob 12:2bbe233d25fb 581
fbob 12:2bbe233d25fb 582 // set_sequence_step_timeout() begin
fbob 12:2bbe233d25fb 583 // (SequenceStepId == VL53L0X_SEQUENCESTEP_FINAL_RANGE)
fbob 12:2bbe233d25fb 584
fbob 12:2bbe233d25fb 585 // "For the final range timeout, the pre-range timeout
fbob 12:2bbe233d25fb 586 // must be added. To do this both final and pre-range
fbob 12:2bbe233d25fb 587 // timeouts must be expressed in macro periods MClks
fbob 12:2bbe233d25fb 588 // because they have different vcsel periods."
fbob 12:2bbe233d25fb 589
fbob 12:2bbe233d25fb 590 uint16_t new_final_range_timeout_mclks =
fbob 12:2bbe233d25fb 591 timeoutMicrosecondsToMclks(timeouts.final_range_us, period_pclks);
fbob 12:2bbe233d25fb 592
fbob 12:2bbe233d25fb 593 if (enables.pre_range)
fbob 12:2bbe233d25fb 594 {
fbob 12:2bbe233d25fb 595 new_final_range_timeout_mclks += timeouts.pre_range_mclks;
fbob 12:2bbe233d25fb 596 }
fbob 12:2bbe233d25fb 597
fbob 12:2bbe233d25fb 598 writeReg16Bit(FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI,
fbob 12:2bbe233d25fb 599 encodeTimeout(new_final_range_timeout_mclks));
fbob 12:2bbe233d25fb 600
fbob 12:2bbe233d25fb 601 // set_sequence_step_timeout end
fbob 12:2bbe233d25fb 602 }
fbob 12:2bbe233d25fb 603 else
fbob 12:2bbe233d25fb 604 {
fbob 12:2bbe233d25fb 605 // invalid type
fbob 12:2bbe233d25fb 606 return false;
fbob 12:2bbe233d25fb 607 }
fbob 12:2bbe233d25fb 608
fbob 12:2bbe233d25fb 609 // "Finally, the timing budget must be re-applied"
fbob 12:2bbe233d25fb 610
fbob 12:2bbe233d25fb 611 setMeasurementTimingBudget(measurement_timing_budget_us);
fbob 12:2bbe233d25fb 612
fbob 12:2bbe233d25fb 613 // "Perform the phase calibration. This is needed after changing on vcsel period."
fbob 12:2bbe233d25fb 614 // VL53L0X_perform_phase_calibration() begin
fbob 12:2bbe233d25fb 615
fbob 12:2bbe233d25fb 616 uint8_t sequence_config = readReg(SYSTEM_SEQUENCE_CONFIG);
fbob 12:2bbe233d25fb 617 writeReg(SYSTEM_SEQUENCE_CONFIG, 0x02);
fbob 12:2bbe233d25fb 618 performSingleRefCalibration(0x0);
fbob 12:2bbe233d25fb 619 writeReg(SYSTEM_SEQUENCE_CONFIG, sequence_config);
fbob 12:2bbe233d25fb 620
fbob 12:2bbe233d25fb 621 // VL53L0X_perform_phase_calibration() end
fbob 12:2bbe233d25fb 622
fbob 12:2bbe233d25fb 623 return true;
fbob 12:2bbe233d25fb 624 }
fbob 12:2bbe233d25fb 625
fbob 12:2bbe233d25fb 626 // Get the VCSEL pulse period in PCLKs for the given period type.
fbob 12:2bbe233d25fb 627 // based on VL53L0X_get_vcsel_pulse_period()
fbob 12:2bbe233d25fb 628 uint8_t VL53L0X::getVcselPulsePeriod(vcselPeriodType type)
fbob 12:2bbe233d25fb 629 {
fbob 12:2bbe233d25fb 630 if (type == VcselPeriodPreRange)
fbob 12:2bbe233d25fb 631 {
fbob 12:2bbe233d25fb 632 return decodeVcselPeriod(readReg(PRE_RANGE_CONFIG_VCSEL_PERIOD));
fbob 12:2bbe233d25fb 633 }
fbob 12:2bbe233d25fb 634 else if (type == VcselPeriodFinalRange)
fbob 12:2bbe233d25fb 635 {
fbob 12:2bbe233d25fb 636 return decodeVcselPeriod(readReg(FINAL_RANGE_CONFIG_VCSEL_PERIOD));
fbob 12:2bbe233d25fb 637 }
fbob 12:2bbe233d25fb 638 else { return 255; }
fbob 12:2bbe233d25fb 639 }
fbob 12:2bbe233d25fb 640
fbob 12:2bbe233d25fb 641 // Start continuous ranging measurements. If period_ms (optional) is 0 or not
fbob 12:2bbe233d25fb 642 // given, continuous back-to-back mode is used (the sensor takes measurements as
fbob 12:2bbe233d25fb 643 // often as possible); otherwise, continuous timed mode is used, with the given
fbob 12:2bbe233d25fb 644 // inter-measurement period in milliseconds determining how often the sensor
fbob 12:2bbe233d25fb 645 // takes a measurement.
fbob 12:2bbe233d25fb 646 // based on VL53L0X_StartMeasurement()
fbob 12:2bbe233d25fb 647 void VL53L0X::startContinuous(uint32_t period_ms)
fbob 12:2bbe233d25fb 648 {
fbob 12:2bbe233d25fb 649 writeReg(0x80, 0x01);
fbob 12:2bbe233d25fb 650 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 651 writeReg(0x00, 0x00);
fbob 12:2bbe233d25fb 652 writeReg(0x91, stop_variable);
fbob 12:2bbe233d25fb 653 writeReg(0x00, 0x01);
fbob 12:2bbe233d25fb 654 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 655 writeReg(0x80, 0x00);
fbob 12:2bbe233d25fb 656
fbob 12:2bbe233d25fb 657 if (period_ms != 0)
fbob 12:2bbe233d25fb 658 {
fbob 12:2bbe233d25fb 659 // continuous timed mode
fbob 12:2bbe233d25fb 660
fbob 12:2bbe233d25fb 661 // VL53L0X_SetInterMeasurementPeriodMilliSeconds() begin
fbob 12:2bbe233d25fb 662
fbob 12:2bbe233d25fb 663 uint16_t osc_calibrate_val = readReg16Bit(OSC_CALIBRATE_VAL);
fbob 12:2bbe233d25fb 664
fbob 12:2bbe233d25fb 665 if (osc_calibrate_val != 0)
fbob 12:2bbe233d25fb 666 {
fbob 12:2bbe233d25fb 667 period_ms *= osc_calibrate_val;
fbob 12:2bbe233d25fb 668 }
fbob 12:2bbe233d25fb 669
fbob 12:2bbe233d25fb 670 writeReg32Bit(SYSTEM_INTERMEASUREMENT_PERIOD, period_ms);
fbob 12:2bbe233d25fb 671
fbob 12:2bbe233d25fb 672 // VL53L0X_SetInterMeasurementPeriodMilliSeconds() end
fbob 12:2bbe233d25fb 673
fbob 12:2bbe233d25fb 674 writeReg(SYSRANGE_START, 0x04); // VL53L0X_REG_SYSRANGE_MODE_TIMED
fbob 12:2bbe233d25fb 675 }
fbob 12:2bbe233d25fb 676 else
fbob 12:2bbe233d25fb 677 {
fbob 12:2bbe233d25fb 678 // continuous back-to-back mode
fbob 12:2bbe233d25fb 679 writeReg(SYSRANGE_START, 0x02); // VL53L0X_REG_SYSRANGE_MODE_BACKTOBACK
fbob 12:2bbe233d25fb 680 }
fbob 12:2bbe233d25fb 681 }
fbob 12:2bbe233d25fb 682
fbob 12:2bbe233d25fb 683 // Stop continuous measurements
fbob 12:2bbe233d25fb 684 // based on VL53L0X_StopMeasurement()
fbob 12:2bbe233d25fb 685 void VL53L0X::stopContinuous(void)
fbob 12:2bbe233d25fb 686 {
fbob 12:2bbe233d25fb 687 writeReg(SYSRANGE_START, 0x01); // VL53L0X_REG_SYSRANGE_MODE_SINGLESHOT
fbob 12:2bbe233d25fb 688
fbob 12:2bbe233d25fb 689 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 690 writeReg(0x00, 0x00);
fbob 12:2bbe233d25fb 691 writeReg(0x91, 0x00);
fbob 12:2bbe233d25fb 692 writeReg(0x00, 0x01);
fbob 12:2bbe233d25fb 693 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 694 }
fbob 12:2bbe233d25fb 695
fbob 12:2bbe233d25fb 696 // Returns a range reading in millimeters when continuous mode is active
fbob 12:2bbe233d25fb 697 // (readRangeSingleMillimeters() also calls this function after starting a
fbob 12:2bbe233d25fb 698 // single-shot range measurement)
fbob 12:2bbe233d25fb 699 uint16_t VL53L0X::readRangeContinuousMillimeters(void)
fbob 12:2bbe233d25fb 700 {
fbob 12:2bbe233d25fb 701 startTimeout();
fbob 12:2bbe233d25fb 702 while ((readReg(RESULT_INTERRUPT_STATUS) & 0x07) == 0)
fbob 12:2bbe233d25fb 703 {
fbob 12:2bbe233d25fb 704 if (checkTimeoutExpired())
fbob 12:2bbe233d25fb 705 {
fbob 12:2bbe233d25fb 706 did_timeout = true;
fbob 12:2bbe233d25fb 707 return 65535;
fbob 12:2bbe233d25fb 708 }
fbob 12:2bbe233d25fb 709 }
fbob 12:2bbe233d25fb 710
fbob 12:2bbe233d25fb 711 // assumptions: Linearity Corrective Gain is 1000 (default);
fbob 12:2bbe233d25fb 712 // fractional ranging is not enabled
fbob 12:2bbe233d25fb 713 uint16_t range = readReg16Bit(RESULT_RANGE_STATUS + 10);
fbob 12:2bbe233d25fb 714
fbob 12:2bbe233d25fb 715 writeReg(SYSTEM_INTERRUPT_CLEAR, 0x01);
fbob 12:2bbe233d25fb 716
fbob 12:2bbe233d25fb 717 return range;
fbob 12:2bbe233d25fb 718 }
fbob 12:2bbe233d25fb 719
fbob 12:2bbe233d25fb 720 // Performs a single-shot range measurement and returns the reading in
fbob 12:2bbe233d25fb 721 // millimeters
fbob 12:2bbe233d25fb 722 // based on VL53L0X_PerformSingleRangingMeasurement()
fbob 12:2bbe233d25fb 723 uint16_t VL53L0X::readRangeSingleMillimeters(void)
fbob 12:2bbe233d25fb 724 {
fbob 12:2bbe233d25fb 725 writeReg(0x80, 0x01);
fbob 12:2bbe233d25fb 726 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 727 writeReg(0x00, 0x00);
fbob 12:2bbe233d25fb 728 writeReg(0x91, stop_variable);
fbob 12:2bbe233d25fb 729 writeReg(0x00, 0x01);
fbob 12:2bbe233d25fb 730 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 731 writeReg(0x80, 0x00);
fbob 12:2bbe233d25fb 732
fbob 12:2bbe233d25fb 733 writeReg(SYSRANGE_START, 0x01);
fbob 12:2bbe233d25fb 734
fbob 12:2bbe233d25fb 735 // "Wait until start bit has been cleared"
fbob 12:2bbe233d25fb 736 startTimeout();
fbob 12:2bbe233d25fb 737 while (readReg(SYSRANGE_START) & 0x01)
fbob 12:2bbe233d25fb 738 {
fbob 12:2bbe233d25fb 739 if (checkTimeoutExpired())
fbob 12:2bbe233d25fb 740 {
fbob 12:2bbe233d25fb 741 did_timeout = true;
fbob 12:2bbe233d25fb 742 return 65535;
fbob 12:2bbe233d25fb 743 }
fbob 12:2bbe233d25fb 744 }
fbob 12:2bbe233d25fb 745
fbob 12:2bbe233d25fb 746 return readRangeContinuousMillimeters();
fbob 12:2bbe233d25fb 747 }
fbob 12:2bbe233d25fb 748
fbob 12:2bbe233d25fb 749 // Did a timeout occur in one of the read functions since the last call to
fbob 12:2bbe233d25fb 750 // timeoutOccurred()?
fbob 12:2bbe233d25fb 751 bool VL53L0X::timeoutOccurred()
fbob 12:2bbe233d25fb 752 {
fbob 12:2bbe233d25fb 753 bool tmp = did_timeout;
fbob 12:2bbe233d25fb 754 did_timeout = false;
fbob 12:2bbe233d25fb 755 return tmp;
fbob 12:2bbe233d25fb 756 }
fbob 12:2bbe233d25fb 757
fbob 12:2bbe233d25fb 758 // Private Methods /////////////////////////////////////////////////////////////
fbob 12:2bbe233d25fb 759
fbob 12:2bbe233d25fb 760 // Get reference SPAD (single photon avalanche diode) count and type
fbob 12:2bbe233d25fb 761 // based on VL53L0X_get_info_from_device(),
fbob 12:2bbe233d25fb 762 // but only gets reference SPAD count and type
fbob 12:2bbe233d25fb 763 bool VL53L0X::getSpadInfo(uint8_t * count, bool * type_is_aperture)
fbob 11:b3a7164c4e12 764 {
fbob 12:2bbe233d25fb 765 uint8_t tmp;
fbob 12:2bbe233d25fb 766
fbob 12:2bbe233d25fb 767 writeReg(0x80, 0x01);
fbob 12:2bbe233d25fb 768 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 769 writeReg(0x00, 0x00);
fbob 12:2bbe233d25fb 770
fbob 12:2bbe233d25fb 771 writeReg(0xFF, 0x06);
fbob 12:2bbe233d25fb 772 writeReg(0x83, readReg(0x83) | 0x04);
fbob 12:2bbe233d25fb 773 writeReg(0xFF, 0x07);
fbob 12:2bbe233d25fb 774 writeReg(0x81, 0x01);
fbob 12:2bbe233d25fb 775
fbob 12:2bbe233d25fb 776 writeReg(0x80, 0x01);
fbob 12:2bbe233d25fb 777
fbob 12:2bbe233d25fb 778 writeReg(0x94, 0x6b);
fbob 12:2bbe233d25fb 779 writeReg(0x83, 0x00);
fbob 12:2bbe233d25fb 780 startTimeout();
fbob 12:2bbe233d25fb 781 while (readReg(0x83) == 0x00)
fbob 12:2bbe233d25fb 782 {
fbob 12:2bbe233d25fb 783 if (checkTimeoutExpired()) { return false; }
fbob 12:2bbe233d25fb 784 }
fbob 12:2bbe233d25fb 785 writeReg(0x83, 0x01);
fbob 12:2bbe233d25fb 786 tmp = readReg(0x92);
fbob 12:2bbe233d25fb 787
fbob 12:2bbe233d25fb 788 *count = tmp & 0x7f;
fbob 12:2bbe233d25fb 789 *type_is_aperture = (tmp >> 7) & 0x01;
fbob 12:2bbe233d25fb 790
fbob 12:2bbe233d25fb 791 writeReg(0x81, 0x00);
fbob 12:2bbe233d25fb 792 writeReg(0xFF, 0x06);
fbob 12:2bbe233d25fb 793 writeReg(0x83, readReg( 0x83 & ~0x04));
fbob 12:2bbe233d25fb 794 writeReg(0xFF, 0x01);
fbob 12:2bbe233d25fb 795 writeReg(0x00, 0x01);
fbob 12:2bbe233d25fb 796
fbob 12:2bbe233d25fb 797 writeReg(0xFF, 0x00);
fbob 12:2bbe233d25fb 798 writeReg(0x80, 0x00);
fbob 12:2bbe233d25fb 799
fbob 12:2bbe233d25fb 800 return true;
fbob 12:2bbe233d25fb 801 }
fbob 12:2bbe233d25fb 802
fbob 12:2bbe233d25fb 803 // Get sequence step enables
fbob 12:2bbe233d25fb 804 // based on VL53L0X_GetSequenceStepEnables()
fbob 12:2bbe233d25fb 805 void VL53L0X::getSequenceStepEnables(SequenceStepEnables * enables)
fbob 12:2bbe233d25fb 806 {
fbob 12:2bbe233d25fb 807 uint8_t sequence_config = readReg(SYSTEM_SEQUENCE_CONFIG);
fbob 12:2bbe233d25fb 808
fbob 12:2bbe233d25fb 809 enables->tcc = (sequence_config >> 4) & 0x1;
fbob 12:2bbe233d25fb 810 enables->dss = (sequence_config >> 3) & 0x1;
fbob 12:2bbe233d25fb 811 enables->msrc = (sequence_config >> 2) & 0x1;
fbob 12:2bbe233d25fb 812 enables->pre_range = (sequence_config >> 6) & 0x1;
fbob 12:2bbe233d25fb 813 enables->final_range = (sequence_config >> 7) & 0x1;
fbob 12:2bbe233d25fb 814 }
fbob 12:2bbe233d25fb 815
fbob 12:2bbe233d25fb 816 // Get sequence step timeouts
fbob 12:2bbe233d25fb 817 // based on get_sequence_step_timeout(),
fbob 12:2bbe233d25fb 818 // but gets all timeouts instead of just the requested one, and also stores
fbob 12:2bbe233d25fb 819 // intermediate values
fbob 12:2bbe233d25fb 820 void VL53L0X::getSequenceStepTimeouts(SequenceStepEnables const * enables, SequenceStepTimeouts * timeouts)
fbob 12:2bbe233d25fb 821 {
fbob 12:2bbe233d25fb 822 timeouts->pre_range_vcsel_period_pclks = getVcselPulsePeriod(VcselPeriodPreRange);
fbob 12:2bbe233d25fb 823
fbob 12:2bbe233d25fb 824 timeouts->msrc_dss_tcc_mclks = readReg(MSRC_CONFIG_TIMEOUT_MACROP) + 1;
fbob 12:2bbe233d25fb 825 timeouts->msrc_dss_tcc_us =
fbob 12:2bbe233d25fb 826 timeoutMclksToMicroseconds(timeouts->msrc_dss_tcc_mclks,
fbob 12:2bbe233d25fb 827 timeouts->pre_range_vcsel_period_pclks);
fbob 12:2bbe233d25fb 828
fbob 12:2bbe233d25fb 829 timeouts->pre_range_mclks =
fbob 12:2bbe233d25fb 830 decodeTimeout(readReg16Bit(PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI));
fbob 12:2bbe233d25fb 831 timeouts->pre_range_us =
fbob 12:2bbe233d25fb 832 timeoutMclksToMicroseconds(timeouts->pre_range_mclks,
fbob 12:2bbe233d25fb 833 timeouts->pre_range_vcsel_period_pclks);
fbob 12:2bbe233d25fb 834
fbob 12:2bbe233d25fb 835 timeouts->final_range_vcsel_period_pclks = getVcselPulsePeriod(VcselPeriodFinalRange);
fbob 12:2bbe233d25fb 836
fbob 12:2bbe233d25fb 837 timeouts->final_range_mclks =
fbob 12:2bbe233d25fb 838 decodeTimeout(readReg16Bit(FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI));
fbob 12:2bbe233d25fb 839
fbob 12:2bbe233d25fb 840 if (enables->pre_range)
fbob 12:2bbe233d25fb 841 {
fbob 12:2bbe233d25fb 842 timeouts->final_range_mclks -= timeouts->pre_range_mclks;
fbob 12:2bbe233d25fb 843 }
fbob 12:2bbe233d25fb 844
fbob 12:2bbe233d25fb 845 timeouts->final_range_us =
fbob 12:2bbe233d25fb 846 timeoutMclksToMicroseconds(timeouts->final_range_mclks,
fbob 12:2bbe233d25fb 847 timeouts->final_range_vcsel_period_pclks);
fbob 12:2bbe233d25fb 848 }
fbob 12:2bbe233d25fb 849
fbob 12:2bbe233d25fb 850 // Decode sequence step timeout in MCLKs from register value
fbob 12:2bbe233d25fb 851 // based on VL53L0X_decode_timeout()
fbob 12:2bbe233d25fb 852 // Note: the original function returned a uint32_t, but the return value is
fbob 12:2bbe233d25fb 853 // always stored in a uint16_t.
fbob 12:2bbe233d25fb 854 uint16_t VL53L0X::decodeTimeout(uint16_t reg_val)
fbob 12:2bbe233d25fb 855 {
fbob 12:2bbe233d25fb 856 // format: "(LSByte * 2^MSByte) + 1"
fbob 12:2bbe233d25fb 857 return (uint16_t)((reg_val & 0x00FF) <<
fbob 12:2bbe233d25fb 858 (uint16_t)((reg_val & 0xFF00) >> 8)) + 1;
fbob 12:2bbe233d25fb 859 }
fbob 12:2bbe233d25fb 860
fbob 12:2bbe233d25fb 861 // Encode sequence step timeout register value from timeout in MCLKs
fbob 12:2bbe233d25fb 862 // based on VL53L0X_encode_timeout()
fbob 12:2bbe233d25fb 863 // Note: the original function took a uint16_t, but the argument passed to it
fbob 12:2bbe233d25fb 864 // is always a uint16_t.
fbob 12:2bbe233d25fb 865 uint16_t VL53L0X::encodeTimeout(uint16_t timeout_mclks)
fbob 12:2bbe233d25fb 866 {
fbob 12:2bbe233d25fb 867 // format: "(LSByte * 2^MSByte) + 1"
fbob 12:2bbe233d25fb 868
fbob 12:2bbe233d25fb 869 uint32_t ls_byte = 0;
fbob 12:2bbe233d25fb 870 uint16_t ms_byte = 0;
fbob 12:2bbe233d25fb 871
fbob 12:2bbe233d25fb 872 if (timeout_mclks > 0)
fbob 12:2bbe233d25fb 873 {
fbob 12:2bbe233d25fb 874 ls_byte = timeout_mclks - 1;
fbob 12:2bbe233d25fb 875
fbob 12:2bbe233d25fb 876 while ((ls_byte & 0xFFFFFF00) > 0)
fbob 12:2bbe233d25fb 877 {
fbob 12:2bbe233d25fb 878 ls_byte >>= 1;
fbob 12:2bbe233d25fb 879 ms_byte++;
fbob 12:2bbe233d25fb 880 }
fbob 12:2bbe233d25fb 881
fbob 12:2bbe233d25fb 882 return (ms_byte << 8) | (ls_byte & 0xFF);
fbob 12:2bbe233d25fb 883 }
fbob 12:2bbe233d25fb 884 else { return 0; }
fbob 12:2bbe233d25fb 885 }
fbob 12:2bbe233d25fb 886
fbob 12:2bbe233d25fb 887 // Convert sequence step timeout from MCLKs to microseconds with given VCSEL period in PCLKs
fbob 12:2bbe233d25fb 888 // based on VL53L0X_calc_timeout_us()
fbob 12:2bbe233d25fb 889 uint32_t VL53L0X::timeoutMclksToMicroseconds(uint16_t timeout_period_mclks, uint8_t vcsel_period_pclks)
fbob 12:2bbe233d25fb 890 {
fbob 12:2bbe233d25fb 891 uint32_t macro_period_ns = calcMacroPeriod(vcsel_period_pclks);
fbob 12:2bbe233d25fb 892
fbob 12:2bbe233d25fb 893 return ((timeout_period_mclks * macro_period_ns) + (macro_period_ns / 2)) / 1000;
fbob 12:2bbe233d25fb 894 }
fbob 12:2bbe233d25fb 895
fbob 12:2bbe233d25fb 896 // Convert sequence step timeout from microseconds to MCLKs with given VCSEL period in PCLKs
fbob 12:2bbe233d25fb 897 // based on VL53L0X_calc_timeout_mclks()
fbob 12:2bbe233d25fb 898 uint32_t VL53L0X::timeoutMicrosecondsToMclks(uint32_t timeout_period_us, uint8_t vcsel_period_pclks)
fbob 12:2bbe233d25fb 899 {
fbob 12:2bbe233d25fb 900 uint32_t macro_period_ns = calcMacroPeriod(vcsel_period_pclks);
fbob 12:2bbe233d25fb 901
fbob 12:2bbe233d25fb 902 return (((timeout_period_us * 1000) + (macro_period_ns / 2)) / macro_period_ns);
fbob 12:2bbe233d25fb 903 }
fbob 12:2bbe233d25fb 904
fbob 12:2bbe233d25fb 905
fbob 12:2bbe233d25fb 906 // based on VL53L0X_perform_single_ref_calibration()
fbob 12:2bbe233d25fb 907 bool VL53L0X::performSingleRefCalibration(uint8_t vhv_init_byte)
fbob 12:2bbe233d25fb 908 {
fbob 12:2bbe233d25fb 909 writeReg(SYSRANGE_START, 0x01 | vhv_init_byte); // VL53L0X_REG_SYSRANGE_MODE_START_STOP
fbob 12:2bbe233d25fb 910
fbob 12:2bbe233d25fb 911 startTimeout();
fbob 12:2bbe233d25fb 912 while ((readReg(RESULT_INTERRUPT_STATUS) & 0x07) == 0)
fbob 12:2bbe233d25fb 913 {
fbob 12:2bbe233d25fb 914 if (checkTimeoutExpired()) { return false; }
fbob 12:2bbe233d25fb 915 }
fbob 12:2bbe233d25fb 916
fbob 12:2bbe233d25fb 917 writeReg(SYSTEM_INTERRUPT_CLEAR, 0x01);
fbob 12:2bbe233d25fb 918
fbob 12:2bbe233d25fb 919 writeReg(SYSRANGE_START, 0x00);
fbob 12:2bbe233d25fb 920
fbob 12:2bbe233d25fb 921 return true;
fbob 12:2bbe233d25fb 922 }
fbob 12:2bbe233d25fb 923
fbob 12:2bbe233d25fb 924 // Write an 8-bit register
fbob 12:2bbe233d25fb 925 void VL53L0X::writeReg(uint8_t reg, uint8_t value)
fbob 12:2bbe233d25fb 926 {
fbob 12:2bbe233d25fb 927 char data_write[2];
fbob 12:2bbe233d25fb 928 data_write[0]=reg;
fbob 12:2bbe233d25fb 929 data_write[1]=value;
fbob 12:2bbe233d25fb 930 m_i2c.write(m_addr,data_write,2);
fbob 12:2bbe233d25fb 931 }
fbob 12:2bbe233d25fb 932
fbob 12:2bbe233d25fb 933 // Write a 16-bit register
fbob 12:2bbe233d25fb 934 void VL53L0X::writeReg16Bit(uint8_t reg, uint16_t value)
fbob 12:2bbe233d25fb 935 {
fbob 12:2bbe233d25fb 936 char data_write[3];
fbob 12:2bbe233d25fb 937 data_write[0]=reg;
fbob 12:2bbe233d25fb 938 data_write[1]=(value >> 8) & 0xFF; // value high byte
fbob 12:2bbe233d25fb 939 data_write[2]=value & 0xFF; // value low byte
fbob 12:2bbe233d25fb 940 m_i2c.write(m_addr,data_write,3);
fbob 12:2bbe233d25fb 941 }
fbob 12:2bbe233d25fb 942
fbob 12:2bbe233d25fb 943 // Write a 32-bit register
fbob 12:2bbe233d25fb 944 void VL53L0X::writeReg32Bit(uint8_t reg, uint32_t value)
fbob 12:2bbe233d25fb 945 {
fbob 12:2bbe233d25fb 946 char data_write[5];
fbob 12:2bbe233d25fb 947 data_write[0]=reg;
fbob 12:2bbe233d25fb 948 data_write[1]=(value >> 24) & 0xFF; // value highest byte
fbob 12:2bbe233d25fb 949 data_write[2]=(value >> 16) & 0xFF;
fbob 12:2bbe233d25fb 950 data_write[3]=(value >> 8) & 0xFF;
fbob 12:2bbe233d25fb 951 data_write[4]= value & 0xFF; // value lowest byte
fbob 12:2bbe233d25fb 952 m_i2c.write(m_addr,data_write,5);
fbob 12:2bbe233d25fb 953 }
fbob 12:2bbe233d25fb 954
fbob 12:2bbe233d25fb 955 // Read an 8-bit register
fbob 12:2bbe233d25fb 956 uint8_t VL53L0X::readReg(uint8_t reg)
fbob 12:2bbe233d25fb 957 {
fbob 12:2bbe233d25fb 958 uint8_t value;
fbob 12:2bbe233d25fb 959 char data_write[1];
fbob 12:2bbe233d25fb 960 char data_read[1];
fbob 12:2bbe233d25fb 961
fbob 12:2bbe233d25fb 962 data_write[0]=reg;
fbob 12:2bbe233d25fb 963 m_i2c.write(m_addr,data_write,1);
fbob 12:2bbe233d25fb 964 m_i2c.read(m_addr,data_read,1);
fbob 12:2bbe233d25fb 965 value=data_read[0];
fbob 12:2bbe233d25fb 966 return value;
fbob 12:2bbe233d25fb 967 }
fbob 12:2bbe233d25fb 968
fbob 12:2bbe233d25fb 969 // Read a 16-bit register
fbob 12:2bbe233d25fb 970 uint16_t VL53L0X::readReg16Bit(uint8_t reg)
fbob 12:2bbe233d25fb 971 {
fbob 12:2bbe233d25fb 972 uint16_t value;
fbob 12:2bbe233d25fb 973 uint8_t data_high;
fbob 12:2bbe233d25fb 974 uint8_t data_low;
fbob 12:2bbe233d25fb 975 char data_write[1];
fbob 12:2bbe233d25fb 976 char data_read[2];
fbob 12:2bbe233d25fb 977
fbob 12:2bbe233d25fb 978 data_write[0]=reg;
fbob 12:2bbe233d25fb 979 m_i2c.write(m_addr,data_write,1);
fbob 12:2bbe233d25fb 980 m_i2c.read(m_addr,data_read,2);
fbob 12:2bbe233d25fb 981 data_high=data_read[0]; // value high byte
fbob 12:2bbe233d25fb 982 data_low=data_read[1]; // value low byte
fbob 12:2bbe233d25fb 983 value = (data_high << 8)| data_low;
fbob 12:2bbe233d25fb 984
fbob 12:2bbe233d25fb 985 return value;
fbob 12:2bbe233d25fb 986 }
fbob 12:2bbe233d25fb 987
fbob 12:2bbe233d25fb 988 // Read a 32-bit register
fbob 12:2bbe233d25fb 989 uint32_t VL53L0X::readReg32Bit(uint8_t reg)
fbob 12:2bbe233d25fb 990 {
fbob 12:2bbe233d25fb 991 uint32_t value;
fbob 12:2bbe233d25fb 992 uint8_t data_high;
fbob 12:2bbe233d25fb 993 uint8_t data_2;
fbob 12:2bbe233d25fb 994 uint8_t data_1;
fbob 12:2bbe233d25fb 995 uint8_t data_low;
fbob 12:2bbe233d25fb 996 char data_write[1];
fbob 12:2bbe233d25fb 997 char data_read[4];
fbob 12:2bbe233d25fb 998
fbob 12:2bbe233d25fb 999 data_write[0]=reg;
fbob 12:2bbe233d25fb 1000 m_i2c.write(m_addr,data_write,1);
fbob 12:2bbe233d25fb 1001 m_i2c.read(m_addr,data_read,4);
fbob 12:2bbe233d25fb 1002
fbob 12:2bbe233d25fb 1003 data_high=data_read[0];
fbob 12:2bbe233d25fb 1004 data_2=data_read[1];
fbob 12:2bbe233d25fb 1005 data_1=data_read[2];
fbob 12:2bbe233d25fb 1006 data_low=data_read[3];
fbob 12:2bbe233d25fb 1007
fbob 12:2bbe233d25fb 1008 value = (data_high << 24)|(data_2 << 16)|(data_1 << 8)|(data_low); // value highest byte
fbob 12:2bbe233d25fb 1009
fbob 12:2bbe233d25fb 1010 return value;
fbob 12:2bbe233d25fb 1011 }
fbob 12:2bbe233d25fb 1012
fbob 12:2bbe233d25fb 1013 // Write an arbitrary number of bytes from the given array to the sensor,
fbob 12:2bbe233d25fb 1014 // starting at the given register
fbob 12:2bbe233d25fb 1015 void VL53L0X::writeMulti(uint8_t reg, char src[], uint8_t count)
fbob 12:2bbe233d25fb 1016 {
fbob 12:2bbe233d25fb 1017 char data_write[1];
fbob 12:2bbe233d25fb 1018 data_write[0]=reg;
fbob 12:2bbe233d25fb 1019 m_i2c.write(m_addr,data_write,1);
fbob 12:2bbe233d25fb 1020 m_i2c.write(m_addr,src,count);
fbob 12:2bbe233d25fb 1021 }
fbob 12:2bbe233d25fb 1022
fbob 12:2bbe233d25fb 1023 // Read an arbitrary number of bytes from the sensor, starting at the given
fbob 12:2bbe233d25fb 1024 // register, into the given array
fbob 12:2bbe233d25fb 1025 void VL53L0X::readMulti(uint8_t reg, char dst[], uint8_t count)
fbob 12:2bbe233d25fb 1026 {
fbob 12:2bbe233d25fb 1027 char data_write[1];
fbob 12:2bbe233d25fb 1028 data_write[0]=reg;
fbob 12:2bbe233d25fb 1029 m_i2c.write(m_addr,data_write,1);
fbob 12:2bbe233d25fb 1030 m_i2c.read(m_addr,dst,count);
fbob 12:2bbe233d25fb 1031 }
fbob 12:2bbe233d25fb 1032
fbob 12:2bbe233d25fb 1033 bool VL53L0X::init()
fbob 12:2bbe233d25fb 1034 {
fbob 12:2bbe233d25fb 1035 bool return_original = init_original();
fbob 12:2bbe233d25fb 1036 setTimeout(500);
fbob 13:7c993621bc1f 1037 //setMeasurementTimingBudget(20000);
fbob 12:2bbe233d25fb 1038 startContinuous();
fbob 12:2bbe233d25fb 1039 return return_original;
fbob 12:2bbe233d25fb 1040 }
fbob 12:2bbe233d25fb 1041
fbob 12:2bbe233d25fb 1042 void VL53L0X::read()
fbob 12:2bbe233d25fb 1043 {
fbob 15:e07de535b86f 1044 d = readRangeContinuousMillimeters()/1000.0f;
fbob 12:2bbe233d25fb 1045 }
fbob 12:2bbe233d25fb 1046