frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

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TARGET_NUCLEO_L152RE/stm32l1xx_ll_sdmmc.h@93:9dd889aeda0e, 2014-12-05 (annotated)

Committer:
fblanc
Date:
Fri Dec 05 15:42:32 2014 +0000
Revision:
93:9dd889aeda0e
Parent:
90:cb3d968589d8 
substitute line 894 extern } by }; /TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h

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Kojto 90:cb3d968589d8 1 /**
Kojto 90:cb3d968589d8 2 ******************************************************************************
Kojto 90:cb3d968589d8 3 * @file stm32l1xx_ll_sdmmc.h
Kojto 90:cb3d968589d8 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.0.0
Kojto 90:cb3d968589d8 6 * @date 5-September-2014
Kojto 90:cb3d968589d8 7 * @brief Header file of low layer SDMMC HAL module.
Kojto 90:cb3d968589d8 8 ******************************************************************************
Kojto 90:cb3d968589d8 9 * @attention
Kojto 90:cb3d968589d8 10 *
Kojto 90:cb3d968589d8 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 90:cb3d968589d8 12 *
Kojto 90:cb3d968589d8 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 14 * are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 90:cb3d968589d8 16 * this list of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 90:cb3d968589d8 18 * this list of conditions and the following disclaimer in the documentation
Kojto 90:cb3d968589d8 19 * and/or other materials provided with the distribution.
Kojto 90:cb3d968589d8 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 90:cb3d968589d8 21 * may be used to endorse or promote products derived from this software
Kojto 90:cb3d968589d8 22 * without specific prior written permission.
Kojto 90:cb3d968589d8 23 *
Kojto 90:cb3d968589d8 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 90:cb3d968589d8 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 90:cb3d968589d8 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 90:cb3d968589d8 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 90:cb3d968589d8 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 90:cb3d968589d8 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 90:cb3d968589d8 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 90:cb3d968589d8 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 90:cb3d968589d8 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 34 *
Kojto 90:cb3d968589d8 35 ******************************************************************************
Kojto 90:cb3d968589d8 36 */
Kojto 90:cb3d968589d8 37
Kojto 90:cb3d968589d8 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 90:cb3d968589d8 39 #ifndef __STM32L1xx_LL_SD_H
Kojto 90:cb3d968589d8 40 #define __STM32L1xx_LL_SD_H
Kojto 90:cb3d968589d8 41
Kojto 90:cb3d968589d8 42 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)
Kojto 90:cb3d968589d8 43
Kojto 90:cb3d968589d8 44 #ifdef __cplusplus
Kojto 90:cb3d968589d8 45 extern "C" {
Kojto 90:cb3d968589d8 46 #endif
Kojto 90:cb3d968589d8 47
Kojto 90:cb3d968589d8 48 /* Includes ------------------------------------------------------------------*/
Kojto 90:cb3d968589d8 49 #include "stm32l1xx_hal_def.h"
Kojto 90:cb3d968589d8 50
Kojto 90:cb3d968589d8 51 /** @addtogroup STM32L1xx_HAL_Driver
Kojto 90:cb3d968589d8 52 * @{
Kojto 90:cb3d968589d8 53 */
Kojto 90:cb3d968589d8 54
Kojto 90:cb3d968589d8 55 /** @addtogroup SDMMC_LL
Kojto 90:cb3d968589d8 56 * @{
Kojto 90:cb3d968589d8 57 */
Kojto 90:cb3d968589d8 58
Kojto 90:cb3d968589d8 59 /* Exported types ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 60 /** @defgroup SDMMC_LL_Exported_Types SDMMC_LL Exported Types
Kojto 90:cb3d968589d8 61 * @{
Kojto 90:cb3d968589d8 62 */
Kojto 90:cb3d968589d8 63
Kojto 90:cb3d968589d8 64 /**
Kojto 90:cb3d968589d8 65 * @brief SDMMC Configuration Structure definition
Kojto 90:cb3d968589d8 66 */
Kojto 90:cb3d968589d8 67 typedef struct
Kojto 90:cb3d968589d8 68 {
Kojto 90:cb3d968589d8 69 uint32_t ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
Kojto 90:cb3d968589d8 70 This parameter can be a value of @ref SDMMC_LL_Clock_Edge */
Kojto 90:cb3d968589d8 71
Kojto 90:cb3d968589d8 72 uint32_t ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
Kojto 90:cb3d968589d8 73 enabled or disabled.
Kojto 90:cb3d968589d8 74 This parameter can be a value of @ref SDMMC_LL_Clock_Bypass */
Kojto 90:cb3d968589d8 75
Kojto 90:cb3d968589d8 76 uint32_t ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
Kojto 90:cb3d968589d8 77 disabled when the bus is idle.
Kojto 90:cb3d968589d8 78 This parameter can be a value of @ref SDMMC_LL_Clock_Power_Save */
Kojto 90:cb3d968589d8 79
Kojto 90:cb3d968589d8 80 uint32_t BusWide; /*!< Specifies the SDIO bus width.
Kojto 90:cb3d968589d8 81 This parameter can be a value of @ref SDMMC_LL_Bus_Wide */
Kojto 90:cb3d968589d8 82
Kojto 90:cb3d968589d8 83 uint32_t HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
Kojto 90:cb3d968589d8 84 This parameter can be a value of @ref SDMMC_LL_Hardware_Flow_Control */
Kojto 90:cb3d968589d8 85
Kojto 90:cb3d968589d8 86 uint32_t ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
Kojto 90:cb3d968589d8 87 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 90:cb3d968589d8 88
Kojto 90:cb3d968589d8 89 }SDIO_InitTypeDef;
Kojto 90:cb3d968589d8 90
Kojto 90:cb3d968589d8 91
Kojto 90:cb3d968589d8 92 /**
Kojto 90:cb3d968589d8 93 * @brief SDIO Command Control structure
Kojto 90:cb3d968589d8 94 */
Kojto 90:cb3d968589d8 95 typedef struct
Kojto 90:cb3d968589d8 96 {
Kojto 90:cb3d968589d8 97 uint32_t Argument; /*!< Specifies the SDIO command argument which is sent
Kojto 90:cb3d968589d8 98 to a card as part of a command message. If a command
Kojto 90:cb3d968589d8 99 contains an argument, it must be loaded into this register
Kojto 90:cb3d968589d8 100 before writing the command to the command register. */
Kojto 90:cb3d968589d8 101
Kojto 90:cb3d968589d8 102 uint32_t CmdIndex; /*!< Specifies the SDIO command index. It must be Min_Data = 0 and
Kojto 90:cb3d968589d8 103 Max_Data = 64 */
Kojto 90:cb3d968589d8 104
Kojto 90:cb3d968589d8 105 uint32_t Response; /*!< Specifies the SDIO response type.
Kojto 90:cb3d968589d8 106 This parameter can be a value of @ref SDMMC_LL_Response_Type */
Kojto 90:cb3d968589d8 107
Kojto 90:cb3d968589d8 108 uint32_t WaitForInterrupt; /*!< Specifies whether SDIO wait for interrupt request is
Kojto 90:cb3d968589d8 109 enabled or disabled.
Kojto 90:cb3d968589d8 110 This parameter can be a value of @ref SDMMC_LL_Wait_Interrupt_State */
Kojto 90:cb3d968589d8 111
Kojto 90:cb3d968589d8 112 uint32_t CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
Kojto 90:cb3d968589d8 113 is enabled or disabled.
Kojto 90:cb3d968589d8 114 This parameter can be a value of @ref SDMMC_LL_CPSM_State */
Kojto 90:cb3d968589d8 115 }SDIO_CmdInitTypeDef;
Kojto 90:cb3d968589d8 116
Kojto 90:cb3d968589d8 117
Kojto 90:cb3d968589d8 118 /**
Kojto 90:cb3d968589d8 119 * @brief SDIO Data Control structure
Kojto 90:cb3d968589d8 120 */
Kojto 90:cb3d968589d8 121 typedef struct
Kojto 90:cb3d968589d8 122 {
Kojto 90:cb3d968589d8 123 uint32_t DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
Kojto 90:cb3d968589d8 124
Kojto 90:cb3d968589d8 125 uint32_t DataLength; /*!< Specifies the number of data bytes to be transferred. */
Kojto 90:cb3d968589d8 126
Kojto 90:cb3d968589d8 127 uint32_t DataBlockSize; /*!< Specifies the data block size for block transfer.
Kojto 90:cb3d968589d8 128 This parameter can be a value of @ref SDMMC_LL_Data_Block_Size */
Kojto 90:cb3d968589d8 129
Kojto 90:cb3d968589d8 130 uint32_t TransferDir; /*!< Specifies the data transfer direction, whether the transfer
Kojto 90:cb3d968589d8 131 is a read or write.
Kojto 90:cb3d968589d8 132 This parameter can be a value of @ref SDMMC_LL_Transfer_Direction */
Kojto 90:cb3d968589d8 133
Kojto 90:cb3d968589d8 134 uint32_t TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
Kojto 90:cb3d968589d8 135 This parameter can be a value of @ref SDMMC_LL_Transfer_Type */
Kojto 90:cb3d968589d8 136
Kojto 90:cb3d968589d8 137 uint32_t DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
Kojto 90:cb3d968589d8 138 is enabled or disabled.
Kojto 90:cb3d968589d8 139 This parameter can be a value of @ref SDMMC_LL_DPSM_State */
Kojto 90:cb3d968589d8 140 }SDIO_DataInitTypeDef;
Kojto 90:cb3d968589d8 141
Kojto 90:cb3d968589d8 142 /**
Kojto 90:cb3d968589d8 143 * @}
Kojto 90:cb3d968589d8 144 */
Kojto 90:cb3d968589d8 145
Kojto 90:cb3d968589d8 146 /* Exported constants --------------------------------------------------------*/
Kojto 90:cb3d968589d8 147 /** @defgroup SDMMC_LL_Exported_Constants SDMMC_LL Exported Constants
Kojto 90:cb3d968589d8 148 * @{
Kojto 90:cb3d968589d8 149 */
Kojto 90:cb3d968589d8 150
Kojto 90:cb3d968589d8 151 /** @defgroup SDMMC_LL_Clock_Edge Clock Edge
Kojto 90:cb3d968589d8 152 * @{
Kojto 90:cb3d968589d8 153 */
Kojto 90:cb3d968589d8 154 #define SDIO_CLOCK_EDGE_RISING ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 155 #define SDIO_CLOCK_EDGE_FALLING SDIO_CLKCR_NEGEDGE
Kojto 90:cb3d968589d8 156
Kojto 90:cb3d968589d8 157 #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_CLOCK_EDGE_RISING) || \
Kojto 90:cb3d968589d8 158 ((EDGE) == SDIO_CLOCK_EDGE_FALLING))
Kojto 90:cb3d968589d8 159 /**
Kojto 90:cb3d968589d8 160 * @}
Kojto 90:cb3d968589d8 161 */
Kojto 90:cb3d968589d8 162
Kojto 90:cb3d968589d8 163 /** @defgroup SDMMC_LL_Clock_Bypass Clock Bypass
Kojto 90:cb3d968589d8 164 * @{
Kojto 90:cb3d968589d8 165 */
Kojto 90:cb3d968589d8 166 #define SDIO_CLOCK_BYPASS_DISABLE ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 167 #define SDIO_CLOCK_BYPASS_ENABLE SDIO_CLKCR_BYPASS
Kojto 90:cb3d968589d8 168
Kojto 90:cb3d968589d8 169 #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_CLOCK_BYPASS_DISABLE) || \
Kojto 90:cb3d968589d8 170 ((BYPASS) == SDIO_CLOCK_BYPASS_ENABLE))
Kojto 90:cb3d968589d8 171 /**
Kojto 90:cb3d968589d8 172 * @}
Kojto 90:cb3d968589d8 173 */
Kojto 90:cb3d968589d8 174
Kojto 90:cb3d968589d8 175 /** @defgroup SDMMC_LL_Clock_Power_Save Clock Power Saving
Kojto 90:cb3d968589d8 176 * @{
Kojto 90:cb3d968589d8 177 */
Kojto 90:cb3d968589d8 178 #define SDIO_CLOCK_POWER_SAVE_DISABLE ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 179 #define SDIO_CLOCK_POWER_SAVE_ENABLE SDIO_CLKCR_PWRSAV
Kojto 90:cb3d968589d8 180
Kojto 90:cb3d968589d8 181 #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_CLOCK_POWER_SAVE_DISABLE) || \
Kojto 90:cb3d968589d8 182 ((SAVE) == SDIO_CLOCK_POWER_SAVE_ENABLE))
Kojto 90:cb3d968589d8 183 /**
Kojto 90:cb3d968589d8 184 * @}
Kojto 90:cb3d968589d8 185 */
Kojto 90:cb3d968589d8 186
Kojto 90:cb3d968589d8 187 /** @defgroup SDMMC_LL_Bus_Wide Bus Width
Kojto 90:cb3d968589d8 188 * @{
Kojto 90:cb3d968589d8 189 */
Kojto 90:cb3d968589d8 190 #define SDIO_BUS_WIDE_1B ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 191 #define SDIO_BUS_WIDE_4B SDIO_CLKCR_WIDBUS_0
Kojto 90:cb3d968589d8 192 #define SDIO_BUS_WIDE_8B SDIO_CLKCR_WIDBUS_1
Kojto 90:cb3d968589d8 193
Kojto 90:cb3d968589d8 194 #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BUS_WIDE_1B) || \
Kojto 90:cb3d968589d8 195 ((WIDE) == SDIO_BUS_WIDE_4B) || \
Kojto 90:cb3d968589d8 196 ((WIDE) == SDIO_BUS_WIDE_8B))
Kojto 90:cb3d968589d8 197 /**
Kojto 90:cb3d968589d8 198 * @}
Kojto 90:cb3d968589d8 199 */
Kojto 90:cb3d968589d8 200
Kojto 90:cb3d968589d8 201 /** @defgroup SDMMC_LL_Hardware_Flow_Control Hardware Flow Control
Kojto 90:cb3d968589d8 202 * @{
Kojto 90:cb3d968589d8 203 */
Kojto 90:cb3d968589d8 204 #define SDIO_HARDWARE_FLOW_CONTROL_DISABLE ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 205 #define SDIO_HARDWARE_FLOW_CONTROL_ENABLE SDIO_CLKCR_HWFC_EN
Kojto 90:cb3d968589d8 206
Kojto 90:cb3d968589d8 207 #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_DISABLE) || \
Kojto 90:cb3d968589d8 208 ((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_ENABLE))
Kojto 90:cb3d968589d8 209 /**
Kojto 90:cb3d968589d8 210 * @}
Kojto 90:cb3d968589d8 211 */
Kojto 90:cb3d968589d8 212
Kojto 90:cb3d968589d8 213 /** @defgroup SDMMC_LL_Clock_Division Clock Division
Kojto 90:cb3d968589d8 214 * @{
Kojto 90:cb3d968589d8 215 */
Kojto 90:cb3d968589d8 216 #define IS_SDIO_CLKDIV(DIV) ((DIV) <= 0xFF)
Kojto 90:cb3d968589d8 217 /**
Kojto 90:cb3d968589d8 218 * @}
Kojto 90:cb3d968589d8 219 */
Kojto 90:cb3d968589d8 220
Kojto 90:cb3d968589d8 221 /** @defgroup SDMMC_LL_Command_Index Command Index
Kojto 90:cb3d968589d8 222 * @{
Kojto 90:cb3d968589d8 223 */
Kojto 90:cb3d968589d8 224 #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40)
Kojto 90:cb3d968589d8 225 /**
Kojto 90:cb3d968589d8 226 * @}
Kojto 90:cb3d968589d8 227 */
Kojto 90:cb3d968589d8 228
Kojto 90:cb3d968589d8 229 /** @defgroup SDMMC_LL_Response_Type Response Type
Kojto 90:cb3d968589d8 230 * @{
Kojto 90:cb3d968589d8 231 */
Kojto 90:cb3d968589d8 232 #define SDIO_RESPONSE_NO ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 233 #define SDIO_RESPONSE_SHORT SDIO_CMD_WAITRESP_0
Kojto 90:cb3d968589d8 234 #define SDIO_RESPONSE_LONG SDIO_CMD_WAITRESP
Kojto 90:cb3d968589d8 235
Kojto 90:cb3d968589d8 236 #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_RESPONSE_NO) || \
Kojto 90:cb3d968589d8 237 ((RESPONSE) == SDIO_RESPONSE_SHORT) || \
Kojto 90:cb3d968589d8 238 ((RESPONSE) == SDIO_RESPONSE_LONG))
Kojto 90:cb3d968589d8 239 /**
Kojto 90:cb3d968589d8 240 * @}
Kojto 90:cb3d968589d8 241 */
Kojto 90:cb3d968589d8 242
Kojto 90:cb3d968589d8 243 /** @defgroup SDMMC_LL_Wait_Interrupt_State Wait Interrupt
Kojto 90:cb3d968589d8 244 * @{
Kojto 90:cb3d968589d8 245 */
Kojto 90:cb3d968589d8 246 #define SDIO_WAIT_NO ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 247 #define SDIO_WAIT_IT SDIO_CMD_WAITINT
Kojto 90:cb3d968589d8 248 #define SDIO_WAIT_PEND SDIO_CMD_WAITPEND
Kojto 90:cb3d968589d8 249
Kojto 90:cb3d968589d8 250 #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_WAIT_NO) || \
Kojto 90:cb3d968589d8 251 ((WAIT) == SDIO_WAIT_IT) || \
Kojto 90:cb3d968589d8 252 ((WAIT) == SDIO_WAIT_PEND))
Kojto 90:cb3d968589d8 253 /**
Kojto 90:cb3d968589d8 254 * @}
Kojto 90:cb3d968589d8 255 */
Kojto 90:cb3d968589d8 256
Kojto 90:cb3d968589d8 257 /** @defgroup SDMMC_LL_CPSM_State CPSM State
Kojto 90:cb3d968589d8 258 * @{
Kojto 90:cb3d968589d8 259 */
Kojto 90:cb3d968589d8 260 #define SDIO_CPSM_DISABLE ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 261 #define SDIO_CPSM_ENABLE SDIO_CMD_CPSMEN
Kojto 90:cb3d968589d8 262
Kojto 90:cb3d968589d8 263 #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_DISABLE) || \
Kojto 90:cb3d968589d8 264 ((CPSM) == SDIO_CPSM_ENABLE))
Kojto 90:cb3d968589d8 265 /**
Kojto 90:cb3d968589d8 266 * @}
Kojto 90:cb3d968589d8 267 */
Kojto 90:cb3d968589d8 268
Kojto 90:cb3d968589d8 269 /** @defgroup SDMMC_LL_Response_Registers Response Register
Kojto 90:cb3d968589d8 270 * @{
Kojto 90:cb3d968589d8 271 */
Kojto 90:cb3d968589d8 272 #define SDIO_RESP1 ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 273 #define SDIO_RESP2 ((uint32_t)0x00000004)
Kojto 90:cb3d968589d8 274 #define SDIO_RESP3 ((uint32_t)0x00000008)
Kojto 90:cb3d968589d8 275 #define SDIO_RESP4 ((uint32_t)0x0000000C)
Kojto 90:cb3d968589d8 276
Kojto 90:cb3d968589d8 277 #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || \
Kojto 90:cb3d968589d8 278 ((RESP) == SDIO_RESP2) || \
Kojto 90:cb3d968589d8 279 ((RESP) == SDIO_RESP3) || \
Kojto 90:cb3d968589d8 280 ((RESP) == SDIO_RESP4))
Kojto 90:cb3d968589d8 281 /**
Kojto 90:cb3d968589d8 282 * @}
Kojto 90:cb3d968589d8 283 */
Kojto 90:cb3d968589d8 284
Kojto 90:cb3d968589d8 285 /** @defgroup SDMMC_LL_Data_Length Data Lenght
Kojto 90:cb3d968589d8 286 * @{
Kojto 90:cb3d968589d8 287 */
Kojto 90:cb3d968589d8 288 #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF)
Kojto 90:cb3d968589d8 289 /**
Kojto 90:cb3d968589d8 290 * @}
Kojto 90:cb3d968589d8 291 */
Kojto 90:cb3d968589d8 292
Kojto 90:cb3d968589d8 293 /** @defgroup SDMMC_LL_Data_Block_Size Data Block Size
Kojto 90:cb3d968589d8 294 * @{
Kojto 90:cb3d968589d8 295 */
Kojto 90:cb3d968589d8 296 #define SDIO_DATABLOCK_SIZE_1B ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 297 #define SDIO_DATABLOCK_SIZE_2B SDIO_DCTRL_DBLOCKSIZE_0
Kojto 90:cb3d968589d8 298 #define SDIO_DATABLOCK_SIZE_4B SDIO_DCTRL_DBLOCKSIZE_1
Kojto 90:cb3d968589d8 299 #define SDIO_DATABLOCK_SIZE_8B ((uint32_t)0x00000030)
Kojto 90:cb3d968589d8 300 #define SDIO_DATABLOCK_SIZE_16B SDIO_DCTRL_DBLOCKSIZE_2
Kojto 90:cb3d968589d8 301 #define SDIO_DATABLOCK_SIZE_32B ((uint32_t)0x00000050)
Kojto 90:cb3d968589d8 302 #define SDIO_DATABLOCK_SIZE_64B ((uint32_t)0x00000060)
Kojto 90:cb3d968589d8 303 #define SDIO_DATABLOCK_SIZE_128B ((uint32_t)0x00000070)
Kojto 90:cb3d968589d8 304 #define SDIO_DATABLOCK_SIZE_256B SDIO_DCTRL_DBLOCKSIZE_3
Kojto 90:cb3d968589d8 305 #define SDIO_DATABLOCK_SIZE_512B ((uint32_t)0x00000090)
Kojto 90:cb3d968589d8 306 #define SDIO_DATABLOCK_SIZE_1024B ((uint32_t)0x000000A0)
Kojto 90:cb3d968589d8 307 #define SDIO_DATABLOCK_SIZE_2048B ((uint32_t)0x000000B0)
Kojto 90:cb3d968589d8 308 #define SDIO_DATABLOCK_SIZE_4096B ((uint32_t)0x000000C0)
Kojto 90:cb3d968589d8 309 #define SDIO_DATABLOCK_SIZE_8192B ((uint32_t)0x000000D0)
Kojto 90:cb3d968589d8 310 #define SDIO_DATABLOCK_SIZE_16384B ((uint32_t)0x000000E0)
Kojto 90:cb3d968589d8 311
Kojto 90:cb3d968589d8 312 #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DATABLOCK_SIZE_1B) || \
Kojto 90:cb3d968589d8 313 ((SIZE) == SDIO_DATABLOCK_SIZE_2B) || \
Kojto 90:cb3d968589d8 314 ((SIZE) == SDIO_DATABLOCK_SIZE_4B) || \
Kojto 90:cb3d968589d8 315 ((SIZE) == SDIO_DATABLOCK_SIZE_8B) || \
Kojto 90:cb3d968589d8 316 ((SIZE) == SDIO_DATABLOCK_SIZE_16B) || \
Kojto 90:cb3d968589d8 317 ((SIZE) == SDIO_DATABLOCK_SIZE_32B) || \
Kojto 90:cb3d968589d8 318 ((SIZE) == SDIO_DATABLOCK_SIZE_64B) || \
Kojto 90:cb3d968589d8 319 ((SIZE) == SDIO_DATABLOCK_SIZE_128B) || \
Kojto 90:cb3d968589d8 320 ((SIZE) == SDIO_DATABLOCK_SIZE_256B) || \
Kojto 90:cb3d968589d8 321 ((SIZE) == SDIO_DATABLOCK_SIZE_512B) || \
Kojto 90:cb3d968589d8 322 ((SIZE) == SDIO_DATABLOCK_SIZE_1024B) || \
Kojto 90:cb3d968589d8 323 ((SIZE) == SDIO_DATABLOCK_SIZE_2048B) || \
Kojto 90:cb3d968589d8 324 ((SIZE) == SDIO_DATABLOCK_SIZE_4096B) || \
Kojto 90:cb3d968589d8 325 ((SIZE) == SDIO_DATABLOCK_SIZE_8192B) || \
Kojto 90:cb3d968589d8 326 ((SIZE) == SDIO_DATABLOCK_SIZE_16384B))
Kojto 90:cb3d968589d8 327 /**
Kojto 90:cb3d968589d8 328 * @}
Kojto 90:cb3d968589d8 329 */
Kojto 90:cb3d968589d8 330
Kojto 90:cb3d968589d8 331 /** @defgroup SDMMC_LL_Transfer_Direction Transfer Direction
Kojto 90:cb3d968589d8 332 * @{
Kojto 90:cb3d968589d8 333 */
Kojto 90:cb3d968589d8 334 #define SDIO_TRANSFER_DIR_TO_CARD ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 335 #define SDIO_TRANSFER_DIR_TO_SDIO SDIO_DCTRL_DTDIR
Kojto 90:cb3d968589d8 336
Kojto 90:cb3d968589d8 337 #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TRANSFER_DIR_TO_CARD) || \
Kojto 90:cb3d968589d8 338 ((DIR) == SDIO_TRANSFER_DIR_TO_SDIO))
Kojto 90:cb3d968589d8 339 /**
Kojto 90:cb3d968589d8 340 * @}
Kojto 90:cb3d968589d8 341 */
Kojto 90:cb3d968589d8 342
Kojto 90:cb3d968589d8 343 /** @defgroup SDMMC_LL_Transfer_Type Transfer Type
Kojto 90:cb3d968589d8 344 * @{
Kojto 90:cb3d968589d8 345 */
Kojto 90:cb3d968589d8 346 #define SDIO_TRANSFER_MODE_BLOCK ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 347 #define SDIO_TRANSFER_MODE_STREAM SDIO_DCTRL_DTMODE
Kojto 90:cb3d968589d8 348
Kojto 90:cb3d968589d8 349 #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TRANSFER_MODE_BLOCK) || \
Kojto 90:cb3d968589d8 350 ((MODE) == SDIO_TRANSFER_MODE_STREAM))
Kojto 90:cb3d968589d8 351 /**
Kojto 90:cb3d968589d8 352 * @}
Kojto 90:cb3d968589d8 353 */
Kojto 90:cb3d968589d8 354
Kojto 90:cb3d968589d8 355 /** @defgroup SDMMC_LL_DPSM_State DPSM State
Kojto 90:cb3d968589d8 356 * @{
Kojto 90:cb3d968589d8 357 */
Kojto 90:cb3d968589d8 358 #define SDIO_DPSM_DISABLE ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 359 #define SDIO_DPSM_ENABLE SDIO_DCTRL_DTEN
Kojto 90:cb3d968589d8 360
Kojto 90:cb3d968589d8 361 #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_DISABLE) ||\
Kojto 90:cb3d968589d8 362 ((DPSM) == SDIO_DPSM_ENABLE))
Kojto 90:cb3d968589d8 363 /**
Kojto 90:cb3d968589d8 364 * @}
Kojto 90:cb3d968589d8 365 */
Kojto 90:cb3d968589d8 366
Kojto 90:cb3d968589d8 367 /** @defgroup SDMMC_LL_Read_Wait_Mode Read Wait Mode
Kojto 90:cb3d968589d8 368 * @{
Kojto 90:cb3d968589d8 369 */
Kojto 90:cb3d968589d8 370 #define SDIO_READ_WAIT_MODE_CLK ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 371 #define SDIO_READ_WAIT_MODE_DATA2 ((uint32_t)0x00000001)
Kojto 90:cb3d968589d8 372
Kojto 90:cb3d968589d8 373 #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_READ_WAIT_MODE_CLK) || \
Kojto 90:cb3d968589d8 374 ((MODE) == SDIO_READ_WAIT_MODE_DATA2))
Kojto 90:cb3d968589d8 375 /**
Kojto 90:cb3d968589d8 376 * @}
Kojto 90:cb3d968589d8 377 */
Kojto 90:cb3d968589d8 378
Kojto 90:cb3d968589d8 379 /** @defgroup SDMMC_LL_Interrupt_sources Interrupt Sources
Kojto 90:cb3d968589d8 380 * @{
Kojto 90:cb3d968589d8 381 */
Kojto 90:cb3d968589d8 382 #define SDIO_IT_CCRCFAIL SDIO_STA_CCRCFAIL
Kojto 90:cb3d968589d8 383 #define SDIO_IT_DCRCFAIL SDIO_STA_DCRCFAIL
Kojto 90:cb3d968589d8 384 #define SDIO_IT_CTIMEOUT SDIO_STA_CTIMEOUT
Kojto 90:cb3d968589d8 385 #define SDIO_IT_DTIMEOUT SDIO_STA_DTIMEOUT
Kojto 90:cb3d968589d8 386 #define SDIO_IT_TXUNDERR SDIO_STA_TXUNDERR
Kojto 90:cb3d968589d8 387 #define SDIO_IT_RXOVERR SDIO_STA_RXOVERR
Kojto 90:cb3d968589d8 388 #define SDIO_IT_CMDREND SDIO_STA_CMDREND
Kojto 90:cb3d968589d8 389 #define SDIO_IT_CMDSENT SDIO_STA_CMDSENT
Kojto 90:cb3d968589d8 390 #define SDIO_IT_DATAEND SDIO_STA_DATAEND
Kojto 90:cb3d968589d8 391 #define SDIO_IT_STBITERR SDIO_STA_STBITERR
Kojto 90:cb3d968589d8 392 #define SDIO_IT_DBCKEND SDIO_STA_DBCKEND
Kojto 90:cb3d968589d8 393 #define SDIO_IT_CMDACT SDIO_STA_CMDACT
Kojto 90:cb3d968589d8 394 #define SDIO_IT_TXACT SDIO_STA_TXACT
Kojto 90:cb3d968589d8 395 #define SDIO_IT_RXACT SDIO_STA_RXACT
Kojto 90:cb3d968589d8 396 #define SDIO_IT_TXFIFOHE SDIO_STA_TXFIFOHE
Kojto 90:cb3d968589d8 397 #define SDIO_IT_RXFIFOHF SDIO_STA_RXFIFOHF
Kojto 90:cb3d968589d8 398 #define SDIO_IT_TXFIFOF SDIO_STA_TXFIFOF
Kojto 90:cb3d968589d8 399 #define SDIO_IT_RXFIFOF SDIO_STA_RXFIFOF
Kojto 90:cb3d968589d8 400 #define SDIO_IT_TXFIFOE SDIO_STA_TXFIFOE
Kojto 90:cb3d968589d8 401 #define SDIO_IT_RXFIFOE SDIO_STA_RXFIFOE
Kojto 90:cb3d968589d8 402 #define SDIO_IT_TXDAVL SDIO_STA_TXDAVL
Kojto 90:cb3d968589d8 403 #define SDIO_IT_RXDAVL SDIO_STA_RXDAVL
Kojto 90:cb3d968589d8 404 #define SDIO_IT_SDIOIT SDIO_STA_SDIOIT
Kojto 90:cb3d968589d8 405 #define SDIO_IT_CEATAEND SDIO_STA_CEATAEND
Kojto 90:cb3d968589d8 406
Kojto 90:cb3d968589d8 407 /**
Kojto 90:cb3d968589d8 408 * @}
Kojto 90:cb3d968589d8 409 */
Kojto 90:cb3d968589d8 410
Kojto 90:cb3d968589d8 411 /** @defgroup SDMMC_LL_Flags Flags
Kojto 90:cb3d968589d8 412 * @{
Kojto 90:cb3d968589d8 413 */
Kojto 90:cb3d968589d8 414 #define SDIO_FLAG_CCRCFAIL SDIO_STA_CCRCFAIL
Kojto 90:cb3d968589d8 415 #define SDIO_FLAG_DCRCFAIL SDIO_STA_DCRCFAIL
Kojto 90:cb3d968589d8 416 #define SDIO_FLAG_CTIMEOUT SDIO_STA_CTIMEOUT
Kojto 90:cb3d968589d8 417 #define SDIO_FLAG_DTIMEOUT SDIO_STA_DTIMEOUT
Kojto 90:cb3d968589d8 418 #define SDIO_FLAG_TXUNDERR SDIO_STA_TXUNDERR
Kojto 90:cb3d968589d8 419 #define SDIO_FLAG_RXOVERR SDIO_STA_RXOVERR
Kojto 90:cb3d968589d8 420 #define SDIO_FLAG_CMDREND SDIO_STA_CMDREND
Kojto 90:cb3d968589d8 421 #define SDIO_FLAG_CMDSENT SDIO_STA_CMDSENT
Kojto 90:cb3d968589d8 422 #define SDIO_FLAG_DATAEND SDIO_STA_DATAEND
Kojto 90:cb3d968589d8 423 #define SDIO_FLAG_STBITERR SDIO_STA_STBITERR
Kojto 90:cb3d968589d8 424 #define SDIO_FLAG_DBCKEND SDIO_STA_DBCKEND
Kojto 90:cb3d968589d8 425 #define SDIO_FLAG_CMDACT SDIO_STA_CMDACT
Kojto 90:cb3d968589d8 426 #define SDIO_FLAG_TXACT SDIO_STA_TXACT
Kojto 90:cb3d968589d8 427 #define SDIO_FLAG_RXACT SDIO_STA_RXACT
Kojto 90:cb3d968589d8 428 #define SDIO_FLAG_TXFIFOHE SDIO_STA_TXFIFOHE
Kojto 90:cb3d968589d8 429 #define SDIO_FLAG_RXFIFOHF SDIO_STA_RXFIFOHF
Kojto 90:cb3d968589d8 430 #define SDIO_FLAG_TXFIFOF SDIO_STA_TXFIFOF
Kojto 90:cb3d968589d8 431 #define SDIO_FLAG_RXFIFOF SDIO_STA_RXFIFOF
Kojto 90:cb3d968589d8 432 #define SDIO_FLAG_TXFIFOE SDIO_STA_TXFIFOE
Kojto 90:cb3d968589d8 433 #define SDIO_FLAG_RXFIFOE SDIO_STA_RXFIFOE
Kojto 90:cb3d968589d8 434 #define SDIO_FLAG_TXDAVL SDIO_STA_TXDAVL
Kojto 90:cb3d968589d8 435 #define SDIO_FLAG_RXDAVL SDIO_STA_RXDAVL
Kojto 90:cb3d968589d8 436 #define SDIO_FLAG_SDIOIT SDIO_STA_SDIOIT
Kojto 90:cb3d968589d8 437 #define SDIO_FLAG_CEATAEND SDIO_STA_CEATAEND
Kojto 90:cb3d968589d8 438
Kojto 90:cb3d968589d8 439 /**
Kojto 90:cb3d968589d8 440 * @}
Kojto 90:cb3d968589d8 441 */
Kojto 90:cb3d968589d8 442
Kojto 90:cb3d968589d8 443 /**
Kojto 90:cb3d968589d8 444 * @}
Kojto 90:cb3d968589d8 445 */
Kojto 90:cb3d968589d8 446
Kojto 90:cb3d968589d8 447 /* Exported macro ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 448 /** @defgroup SDMMC_LL_Exported_macros SDMMC_LL Exported Macros
Kojto 90:cb3d968589d8 449 * @{
Kojto 90:cb3d968589d8 450 */
Kojto 90:cb3d968589d8 451
Kojto 90:cb3d968589d8 452 /** @defgroup SDMMC_LL_Register Bits And Addresses Definitions
Kojto 90:cb3d968589d8 453 * @brief SDMMC_LL registers bit address in the alias region
Kojto 90:cb3d968589d8 454 * @{
Kojto 90:cb3d968589d8 455 */
Kojto 90:cb3d968589d8 456
Kojto 90:cb3d968589d8 457 /* ------------ SDIO registers bit address in the alias region -------------- */
Kojto 90:cb3d968589d8 458 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
Kojto 90:cb3d968589d8 459
Kojto 90:cb3d968589d8 460 /* --- CLKCR Register ---*/
Kojto 90:cb3d968589d8 461 /* Alias word address of CLKEN bit */
Kojto 90:cb3d968589d8 462 #define CLKCR_OFFSET (SDIO_OFFSET + 0x04)
Kojto 90:cb3d968589d8 463 #define CLKEN_BITNUMBER 0x08
Kojto 90:cb3d968589d8 464 #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BITNUMBER * 4))
Kojto 90:cb3d968589d8 465
Kojto 90:cb3d968589d8 466 /* --- CMD Register ---*/
Kojto 90:cb3d968589d8 467 /* Alias word address of SDIOSUSPEND bit */
Kojto 90:cb3d968589d8 468 #define CMD_OFFSET (SDIO_OFFSET + 0x0C)
Kojto 90:cb3d968589d8 469 #define SDIOSUSPEND_BITNUMBER 0x0B
Kojto 90:cb3d968589d8 470 #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BITNUMBER * 4))
Kojto 90:cb3d968589d8 471
Kojto 90:cb3d968589d8 472 /* Alias word address of ENCMDCOMPL bit */
Kojto 90:cb3d968589d8 473 #define ENCMDCOMPL_BITNUMBER 0x0C
Kojto 90:cb3d968589d8 474 #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BITNUMBER * 4))
Kojto 90:cb3d968589d8 475
Kojto 90:cb3d968589d8 476 /* Alias word address of NIEN bit */
Kojto 90:cb3d968589d8 477 #define NIEN_BITNUMBER 0x0D
Kojto 90:cb3d968589d8 478 #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BITNUMBER * 4))
Kojto 90:cb3d968589d8 479
Kojto 90:cb3d968589d8 480 /* Alias word address of ATACMD bit */
Kojto 90:cb3d968589d8 481 #define ATACMD_BITNUMBER 0x0E
Kojto 90:cb3d968589d8 482 #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BITNUMBER * 4))
Kojto 90:cb3d968589d8 483
Kojto 90:cb3d968589d8 484 /* --- DCTRL Register ---*/
Kojto 90:cb3d968589d8 485 /* Alias word address of DMAEN bit */
Kojto 90:cb3d968589d8 486 #define DCTRL_OFFSET (SDIO_OFFSET + 0x2C)
Kojto 90:cb3d968589d8 487 #define DMAEN_BITNUMBER 0x03
Kojto 90:cb3d968589d8 488 #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BITNUMBER * 4))
Kojto 90:cb3d968589d8 489
Kojto 90:cb3d968589d8 490 /* Alias word address of RWSTART bit */
Kojto 90:cb3d968589d8 491 #define RWSTART_BITNUMBER 0x08
Kojto 90:cb3d968589d8 492 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BITNUMBER * 4))
Kojto 90:cb3d968589d8 493
Kojto 90:cb3d968589d8 494 /* Alias word address of RWSTOP bit */
Kojto 90:cb3d968589d8 495 #define RWSTOP_BITNUMBER 0x09
Kojto 90:cb3d968589d8 496 #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BITNUMBER * 4))
Kojto 90:cb3d968589d8 497
Kojto 90:cb3d968589d8 498 /* Alias word address of RWMOD bit */
Kojto 90:cb3d968589d8 499 #define RWMOD_BITNUMBER 0x0A
Kojto 90:cb3d968589d8 500 #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BITNUMBER * 4))
Kojto 90:cb3d968589d8 501
Kojto 90:cb3d968589d8 502 /* Alias word address of SDIOEN bit */
Kojto 90:cb3d968589d8 503 #define SDIOEN_BITNUMBER 0x0B
Kojto 90:cb3d968589d8 504 #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BITNUMBER * 4))
Kojto 90:cb3d968589d8 505
Kojto 90:cb3d968589d8 506 /* ---------------------- SDIO registers bit mask --------------------------- */
Kojto 90:cb3d968589d8 507 /* --- CLKCR Register ---*/
Kojto 90:cb3d968589d8 508 /* CLKCR register clear mask */
Kojto 90:cb3d968589d8 509 #define CLKCR_CLEAR_MASK ((uint32_t)(SDIO_CLKCR_CLKDIV | SDIO_CLKCR_PWRSAV |\
Kojto 90:cb3d968589d8 510 SDIO_CLKCR_BYPASS | SDIO_CLKCR_WIDBUS |\
Kojto 90:cb3d968589d8 511 SDIO_CLKCR_NEGEDGE | SDIO_CLKCR_HWFC_EN))
Kojto 90:cb3d968589d8 512
Kojto 90:cb3d968589d8 513 /* --- DCTRL Register ---*/
Kojto 90:cb3d968589d8 514 /* SDIO DCTRL Clear Mask */
Kojto 90:cb3d968589d8 515 #define DCTRL_CLEAR_MASK ((uint32_t)(SDIO_DCTRL_DTEN | SDIO_DCTRL_DTDIR |\
Kojto 90:cb3d968589d8 516 SDIO_DCTRL_DTMODE | SDIO_DCTRL_DBLOCKSIZE))
Kojto 90:cb3d968589d8 517
Kojto 90:cb3d968589d8 518 /* --- CMD Register ---*/
Kojto 90:cb3d968589d8 519 /* CMD Register clear mask */
Kojto 90:cb3d968589d8 520 #define CMD_CLEAR_MASK ((uint32_t)(SDIO_CMD_CMDINDEX | SDIO_CMD_WAITRESP |\
Kojto 90:cb3d968589d8 521 SDIO_CMD_WAITINT | SDIO_CMD_WAITPEND |\
Kojto 90:cb3d968589d8 522 SDIO_CMD_CPSMEN | SDIO_CMD_SDIOSUSPEND))
Kojto 90:cb3d968589d8 523
Kojto 90:cb3d968589d8 524 /* SDIO RESP Registers Address */
Kojto 90:cb3d968589d8 525 #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14))
Kojto 90:cb3d968589d8 526
Kojto 90:cb3d968589d8 527 /* SDIO Intialization Frequency (400KHz max) */
Kojto 90:cb3d968589d8 528 #define SDIO_INIT_CLK_DIV ((uint8_t)0x76)
Kojto 90:cb3d968589d8 529
Kojto 90:cb3d968589d8 530 /* SDIO Data Transfer Frequency */
Kojto 90:cb3d968589d8 531 #define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x4)
Kojto 90:cb3d968589d8 532
Kojto 90:cb3d968589d8 533 /**
Kojto 90:cb3d968589d8 534 * @}
Kojto 90:cb3d968589d8 535 */
Kojto 90:cb3d968589d8 536
Kojto 90:cb3d968589d8 537 /** @defgroup SDMMC_LL_Interrupt_Clock Interrupt And Clock Configuration
Kojto 90:cb3d968589d8 538 * @brief macros to handle interrupts and specific clock configurations
Kojto 90:cb3d968589d8 539 * @{
Kojto 90:cb3d968589d8 540 */
Kojto 90:cb3d968589d8 541
Kojto 90:cb3d968589d8 542 /**
Kojto 90:cb3d968589d8 543 * @brief Enable the SDIO device.
Kojto 90:cb3d968589d8 544 * @retval None
Kojto 90:cb3d968589d8 545 */
Kojto 90:cb3d968589d8 546 #define __SDIO_ENABLE() (*(__IO uint32_t *)CLKCR_CLKEN_BB = ENABLE)
Kojto 90:cb3d968589d8 547
Kojto 90:cb3d968589d8 548 /**
Kojto 90:cb3d968589d8 549 * @brief Disable the SDIO device.
Kojto 90:cb3d968589d8 550 * @retval None
Kojto 90:cb3d968589d8 551 */
Kojto 90:cb3d968589d8 552 #define __SDIO_DISABLE() (*(__IO uint32_t *)CLKCR_CLKEN_BB = DISABLE)
Kojto 90:cb3d968589d8 553
Kojto 90:cb3d968589d8 554 /**
Kojto 90:cb3d968589d8 555 * @brief Enable the SDIO DMA transfer.
Kojto 90:cb3d968589d8 556 * @retval None
Kojto 90:cb3d968589d8 557 */
Kojto 90:cb3d968589d8 558 #define __SDIO_DMA_ENABLE() (*(__IO uint32_t *)DCTRL_DMAEN_BB = ENABLE)
Kojto 90:cb3d968589d8 559
Kojto 90:cb3d968589d8 560 /**
Kojto 90:cb3d968589d8 561 * @brief Disable the SDIO DMA transfer.
Kojto 90:cb3d968589d8 562 * @retval None
Kojto 90:cb3d968589d8 563 */
Kojto 90:cb3d968589d8 564 #define __SDIO_DMA_DISABLE() (*(__IO uint32_t *)DCTRL_DMAEN_BB = DISABLE)
Kojto 90:cb3d968589d8 565
Kojto 90:cb3d968589d8 566 /**
Kojto 90:cb3d968589d8 567 * @brief Enable the SDIO device interrupt.
Kojto 90:cb3d968589d8 568 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 90:cb3d968589d8 569 * @param __INTERRUPT__ : specifies the SDIO interrupt sources to be enabled.
Kojto 90:cb3d968589d8 570 * This parameter can be one or a combination of the following values:
Kojto 90:cb3d968589d8 571 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 90:cb3d968589d8 572 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 90:cb3d968589d8 573 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 90:cb3d968589d8 574 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 90:cb3d968589d8 575 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 90:cb3d968589d8 576 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 90:cb3d968589d8 577 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 90:cb3d968589d8 578 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 90:cb3d968589d8 579 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
Kojto 90:cb3d968589d8 580 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 90:cb3d968589d8 581 * bus mode interrupt
Kojto 90:cb3d968589d8 582 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
Kojto 90:cb3d968589d8 583 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
Kojto 90:cb3d968589d8 584 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
Kojto 90:cb3d968589d8 585 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
Kojto 90:cb3d968589d8 586 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
Kojto 90:cb3d968589d8 587 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
Kojto 90:cb3d968589d8 588 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
Kojto 90:cb3d968589d8 589 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
Kojto 90:cb3d968589d8 590 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
Kojto 90:cb3d968589d8 591 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
Kojto 90:cb3d968589d8 592 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
Kojto 90:cb3d968589d8 593 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
Kojto 90:cb3d968589d8 594 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 90:cb3d968589d8 595 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
Kojto 90:cb3d968589d8 596 * @retval None
Kojto 90:cb3d968589d8 597 */
Kojto 90:cb3d968589d8 598 #define __SDIO_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK |= (__INTERRUPT__))
Kojto 90:cb3d968589d8 599
Kojto 90:cb3d968589d8 600 /**
Kojto 90:cb3d968589d8 601 * @brief Disable the SDIO device interrupt.
Kojto 90:cb3d968589d8 602 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 90:cb3d968589d8 603 * @param __INTERRUPT__ : specifies the SDIO interrupt sources to be disabled.
Kojto 90:cb3d968589d8 604 * This parameter can be one or a combination of the following values:
Kojto 90:cb3d968589d8 605 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 90:cb3d968589d8 606 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 90:cb3d968589d8 607 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 90:cb3d968589d8 608 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 90:cb3d968589d8 609 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 90:cb3d968589d8 610 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 90:cb3d968589d8 611 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 90:cb3d968589d8 612 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 90:cb3d968589d8 613 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
Kojto 90:cb3d968589d8 614 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 90:cb3d968589d8 615 * bus mode interrupt
Kojto 90:cb3d968589d8 616 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
Kojto 90:cb3d968589d8 617 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
Kojto 90:cb3d968589d8 618 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
Kojto 90:cb3d968589d8 619 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
Kojto 90:cb3d968589d8 620 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
Kojto 90:cb3d968589d8 621 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
Kojto 90:cb3d968589d8 622 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
Kojto 90:cb3d968589d8 623 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
Kojto 90:cb3d968589d8 624 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
Kojto 90:cb3d968589d8 625 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
Kojto 90:cb3d968589d8 626 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
Kojto 90:cb3d968589d8 627 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
Kojto 90:cb3d968589d8 628 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 90:cb3d968589d8 629 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
Kojto 90:cb3d968589d8 630 * @retval None
Kojto 90:cb3d968589d8 631 */
Kojto 90:cb3d968589d8 632 #define __SDIO_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK &= ~(__INTERRUPT__))
Kojto 90:cb3d968589d8 633
Kojto 90:cb3d968589d8 634 /**
Kojto 90:cb3d968589d8 635 * @brief Checks whether the specified SDIO flag is set or not.
Kojto 90:cb3d968589d8 636 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 90:cb3d968589d8 637 * @param __FLAG__: specifies the flag to check.
Kojto 90:cb3d968589d8 638 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 639 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
Kojto 90:cb3d968589d8 640 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
Kojto 90:cb3d968589d8 641 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
Kojto 90:cb3d968589d8 642 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
Kojto 90:cb3d968589d8 643 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
Kojto 90:cb3d968589d8 644 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
Kojto 90:cb3d968589d8 645 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
Kojto 90:cb3d968589d8 646 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
Kojto 90:cb3d968589d8 647 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
Kojto 90:cb3d968589d8 648 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
Kojto 90:cb3d968589d8 649 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
Kojto 90:cb3d968589d8 650 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
Kojto 90:cb3d968589d8 651 * @arg SDIO_FLAG_TXACT: Data transmit in progress
Kojto 90:cb3d968589d8 652 * @arg SDIO_FLAG_RXACT: Data receive in progress
Kojto 90:cb3d968589d8 653 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
Kojto 90:cb3d968589d8 654 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
Kojto 90:cb3d968589d8 655 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
Kojto 90:cb3d968589d8 656 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
Kojto 90:cb3d968589d8 657 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
Kojto 90:cb3d968589d8 658 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
Kojto 90:cb3d968589d8 659 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
Kojto 90:cb3d968589d8 660 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
Kojto 90:cb3d968589d8 661 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
Kojto 90:cb3d968589d8 662 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
Kojto 90:cb3d968589d8 663 * @retval The new state of SDIO_FLAG (SET or RESET).
Kojto 90:cb3d968589d8 664 */
Kojto 90:cb3d968589d8 665 #define __SDIO_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->STA &(__FLAG__)) != RESET)
Kojto 90:cb3d968589d8 666
Kojto 90:cb3d968589d8 667
Kojto 90:cb3d968589d8 668 /**
Kojto 90:cb3d968589d8 669 * @brief Clears the SDIO pending flags.
Kojto 90:cb3d968589d8 670 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 90:cb3d968589d8 671 * @param __FLAG__: specifies the flag to clear.
Kojto 90:cb3d968589d8 672 * This parameter can be one or a combination of the following values:
Kojto 90:cb3d968589d8 673 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
Kojto 90:cb3d968589d8 674 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
Kojto 90:cb3d968589d8 675 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
Kojto 90:cb3d968589d8 676 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
Kojto 90:cb3d968589d8 677 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
Kojto 90:cb3d968589d8 678 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
Kojto 90:cb3d968589d8 679 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
Kojto 90:cb3d968589d8 680 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
Kojto 90:cb3d968589d8 681 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
Kojto 90:cb3d968589d8 682 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
Kojto 90:cb3d968589d8 683 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
Kojto 90:cb3d968589d8 684 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
Kojto 90:cb3d968589d8 685 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
Kojto 90:cb3d968589d8 686 * @retval None
Kojto 90:cb3d968589d8 687 */
Kojto 90:cb3d968589d8 688 #define __SDIO_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->ICR = (__FLAG__))
Kojto 90:cb3d968589d8 689
Kojto 90:cb3d968589d8 690 /**
Kojto 90:cb3d968589d8 691 * @brief Checks whether the specified SDIO interrupt has occurred or not.
Kojto 90:cb3d968589d8 692 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 90:cb3d968589d8 693 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
Kojto 90:cb3d968589d8 694 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 695 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 90:cb3d968589d8 696 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 90:cb3d968589d8 697 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 90:cb3d968589d8 698 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 90:cb3d968589d8 699 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 90:cb3d968589d8 700 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 90:cb3d968589d8 701 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 90:cb3d968589d8 702 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 90:cb3d968589d8 703 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
Kojto 90:cb3d968589d8 704 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 90:cb3d968589d8 705 * bus mode interrupt
Kojto 90:cb3d968589d8 706 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
Kojto 90:cb3d968589d8 707 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
Kojto 90:cb3d968589d8 708 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
Kojto 90:cb3d968589d8 709 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
Kojto 90:cb3d968589d8 710 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
Kojto 90:cb3d968589d8 711 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
Kojto 90:cb3d968589d8 712 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
Kojto 90:cb3d968589d8 713 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
Kojto 90:cb3d968589d8 714 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
Kojto 90:cb3d968589d8 715 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
Kojto 90:cb3d968589d8 716 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
Kojto 90:cb3d968589d8 717 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
Kojto 90:cb3d968589d8 718 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 90:cb3d968589d8 719 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
Kojto 90:cb3d968589d8 720 * @retval The new state of SDIO_IT (SET or RESET).
Kojto 90:cb3d968589d8 721 */
Kojto 90:cb3d968589d8 722 #define __SDIO_GET_IT (__INSTANCE__, __INTERRUPT__) (((__INSTANCE__)->STA &(__INTERRUPT__)) == (__INTERRUPT__))
Kojto 90:cb3d968589d8 723
Kojto 90:cb3d968589d8 724 /**
Kojto 90:cb3d968589d8 725 * @brief Clears the SDIO's interrupt pending bits.
Kojto 90:cb3d968589d8 726 * @param __INSTANCE__ : Pointer to SDIO register base
Kojto 90:cb3d968589d8 727 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
Kojto 90:cb3d968589d8 728 * This parameter can be one or a combination of the following values:
Kojto 90:cb3d968589d8 729 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
Kojto 90:cb3d968589d8 730 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
Kojto 90:cb3d968589d8 731 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
Kojto 90:cb3d968589d8 732 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
Kojto 90:cb3d968589d8 733 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
Kojto 90:cb3d968589d8 734 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
Kojto 90:cb3d968589d8 735 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
Kojto 90:cb3d968589d8 736 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
Kojto 90:cb3d968589d8 737 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
Kojto 90:cb3d968589d8 738 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
Kojto 90:cb3d968589d8 739 * bus mode interrupt
Kojto 90:cb3d968589d8 740 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
Kojto 90:cb3d968589d8 741 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
Kojto 90:cb3d968589d8 742 * @retval None
Kojto 90:cb3d968589d8 743 */
Kojto 90:cb3d968589d8 744 #define __SDIO_CLEAR_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->ICR = (__INTERRUPT__))
Kojto 90:cb3d968589d8 745
Kojto 90:cb3d968589d8 746 /**
Kojto 90:cb3d968589d8 747 * @brief Enable Start the SD I/O Read Wait operation.
Kojto 90:cb3d968589d8 748 * @retval None
Kojto 90:cb3d968589d8 749 */
Kojto 90:cb3d968589d8 750 #define __SDIO_START_READWAIT_ENABLE() (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE)
Kojto 90:cb3d968589d8 751
Kojto 90:cb3d968589d8 752 /**
Kojto 90:cb3d968589d8 753 * @brief Disable Start the SD I/O Read Wait operations.
Kojto 90:cb3d968589d8 754 * @retval None
Kojto 90:cb3d968589d8 755 */
Kojto 90:cb3d968589d8 756 #define __SDIO_START_READWAIT_DISABLE() (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE)
Kojto 90:cb3d968589d8 757
Kojto 90:cb3d968589d8 758 /**
Kojto 90:cb3d968589d8 759 * @brief Enable Start the SD I/O Read Wait operation.
Kojto 90:cb3d968589d8 760 * @retval None
Kojto 90:cb3d968589d8 761 */
Kojto 90:cb3d968589d8 762 #define __SDIO_STOP_READWAIT_ENABLE() (*(__IO uint32_t *) DCTRL_RWSTOP_BB = ENABLE)
Kojto 90:cb3d968589d8 763
Kojto 90:cb3d968589d8 764 /**
Kojto 90:cb3d968589d8 765 * @brief Disable Stop the SD I/O Read Wait operations.
Kojto 90:cb3d968589d8 766 * @retval None
Kojto 90:cb3d968589d8 767 */
Kojto 90:cb3d968589d8 768 #define __SDIO_STOP_READWAIT_DISABLE() (*(__IO uint32_t *) DCTRL_RWSTOP_BB = DISABLE)
Kojto 90:cb3d968589d8 769
Kojto 90:cb3d968589d8 770 /**
Kojto 90:cb3d968589d8 771 * @brief Enable the SD I/O Mode Operation.
Kojto 90:cb3d968589d8 772 * @retval None
Kojto 90:cb3d968589d8 773 */
Kojto 90:cb3d968589d8 774 #define __SDIO_OPERATION_ENABLE() (*(__IO uint32_t *) DCTRL_SDIOEN_BB = ENABLE)
Kojto 90:cb3d968589d8 775
Kojto 90:cb3d968589d8 776 /**
Kojto 90:cb3d968589d8 777 * @brief Disable the SD I/O Mode Operation.
Kojto 90:cb3d968589d8 778 * @retval None
Kojto 90:cb3d968589d8 779 */
Kojto 90:cb3d968589d8 780 #define __SDIO_OPERATION_DISABLE() (*(__IO uint32_t *) DCTRL_SDIOEN_BB = DISABLE)
Kojto 90:cb3d968589d8 781
Kojto 90:cb3d968589d8 782 /**
Kojto 90:cb3d968589d8 783 * @brief Enable the SD I/O Suspend command sending.
Kojto 90:cb3d968589d8 784 * @retval None
Kojto 90:cb3d968589d8 785 */
Kojto 90:cb3d968589d8 786 #define __SDIO_SUSPEND_CMD_ENABLE() (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = ENABLE)
Kojto 90:cb3d968589d8 787
Kojto 90:cb3d968589d8 788 /**
Kojto 90:cb3d968589d8 789 * @brief Disable the SD I/O Suspend command sending.
Kojto 90:cb3d968589d8 790 * @retval None
Kojto 90:cb3d968589d8 791 */
Kojto 90:cb3d968589d8 792 #define __SDIO_SUSPEND_CMD_DISABLE() (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = DISABLE)
Kojto 90:cb3d968589d8 793
Kojto 90:cb3d968589d8 794 /**
Kojto 90:cb3d968589d8 795 * @brief Enable the command completion signal.
Kojto 90:cb3d968589d8 796 * @retval None
Kojto 90:cb3d968589d8 797 */
Kojto 90:cb3d968589d8 798 #define __SDIO_CEATA_CMD_COMPLETION_ENABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = ENABLE)
Kojto 90:cb3d968589d8 799
Kojto 90:cb3d968589d8 800 /**
Kojto 90:cb3d968589d8 801 * @brief Disable the command completion signal.
Kojto 90:cb3d968589d8 802 * @retval None
Kojto 90:cb3d968589d8 803 */
Kojto 90:cb3d968589d8 804 #define __SDIO_CEATA_CMD_COMPLETION_DISABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = DISABLE)
Kojto 90:cb3d968589d8 805
Kojto 90:cb3d968589d8 806 /**
Kojto 90:cb3d968589d8 807 * @brief Enable the CE-ATA interrupt.
Kojto 90:cb3d968589d8 808 * @retval None
Kojto 90:cb3d968589d8 809 */
Kojto 90:cb3d968589d8 810 #define __SDIO_CEATA_ENABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)0)
Kojto 90:cb3d968589d8 811
Kojto 90:cb3d968589d8 812 /**
Kojto 90:cb3d968589d8 813 * @brief Disable the CE-ATA interrupt.
Kojto 90:cb3d968589d8 814 * @retval None
Kojto 90:cb3d968589d8 815 */
Kojto 90:cb3d968589d8 816 #define __SDIO_CEATA_DISABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)1)
Kojto 90:cb3d968589d8 817
Kojto 90:cb3d968589d8 818 /**
Kojto 90:cb3d968589d8 819 * @brief Enable send CE-ATA command (CMD61).
Kojto 90:cb3d968589d8 820 * @retval None
Kojto 90:cb3d968589d8 821 */
Kojto 90:cb3d968589d8 822 #define __SDIO_CEATA_SENDCMD_ENABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = ENABLE)
Kojto 90:cb3d968589d8 823
Kojto 90:cb3d968589d8 824 /**
Kojto 90:cb3d968589d8 825 * @brief Disable send CE-ATA command (CMD61).
Kojto 90:cb3d968589d8 826 * @retval None
Kojto 90:cb3d968589d8 827 */
Kojto 90:cb3d968589d8 828 #define __SDIO_CEATA_SENDCMD_DISABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = DISABLE)
Kojto 90:cb3d968589d8 829
Kojto 90:cb3d968589d8 830 /**
Kojto 90:cb3d968589d8 831 * @}
Kojto 90:cb3d968589d8 832 */
Kojto 90:cb3d968589d8 833
Kojto 90:cb3d968589d8 834 /**
Kojto 90:cb3d968589d8 835 * @}
Kojto 90:cb3d968589d8 836 */
Kojto 90:cb3d968589d8 837
Kojto 90:cb3d968589d8 838 /* Exported functions --------------------------------------------------------*/
Kojto 90:cb3d968589d8 839 /** @addtogroup SDMMC_LL_Exported_Functions
Kojto 90:cb3d968589d8 840 * @{
Kojto 90:cb3d968589d8 841 */
Kojto 90:cb3d968589d8 842
Kojto 90:cb3d968589d8 843 /* Initialization/de-initialization functions **********************************/
Kojto 90:cb3d968589d8 844 /** @addtogroup HAL_SDMMC_LL_Group1
Kojto 90:cb3d968589d8 845 * @{
Kojto 90:cb3d968589d8 846 */
Kojto 90:cb3d968589d8 847 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init);
Kojto 90:cb3d968589d8 848 /**
Kojto 90:cb3d968589d8 849 * @}
Kojto 90:cb3d968589d8 850 */
Kojto 90:cb3d968589d8 851
Kojto 90:cb3d968589d8 852 /* I/O operation functions *****************************************************/
Kojto 90:cb3d968589d8 853 /** @addtogroup HAL_SDMMC_LL_Group2
Kojto 90:cb3d968589d8 854 * @{
Kojto 90:cb3d968589d8 855 */
Kojto 90:cb3d968589d8 856 /* Blocking mode: Polling */
Kojto 90:cb3d968589d8 857 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx);
Kojto 90:cb3d968589d8 858 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData);
Kojto 90:cb3d968589d8 859 /**
Kojto 90:cb3d968589d8 860 * @}
Kojto 90:cb3d968589d8 861 */
Kojto 90:cb3d968589d8 862
Kojto 90:cb3d968589d8 863 /* Peripheral Control functions ************************************************/
Kojto 90:cb3d968589d8 864 /** @addtogroup HAL_SDMMC_LL_Group3
Kojto 90:cb3d968589d8 865 * @{
Kojto 90:cb3d968589d8 866 */
Kojto 90:cb3d968589d8 867 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx);
Kojto 90:cb3d968589d8 868 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx);
Kojto 90:cb3d968589d8 869 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx);
Kojto 90:cb3d968589d8 870
Kojto 90:cb3d968589d8 871 /* Command path state machine (CPSM) management functions */
Kojto 90:cb3d968589d8 872 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
Kojto 90:cb3d968589d8 873 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx);
Kojto 90:cb3d968589d8 874 uint32_t SDIO_GetResponse(uint32_t SDIO_RESP);
Kojto 90:cb3d968589d8 875
Kojto 90:cb3d968589d8 876 /* Data path state machine (DPSM) management functions */
Kojto 90:cb3d968589d8 877 HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct);
Kojto 90:cb3d968589d8 878 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx);
Kojto 90:cb3d968589d8 879 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx);
Kojto 90:cb3d968589d8 880
Kojto 90:cb3d968589d8 881 /* SDIO IO Cards mode management functions */
Kojto 90:cb3d968589d8 882 HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
Kojto 90:cb3d968589d8 883 /**
Kojto 90:cb3d968589d8 884 * @}
Kojto 90:cb3d968589d8 885 */
Kojto 90:cb3d968589d8 886
Kojto 90:cb3d968589d8 887 /**
Kojto 90:cb3d968589d8 888 * @}
Kojto 90:cb3d968589d8 889 */
Kojto 90:cb3d968589d8 890
Kojto 90:cb3d968589d8 891 /**
Kojto 90:cb3d968589d8 892 * @}
Kojto 90:cb3d968589d8 893 */
Kojto 90:cb3d968589d8 894
Kojto 90:cb3d968589d8 895 /**
Kojto 90:cb3d968589d8 896 * @}
Kojto 90:cb3d968589d8 897 */
Kojto 90:cb3d968589d8 898
Kojto 90:cb3d968589d8 899 #ifdef __cplusplus
Kojto 90:cb3d968589d8 900 }
Kojto 90:cb3d968589d8 901 #endif
Kojto 90:cb3d968589d8 902
Kojto 90:cb3d968589d8 903 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
Kojto 90:cb3d968589d8 904
Kojto 90:cb3d968589d8 905 #endif /* __STM32L1xx_LL_SD_H */
Kojto 90:cb3d968589d8 906
Kojto 90:cb3d968589d8 907 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/