frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_usart.h@93:9dd889aeda0e, 2014-12-05 (annotated)

Committer:
fblanc
Date:
Fri Dec 05 15:42:32 2014 +0000
Revision:
93:9dd889aeda0e
Parent:
92:4fc01daae5a5 
substitute line 894 extern } by }; /TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h

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bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_usart.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief Header file of USART HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
bogdanm 92:4fc01daae5a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_USART_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_USART_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 47 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 48
bogdanm 92:4fc01daae5a5 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 50 * @{
bogdanm 92:4fc01daae5a5 51 */
bogdanm 92:4fc01daae5a5 52
bogdanm 92:4fc01daae5a5 53 /** @addtogroup USART
bogdanm 92:4fc01daae5a5 54 * @{
bogdanm 92:4fc01daae5a5 55 */
bogdanm 92:4fc01daae5a5 56
bogdanm 92:4fc01daae5a5 57 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 58 /**
bogdanm 92:4fc01daae5a5 59 * @brief USART Init Structure definition
bogdanm 92:4fc01daae5a5 60 */
bogdanm 92:4fc01daae5a5 61 typedef struct
bogdanm 92:4fc01daae5a5 62 {
bogdanm 92:4fc01daae5a5 63 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
bogdanm 92:4fc01daae5a5 64 The baud rate is computed using the following formula:
bogdanm 92:4fc01daae5a5 65 - IntegerDivider = ((PCLKx) / (8 * (husart->Init.BaudRate)))
bogdanm 92:4fc01daae5a5 66 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */
bogdanm 92:4fc01daae5a5 67
bogdanm 92:4fc01daae5a5 68 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm 92:4fc01daae5a5 69 This parameter can be a value of @ref USART_Word_Length */
bogdanm 92:4fc01daae5a5 70
bogdanm 92:4fc01daae5a5 71 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
bogdanm 92:4fc01daae5a5 72 This parameter can be a value of @ref USART_Stop_Bits */
bogdanm 92:4fc01daae5a5 73
bogdanm 92:4fc01daae5a5 74 uint32_t Parity; /*!< Specifies the parity mode.
bogdanm 92:4fc01daae5a5 75 This parameter can be a value of @ref USART_Parity
bogdanm 92:4fc01daae5a5 76 @note When parity is enabled, the computed parity is inserted
bogdanm 92:4fc01daae5a5 77 at the MSB position of the transmitted data (9th bit when
bogdanm 92:4fc01daae5a5 78 the word length is set to 9 data bits; 8th bit when the
bogdanm 92:4fc01daae5a5 79 word length is set to 8 data bits). */
bogdanm 92:4fc01daae5a5 80
bogdanm 92:4fc01daae5a5 81 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
bogdanm 92:4fc01daae5a5 82 This parameter can be a value of @ref USART_Mode */
bogdanm 92:4fc01daae5a5 83
bogdanm 92:4fc01daae5a5 84 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
bogdanm 92:4fc01daae5a5 85 This parameter can be a value of @ref USART_Clock_Polarity */
bogdanm 92:4fc01daae5a5 86
bogdanm 92:4fc01daae5a5 87 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
bogdanm 92:4fc01daae5a5 88 This parameter can be a value of @ref USART_Clock_Phase */
bogdanm 92:4fc01daae5a5 89
bogdanm 92:4fc01daae5a5 90 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
bogdanm 92:4fc01daae5a5 91 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
bogdanm 92:4fc01daae5a5 92 This parameter can be a value of @ref USART_Last_Bit */
bogdanm 92:4fc01daae5a5 93 }USART_InitTypeDef;
bogdanm 92:4fc01daae5a5 94
bogdanm 92:4fc01daae5a5 95 /**
bogdanm 92:4fc01daae5a5 96 * @brief HAL State structures definition
bogdanm 92:4fc01daae5a5 97 */
bogdanm 92:4fc01daae5a5 98 typedef enum
bogdanm 92:4fc01daae5a5 99 {
bogdanm 92:4fc01daae5a5 100 HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
bogdanm 92:4fc01daae5a5 101 HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 92:4fc01daae5a5 102 HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 92:4fc01daae5a5 103 HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 92:4fc01daae5a5 104 HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 92:4fc01daae5a5 105 HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */
bogdanm 92:4fc01daae5a5 106 HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 92:4fc01daae5a5 107 HAL_USART_STATE_ERROR = 0x04 /*!< Error */
bogdanm 92:4fc01daae5a5 108 }HAL_USART_StateTypeDef;
bogdanm 92:4fc01daae5a5 109
bogdanm 92:4fc01daae5a5 110 /**
bogdanm 92:4fc01daae5a5 111 * @brief HAL USART Error Code structure definition
bogdanm 92:4fc01daae5a5 112 */
bogdanm 92:4fc01daae5a5 113 typedef enum
bogdanm 92:4fc01daae5a5 114 {
bogdanm 92:4fc01daae5a5 115 HAL_USART_ERROR_NONE = 0x00, /*!< No error */
bogdanm 92:4fc01daae5a5 116 HAL_USART_ERROR_PE = 0x01, /*!< Parity error */
bogdanm 92:4fc01daae5a5 117 HAL_USART_ERROR_NE = 0x02, /*!< Noise error */
bogdanm 92:4fc01daae5a5 118 HAL_USART_ERROR_FE = 0x04, /*!< frame error */
bogdanm 92:4fc01daae5a5 119 HAL_USART_ERROR_ORE = 0x08, /*!< Overrun error */
bogdanm 92:4fc01daae5a5 120 HAL_USART_ERROR_DMA = 0x10 /*!< DMA transfer error */
bogdanm 92:4fc01daae5a5 121 }HAL_USART_ErrorTypeDef;
bogdanm 92:4fc01daae5a5 122
bogdanm 92:4fc01daae5a5 123 /**
bogdanm 92:4fc01daae5a5 124 * @brief USART handle Structure definition
bogdanm 92:4fc01daae5a5 125 */
bogdanm 92:4fc01daae5a5 126 typedef struct
bogdanm 92:4fc01daae5a5 127 {
bogdanm 92:4fc01daae5a5 128 USART_TypeDef *Instance; /* USART registers base address */
bogdanm 92:4fc01daae5a5 129
bogdanm 92:4fc01daae5a5 130 USART_InitTypeDef Init; /* Usart communication parameters */
bogdanm 92:4fc01daae5a5 131
bogdanm 92:4fc01daae5a5 132 uint8_t *pTxBuffPtr; /* Pointer to Usart Tx transfer Buffer */
bogdanm 92:4fc01daae5a5 133
bogdanm 92:4fc01daae5a5 134 uint16_t TxXferSize; /* Usart Tx Transfer size */
bogdanm 92:4fc01daae5a5 135
bogdanm 92:4fc01daae5a5 136 __IO uint16_t TxXferCount; /* Usart Tx Transfer Counter */
bogdanm 92:4fc01daae5a5 137
bogdanm 92:4fc01daae5a5 138 uint8_t *pRxBuffPtr; /* Pointer to Usart Rx transfer Buffer */
bogdanm 92:4fc01daae5a5 139
bogdanm 92:4fc01daae5a5 140 uint16_t RxXferSize; /* Usart Rx Transfer size */
bogdanm 92:4fc01daae5a5 141
bogdanm 92:4fc01daae5a5 142 __IO uint16_t RxXferCount; /* Usart Rx Transfer Counter */
bogdanm 92:4fc01daae5a5 143
bogdanm 92:4fc01daae5a5 144 DMA_HandleTypeDef *hdmatx; /* Usart Tx DMA Handle parameters */
bogdanm 92:4fc01daae5a5 145
bogdanm 92:4fc01daae5a5 146 DMA_HandleTypeDef *hdmarx; /* Usart Rx DMA Handle parameters */
bogdanm 92:4fc01daae5a5 147
bogdanm 92:4fc01daae5a5 148 HAL_LockTypeDef Lock; /* Locking object */
bogdanm 92:4fc01daae5a5 149
bogdanm 92:4fc01daae5a5 150 __IO HAL_USART_StateTypeDef State; /* Usart communication state */
bogdanm 92:4fc01daae5a5 151
bogdanm 92:4fc01daae5a5 152 __IO HAL_USART_ErrorTypeDef ErrorCode; /* USART Error code */
bogdanm 92:4fc01daae5a5 153
bogdanm 92:4fc01daae5a5 154 }USART_HandleTypeDef;
bogdanm 92:4fc01daae5a5 155
bogdanm 92:4fc01daae5a5 156
bogdanm 92:4fc01daae5a5 157 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 158 /** @defgroup USART_Exported_Constants
bogdanm 92:4fc01daae5a5 159 * @{
bogdanm 92:4fc01daae5a5 160 */
bogdanm 92:4fc01daae5a5 161
bogdanm 92:4fc01daae5a5 162 /** @defgroup USART_Word_Length
bogdanm 92:4fc01daae5a5 163 * @{
bogdanm 92:4fc01daae5a5 164 */
bogdanm 92:4fc01daae5a5 165 #define USART_WORDLENGTH_8B ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 166 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
bogdanm 92:4fc01daae5a5 167 #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \
bogdanm 92:4fc01daae5a5 168 ((LENGTH) == USART_WORDLENGTH_9B))
bogdanm 92:4fc01daae5a5 169 /**
bogdanm 92:4fc01daae5a5 170 * @}
bogdanm 92:4fc01daae5a5 171 */
bogdanm 92:4fc01daae5a5 172
bogdanm 92:4fc01daae5a5 173 /** @defgroup USART_Stop_Bits
bogdanm 92:4fc01daae5a5 174 * @{
bogdanm 92:4fc01daae5a5 175 */
bogdanm 92:4fc01daae5a5 176 #define USART_STOPBITS_1 ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 177 #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0)
bogdanm 92:4fc01daae5a5 178 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
bogdanm 92:4fc01daae5a5 179 #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
bogdanm 92:4fc01daae5a5 180 #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \
bogdanm 92:4fc01daae5a5 181 ((STOPBITS) == USART_STOPBITS_0_5) || \
bogdanm 92:4fc01daae5a5 182 ((STOPBITS) == USART_STOPBITS_1_5) || \
bogdanm 92:4fc01daae5a5 183 ((STOPBITS) == USART_STOPBITS_2))
bogdanm 92:4fc01daae5a5 184 /**
bogdanm 92:4fc01daae5a5 185 * @}
bogdanm 92:4fc01daae5a5 186 */
bogdanm 92:4fc01daae5a5 187
bogdanm 92:4fc01daae5a5 188 /** @defgroup USART_Parity
bogdanm 92:4fc01daae5a5 189 * @{
bogdanm 92:4fc01daae5a5 190 */
bogdanm 92:4fc01daae5a5 191 #define USART_PARITY_NONE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 192 #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
bogdanm 92:4fc01daae5a5 193 #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
bogdanm 92:4fc01daae5a5 194 #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \
bogdanm 92:4fc01daae5a5 195 ((PARITY) == USART_PARITY_EVEN) || \
bogdanm 92:4fc01daae5a5 196 ((PARITY) == USART_PARITY_ODD))
bogdanm 92:4fc01daae5a5 197 /**
bogdanm 92:4fc01daae5a5 198 * @}
bogdanm 92:4fc01daae5a5 199 */
bogdanm 92:4fc01daae5a5 200
bogdanm 92:4fc01daae5a5 201 /** @defgroup USART_Mode
bogdanm 92:4fc01daae5a5 202 * @{
bogdanm 92:4fc01daae5a5 203 */
bogdanm 92:4fc01daae5a5 204 #define USART_MODE_RX ((uint32_t)USART_CR1_RE)
bogdanm 92:4fc01daae5a5 205 #define USART_MODE_TX ((uint32_t)USART_CR1_TE)
bogdanm 92:4fc01daae5a5 206 #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
bogdanm 92:4fc01daae5a5 207 #define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFF3) == 0x00) && ((MODE) != (uint32_t)0x00))
bogdanm 92:4fc01daae5a5 208 /**
bogdanm 92:4fc01daae5a5 209 * @}
bogdanm 92:4fc01daae5a5 210 */
bogdanm 92:4fc01daae5a5 211
bogdanm 92:4fc01daae5a5 212 /** @defgroup USART_Clock
bogdanm 92:4fc01daae5a5 213 * @{
bogdanm 92:4fc01daae5a5 214 */
bogdanm 92:4fc01daae5a5 215 #define USART_CLOCK_DISABLED ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 216 #define USART_CLOCK_ENABLED ((uint32_t)USART_CR2_CLKEN)
bogdanm 92:4fc01daae5a5 217 #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLED) || \
bogdanm 92:4fc01daae5a5 218 ((CLOCK) == USART_CLOCK_ENABLED))
bogdanm 92:4fc01daae5a5 219 /**
bogdanm 92:4fc01daae5a5 220 * @}
bogdanm 92:4fc01daae5a5 221 */
bogdanm 92:4fc01daae5a5 222
bogdanm 92:4fc01daae5a5 223 /** @defgroup USART_Clock_Polarity
bogdanm 92:4fc01daae5a5 224 * @{
bogdanm 92:4fc01daae5a5 225 */
bogdanm 92:4fc01daae5a5 226 #define USART_POLARITY_LOW ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 227 #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL)
bogdanm 92:4fc01daae5a5 228 #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH))
bogdanm 92:4fc01daae5a5 229 /**
bogdanm 92:4fc01daae5a5 230 * @}
bogdanm 92:4fc01daae5a5 231 */
bogdanm 92:4fc01daae5a5 232
bogdanm 92:4fc01daae5a5 233 /** @defgroup USART_Clock_Phase
bogdanm 92:4fc01daae5a5 234 * @{
bogdanm 92:4fc01daae5a5 235 */
bogdanm 92:4fc01daae5a5 236 #define USART_PHASE_1EDGE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 237 #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA)
bogdanm 92:4fc01daae5a5 238 #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE))
bogdanm 92:4fc01daae5a5 239 /**
bogdanm 92:4fc01daae5a5 240 * @}
bogdanm 92:4fc01daae5a5 241 */
bogdanm 92:4fc01daae5a5 242
bogdanm 92:4fc01daae5a5 243 /** @defgroup USART_Last_Bit
bogdanm 92:4fc01daae5a5 244 * @{
bogdanm 92:4fc01daae5a5 245 */
bogdanm 92:4fc01daae5a5 246 #define USART_LASTBIT_DISABLE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 247 #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL)
bogdanm 92:4fc01daae5a5 248 #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \
bogdanm 92:4fc01daae5a5 249 ((LASTBIT) == USART_LASTBIT_ENABLE))
bogdanm 92:4fc01daae5a5 250 /**
bogdanm 92:4fc01daae5a5 251 * @}
bogdanm 92:4fc01daae5a5 252 */
bogdanm 92:4fc01daae5a5 253
bogdanm 92:4fc01daae5a5 254 /** @defgroup USART_NACK_State
bogdanm 92:4fc01daae5a5 255 * @{
bogdanm 92:4fc01daae5a5 256 */
bogdanm 92:4fc01daae5a5 257 #define USARTNACK_ENABLED ((uint32_t)USART_CR3_NACK)
bogdanm 92:4fc01daae5a5 258 #define USARTNACK_DISABLED ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 259 #define IS_USART_NACK_STATE(NACK) (((NACK) == USARTNACK_ENABLED) || \
bogdanm 92:4fc01daae5a5 260 ((NACK) == USARTNACK_DISABLED))
bogdanm 92:4fc01daae5a5 261 /**
bogdanm 92:4fc01daae5a5 262 * @}
bogdanm 92:4fc01daae5a5 263 */
bogdanm 92:4fc01daae5a5 264
bogdanm 92:4fc01daae5a5 265 /** @defgroup USART_Flags
bogdanm 92:4fc01daae5a5 266 * Elements values convention: 0xXXXX
bogdanm 92:4fc01daae5a5 267 * - 0xXXXX : Flag mask in the SR register
bogdanm 92:4fc01daae5a5 268 * @{
bogdanm 92:4fc01daae5a5 269 */
bogdanm 92:4fc01daae5a5 270
bogdanm 92:4fc01daae5a5 271 #define USART_FLAG_TXE ((uint32_t)0x00000080)
bogdanm 92:4fc01daae5a5 272 #define USART_FLAG_TC ((uint32_t)0x00000040)
bogdanm 92:4fc01daae5a5 273 #define USART_FLAG_RXNE ((uint32_t)0x00000020)
bogdanm 92:4fc01daae5a5 274 #define USART_FLAG_IDLE ((uint32_t)0x00000010)
bogdanm 92:4fc01daae5a5 275 #define USART_FLAG_ORE ((uint32_t)0x00000008)
bogdanm 92:4fc01daae5a5 276 #define USART_FLAG_NE ((uint32_t)0x00000004)
bogdanm 92:4fc01daae5a5 277 #define USART_FLAG_FE ((uint32_t)0x00000002)
bogdanm 92:4fc01daae5a5 278 #define USART_FLAG_PE ((uint32_t)0x00000001)
bogdanm 92:4fc01daae5a5 279 /**
bogdanm 92:4fc01daae5a5 280 * @}
bogdanm 92:4fc01daae5a5 281 */
bogdanm 92:4fc01daae5a5 282
bogdanm 92:4fc01daae5a5 283 /** @defgroup USART_Interrupt_definition
bogdanm 92:4fc01daae5a5 284 * Elements values convention: 0xY000XXXX
bogdanm 92:4fc01daae5a5 285 * - XXXX : Interrupt mask in the XX register
bogdanm 92:4fc01daae5a5 286 * - Y : Interrupt source register (2bits)
bogdanm 92:4fc01daae5a5 287 * - 01: CR1 register
bogdanm 92:4fc01daae5a5 288 * - 10: CR2 register
bogdanm 92:4fc01daae5a5 289 * - 11: CR3 register
bogdanm 92:4fc01daae5a5 290 *
bogdanm 92:4fc01daae5a5 291 * @{
bogdanm 92:4fc01daae5a5 292 */
bogdanm 92:4fc01daae5a5 293 #define USART_IT_PE ((uint32_t)0x10000100)
bogdanm 92:4fc01daae5a5 294 #define USART_IT_TXE ((uint32_t)0x10000080)
bogdanm 92:4fc01daae5a5 295 #define USART_IT_TC ((uint32_t)0x10000040)
bogdanm 92:4fc01daae5a5 296 #define USART_IT_RXNE ((uint32_t)0x10000020)
bogdanm 92:4fc01daae5a5 297 #define USART_IT_IDLE ((uint32_t)0x10000010)
bogdanm 92:4fc01daae5a5 298
bogdanm 92:4fc01daae5a5 299 #define USART_IT_LBD ((uint32_t)0x20000040)
bogdanm 92:4fc01daae5a5 300 #define USART_IT_CTS ((uint32_t)0x30000400)
bogdanm 92:4fc01daae5a5 301
bogdanm 92:4fc01daae5a5 302 #define USART_IT_ERR ((uint32_t)0x30000001)
bogdanm 92:4fc01daae5a5 303
bogdanm 92:4fc01daae5a5 304
bogdanm 92:4fc01daae5a5 305 /**
bogdanm 92:4fc01daae5a5 306 * @}
bogdanm 92:4fc01daae5a5 307 */
bogdanm 92:4fc01daae5a5 308
bogdanm 92:4fc01daae5a5 309 /**
bogdanm 92:4fc01daae5a5 310 * @}
bogdanm 92:4fc01daae5a5 311 */
bogdanm 92:4fc01daae5a5 312
bogdanm 92:4fc01daae5a5 313 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 314 /** @brief Reset USART handle state
bogdanm 92:4fc01daae5a5 315 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 316 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
bogdanm 92:4fc01daae5a5 317 * @retval None
bogdanm 92:4fc01daae5a5 318 */
bogdanm 92:4fc01daae5a5 319 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
bogdanm 92:4fc01daae5a5 320
bogdanm 92:4fc01daae5a5 321 /** @brief Checks whether the specified Smartcard flag is set or not.
bogdanm 92:4fc01daae5a5 322 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 323 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
bogdanm 92:4fc01daae5a5 324 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 325 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 326 * @arg USART_FLAG_TXE: Transmit data register empty flag
bogdanm 92:4fc01daae5a5 327 * @arg USART_FLAG_TC: Transmission Complete flag
bogdanm 92:4fc01daae5a5 328 * @arg USART_FLAG_RXNE: Receive data register not empty flag
bogdanm 92:4fc01daae5a5 329 * @arg USART_FLAG_IDLE: Idle Line detection flag
bogdanm 92:4fc01daae5a5 330 * @arg USART_FLAG_ORE: OverRun Error flag
bogdanm 92:4fc01daae5a5 331 * @arg USART_FLAG_NE: Noise Error flag
bogdanm 92:4fc01daae5a5 332 * @arg USART_FLAG_FE: Framing Error flag
bogdanm 92:4fc01daae5a5 333 * @arg USART_FLAG_PE: Parity Error flag
bogdanm 92:4fc01daae5a5 334 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 335 */
bogdanm 92:4fc01daae5a5 336
bogdanm 92:4fc01daae5a5 337 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 338
bogdanm 92:4fc01daae5a5 339 /** @brief Clears the specified Smartcard pending flags.
bogdanm 92:4fc01daae5a5 340 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 341 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
bogdanm 92:4fc01daae5a5 342 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 343 * This parameter can be any combination of the following values:
bogdanm 92:4fc01daae5a5 344 * @arg USART_FLAG_TC: Transmission Complete flag.
bogdanm 92:4fc01daae5a5 345 * @arg USART_FLAG_RXNE: Receive data register not empty flag.
bogdanm 92:4fc01daae5a5 346 *
bogdanm 92:4fc01daae5a5 347 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
bogdanm 92:4fc01daae5a5 348 * error) and IDLE (Idle line detected) flags are cleared by software
bogdanm 92:4fc01daae5a5 349 * sequence: a read operation to USART_SR register followed by a read
bogdanm 92:4fc01daae5a5 350 * operation to USART_DR register.
bogdanm 92:4fc01daae5a5 351 * @note RXNE flag can be also cleared by a read to the USART_DR register.
bogdanm 92:4fc01daae5a5 352 * @note TC flag can be also cleared by software sequence: a read operation to
bogdanm 92:4fc01daae5a5 353 * USART_SR register followed by a write operation to USART_DR register.
bogdanm 92:4fc01daae5a5 354 * @note TXE flag is cleared only by a write to the USART_DR register.
bogdanm 92:4fc01daae5a5 355 *
bogdanm 92:4fc01daae5a5 356 * @retval None
bogdanm 92:4fc01daae5a5 357 */
bogdanm 92:4fc01daae5a5 358 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
bogdanm 92:4fc01daae5a5 359
bogdanm 92:4fc01daae5a5 360 /** @brief Clear the USART PE pending flag.
bogdanm 92:4fc01daae5a5 361 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 362 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
bogdanm 92:4fc01daae5a5 363 * @retval None
bogdanm 92:4fc01daae5a5 364 */
bogdanm 92:4fc01daae5a5 365 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\
bogdanm 92:4fc01daae5a5 366 (__HANDLE__)->Instance->DR;}while(0)
bogdanm 92:4fc01daae5a5 367 /** @brief Clear the USART FE pending flag.
bogdanm 92:4fc01daae5a5 368 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 369 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
bogdanm 92:4fc01daae5a5 370 * @retval None
bogdanm 92:4fc01daae5a5 371 */
bogdanm 92:4fc01daae5a5 372 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 373
bogdanm 92:4fc01daae5a5 374 /** @brief Clear the USART NE pending flag.
bogdanm 92:4fc01daae5a5 375 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 376 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
bogdanm 92:4fc01daae5a5 377 * @retval None
bogdanm 92:4fc01daae5a5 378 */
bogdanm 92:4fc01daae5a5 379 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 380
bogdanm 92:4fc01daae5a5 381 /** @brief Clear the UART ORE pending flag.
bogdanm 92:4fc01daae5a5 382 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 383 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
bogdanm 92:4fc01daae5a5 384 * @retval None
bogdanm 92:4fc01daae5a5 385 */
bogdanm 92:4fc01daae5a5 386 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 387
bogdanm 92:4fc01daae5a5 388 /** @brief Clear the USART IDLE pending flag.
bogdanm 92:4fc01daae5a5 389 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 390 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
bogdanm 92:4fc01daae5a5 391 * @retval None
bogdanm 92:4fc01daae5a5 392 */
bogdanm 92:4fc01daae5a5 393 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 394
bogdanm 92:4fc01daae5a5 395 /** @brief Enables or disables the specified Usart interrupts.
bogdanm 92:4fc01daae5a5 396 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 397 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
bogdanm 92:4fc01daae5a5 398 * @param __INTERRUPT__: specifies the USART interrupt source to check.
bogdanm 92:4fc01daae5a5 399 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 400 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 92:4fc01daae5a5 401 * @arg USART_IT_TC: Transmission complete interrupt
bogdanm 92:4fc01daae5a5 402 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 92:4fc01daae5a5 403 * @arg USART_IT_IDLE: Idle line detection interrupt
bogdanm 92:4fc01daae5a5 404 * @arg USART_IT_PE: Parity Error interrupt
bogdanm 92:4fc01daae5a5 405 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm 92:4fc01daae5a5 406 * @param NewState: new state of the specified Usart interrupt.
bogdanm 92:4fc01daae5a5 407 * This parameter can be: ENABLE or DISABLE.
bogdanm 92:4fc01daae5a5 408 * @retval None
bogdanm 92:4fc01daae5a5 409 */
bogdanm 92:4fc01daae5a5 410 #define USART_IT_MASK ((uint32_t)0x0000FFFF)
bogdanm 92:4fc01daae5a5 411 #define __USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \
bogdanm 92:4fc01daae5a5 412 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \
bogdanm 92:4fc01daae5a5 413 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK)))
bogdanm 92:4fc01daae5a5 414 #define __USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
bogdanm 92:4fc01daae5a5 415 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
bogdanm 92:4fc01daae5a5 416 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK)))
bogdanm 92:4fc01daae5a5 417
bogdanm 92:4fc01daae5a5 418
bogdanm 92:4fc01daae5a5 419 /** @brief Checks whether the specified Usart interrupt has occurred or not.
bogdanm 92:4fc01daae5a5 420 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 421 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
bogdanm 92:4fc01daae5a5 422 * @param __IT__: specifies the USART interrupt source to check.
bogdanm 92:4fc01daae5a5 423 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 424 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 92:4fc01daae5a5 425 * @arg USART_IT_TC: Transmission complete interrupt
bogdanm 92:4fc01daae5a5 426 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 92:4fc01daae5a5 427 * @arg USART_IT_IDLE: Idle line detection interrupt
bogdanm 92:4fc01daae5a5 428 * @arg USART_IT_ERR: Error interrupt
bogdanm 92:4fc01daae5a5 429 * @arg USART_IT_PE: Parity Error interrupt
bogdanm 92:4fc01daae5a5 430 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 431 */
bogdanm 92:4fc01daae5a5 432 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == 1)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == 2)? \
bogdanm 92:4fc01daae5a5 433 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK))
bogdanm 92:4fc01daae5a5 434
bogdanm 92:4fc01daae5a5 435 #define __USART_ENABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
bogdanm 92:4fc01daae5a5 436 #define __USART_DISABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
bogdanm 92:4fc01daae5a5 437
bogdanm 92:4fc01daae5a5 438 #define __DIV(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_)))
bogdanm 92:4fc01daae5a5 439 #define __DIVMANT(_PCLK_, _BAUD_) (__DIV((_PCLK_), (_BAUD_))/100)
bogdanm 92:4fc01daae5a5 440 #define __DIVFRAQ(_PCLK_, _BAUD_) (((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
bogdanm 92:4fc01daae5a5 441 #define __USART_BRR(_PCLK_, _BAUD_) ((__DIVMANT((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
bogdanm 92:4fc01daae5a5 442
bogdanm 92:4fc01daae5a5 443 #define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001)
bogdanm 92:4fc01daae5a5 444
bogdanm 92:4fc01daae5a5 445 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 446 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 447 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 448 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 449 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 450 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 451 /* IO operation functions *******************************************************/
bogdanm 92:4fc01daae5a5 452 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 453 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 454 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 455 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
bogdanm 92:4fc01daae5a5 456 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
bogdanm 92:4fc01daae5a5 457 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 92:4fc01daae5a5 458 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
bogdanm 92:4fc01daae5a5 459 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
bogdanm 92:4fc01daae5a5 460 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 92:4fc01daae5a5 461 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 462 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 463 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 464 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 465 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 466 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 467 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 468 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 469 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 470 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 471
bogdanm 92:4fc01daae5a5 472 /* Peripheral State functions **************************************************/
bogdanm 92:4fc01daae5a5 473 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 474 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
bogdanm 92:4fc01daae5a5 475
bogdanm 92:4fc01daae5a5 476 /**
bogdanm 92:4fc01daae5a5 477 * @}
bogdanm 92:4fc01daae5a5 478 */
bogdanm 92:4fc01daae5a5 479
bogdanm 92:4fc01daae5a5 480 /**
bogdanm 92:4fc01daae5a5 481 * @}
bogdanm 92:4fc01daae5a5 482 */
bogdanm 92:4fc01daae5a5 483
bogdanm 92:4fc01daae5a5 484 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 485 }
bogdanm 92:4fc01daae5a5 486 #endif
bogdanm 92:4fc01daae5a5 487
bogdanm 92:4fc01daae5a5 488 #endif /* __STM32F4xx_HAL_USART_H */
bogdanm 92:4fc01daae5a5 489
bogdanm 92:4fc01daae5a5 490 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/