frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

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TARGET_LPC11U68/TARGET_NXP/TARGET_LPC11U6X/PeripheralNames.h@93:9dd889aeda0e, 2014-12-05 (annotated)

Committer:
fblanc
Date:
Fri Dec 05 15:42:32 2014 +0000
Revision:
93:9dd889aeda0e
Parent:
84:0b3ab51c8877 
substitute line 894 extern } by }; /TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /* mbed Microcontroller Library
bogdanm 84:0b3ab51c8877 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 84:0b3ab51c8877 3 *
bogdanm 84:0b3ab51c8877 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 84:0b3ab51c8877 5 * you may not use this file except in compliance with the License.
bogdanm 84:0b3ab51c8877 6 * You may obtain a copy of the License at
bogdanm 84:0b3ab51c8877 7 *
bogdanm 84:0b3ab51c8877 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 84:0b3ab51c8877 9 *
bogdanm 84:0b3ab51c8877 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 84:0b3ab51c8877 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 84:0b3ab51c8877 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 84:0b3ab51c8877 13 * See the License for the specific language governing permissions and
bogdanm 84:0b3ab51c8877 14 * limitations under the License.
bogdanm 84:0b3ab51c8877 15 */
bogdanm 84:0b3ab51c8877 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 84:0b3ab51c8877 17 #define MBED_PERIPHERALNAMES_H
bogdanm 84:0b3ab51c8877 18
bogdanm 84:0b3ab51c8877 19 #include "cmsis.h"
bogdanm 84:0b3ab51c8877 20
bogdanm 84:0b3ab51c8877 21 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 22 extern "C" {
bogdanm 84:0b3ab51c8877 23 #endif
bogdanm 84:0b3ab51c8877 24
bogdanm 84:0b3ab51c8877 25 typedef enum {
bogdanm 84:0b3ab51c8877 26 UART_0 = (int)LPC_USART0_BASE,
bogdanm 84:0b3ab51c8877 27 UART_1 = (int)LPC_USART1_BASE,
bogdanm 84:0b3ab51c8877 28 UART_2 = (int)LPC_USART2_BASE,
bogdanm 84:0b3ab51c8877 29 UART_3 = (int)LPC_USART3_BASE,
bogdanm 84:0b3ab51c8877 30 UART_4 = (int)LPC_USART4_BASE,
bogdanm 84:0b3ab51c8877 31 } UARTName;
bogdanm 84:0b3ab51c8877 32
bogdanm 84:0b3ab51c8877 33 typedef enum {
bogdanm 84:0b3ab51c8877 34 ADC_0 = 0,
bogdanm 84:0b3ab51c8877 35 ADC_1,
bogdanm 84:0b3ab51c8877 36 ADC_2,
bogdanm 84:0b3ab51c8877 37 ADC_3,
bogdanm 84:0b3ab51c8877 38 ADC_4,
bogdanm 84:0b3ab51c8877 39 ADC_5,
bogdanm 84:0b3ab51c8877 40 ADC_6,
bogdanm 84:0b3ab51c8877 41 ADC_7,
bogdanm 84:0b3ab51c8877 42 ADC_8,
bogdanm 84:0b3ab51c8877 43 ADC_9,
bogdanm 84:0b3ab51c8877 44 ADC_10,
bogdanm 84:0b3ab51c8877 45 ADC_11,
bogdanm 84:0b3ab51c8877 46 } ADCName;
bogdanm 84:0b3ab51c8877 47
bogdanm 84:0b3ab51c8877 48 typedef enum {
bogdanm 84:0b3ab51c8877 49 SPI_0 = (int)LPC_SSP0_BASE,
bogdanm 84:0b3ab51c8877 50 SPI_1 = (int)LPC_SSP1_BASE
bogdanm 84:0b3ab51c8877 51 } SPIName;
bogdanm 84:0b3ab51c8877 52
bogdanm 84:0b3ab51c8877 53 typedef enum {
bogdanm 84:0b3ab51c8877 54 I2C_0 = (int)LPC_I2C0_BASE,
bogdanm 84:0b3ab51c8877 55 I2C_1 = (int)LPC_I2C1_BASE
bogdanm 84:0b3ab51c8877 56 } I2CName;
bogdanm 84:0b3ab51c8877 57
bogdanm 84:0b3ab51c8877 58 typedef enum {
bogdanm 84:0b3ab51c8877 59 SCT0_0 = 0,
bogdanm 84:0b3ab51c8877 60 SCT0_1,
bogdanm 84:0b3ab51c8877 61 SCT0_2,
bogdanm 84:0b3ab51c8877 62 SCT0_3,
bogdanm 84:0b3ab51c8877 63 SCT1_0,
bogdanm 84:0b3ab51c8877 64 SCT1_1,
bogdanm 84:0b3ab51c8877 65 SCT1_2,
bogdanm 84:0b3ab51c8877 66 SCT1_3,
bogdanm 84:0b3ab51c8877 67 } PWMName;
bogdanm 84:0b3ab51c8877 68
bogdanm 84:0b3ab51c8877 69 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 70 }
bogdanm 84:0b3ab51c8877 71 #endif
bogdanm 84:0b3ab51c8877 72
bogdanm 84:0b3ab51c8877 73 #endif