frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_RZ_A1H/scif_iodefine.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /*******************************************************************************
bogdanm 92:4fc01daae5a5 2 * DISCLAIMER
bogdanm 92:4fc01daae5a5 3 * This software is supplied by Renesas Electronics Corporation and is only
bogdanm 92:4fc01daae5a5 4 * intended for use with Renesas products. No other uses are authorized. This
bogdanm 92:4fc01daae5a5 5 * software is owned by Renesas Electronics Corporation and is protected under
bogdanm 92:4fc01daae5a5 6 * all applicable laws, including copyright laws.
bogdanm 92:4fc01daae5a5 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
bogdanm 92:4fc01daae5a5 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
bogdanm 92:4fc01daae5a5 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
bogdanm 92:4fc01daae5a5 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
bogdanm 92:4fc01daae5a5 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
bogdanm 92:4fc01daae5a5 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
bogdanm 92:4fc01daae5a5 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
bogdanm 92:4fc01daae5a5 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
bogdanm 92:4fc01daae5a5 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
bogdanm 92:4fc01daae5a5 16 * Renesas reserves the right, without notice, to make changes to this software
bogdanm 92:4fc01daae5a5 17 * and to discontinue the availability of this software. By using this software,
bogdanm 92:4fc01daae5a5 18 * you agree to the additional terms and conditions found by accessing the
bogdanm 92:4fc01daae5a5 19 * following link:
bogdanm 92:4fc01daae5a5 20 * http://www.renesas.com/disclaimer*
bogdanm 92:4fc01daae5a5 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
bogdanm 92:4fc01daae5a5 22 *******************************************************************************/
bogdanm 92:4fc01daae5a5 23 /*******************************************************************************
bogdanm 92:4fc01daae5a5 24 * File Name : scif_iodefine.h
bogdanm 92:4fc01daae5a5 25 * $Rev: $
bogdanm 92:4fc01daae5a5 26 * $Date:: $
bogdanm 92:4fc01daae5a5 27 * Description : Definition of I/O Register (V1.00a)
bogdanm 92:4fc01daae5a5 28 ******************************************************************************/
bogdanm 92:4fc01daae5a5 29 #ifndef SCIF_IODEFINE_H
bogdanm 92:4fc01daae5a5 30 #define SCIF_IODEFINE_H
bogdanm 92:4fc01daae5a5 31 /* ->QAC 0857 : Over 1024 #define (C90) */
bogdanm 92:4fc01daae5a5 32 /* ->SEC M1.10.1 : Not magic number */
bogdanm 92:4fc01daae5a5 33
bogdanm 92:4fc01daae5a5 34 struct st_scif
bogdanm 92:4fc01daae5a5 35 { /* SCIF */
bogdanm 92:4fc01daae5a5 36 volatile uint16_t SCSMR; /* SCSMR */
bogdanm 92:4fc01daae5a5 37 volatile uint8_t dummy1[2]; /* */
bogdanm 92:4fc01daae5a5 38 volatile uint8_t SCBRR; /* SCBRR */
bogdanm 92:4fc01daae5a5 39 volatile uint8_t dummy2[3]; /* */
bogdanm 92:4fc01daae5a5 40 volatile uint16_t SCSCR; /* SCSCR */
bogdanm 92:4fc01daae5a5 41 volatile uint8_t dummy3[2]; /* */
bogdanm 92:4fc01daae5a5 42 volatile uint8_t SCFTDR; /* SCFTDR */
bogdanm 92:4fc01daae5a5 43 volatile uint8_t dummy4[3]; /* */
bogdanm 92:4fc01daae5a5 44 volatile uint16_t SCFSR; /* SCFSR */
bogdanm 92:4fc01daae5a5 45 volatile uint8_t dummy5[2]; /* */
bogdanm 92:4fc01daae5a5 46 volatile uint8_t SCFRDR; /* SCFRDR */
bogdanm 92:4fc01daae5a5 47 volatile uint8_t dummy6[3]; /* */
bogdanm 92:4fc01daae5a5 48 volatile uint16_t SCFCR; /* SCFCR */
bogdanm 92:4fc01daae5a5 49 volatile uint8_t dummy7[2]; /* */
bogdanm 92:4fc01daae5a5 50 volatile uint16_t SCFDR; /* SCFDR */
bogdanm 92:4fc01daae5a5 51 volatile uint8_t dummy8[2]; /* */
bogdanm 92:4fc01daae5a5 52 volatile uint16_t SCSPTR; /* SCSPTR */
bogdanm 92:4fc01daae5a5 53 volatile uint8_t dummy9[2]; /* */
bogdanm 92:4fc01daae5a5 54 volatile uint16_t SCLSR; /* SCLSR */
bogdanm 92:4fc01daae5a5 55 volatile uint8_t dummy10[2]; /* */
bogdanm 92:4fc01daae5a5 56 volatile uint16_t SCEMR; /* SCEMR */
bogdanm 92:4fc01daae5a5 57 };
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59
bogdanm 92:4fc01daae5a5 60 #define SCIF0 (*(struct st_scif *)0xE8007000uL) /* SCIF0 */
bogdanm 92:4fc01daae5a5 61 #define SCIF1 (*(struct st_scif *)0xE8007800uL) /* SCIF1 */
bogdanm 92:4fc01daae5a5 62 #define SCIF2 (*(struct st_scif *)0xE8008000uL) /* SCIF2 */
bogdanm 92:4fc01daae5a5 63 #define SCIF3 (*(struct st_scif *)0xE8008800uL) /* SCIF3 */
bogdanm 92:4fc01daae5a5 64 #define SCIF4 (*(struct st_scif *)0xE8009000uL) /* SCIF4 */
bogdanm 92:4fc01daae5a5 65 #define SCIF5 (*(struct st_scif *)0xE8009800uL) /* SCIF5 */
bogdanm 92:4fc01daae5a5 66 #define SCIF6 (*(struct st_scif *)0xE800A000uL) /* SCIF6 */
bogdanm 92:4fc01daae5a5 67 #define SCIF7 (*(struct st_scif *)0xE800A800uL) /* SCIF7 */
bogdanm 92:4fc01daae5a5 68
bogdanm 92:4fc01daae5a5 69 #define P_SCIF0 (0xE8007000uL) /* SCIF0 */
bogdanm 92:4fc01daae5a5 70 #define P_SCIF1 (0xE8007800uL) /* SCIF1 */
bogdanm 92:4fc01daae5a5 71 #define P_SCIF2 (0xE8008000uL) /* SCIF2 */
bogdanm 92:4fc01daae5a5 72 #define P_SCIF3 (0xE8008800uL) /* SCIF3 */
bogdanm 92:4fc01daae5a5 73 #define P_SCIF4 (0xE8009000uL) /* SCIF4 */
bogdanm 92:4fc01daae5a5 74 #define P_SCIF5 (0xE8009800uL) /* SCIF5 */
bogdanm 92:4fc01daae5a5 75 #define P_SCIF6 (0xE800A000uL) /* SCIF6 */
bogdanm 92:4fc01daae5a5 76 #define P_SCIF7 (0xE800A800uL) /* SCIF7 */
bogdanm 92:4fc01daae5a5 77
bogdanm 92:4fc01daae5a5 78
bogdanm 92:4fc01daae5a5 79 /* Start of channnel array defines of SCIF */
bogdanm 92:4fc01daae5a5 80
bogdanm 92:4fc01daae5a5 81 /* Channnel array defines of SCIF */
bogdanm 92:4fc01daae5a5 82 /*(Sample) value = SCIF[ channel ]->SCSMR; */
bogdanm 92:4fc01daae5a5 83 #define SCIF_COUNT 8
bogdanm 92:4fc01daae5a5 84 #define SCIF_ADDRESS_LIST \
bogdanm 92:4fc01daae5a5 85 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
bogdanm 92:4fc01daae5a5 86 &SCIF0, &SCIF1, &SCIF2, &SCIF3, &SCIF4, &SCIF5, &SCIF6, &SCIF7 \
bogdanm 92:4fc01daae5a5 87 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
bogdanm 92:4fc01daae5a5 88
bogdanm 92:4fc01daae5a5 89 /* End of channnel array defines of SCIF */
bogdanm 92:4fc01daae5a5 90
bogdanm 92:4fc01daae5a5 91
bogdanm 92:4fc01daae5a5 92 #define SCSMR_0 SCIF0.SCSMR
bogdanm 92:4fc01daae5a5 93 #define SCBRR_0 SCIF0.SCBRR
bogdanm 92:4fc01daae5a5 94 #define SCSCR_0 SCIF0.SCSCR
bogdanm 92:4fc01daae5a5 95 #define SCFTDR_0 SCIF0.SCFTDR
bogdanm 92:4fc01daae5a5 96 #define SCFSR_0 SCIF0.SCFSR
bogdanm 92:4fc01daae5a5 97 #define SCFRDR_0 SCIF0.SCFRDR
bogdanm 92:4fc01daae5a5 98 #define SCFCR_0 SCIF0.SCFCR
bogdanm 92:4fc01daae5a5 99 #define SCFDR_0 SCIF0.SCFDR
bogdanm 92:4fc01daae5a5 100 #define SCSPTR_0 SCIF0.SCSPTR
bogdanm 92:4fc01daae5a5 101 #define SCLSR_0 SCIF0.SCLSR
bogdanm 92:4fc01daae5a5 102 #define SCEMR_0 SCIF0.SCEMR
bogdanm 92:4fc01daae5a5 103 #define SCSMR_1 SCIF1.SCSMR
bogdanm 92:4fc01daae5a5 104 #define SCBRR_1 SCIF1.SCBRR
bogdanm 92:4fc01daae5a5 105 #define SCSCR_1 SCIF1.SCSCR
bogdanm 92:4fc01daae5a5 106 #define SCFTDR_1 SCIF1.SCFTDR
bogdanm 92:4fc01daae5a5 107 #define SCFSR_1 SCIF1.SCFSR
bogdanm 92:4fc01daae5a5 108 #define SCFRDR_1 SCIF1.SCFRDR
bogdanm 92:4fc01daae5a5 109 #define SCFCR_1 SCIF1.SCFCR
bogdanm 92:4fc01daae5a5 110 #define SCFDR_1 SCIF1.SCFDR
bogdanm 92:4fc01daae5a5 111 #define SCSPTR_1 SCIF1.SCSPTR
bogdanm 92:4fc01daae5a5 112 #define SCLSR_1 SCIF1.SCLSR
bogdanm 92:4fc01daae5a5 113 #define SCEMR_1 SCIF1.SCEMR
bogdanm 92:4fc01daae5a5 114 #define SCSMR_2 SCIF2.SCSMR
bogdanm 92:4fc01daae5a5 115 #define SCBRR_2 SCIF2.SCBRR
bogdanm 92:4fc01daae5a5 116 #define SCSCR_2 SCIF2.SCSCR
bogdanm 92:4fc01daae5a5 117 #define SCFTDR_2 SCIF2.SCFTDR
bogdanm 92:4fc01daae5a5 118 #define SCFSR_2 SCIF2.SCFSR
bogdanm 92:4fc01daae5a5 119 #define SCFRDR_2 SCIF2.SCFRDR
bogdanm 92:4fc01daae5a5 120 #define SCFCR_2 SCIF2.SCFCR
bogdanm 92:4fc01daae5a5 121 #define SCFDR_2 SCIF2.SCFDR
bogdanm 92:4fc01daae5a5 122 #define SCSPTR_2 SCIF2.SCSPTR
bogdanm 92:4fc01daae5a5 123 #define SCLSR_2 SCIF2.SCLSR
bogdanm 92:4fc01daae5a5 124 #define SCEMR_2 SCIF2.SCEMR
bogdanm 92:4fc01daae5a5 125 #define SCSMR_3 SCIF3.SCSMR
bogdanm 92:4fc01daae5a5 126 #define SCBRR_3 SCIF3.SCBRR
bogdanm 92:4fc01daae5a5 127 #define SCSCR_3 SCIF3.SCSCR
bogdanm 92:4fc01daae5a5 128 #define SCFTDR_3 SCIF3.SCFTDR
bogdanm 92:4fc01daae5a5 129 #define SCFSR_3 SCIF3.SCFSR
bogdanm 92:4fc01daae5a5 130 #define SCFRDR_3 SCIF3.SCFRDR
bogdanm 92:4fc01daae5a5 131 #define SCFCR_3 SCIF3.SCFCR
bogdanm 92:4fc01daae5a5 132 #define SCFDR_3 SCIF3.SCFDR
bogdanm 92:4fc01daae5a5 133 #define SCSPTR_3 SCIF3.SCSPTR
bogdanm 92:4fc01daae5a5 134 #define SCLSR_3 SCIF3.SCLSR
bogdanm 92:4fc01daae5a5 135 #define SCEMR_3 SCIF3.SCEMR
bogdanm 92:4fc01daae5a5 136 #define SCSMR_4 SCIF4.SCSMR
bogdanm 92:4fc01daae5a5 137 #define SCBRR_4 SCIF4.SCBRR
bogdanm 92:4fc01daae5a5 138 #define SCSCR_4 SCIF4.SCSCR
bogdanm 92:4fc01daae5a5 139 #define SCFTDR_4 SCIF4.SCFTDR
bogdanm 92:4fc01daae5a5 140 #define SCFSR_4 SCIF4.SCFSR
bogdanm 92:4fc01daae5a5 141 #define SCFRDR_4 SCIF4.SCFRDR
bogdanm 92:4fc01daae5a5 142 #define SCFCR_4 SCIF4.SCFCR
bogdanm 92:4fc01daae5a5 143 #define SCFDR_4 SCIF4.SCFDR
bogdanm 92:4fc01daae5a5 144 #define SCSPTR_4 SCIF4.SCSPTR
bogdanm 92:4fc01daae5a5 145 #define SCLSR_4 SCIF4.SCLSR
bogdanm 92:4fc01daae5a5 146 #define SCEMR_4 SCIF4.SCEMR
bogdanm 92:4fc01daae5a5 147 #define SCSMR_5 SCIF5.SCSMR
bogdanm 92:4fc01daae5a5 148 #define SCBRR_5 SCIF5.SCBRR
bogdanm 92:4fc01daae5a5 149 #define SCSCR_5 SCIF5.SCSCR
bogdanm 92:4fc01daae5a5 150 #define SCFTDR_5 SCIF5.SCFTDR
bogdanm 92:4fc01daae5a5 151 #define SCFSR_5 SCIF5.SCFSR
bogdanm 92:4fc01daae5a5 152 #define SCFRDR_5 SCIF5.SCFRDR
bogdanm 92:4fc01daae5a5 153 #define SCFCR_5 SCIF5.SCFCR
bogdanm 92:4fc01daae5a5 154 #define SCFDR_5 SCIF5.SCFDR
bogdanm 92:4fc01daae5a5 155 #define SCSPTR_5 SCIF5.SCSPTR
bogdanm 92:4fc01daae5a5 156 #define SCLSR_5 SCIF5.SCLSR
bogdanm 92:4fc01daae5a5 157 #define SCEMR_5 SCIF5.SCEMR
bogdanm 92:4fc01daae5a5 158 #define SCSMR_6 SCIF6.SCSMR
bogdanm 92:4fc01daae5a5 159 #define SCBRR_6 SCIF6.SCBRR
bogdanm 92:4fc01daae5a5 160 #define SCSCR_6 SCIF6.SCSCR
bogdanm 92:4fc01daae5a5 161 #define SCFTDR_6 SCIF6.SCFTDR
bogdanm 92:4fc01daae5a5 162 #define SCFSR_6 SCIF6.SCFSR
bogdanm 92:4fc01daae5a5 163 #define SCFRDR_6 SCIF6.SCFRDR
bogdanm 92:4fc01daae5a5 164 #define SCFCR_6 SCIF6.SCFCR
bogdanm 92:4fc01daae5a5 165 #define SCFDR_6 SCIF6.SCFDR
bogdanm 92:4fc01daae5a5 166 #define SCSPTR_6 SCIF6.SCSPTR
bogdanm 92:4fc01daae5a5 167 #define SCLSR_6 SCIF6.SCLSR
bogdanm 92:4fc01daae5a5 168 #define SCEMR_6 SCIF6.SCEMR
bogdanm 92:4fc01daae5a5 169 #define SCSMR_7 SCIF7.SCSMR
bogdanm 92:4fc01daae5a5 170 #define SCBRR_7 SCIF7.SCBRR
bogdanm 92:4fc01daae5a5 171 #define SCSCR_7 SCIF7.SCSCR
bogdanm 92:4fc01daae5a5 172 #define SCFTDR_7 SCIF7.SCFTDR
bogdanm 92:4fc01daae5a5 173 #define SCFSR_7 SCIF7.SCFSR
bogdanm 92:4fc01daae5a5 174 #define SCFRDR_7 SCIF7.SCFRDR
bogdanm 92:4fc01daae5a5 175 #define SCFCR_7 SCIF7.SCFCR
bogdanm 92:4fc01daae5a5 176 #define SCFDR_7 SCIF7.SCFDR
bogdanm 92:4fc01daae5a5 177 #define SCSPTR_7 SCIF7.SCSPTR
bogdanm 92:4fc01daae5a5 178 #define SCLSR_7 SCIF7.SCLSR
bogdanm 92:4fc01daae5a5 179 #define SCEMR_7 SCIF7.SCEMR
bogdanm 92:4fc01daae5a5 180 /* <-SEC M1.10.1 */
bogdanm 92:4fc01daae5a5 181 /* <-QAC 0857 */
bogdanm 92:4fc01daae5a5 182 #endif