frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_K64F/system_MK64F12.h@90:cb3d968589d8, 2014-10-28 (annotated)

Committer:
Kojto
Date:
Tue Oct 28 16:40:41 2014 +0000
Revision:
90:cb3d968589d8
Parent:
82:6473597d706e 
Release 90 of the mbed library



Changes:



- Freescale KSDK update (v1.0)

- K22 - new target addition

- KL43Z - new target addition

- Nucleo F091RC - new target addition

- Nucleo L152RE - STM32Cube driver

- Nordic - Softdevice v7.1.0

- Nvic files - BSD License

- LPC824 - various HAL fixes

- Nucleo F411RE - CMSIS - IAR files

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /*
bogdanm 82:6473597d706e 2 ** ###################################################################
bogdanm 82:6473597d706e 3 ** Processor: MK64FN1M0VMD12
Kojto 90:cb3d968589d8 4 ** Compilers: Keil ARM C/C++ Compiler
bogdanm 82:6473597d706e 5 ** Freescale C/C++ for Embedded ARM
bogdanm 82:6473597d706e 6 ** GNU C Compiler
bogdanm 82:6473597d706e 7 ** GNU C Compiler - CodeSourcery Sourcery G++
bogdanm 82:6473597d706e 8 ** IAR ANSI C/C++ Compiler for ARM
bogdanm 82:6473597d706e 9 **
Kojto 90:cb3d968589d8 10 ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
Kojto 90:cb3d968589d8 11 ** Version: rev. 2.5, 2014-02-10
Kojto 90:cb3d968589d8 12 ** Build: b140611
bogdanm 82:6473597d706e 13 **
bogdanm 82:6473597d706e 14 ** Abstract:
bogdanm 82:6473597d706e 15 ** Provides a system configuration function and a global variable that
bogdanm 82:6473597d706e 16 ** contains the system frequency. It configures the device and initializes
bogdanm 82:6473597d706e 17 ** the oscillator (PLL) that is part of the microcontroller device.
bogdanm 82:6473597d706e 18 **
Kojto 90:cb3d968589d8 19 ** Copyright (c) 2014 Freescale Semiconductor, Inc.
Kojto 90:cb3d968589d8 20 ** All rights reserved.
Kojto 90:cb3d968589d8 21 **
Kojto 90:cb3d968589d8 22 ** Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 23 ** are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 24 **
Kojto 90:cb3d968589d8 25 ** o Redistributions of source code must retain the above copyright notice, this list
Kojto 90:cb3d968589d8 26 ** of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 27 **
Kojto 90:cb3d968589d8 28 ** o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 90:cb3d968589d8 29 ** list of conditions and the following disclaimer in the documentation and/or
Kojto 90:cb3d968589d8 30 ** other materials provided with the distribution.
Kojto 90:cb3d968589d8 31 **
Kojto 90:cb3d968589d8 32 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 90:cb3d968589d8 33 ** contributors may be used to endorse or promote products derived from this
Kojto 90:cb3d968589d8 34 ** software without specific prior written permission.
Kojto 90:cb3d968589d8 35 **
Kojto 90:cb3d968589d8 36 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 90:cb3d968589d8 37 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 90:cb3d968589d8 38 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 39 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 90:cb3d968589d8 40 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 90:cb3d968589d8 41 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 90:cb3d968589d8 42 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 90:cb3d968589d8 43 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 90:cb3d968589d8 44 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 90:cb3d968589d8 45 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 82:6473597d706e 46 **
bogdanm 82:6473597d706e 47 ** http: www.freescale.com
bogdanm 82:6473597d706e 48 ** mail: support@freescale.com
bogdanm 82:6473597d706e 49 **
bogdanm 82:6473597d706e 50 ** Revisions:
bogdanm 82:6473597d706e 51 ** - rev. 1.0 (2013-08-12)
bogdanm 82:6473597d706e 52 ** Initial version.
bogdanm 82:6473597d706e 53 ** - rev. 2.0 (2013-10-29)
bogdanm 82:6473597d706e 54 ** Register accessor macros added to the memory map.
bogdanm 82:6473597d706e 55 ** Symbols for Processor Expert memory map compatibility added to the memory map.
bogdanm 82:6473597d706e 56 ** Startup file for gcc has been updated according to CMSIS 3.2.
bogdanm 82:6473597d706e 57 ** System initialization updated.
bogdanm 82:6473597d706e 58 ** MCG - registers updated.
bogdanm 82:6473597d706e 59 ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
Kojto 90:cb3d968589d8 60 ** - rev. 2.1 (2013-10-30)
bogdanm 82:6473597d706e 61 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
Kojto 90:cb3d968589d8 62 ** - rev. 2.2 (2013-12-09)
Kojto 90:cb3d968589d8 63 ** DMA - EARS register removed.
Kojto 90:cb3d968589d8 64 ** AIPS0, AIPS1 - MPRA register updated.
Kojto 90:cb3d968589d8 65 ** - rev. 2.3 (2014-01-24)
Kojto 90:cb3d968589d8 66 ** Update according to reference manual rev. 2
Kojto 90:cb3d968589d8 67 ** ENET, MCG, MCM, SIM, USB - registers updated
Kojto 90:cb3d968589d8 68 ** - rev. 2.4 (2014-02-10)
Kojto 90:cb3d968589d8 69 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto 90:cb3d968589d8 70 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto 90:cb3d968589d8 71 ** - rev. 2.5 (2014-02-10)
Kojto 90:cb3d968589d8 72 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Kojto 90:cb3d968589d8 73 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Kojto 90:cb3d968589d8 74 ** Module access macro module_BASES replaced by module_BASE_PTRS.
bogdanm 82:6473597d706e 75 **
bogdanm 82:6473597d706e 76 ** ###################################################################
bogdanm 82:6473597d706e 77 */
bogdanm 82:6473597d706e 78
bogdanm 82:6473597d706e 79 /*!
bogdanm 82:6473597d706e 80 * @file MK64F12
Kojto 90:cb3d968589d8 81 * @version 2.5
Kojto 90:cb3d968589d8 82 * @date 2014-02-10
bogdanm 82:6473597d706e 83 * @brief Device specific configuration file for MK64F12 (header file)
bogdanm 82:6473597d706e 84 *
bogdanm 82:6473597d706e 85 * Provides a system configuration function and a global variable that contains
bogdanm 82:6473597d706e 86 * the system frequency. It configures the device and initializes the oscillator
bogdanm 82:6473597d706e 87 * (PLL) that is part of the microcontroller device.
bogdanm 82:6473597d706e 88 */
bogdanm 82:6473597d706e 89
bogdanm 82:6473597d706e 90 #ifndef SYSTEM_MK64F12_H_
bogdanm 82:6473597d706e 91 #define SYSTEM_MK64F12_H_ /**< Symbol preventing repeated inclusion */
bogdanm 82:6473597d706e 92
bogdanm 82:6473597d706e 93 #ifdef __cplusplus
bogdanm 82:6473597d706e 94 extern "C" {
bogdanm 82:6473597d706e 95 #endif
bogdanm 82:6473597d706e 96
bogdanm 82:6473597d706e 97 #include <stdint.h>
bogdanm 82:6473597d706e 98
Kojto 90:cb3d968589d8 99
Kojto 90:cb3d968589d8 100 #define DISABLE_WDOG 1
Kojto 90:cb3d968589d8 101
Kojto 90:cb3d968589d8 102 #ifndef CLOCK_SETUP
Kojto 90:cb3d968589d8 103 #define CLOCK_SETUP 4
Kojto 90:cb3d968589d8 104 #endif
Kojto 90:cb3d968589d8 105
Kojto 90:cb3d968589d8 106 /* MCG mode constants */
Kojto 90:cb3d968589d8 107
Kojto 90:cb3d968589d8 108 #define MCG_MODE_FEI 0U
Kojto 90:cb3d968589d8 109 #define MCG_MODE_FBI 1U
Kojto 90:cb3d968589d8 110 #define MCG_MODE_BLPI 2U
Kojto 90:cb3d968589d8 111 #define MCG_MODE_FEE 3U
Kojto 90:cb3d968589d8 112 #define MCG_MODE_FBE 4U
Kojto 90:cb3d968589d8 113 #define MCG_MODE_BLPE 5U
Kojto 90:cb3d968589d8 114 #define MCG_MODE_PBE 6U
Kojto 90:cb3d968589d8 115 #define MCG_MODE_PEE 7U
Kojto 90:cb3d968589d8 116
Kojto 90:cb3d968589d8 117 /* Predefined clock setups
Kojto 90:cb3d968589d8 118 0 ... Default part configuration
Kojto 90:cb3d968589d8 119 Multipurpose Clock Generator (MCG) in FEI mode.
Kojto 90:cb3d968589d8 120 Reference clock source for MCG module: Slow internal reference clock
Kojto 90:cb3d968589d8 121 Core clock = 20.97152MHz
Kojto 90:cb3d968589d8 122 Bus clock = 20.97152MHz
Kojto 90:cb3d968589d8 123 1 ... Maximum achievable clock frequency configuration
Kojto 90:cb3d968589d8 124 Multipurpose Clock Generator (MCG) in PEE mode.
Kojto 90:cb3d968589d8 125 Reference clock source for MCG module: System oscillator 0 reference clock
Kojto 90:cb3d968589d8 126 Core clock = 120MHz
Kojto 90:cb3d968589d8 127 Bus clock = 60MHz
Kojto 90:cb3d968589d8 128 2 ... Chip internaly clocked, ready for Very Low Power Run mode.
Kojto 90:cb3d968589d8 129 Multipurpose Clock Generator (MCG) in BLPI mode.
Kojto 90:cb3d968589d8 130 Reference clock source for MCG module: Fast internal reference clock
Kojto 90:cb3d968589d8 131 Core clock = 4MHz
Kojto 90:cb3d968589d8 132 Bus clock = 4MHz
Kojto 90:cb3d968589d8 133 3 ... Chip externally clocked, ready for Very Low Power Run mode.
Kojto 90:cb3d968589d8 134 Multipurpose Clock Generator (MCG) in BLPE mode.
Kojto 90:cb3d968589d8 135 Reference clock source for MCG module: RTC oscillator reference clock
Kojto 90:cb3d968589d8 136 Core clock = 0.032768MHz
Kojto 90:cb3d968589d8 137 Bus clock = 0.032768MHz
Kojto 90:cb3d968589d8 138 4 ... USB clock setup
Kojto 90:cb3d968589d8 139 Multipurpose Clock Generator (MCG) in PEE mode.
Kojto 90:cb3d968589d8 140 Reference clock source for MCG module: System oscillator 0 reference clock
Kojto 90:cb3d968589d8 141 Core clock = 120MHz
Kojto 90:cb3d968589d8 142 Bus clock = 60MHz
Kojto 90:cb3d968589d8 143 */
Kojto 90:cb3d968589d8 144
Kojto 90:cb3d968589d8 145 /* Define clock source values */
Kojto 90:cb3d968589d8 146
Kojto 90:cb3d968589d8 147 #define CPU_XTAL_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 148 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 149 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 150 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 151 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
Kojto 90:cb3d968589d8 152
Kojto 90:cb3d968589d8 153 /* RTC oscillator setting */
Kojto 90:cb3d968589d8 154 /* RTC_CR: SC2P=0,SC4P=0,SC8P=0,SC16P=0,CLKO=1,OSCE=1,WPS=0,UM=0,SUP=0,WPE=0,SWR=0 */
Kojto 90:cb3d968589d8 155 #define SYSTEM_RTC_CR_VALUE 0x0300U /* RTC_CR */
Kojto 90:cb3d968589d8 156
Kojto 90:cb3d968589d8 157 /* Low power mode enable */
Kojto 90:cb3d968589d8 158 /* SMC_PMPROT: AVLP=1,ALLS=1,AVLLS=1 */
Kojto 90:cb3d968589d8 159 #define SYSTEM_SMC_PMPROT_VALUE 0x2AU /* SMC_PMPROT */
Kojto 90:cb3d968589d8 160
Kojto 90:cb3d968589d8 161 /* Internal reference clock trim */
Kojto 90:cb3d968589d8 162 /* #undef SLOW_TRIM_ADDRESS */ /* Slow oscillator not trimmed. Commented out for MISRA compliance. */
Kojto 90:cb3d968589d8 163 /* #undef SLOW_FINE_TRIM_ADDRESS */ /* Slow oscillator not trimmed. Commented out for MISRA compliance. */
Kojto 90:cb3d968589d8 164 /* #undef FAST_TRIM_ADDRESS */ /* Fast oscillator not trimmed. Commented out for MISRA compliance. */
Kojto 90:cb3d968589d8 165 /* #undef FAST_FINE_TRIM_ADDRESS */ /* Fast oscillator not trimmed. Commented out for MISRA compliance. */
Kojto 90:cb3d968589d8 166
Kojto 90:cb3d968589d8 167 #if (CLOCK_SETUP == 0)
Kojto 90:cb3d968589d8 168 #define DEFAULT_SYSTEM_CLOCK 20971520u /* Default System clock value */
Kojto 90:cb3d968589d8 169 #define MCG_MODE MCG_MODE_FEI /* Clock generator mode */
Kojto 90:cb3d968589d8 170 /* MCG_C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
Kojto 90:cb3d968589d8 171 #define SYSTEM_MCG_C1_VALUE 0x06U /* MCG_C1 */
Kojto 90:cb3d968589d8 172 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=0,IRCS=0 */
Kojto 90:cb3d968589d8 173 #define SYSTEM_MCG_C2_VALUE 0x20U /* MCG_C2 */
Kojto 90:cb3d968589d8 174 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
Kojto 90:cb3d968589d8 175 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
Kojto 90:cb3d968589d8 176 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
Kojto 90:cb3d968589d8 177 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
Kojto 90:cb3d968589d8 178 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */
Kojto 90:cb3d968589d8 179 #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */
Kojto 90:cb3d968589d8 180 /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
Kojto 90:cb3d968589d8 181 #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */
Kojto 90:cb3d968589d8 182 /* MCG_C7: OSCSEL=0 */
Kojto 90:cb3d968589d8 183 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
Kojto 90:cb3d968589d8 184 /* OSC_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 185 #define SYSTEM_OSC_CR_VALUE 0x00U /* OSC_CR */
Kojto 90:cb3d968589d8 186 /* SMC_PMCTRL: LPWUI=0,RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 187 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 188 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1 */
Kojto 90:cb3d968589d8 189 #define SYSTEM_SIM_CLKDIV1_VALUE 0x00110000U /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 190 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,RAMSIZE=0 */
Kojto 90:cb3d968589d8 191 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 192 /* SIM_SOPT2: SDHCSRC=0,TIMESRC=0,RMIISRC=0,USBSRC=0,PLLFLLSEL=0,TRACECLKSEL=0,PTD7PAD=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 193 #define SYSTEM_SIM_SOPT2_VALUE 0x00U /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 194 #elif (CLOCK_SETUP == 1)
Kojto 90:cb3d968589d8 195 #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */
Kojto 90:cb3d968589d8 196 #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */
Kojto 90:cb3d968589d8 197 /* MCG_C1: CLKS=0,FRDIV=7,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
Kojto 90:cb3d968589d8 198 #define SYSTEM_MCG_C1_VALUE 0x3AU /* MCG_C1 */
Kojto 90:cb3d968589d8 199 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=0,IRCS=0 */
Kojto 90:cb3d968589d8 200 #define SYSTEM_MCG_C2_VALUE 0x20U /* MCG_C2 */
Kojto 90:cb3d968589d8 201 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
Kojto 90:cb3d968589d8 202 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
Kojto 90:cb3d968589d8 203 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
Kojto 90:cb3d968589d8 204 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
Kojto 90:cb3d968589d8 205 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0x13 */
Kojto 90:cb3d968589d8 206 #define SYSTEM_MCG_C5_VALUE 0x13U /* MCG_C5 */
Kojto 90:cb3d968589d8 207 /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=0x18 */
Kojto 90:cb3d968589d8 208 #define SYSTEM_MCG_C6_VALUE 0x58U /* MCG_C6 */
Kojto 90:cb3d968589d8 209 /* MCG_C7: OSCSEL=0 */
Kojto 90:cb3d968589d8 210 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
Kojto 90:cb3d968589d8 211 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 212 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
Kojto 90:cb3d968589d8 213 /* SMC_PMCTRL: LPWUI=0,RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 214 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 215 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=4 */
Kojto 90:cb3d968589d8 216 #define SYSTEM_SIM_CLKDIV1_VALUE 0x01140000U /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 217 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,RAMSIZE=0 */
Kojto 90:cb3d968589d8 218 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 219 /* SIM_SOPT2: SDHCSRC=0,TIMESRC=0,RMIISRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,PTD7PAD=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 220 #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 221 #elif (CLOCK_SETUP == 2)
Kojto 90:cb3d968589d8 222 #define DEFAULT_SYSTEM_CLOCK 4000000u /* Default System clock value */
Kojto 90:cb3d968589d8 223 #define MCG_MODE MCG_MODE_BLPI /* Clock generator mode */
Kojto 90:cb3d968589d8 224 /* MCG_C1: CLKS=1,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
Kojto 90:cb3d968589d8 225 #define SYSTEM_MCG_C1_VALUE 0x46U /* MCG_C1 */
Kojto 90:cb3d968589d8 226 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=1,IRCS=1 */
Kojto 90:cb3d968589d8 227 #define SYSTEM_MCG_C2_VALUE 0x23U /* MCG_C2 */
Kojto 90:cb3d968589d8 228 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
Kojto 90:cb3d968589d8 229 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
Kojto 90:cb3d968589d8 230 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
Kojto 90:cb3d968589d8 231 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
Kojto 90:cb3d968589d8 232 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */
Kojto 90:cb3d968589d8 233 #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */
Kojto 90:cb3d968589d8 234 /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
Kojto 90:cb3d968589d8 235 #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */
Kojto 90:cb3d968589d8 236 /* MCG_C7: OSCSEL=0 */
Kojto 90:cb3d968589d8 237 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
Kojto 90:cb3d968589d8 238 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 239 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
Kojto 90:cb3d968589d8 240 /* SMC_PMCTRL: LPWUI=0,RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 241 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 242 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0,OUTDIV4=4 */
Kojto 90:cb3d968589d8 243 #define SYSTEM_SIM_CLKDIV1_VALUE 0x00040000U /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 244 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,RAMSIZE=0 */
Kojto 90:cb3d968589d8 245 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 246 /* SIM_SOPT2: SDHCSRC=0,TIMESRC=0,RMIISRC=0,USBSRC=0,PLLFLLSEL=3,TRACECLKSEL=0,PTD7PAD=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 247 #define SYSTEM_SIM_SOPT2_VALUE 0x00030000U /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 248 #elif (CLOCK_SETUP == 3)
Kojto 90:cb3d968589d8 249 #define DEFAULT_SYSTEM_CLOCK 32768u /* Default System clock value */
Kojto 90:cb3d968589d8 250 #define MCG_MODE MCG_MODE_BLPE /* Clock generator mode */
Kojto 90:cb3d968589d8 251 /* MCG_C1: CLKS=2,FRDIV=0,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
Kojto 90:cb3d968589d8 252 #define SYSTEM_MCG_C1_VALUE 0x82U /* MCG_C1 */
Kojto 90:cb3d968589d8 253 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=1,IRCS=1 */
Kojto 90:cb3d968589d8 254 #define SYSTEM_MCG_C2_VALUE 0x23U /* MCG_C2 */
Kojto 90:cb3d968589d8 255 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
Kojto 90:cb3d968589d8 256 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
Kojto 90:cb3d968589d8 257 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=1,LOCS0=0 */
Kojto 90:cb3d968589d8 258 #define SYSTEM_MCG_SC_VALUE 0x02U /* MCG_SC */
Kojto 90:cb3d968589d8 259 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */
Kojto 90:cb3d968589d8 260 #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */
Kojto 90:cb3d968589d8 261 /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
Kojto 90:cb3d968589d8 262 #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */
Kojto 90:cb3d968589d8 263 /* MCG_C7: OSCSEL=1 */
Kojto 90:cb3d968589d8 264 #define SYSTEM_MCG_C7_VALUE 0x01U /* MCG_C7 */
Kojto 90:cb3d968589d8 265 /* OSC_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 266 #define SYSTEM_OSC_CR_VALUE 0x00U /* OSC_CR */
Kojto 90:cb3d968589d8 267 /* SMC_PMCTRL: LPWUI=0,RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 268 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 269 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0,OUTDIV4=0 */
Kojto 90:cb3d968589d8 270 #define SYSTEM_SIM_CLKDIV1_VALUE 0x00U /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 271 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,RAMSIZE=0 */
Kojto 90:cb3d968589d8 272 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 273 /* SIM_SOPT2: SDHCSRC=0,TIMESRC=0,RMIISRC=0,USBSRC=0,PLLFLLSEL=3,TRACECLKSEL=0,PTD7PAD=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 274 #define SYSTEM_SIM_SOPT2_VALUE 0x00030000U /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 275 #elif (CLOCK_SETUP == 4)
Kojto 90:cb3d968589d8 276 #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */
Kojto 90:cb3d968589d8 277 #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */
Kojto 90:cb3d968589d8 278 /* MCG_C1: CLKS=0,FRDIV=7,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
Kojto 90:cb3d968589d8 279 #define SYSTEM_MCG_C1_VALUE 0x3AU /* MCG_C1 */
Kojto 90:cb3d968589d8 280 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=0,IRCS=0 */
Kojto 90:cb3d968589d8 281 #define SYSTEM_MCG_C2_VALUE 0x20U /* MCG_C2 */
Kojto 90:cb3d968589d8 282 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
Kojto 90:cb3d968589d8 283 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
Kojto 90:cb3d968589d8 284 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
Kojto 90:cb3d968589d8 285 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
Kojto 90:cb3d968589d8 286 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0x13 */
Kojto 90:cb3d968589d8 287 #define SYSTEM_MCG_C5_VALUE 0x13U /* MCG_C5 */
Kojto 90:cb3d968589d8 288 /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=0x18 */
Kojto 90:cb3d968589d8 289 #define SYSTEM_MCG_C6_VALUE 0x58U /* MCG_C6 */
Kojto 90:cb3d968589d8 290 /* MCG_C7: OSCSEL=0 */
Kojto 90:cb3d968589d8 291 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
Kojto 90:cb3d968589d8 292 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Kojto 90:cb3d968589d8 293 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
Kojto 90:cb3d968589d8 294 /* SMC_PMCTRL: LPWUI=0,RUNM=0,STOPA=0,STOPM=0 */
Kojto 90:cb3d968589d8 295 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
Kojto 90:cb3d968589d8 296 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=4 */
Kojto 90:cb3d968589d8 297 #define SYSTEM_SIM_CLKDIV1_VALUE 0x01140000U /* SIM_CLKDIV1 */
Kojto 90:cb3d968589d8 298 /* SIM_CLKDIV2: USBDIV=4,USBFRAC=1 */
Kojto 90:cb3d968589d8 299 #define SYSTEM_SIM_CLKDIV2_VALUE 0x09U /* SIM_CLKDIV2 */
Kojto 90:cb3d968589d8 300 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,RAMSIZE=0 */
Kojto 90:cb3d968589d8 301 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
Kojto 90:cb3d968589d8 302 /* SIM_SOPT2: SDHCSRC=0,TIMESRC=0,RMIISRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,PTD7PAD=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Kojto 90:cb3d968589d8 303 #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */
Kojto 90:cb3d968589d8 304 #endif
Kojto 90:cb3d968589d8 305
bogdanm 82:6473597d706e 306 /**
bogdanm 82:6473597d706e 307 * @brief System clock frequency (core clock)
bogdanm 82:6473597d706e 308 *
bogdanm 82:6473597d706e 309 * The system clock frequency supplied to the SysTick timer and the processor
bogdanm 82:6473597d706e 310 * core clock. This variable can be used by the user application to setup the
bogdanm 82:6473597d706e 311 * SysTick timer or configure other parameters. It may also be used by debugger to
bogdanm 82:6473597d706e 312 * query the frequency of the debug timer or configure the trace clock speed
bogdanm 82:6473597d706e 313 * SystemCoreClock is initialized with a correct predefined value.
bogdanm 82:6473597d706e 314 */
bogdanm 82:6473597d706e 315 extern uint32_t SystemCoreClock;
bogdanm 82:6473597d706e 316
bogdanm 82:6473597d706e 317 /**
bogdanm 82:6473597d706e 318 * @brief Setup the microcontroller system.
bogdanm 82:6473597d706e 319 *
bogdanm 82:6473597d706e 320 * Typically this function configures the oscillator (PLL) that is part of the
bogdanm 82:6473597d706e 321 * microcontroller device. For systems with variable clock speed it also updates
bogdanm 82:6473597d706e 322 * the variable SystemCoreClock. SystemInit is called from startup_device file.
bogdanm 82:6473597d706e 323 */
bogdanm 82:6473597d706e 324 void SystemInit (void);
bogdanm 82:6473597d706e 325
bogdanm 82:6473597d706e 326 /**
bogdanm 82:6473597d706e 327 * @brief Updates the SystemCoreClock variable.
bogdanm 82:6473597d706e 328 *
bogdanm 82:6473597d706e 329 * It must be called whenever the core clock is changed during program
bogdanm 82:6473597d706e 330 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
bogdanm 82:6473597d706e 331 * the current core clock.
bogdanm 82:6473597d706e 332 */
bogdanm 82:6473597d706e 333 void SystemCoreClockUpdate (void);
bogdanm 82:6473597d706e 334
bogdanm 82:6473597d706e 335 #ifdef __cplusplus
bogdanm 82:6473597d706e 336 }
bogdanm 82:6473597d706e 337 #endif
bogdanm 82:6473597d706e 338
bogdanm 82:6473597d706e 339 #endif /* #if !defined(SYSTEM_MK64F12_H_) */